Three-valued random sequence generator based on mott memristor

By using a self-oscillation and comparison circuit of a Mott memristor to generate a ternary random sequence, the problem of excessive power consumption and area overhead in the prior art is solved, realizing the generation of low-power, high-frequency ternary random sequences, which is suitable for high-integration and high-security applications.

CN120832698APending Publication Date: 2025-10-24PEKING UNIV
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Patent Information

Application Number
CN202511017126.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-07-23
Publication Date
2025-10-24

AI Technical Summary

Technical Problem

Existing hardware circuit designs for ternary random sequence generators based on CMOS devices suffer from excessive power consumption and area overhead, making it difficult to meet the requirements of high integration and high security applications.

Method used

Using a volatile Mott memristor as an entropy source, and taking advantage of the random fluctuations of multiple physical quantities during its threshold transition process, combined with a self-oscillating circuit and a comparator circuit, a three-valued random sequence is generated within a compact hardware structure, including a Mott memristor, a capacitor, and a load resistor. The random sequence of three state values ​​is output through self-oscillating behavior and a comparator circuit.

Benefits of technology

It achieves low-power, high-frequency generation of ternary random sequences, with a compact hardware structure, suitable for highly integrated and high-security applications, reducing the power consumption and area overhead of hardware circuits, and is compatible with CMOS technology.

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Abstract

The invention provides a three-valued random sequence generator based on a mott memristor, and belongs to the technical field of microelectronic devices and novel calculation. The circuit comprises a self-oscillation circuit based on the Mortat memristor and a comparison circuit. The self-oscillation circuit comprises an excitation source, the Mortat memristor, a capacitor connected with the Mortat memristor in parallel, and a load resistor connected with the Mortat memristor in series. In the self-oscillation circuit, an excitation source applies constant current excitation to a Mortality memristor, the Mortality memristor is biased in a specific working area transitioning from a negative differential resistance area to a positive differential resistance area, the self-oscillation behavior of the Mortality memristor is triggered, the Mortality memristor introduces a plurality of random entropy sources, and the self-oscillation behavior of the Mortality memristor is triggered. Comprising Joule heat, inter-cycle fluctuation of electrical parameters of a device, a self-oscillation behavior and a random entropy source, outputs a pulse sequence with random amplitude and frequency, and the comparison circuit converts the random pulse sequence into a random sequence with three state values through two adjustable reference voltages and outputs the random sequence. The system is compact in hardware structure, low in power consumption and high in working frequency.
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Description

TECHNICAL FIELD

[0001] The present application belongs to the field of microelectronic devices and novel computing technology, and specifically relates to a ternary random sequence generator based on the negative differential resistance (NDR) characteristics of Mott memristor, which utilizes the random fluctuations of multiple physical quantities of the Mott memristor itself during the threshold transition process as the random number entropy source to generate ternary random sequences in a compact hardware circuit. BACKGROUND

[0002] Random computing has long been regarded as a low-complexity and high-fault-tolerant information processing paradigm due to its probabilistic representation and operation mechanism. The basic idea is to encode numerical values into bit streams and implement arithmetic and nonlinear function operations with minimal logic, such as multiplication, which can be completed by a single AND gate, and exponential, absolute value, and other functions, which can be approximated by a small number of gate circuits. Random computing has demonstrated significant hardware efficiency advantages in signal processing, image analysis, cryptography, and Monte Carlo simulation. However, existing random computing systems are mostly based on binary bit streams, with limited information carrying density and security improvement space, which gradually becomes a bottleneck for system expansion in high-integration and high-security application scenarios.

[0003] To break through the above limitations, multi-valued logic systems, especially ternary systems, have become an important direction to improve random computing capabilities. Ternary systems are based on {-1, 0, +1} or {0, 1, Z} logic states, significantly improving information density and security by introducing intermediate states: under the same sequence length, the ternary key space is expanded by about 17 orders of magnitude compared to binary (e.g., the number of combinations of 100-bit ternary sequences is 5.15 x 10 47 , far exceeding the 1.27 x 10 30 combinations of 100-bit binary sequences), greatly enhancing the ability to resist brute force attacks. At the same time, ternary architecture can greatly optimize hardware efficiency: ternary signal transmission reduces 30% interconnection pins, memory cell data density increases by about 58%, and the reduction in operation complexity reduces overall system power consumption. However, current hardware random number generators are mostly based on CMOS devices, and the power consumption and area overhead caused by their complex circuit design greatly reduce the benefits of the computing structure, so a more cost-effective method is needed to generate ternary random sequences. The emergence of emerging microelectronic devices, such as magnetic tunnel junctions, spintronic devices, and memristors, provides new ideas for the design of random number generators, which can greatly reduce the hardware circuit power consumption and area overhead of generating multi-valued random sequences by utilizing the physical randomness in the resistance switching process of the devices. Existing ternary logic circuits based on memristors mostly rely on two non-volatile devices, and there is still room for improvement in hardware overhead and system operating frequency. SUMMARY

[0004] In view of the problems in the prior art, the application provides a three-value random sequence generator based on a Mott memristor, which uses a volatile device, the Mott memristor, takes random fluctuations of multiple physical quantities of the Mott memristor in a threshold transition process as a physical entropy source, and generates a random sequence with three values in a compact hardware circuit structure with low energy consumption.

[0005] The technical scheme of the application is as follows:

[0006] A three-value random sequence generator based on a Mott memristor, comprising a self-oscillation circuit based on a Mott memristor and a comparison circuit. The self-oscillation circuit based on the Mott memristor comprises an excitation source, a Mott memristor, and a capacitor C p in parallel with the Mott memristor, wherein one end of the Mott memristor is connected in series with a load resistor R load acting as an output load, the other end of the load resistor R load is grounded, and the Mott memristor is connected to the comparison circuit at the connection between the Mott memristor and the load resistor R load , and the comparison circuit outputs a three-value random sequence.

[0007] In the self-oscillation circuit based on the Mott memristor, the excitation source applies a constant current excitation to the Mott memristor, biases the Mott memristor in a specific working region in which a negative differential resistance (NDR) region transitions to a positive differential resistance (PDR) region, and triggers a self-oscillation behavior of the Mott memristor. In the specific working region, the Mott memristor introduces multiple random entropy sources in a threshold transition process, including accumulated Joule heat in the device and inter-cycle fluctuations of electrical parameters of the device itself. The self-oscillation behavior of the Mott memristor combines the random entropy sources, and the self-oscillation circuit based on the Mott memristor outputs a pulse sequence with random amplitude and frequency, which is the output voltage on the load resistor R load .

[0008] The comparison circuit compares the pulse voltage output by the self-oscillation circuit with two adjustable reference voltages, and converts the pulse sequence into a random sequence output with three state values.

[0009] Further, the inter-cycle fluctuations of the parameters of the Mott memristor device itself include inter-cycle fluctuations of a threshold voltage V th , a holding voltage V hold , a high resistance state HRS, and a low resistance state LRS.

[0010] Further, the comparison circuit comprises an operational amplifier circuit and a comparator.

[0011] Further, the excitation source is a constant current source.

[0012] Further, the comparison circuit compares the two reference voltages V ref1 and V ref2 , so that the self-oscillation circuit outputs a pulse voltage greater than V ref1 , the comparison circuit outputs 1, less than V ref2 , the comparison circuit outputs -1, and 0 at other times, thereby obtaining a random sequence with three state values.

[0013] Further, the capacitor C p parallel to the Mott memristor uses the parasitic capacitance of the device itself and the circuit to act as a parallel capacitor.

[0014] Further, the Mott memristor comprises a metal-insulator-metal (MIM) vertical stack structure including a substrate, a bottom electrode, a resistance change layer, and a top electrode; the substrate can be silicon, silicon oxide, sapphire (Al2O3), or a flexible substrate, etc.; the bottom electrode and the top electrode are realized by a metal electrode material through a CMOS process, and the electrode material can adopt noble metals or metal nitrides, such as Pt, Ti, Au, Pd, and TiN, etc., with a thickness of 10 nm to 200 nm; the resistance change layer adopts materials with Mott phase change characteristics and negative differential resistance characteristics, such as VO2 and NbO2, with a thickness of 10 nm to 100 nm.

[0015] The technical effects of the present application are as follows:

[0016] The three-value random sequence generator based on the volatile Mott memristor has the following beneficial effects compared with other existing random sequence generators:

[0017] 1. The entropy source of the hardware three-value random sequence generator of the present application comes from the random fluctuations of multiple physical quantities in the working process of the Mott memristor, including the Joule heat accumulated in the working process of the device, the electrical parameters of the device, etc., which belongs to a natural entropy source, ensuring the randomness of the generated sequence.

[0018] 2. The hardware three-value random sequence generator of the present application has an extremely compact hardware structure, only including a Mott memristor, a capacitor, a resistor, and a post-stage comparison circuit composed of basic elements such as an operational amplifier and a comparator, which can reduce the hardware circuit area overhead and power consumption, and is more in line with the low-power requirement; at the same time, the actual production cost is low, and it has good compatibility with the CMOS process, and the size of the Mott memristor can be miniaturized, suitable for CMOS circuits under advanced process nodes.

[0019] 3. The hardware three-value random sequence generator of the present application relies on the self-oscillation characteristics of the Mott memristor, has a high working frequency, which can reach megahertz level, and is suitable for application scenarios that require high-frequency generation of random sequences. BRIEF DESCRIPTION OF DRAWINGS

[0020] Figure 1 The structure profile schematic diagram of the Mott memristor in the embodiment of the present application.

[0021] Figure 2 The scanning electron microscope (SEM) image of the Mott memristor in the embodiment of the present application.

[0022] Figure 3 The transmission electron microscope (TEM) image of the Mott memristor in the embodiment of the present application.

[0023] Figure 4 The I-V characteristic diagram of the Mott memristor in the embodiment of the present application under the direct current voltage scanning for 100 cycles.

[0024] Figure 5 The V th , V hold cumulative distribution function (CDF) diagram of the Mott memristor in the embodiment of the present application under the direct current voltage scanning for 100 cycles.

[0025] Figure 6 The HRS, LRS cycle fluctuation diagram of the Mott memristor in the embodiment of the present application under the direct current voltage scanning for 100 cycles.

[0026] Figure 7 The I-V characteristic diagram of the Mott memristor in the embodiment of the present application under the direct current scanning for 50 cycles, and the constant current bias interval schematic diagram of the self-oscillation circuit in the working process of the three-value random sequence generator.

[0027] Figure 8 The structure schematic diagram of the three-value random sequence generator based on the Mott memristor in the embodiment of the present application, wherein a constant current source is used as an excitation source, M is the Mott memristor, C p is a parallel capacitor (which can be replaced by the parasitic capacitor of the memristor), and R load is a load resistor.

[0028] Figure 9 The output voltage waveform schematic diagram of the self-oscillation circuit based on the NDR characteristics of the Mott memristor in the embodiment of the present application.

[0029] Figure 10 The output voltage waveform diagram of the self-oscillation circuit based on the Mott memristor in the embodiment of the present application under a specific constant current bias.

[0030] Figure 11 The three-value random sequence diagram output by the three-value random sequence generator based on the Mott memristor in the embodiment of the present application after the output voltage waveform shown in the above is processed by a comparison circuit. Figure 10

[0031] Figure 12 The working flowchart of the three-value random sequence generator based on the Mott memristor in the embodiment of the present application.​ DETAILED DESCRIPTION

[0032] The present invention will be further clearly and completely described below through specific embodiments in conjunction with the accompanying drawings.

[0033] This invention proposes a three-value random sequence generator based on a Mott memristor. This device can generate random sequences with three state values ​​with low energy consumption within a compact hardware circuit structure, addressing the high area and power consumption issues of CMOS-based random sequence generators. Unlike algorithms that generate random sequences, the randomness of this invention derives from multiple random entropy sources introduced when the Mott memristor self-oscillates when biased in a specific operating region. These sources include Joule heat accumulated in the device and cycle-to-cycle fluctuations in the device's electrical parameters. The resulting design is simple in hardware, easy to operate, and compatible with CMOS processes.

[0034] This example prepared Figure 1 NbO shown x The Mott memristor comprises: a silicon dioxide substrate 1 grown on a silicon substrate, a bottom electrode 2 formed by depositing 10nm Ti and 30nm Pt, and a NbO layer with a thickness of 30nm. x The resistive switching layer 3 is formed, and 10nm Ti and 30nm Pt are deposited to form the top electrode 4. The SEM top view of the device is shown in FIG. Figure 2 As shown, the cross-sectional TEM image of the MIM stacking structure is shown in Figure 3 shown.

[0035] Figure 4 The IV characteristics of the Ti / Pt / NbOx / Ti / Pt Mott memristor fabricated based on the above method under DC voltage sweep are shown. The test was repeated 100 times under the same conditions, showing good volatility characteristics. th and V hold Larger range of fluctuations between cycles.

[0036] From the above 100 DC voltage sweep tests, the V of each threshold transition can be extracted. th 、V hold , HRS, LRS and other parameters. The fluctuations of the above physical quantities are derived from the randomness of the physical process during the device threshold transition, providing a rich and reliable source of randomness for the true random sequence generator. Figure 5 and Figure 6 The V th and V hold The CDF diagram and the inter-cycle fluctuation distribution of HRS and LRS show that the above-mentioned physical quantities have large inter-cycle fluctuations.

[0037] Figure 7The current-driven negative differential resistance (NDR) characteristics of the Mott memristor in this embodiment under direct current (DC) current scanning are shown. Within a certain current bias range, the Mott memristor exhibits NDR characteristics; when the input current exceeds this range, the Mott memristor exhibits PDR characteristics. In the ternary random sequence generation circuit described in this application, the Mott memristor needs to be biased in a specific operating region that transitions from NDR to PDR. Similar to the I-V characteristics under DC voltage scanning, the current-driven NDR characteristics also have inter-cycle fluctuations.

[0038] Figure 8 The structure of the ternary random sequence generator based on the Mott memristor in this application is shown. The ternary random sequence generator mainly consists of two parts: the first part is a self-oscillating circuit based on the Mott memristor, which has a specific structure of an excitation source, a Mott memristor, and a capacitor C p parallel to the Mott memristor load , and a load resistor R load as an output load. In this embodiment, a constant current source is used as the excitation source, and the parasitic capacitance of the device itself and the circuit is used as the parallel capacitor, making the hardware structure of the self-oscillating circuit more compact and further reducing the area overhead; the second part is a comparison circuit, whose input signal is the output voltage on the load resistor R load , which is processed by operational amplifiers, comparators, and other electronic elements, and outputs a random sequence with three state values.

[0039] During the operation of the ternary random sequence generator based on the Mott memristor, a constant current excitation of 310 μA is applied to the self-oscillating circuit, and the output pulse voltage waveform shown in Figure 9 is obtained. During each oscillation process, a minimum voltage V min is generated at 1, and a maximum voltage V max is generated at 2. Due to the NDR characteristics of the device and thermal noise, the output voltage of the self-oscillating circuit exhibits the non-periodic oscillation random firing characteristics shown in Figure 10 . Further, due to the influence of physical quantities such as V th , V hold , HRS, LRS, etc., the maximum and minimum values of each oscillation in the oscillation sequence output by the self-oscillating circuit also have fluctuations, and the relationship between V max and V min is shown in the following formula:

[0040]

[0041] In the comparison circuit, two reference voltages V ref1 and V ref2 are given, so that when the output pulse voltage of the self-oscillating circuit is greater than V ref1When the output voltage of the self-oscillating circuit is greater than V ref2 When the output voltage of the self-oscillating circuit is greater than V Figure 10 The three-value random sequence obtained by processing the output voltage of the self-oscillating circuit in the comparator is shown in Fig. 4. Figure 11 Figure 12 The working flow of the three-value random sequence generator based on the Mott memristor.

[0042] Finally, it should be noted that the purpose of the embodiments disclosed is to help further understand the present application, but those skilled in the art can understand that various replacements and modifications are possible without departing from the spirit and scope of the present application and the appended claims. Therefore, the present application should not be limited to the disclosed embodiments, and the scope of the present application is defined by the scope of the claims.​

Claims

1. A ternary random sequence generator based on Mott memristor characterized in that, The self-oscillating circuit based on the Mott memristor and the comparison circuit include an excitation source and a Mott memristor. The excitation source is connected to both ends of the Mott memristor and a capacitor C is connected in parallel with the Mott memristor. p , one end of the Mott memristor is connected to the load resistor R load In series, the load resistor R load The other end is grounded, and the Mott memristor is connected to the load resistor R load The output of the connection is connected to the comparison circuit, and the comparison circuit outputs a three-value random sequence; In the self-oscillating circuit based on the Mott memristor, an excitation source applies a constant current excitation to the Mott memristor, so as to bias the Mott memristor in a specific working region which is in transition from a negative differential resistance region to a positive differential resistance region, and trigger a self-oscillating behavior of the Mott memristor. In the specific working region, the Mott memristor introduces a plurality of random entropy sources in a threshold transition process, including Joule heat accumulated in the device and cyclic inter-range fluctuations of electrical parameters of the device itself. The self-oscillating behavior of the Mott memristor combines the random entropy sources, and the self-oscillating circuit based on the Mott memristor outputs a pulse sequence with randomness in amplitude and frequency, which is an output voltage on the load resistor R load . The comparison circuit compares the pulse voltage outputted by the self-oscillation circuit with the size of the reference voltage through two adjustable reference voltages, and converts the pulse sequence into a random sequence output with three state values.

2. The memristor-based ternary random sequence generator of claim 1, wherein, The inter-cycle fluctuations of the Mott-Resistor device's own parameters, including the threshold voltage V th , the retention voltage V hold , the high resistance state HRS and the low resistance state LRS.

3. The memristor-based ternary random sequence generator of claim 1, wherein, The comparison circuit comprises an operational amplifier circuit and a comparator.

4. The memristor-based ternary random sequence generator of claim 1, wherein, The excitation source is a constant current source.

5. The memristor-based ternary random sequence generator of claim 1, wherein, The comparison circuit compares the voltage outputted by the self-oscillation circuit with two reference voltages V ref1 and V ref2 , so that the comparison circuit outputs 1 when the voltage outputted by the self-oscillation circuit is greater than V ref1 , outputs -1 when the voltage outputted by the self-oscillation circuit is less than V ref2 , and outputs 0 at other times, thereby obtaining a random sequence with three state values.

6. The memristor-based ternary random sequence generator of claim 1, wherein, The capacitor C in parallel with the memristor p The parasitic capacitance of the device itself and the circuit is used.

7. The memristor-based ternary random sequence generator of claim 1, wherein, The Mott memristor comprises a metal-insulator-metal vertical stack structure including a substrate, a bottom electrode, a resistance variable layer and a top electrode.

8. The memristor-based ternary random sequence generator of claim 7, wherein, The substrate is silicon, silicon oxide, sapphire (Al2O3) or a flexible substrate; the bottom electrode and the top electrode are realized by a CMOS process using a metal electrode material, and the electrode material is a noble metal or a metal nitride, such as Pt, Ti, Au, Pd or TiN, with a thickness of 10-200 nm; The resistance variable layer is made of VO2 or NbO2 material, with a thickness of 10-100 nm.