Buck-boost converter with extended ramp control and feedback circuit thereof
By extending the ramp control scheme and using a single ramp voltage for feedback control, the efficiency and stability issues of the buck-boost converter when the input voltage is close to the output voltage are resolved, achieving more efficient voltage conversion.
Patent Information
- Application Number
- CN202510250957.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-12-03
- Filing Date
- 2025-03-04
- Publication Date
- 2025-10-24
AI Technical Summary
When the input voltage of an existing buck-boost converter is close to the output voltage, the pulse width modulation control leads to inaccurate duty cycle control, resulting in large output ripple and switching losses. In addition, the average inductor current in the buck-boost mode is large, resulting in poor efficiency.
An extended ramp control scheme is adopted, using a single ramp voltage for feedback control. Switching signals are generated through an error amplifier, ramp generator, and digital control circuit. The operating mode is determined by combining the reference duty cycle signal, thus avoiding switching operations between buck and boost modes.
It reduces the static current consumption of the ramp generator, lowers inductor current ripple, improves the stability and efficiency of the output voltage, and reduces output fluctuations during mode switching.
Smart Images

Figure CN120834723A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to a buck-boost converter, and more particularly to a buck-boost converter with extended ramp control. BACKGROUND
[0002] Power converters are widely used in various electronic systems to provide a stable voltage supply. Power converters generally include two types: switching capacitor and switching inductor to meet different requirements (such as different load sizes).
[0003] Among various power converters, a buck-boost converter is characterized by being able to generate an output voltage greater than or less than its input voltage. Generally speaking, the buck-boost converter provides a buck mode and a boost mode for different voltage conversions. However, when the input voltage is close to the output voltage, the nonlinearity of pulse width modulation (PWM) control will cause the switching of the power converter to fail to provide accurate duty cycle control, resulting in a larger output ripple. To solve this problem, a buck-boost mode can be added to cover the situation where the input voltage is close to the output voltage.
[0004] However, the buck-boost mode requires the switches of the power stage to perform more switching operations, which is accompanied by greater switching loss, and the average inductor current in the buck-boost mode is also greater, resulting in greater conduction loss, leading to poor efficiency. SUMMARY
[0005] Therefore, the main purpose of the present application is to provide a new feedback control circuit using extended ramp control, which can be used in a buck-boost converter to solve the above problems.
[0006] An embodiment of the present invention discloses a feedback circuit for a buck-boost converter having an input voltage and an output voltage. The feedback circuit includes an error amplifier, a ramp generator, a first comparator, and a digital control circuit. The error amplifier is configured to generate an error voltage based on the output voltage. The ramp generator is configured to generate a ramp voltage. The first comparator is coupled to the error amplifier and the ramp generator and configured to compare the error voltage and the ramp voltage to generate a control signal. The digital control circuit is coupled to the first comparator and configured to generate a plurality of switching signals based on the control signal and a reference duty cycle signal.
[0007] Another embodiment of the present invention discloses a buck-boost converter including a power stage and a feedback circuit. The power stage is configured to receive an input voltage to generate an output voltage. The feedback circuit is coupled to the power stage and includes an error amplifier, a ramp generator, a first comparator, and a digital control circuit. The error amplifier is configured to generate an error voltage based on the output voltage. The ramp generator is configured to generate a ramp voltage. The first comparator is coupled to the error amplifier and the ramp generator and configured to compare the error voltage and the ramp voltage to generate a control signal. The digital control circuit is coupled to the first comparator and configured to generate a plurality of switching signals based on the control signal and a reference duty cycle signal. BRIEF DESCRIPTION OF DRAWINGS
[0008] Figure 1 A schematic diagram of a buck-boost converter as a 4-switch converter.
[0009] Figure 2A An exemplary mode of operation of the buck-boost converter in a buck mode is shown.
[0010] Figure 2B An exemplary mode of operation of the buck-boost converter in a boost mode is shown.
[0011] Figure 2C An exemplary mode of operation of the buck-boost converter in a buck-boost mode is shown.
[0012] Figure 3 A schematic diagram of a buck-boost converter according to an embodiment of the present invention.
[0013] Figure 4 An exemplary mode of operation of the buck-boost converter according to an embodiment of the present invention is shown.
[0014] Figure 5 A schematic diagram of a hybrid buck-boost converter according to an embodiment of the present invention.
[0015] Figure 6A An exemplary mode of operation of the hybrid buck-boost converter in a buck mode is shown.
[0016] Figure 6B An exemplary mode of operation of the hybrid boost-buck converter in boost mode is shown.
[0017] Figure 7 A detailed implementation of the boost-buck converter of Figure 3
[0018] Figure 8A and Figure 8B A waveform diagram of the feedback circuit controlling operation of the hybrid boost-buck converter.
[0019] Figure 9 A schematic diagram of an exemplary implementation of the digital control circuit of an embodiment of the invention.
[0020] Wherein the reference numerals are explained as follows:
[0021] 10, 30 boost-buck converter
[0022] V IN input voltage
[0023] V OUT output voltage
[0024] L, L S inductor
[0025] SW1-SW4, SW A -SW D switch
[0026] C OUT output capacitor
[0027] R L resistive load
[0028] 300 power stage
[0029] 302 error amplifier
[0030] 304 slope generator
[0031] 306, 912 comparator
[0032] 308 digital control circuit
[0033] V EA error voltage
[0034] V RAMP slope voltage
[0035] V C control signal
[0036] VDR reference duty signal
[0037] V SW , V SW_A ~ V SW_D switching signal
[0038] V mid reference voltage
[0039] V P peak amplitude
[0040] 50 hybrid buck-boost converter
[0041] C FLY flying capacitor
[0042] V REF reference voltage
[0043] 702 soft start circuit
[0044] 704 compensation device
[0045] 706 drive circuit
[0046] DX, DY duty control signal
[0047] I L inductor current
[0048] 910 reference duty generator
[0049] 920 logic circuit
[0050] V DR_BAR reverse reference duty signal DETAILED DESCRIPTION
[0051] Figure 1 is a schematic diagram of a 4-switch buck-boost converter 10. The buck-boost converter 10 is used to receive an input voltage V IN to generate an output voltage V OUT , which includes an inductor L and four switches SW1-SW4. An output capacitor C OUT and a resistive load R L are not included in the buck-boost converter 10 but are shown Figure 1 for ease of illustration. The buck-boost converter 10 is a switching inductor power converter, in which an inductor current flowing through the inductor L is controlled by appropriate switching of the switches SW1-SW4 for supplying power to the output and generating a stable output voltage V OUT .
[0052] The buck-boost converter 10 can operate in a buck mode or a boost mode. If the input voltage V IN is greater than the output voltage V OUT , the buck-boost converter 10 operates in the buck mode. Figure 2A An exemplary operation of the buck-boost converter 10 in the buck mode is shown. As shown, the buck mode has two phases. In the first phase, switches SW1 and SW4 are on, and switches SW2 and SW3 are off; in the second phase, switches SW2 and SW4 are on, and switches SW1 and SW3 are off. Figure 2A
[0053] If the input voltage V IN is less than the output voltage V OUT , the buck-boost converter 10 operates in the boost mode. Figure 2B An exemplary operation of the buck-boost converter 10 in the boost mode is shown. As shown, the boost mode has two phases. In the first phase, switches SW1 and SW3 are on, and switches SW2 and SW4 are off; in the second phase, switches SW1 and SW4 are on, and switches SW2 and SW3 are off. Figure 2B
[0054] As mentioned above, to solve the non-linear problem when the input voltage V IN is close to the output voltage V OUT , the buck-boost converter 10 can operate in a buck-boost mode, as shown. The buck-boost mode also has two phases. In the first phase, switches SW1 and SW3 are on, and switches SW2 and SW4 are off; in the second phase, switches SW2 and SW4 are on, and switches SW1 and SW3 are off. Figure 2C
[0055] As can be seen, in the buck-boost mode, all the four switches SW1-SW4 will transition when switching between the two phases, thus, the switching loss in the buck-boost mode is greater than that in the buck mode or the boost mode. The switching method of the buck-boost mode can also cause the average inductor current to be equal to twice the load current, and the inductor current is greater than that in the buck mode or the boost mode under similar duty cycle control, which results in a large conduction loss in the buck-boost mode. As a result, when the buck-boost mode is used, the efficiency of the buck-boost converter 10 is reduced. Figures 2A-2C
[0056] Therefore, the industry has developed several solutions to address the issue of inaccurate duty cycle control when the input voltage is close to the output voltage without using the buck-boost mode. For example, a buck-boost converter can use dual-ramp control, which allows one ramp voltage to operate in buck mode and the other ramp voltage to operate in boost mode when the output voltage is close to the input voltage. The outputs of the two ramp controls can be used alternately to generate the output voltage. However, the dual-ramp control scheme requires two ramp generators in the control circuit, which is accompanied by a large quiescent current. The offset between the two ramp generators may also reduce the accuracy of the ramp control. It should also be noted that when the input voltage is close to the output voltage and / or when the mode transition is in progress, there may be large output fluctuations.
[0057] The present invention proposes an extended ramp control scheme for a buck-boost converter. This extended ramp control scheme uses only a single ramp voltage to implement feedback control of the buck-boost converter. Therefore, only a single ramp generator is required, reducing the quiescent current of the ramp generator. A reference duty cycle signal can be used to distinguish between buck and boost modes, eliminating the need for buck-boost mode. This eliminates the lower efficiency of the buck-boost mode in the control circuit.
[0058] Figure 3 FIG2 is a schematic diagram of a buck-boost converter 30 according to an embodiment of the present invention. The buck-boost converter 30 includes a power stage 300, which is controlled by a feedback circuit. The feedback circuit includes an error amplifier 302, a ramp generator 304, a comparator 306, and a digital control circuit 308. The power stage 300 can be used to receive an input voltage V IN To generate an output voltage V OUT and the output voltage V with sufficient energy OUT In some embodiments, the power stage 300 may be composed of one or more power components and a plurality of switches, such as Figure 1 A buck-boost converter 10 is shown, but is not limited thereto.
[0059] In the feedback circuit, the error amplifier 302 can output the voltage V OUT To generate an error voltage V EA The ramp generator 304 can be used to generate a ramp voltage V RAMP and the ramp voltage V RAMP Provided to comparator 306. Comparator 306 can compare the error voltage V EA With the ramp voltage V RAMP , to generate a control signal V C The digital control circuit 308 can receive the control signal V output by the comparator 306. C , and receives a reference duty cycle signal V DRTherefore, the digital control circuit 308 can generate one or more switching signals V C and the reference duty cycle signal V DR .
[0060] The reference duty cycle signal V DR provided to the digital control circuit 308 can be used to determine the operation mode of the buck-boost converter 30. Depending on the operation mode, the digital control circuit 308 can output the switching signals V SW to control the switches of the power stage 300 in an appropriate manner.
[0061] Figure 4 The operation principle of the extended ramp control is shown in an embodiment of the present application, which shows the waveforms of a reference voltage V mid , an error voltage V EA , a ramp voltage V RAMP , and a reference duty cycle signal V DR . The reference duty cycle signal V DR is a pulse signal, and the pulse edges of the reference duty cycle signal V RAMP correspond to the intersections of the ramp voltage V mid and the reference voltage V DR . According to the reference duty cycle signal V EA , the digital control circuit 308 can determine the operation mode of the buck-boost converter 30, i.e., whether the buck-boost converter 30 operates in the buck mode or the boost mode. More specifically, when the error voltage V mid is less than the reference voltage V EA , the buck-boost converter 30 operates in the buck mode; and when the error voltage V mid is greater than the reference voltage V RAMP , the buck-boost converter 30 operates in the boost mode. Therefore, by using the extended ramp control scheme, the same ramp voltage V C can be used to control the operation mode of the buck-boost converter and to generate the control signal V mid for phase-cut control, without including other ramp voltages or ramp generators.
[0062] In a preferred embodiment, the reference voltage V RAMP may be located at the middle level of the ramp voltage V mid . That is, the reference voltage V RAMP is equal to half of the peak amplitude V P of the ramp voltage V DR . Correspondingly, the duty cycle of the reference duty cycle signal V OUT is substantially equal to 50%.
[0063] It is noted that the extended ramp control scheme of the present application can be applied to various buck-boost converters. In one embodiment, the extended ramp control scheme can be applied to a hybrid buck-boost converter which, in addition to including an inductor, is provided with a flying capacitor. With the flying capacitor, a smaller inductor can be used to achieve the same output power, thereby improving the power density and reducing the circuit cost. Moreover, the hybrid buck-boost converter can provide a continuous energy output which can be regulated to be equal to the input voltage V OUT and a smaller ripple is formed on the output voltage V
[0064] Figure 5 FIG. 1 shows a schematic diagram of a hybrid buck-boost converter 50 according to an embodiment of the present application. Figure 5 The hybrid buck-boost converter 50 shown is also known as a KY buck-boost converter. The hybrid buck-boost converter 50 includes four switches SW A D an inductor L S and a flying capacitor C FLY . Similar to the case of the buck-boost converter 10, Figure 1 Figure 5 an output capacitor C OUT and a resistive load R L are also shown. In the hybrid buck-boost converter 50, the inductor L S is connected to the output terminal, and the flying capacitor C FLY is coupled between the four switches SW A D
[0065] Similarly, the hybrid buck-boost converter 50 can operate in either a buck mode or a boost mode. If the input voltage V IN is greater than the output voltage V OUT , the hybrid buck-boost converter 50 operates in the buck mode. Figure 6A An exemplary operation of the hybrid buck-boost converter 50 in the buck mode is shown. As shown, the buck mode has two phases. In the first phase, the switch SW A is on, and the switches SW B , SW C and SW D are off; in the second phase, the switch SW D is on, and the switches SW A , SW B and SW C are off.
[0066] If the input voltage V IN is less than the output voltage V OUT , the hybrid buck-boost converter 50 operates in the boost mode.Less than the output voltage V OUT , the hybrid buck-boost converter 50 operates in the boost mode. Figure 6B FIG. 5 shows an exemplary operation of the hybrid buck-boost converter 50 in the boost mode. Figure 6B As shown, the boost mode has two phases. In the first phase, the switch SW B Turn on, switch SW A , SW C and SW D Close; in the second phase, the switch SW A and SW C Turn on, switch SW B and SW D closure.
[0067] Figure 7 A detailed embodiment of the buck-boost converter 30 is shown, wherein the power stage 300 can be designed as follows. Figure 5 The structure of the hybrid buck-boost converter 50 is shown. In the power stage 300, each switch SW A ~SW D Both can be realized by using a transistor.
[0068] like Figure 7 As shown, the feedback circuit used to control the buck-boost converter 30 is Figure 3 In detail, in addition to receiving the output voltage V OUT In addition, the error amplifier 302 can also receive a reference voltage V REF , which can be provided by a soft start circuit 702 to generate an error voltage V EA By well-designed reference voltage V REF , can control the output voltage V OUT Preferably, a compensation device 704 may be provided and coupled to the error amplifier 302 to improve the stability of the feedback loop.
[0069] In this example, since the power stage 300 has four switches SW A ~SW D , the digital control circuit 308 can generate 4 switching signals V SW_A ~V SW_D To control the switch SW A ~SW D In one embodiment, a driving circuit 706 may be provided to be coupled between the digital control circuit 308 and the power stage 300 to convert the switching signal V SW_A ~V SW_D Transmitted to the switch SW ASW D The driving circuit 706 can provide sufficient driving capability to drive the switches SW A SW D Preferably, the driving circuit 706 can also provide a function of dead-time control to fine-tune the timing of the switches SW A SW D turn-on and / or turn-off, so as to avoid shoot-through problem.
[0070] Figure 8A and Figure 8B is a waveform diagram showing the operation of the feedback circuit controlling the hybrid buck-boost converter 50, which shows the waveforms of the reference voltage V mid , the error voltage V EA , the ramp voltage V RAMP , the reference duty signal V DR , the duty control signals DX and DY, and an inductor current I L . The states of the switches SW A SW D are also shown in Figure 8A and Figure 8B , where the listed switch symbols represent the switches that are turned on in each phase. Since the ramp voltage V RAMP is periodically output, the reference duty signal V DR is a periodic pulse signal. The duty control signals DX and DY can be the control signals V EA output by the comparator 306 based on the comparison of the error voltage V RAMP and the ramp voltage V C . In this example, the duty control signal DX is at "high" level when the error voltage V EA is greater than the ramp voltage V RAMP ; and the duty control signal DX is at "low" level when the error voltage V EA is less than the ramp voltage V RAMP . The duty control signal DY is the inverse of the duty control signal DX, which is at "high" level when the error voltage V EA is less than the ramp voltage V RAMP ; and the duty control signal DY is at "low" level when the error voltage V EA is greater than the ramp voltage V RAMP .
[0071] Figure 8A shows the operation in the buck mode, where the error voltage V EA is less than the reference voltage V mid . Figure 8Bshows the operation in boost mode, where the error voltage V EA Greater than the reference voltage V mid The switching between buck mode and boost mode can be controlled by using the reference duty cycle signal V DR In this example, the switching control operation of the buck mode is controlled by the ramp voltage V RAMP Less than the reference voltage V mid During the period, the reference duty cycle signal V DR is “high” level; while the switching control operation of the boost mode is at the ramp voltage V RAMP Greater than the reference voltage V mid During the period, the reference duty cycle signal V DR is "low" level.
[0072] Please refer to Figure 8A Waveform matching Figure 6A Buck mode switching operation is shown as well as Figure 7 As shown in FIG5 , the structure of the hybrid buck-boost converter 50 and its control circuit is shown. As mentioned above, in the buck mode, the switching control operation is performed at the ramp voltage V RAMP Less than the reference voltage V mid During the period, that is, the ramp voltage V RAMP By controlling the duty cycle control signals DX and DY, the digital control circuit 308 can generate a suitable switching signal V SW_A ~V SW_D , to turn on the switch SW in the first phase A And turn off the other switches, and turn on the switch SW in the second phase D And turn off other switches, such as Figure 6A The operation method shown.
[0073] Please refer to Figure 8B Waveform matching Figure 6B The boost mode switching operation is shown as well as Figure 7 As shown in FIG5 , the structure of the hybrid buck-boost converter 50 and its control circuit is shown. As mentioned above, in the boost mode, the switching control operation is performed at the ramp voltage V RAMP Greater than the reference voltage V mid During the period, that is, the ramp voltage V RAMP By controlling the duty cycle control signals DX and DY, the digital control circuit 308 can generate a suitable switching signal V SW_A ~V SW_D , to turn on the switch SW in the first phase B And turn off the other switches, and turn on the switch SW in the second phase A and SW C And turn off other switches, such as Figure 6BThe operation mode shown.
[0074] Figure 9 Fig. 9 is a schematic diagram showing an exemplary implementation of a digital control circuit 308 for an embodiment of the present application. The digital control circuit 308 includes a reference duty cycle generator 910 and a logic circuit 920. In detail, the reference duty cycle generator 910 includes a comparator 912 coupled to the ramp generator 304 to receive the ramp voltage V RAMP . The comparator 912 can be used to compare the ramp voltage V RAMP with a reference voltage V mid to generate a reference duty cycle signal V DR and an inverted reference duty cycle signal V DR_BAR .
[0075] The logic circuit 920 can perform logical operations on the control signal V C (including the duty cycle control signals DX and / or DY) and the reference duty cycle signal V DR (and / or the inverted reference duty cycle signal V DR_BAR ) to generate each of the switch signals V SW_A ~ V SW_D . In some embodiments, the logic circuit 920 can be implemented using a combination of logic gates, including "AND" gates, "OR" gates, inverters, and / or the like, to generate the desired switch signals V SW_A ~ V SW_D . Figure 9 An exemplary implementation of the logic circuit 920 is shown, the operation of which should be well known to those skilled in the art and is not described in detail herein.
[0076] It is noted that Figure 9 the structure of the logic circuit 920 is only one of many possible implementations of the present application. In fact, the desired switch signals V SW_A ~ V SW_D can be generated using a variety of possible combinations of logic gates, not limited to Figure 9 the case shown. In another embodiment, if the digital control circuit 308 is used for another type of buck-boost converter, such as a general 4-switch buck-boost converter as described in Figure 1 , the logic circuit can be implemented in another way to generate the corresponding switch signals.
[0077] In embodiments of the present application, the feedback control circuit of the buck-boost converter uses only a single ramp generator and ramp voltage for comparison of the error voltage. For example, in the buck-boost converter 30, the error voltage V EA is compared only with the ramp voltage V RAMPcomparing with the single ramp voltage and generating a control signal V C The setting of the single ramp generator makes the static current consumed by the ramp generator reach a minimum. Compared with the prior art voltage mode control which uses two ramp voltages to compare with the error voltage, the extended ramp control scheme of the present application can also achieve the benefit of smaller inductor current ripple. In addition, in the present application, since the switching between the step-down mode and the step-up mode occurs at the middle point of the ramp voltage V RAMP , the non-linear problem of the output voltage V OUT generated during the mode switching process does not exist. In this way, the output voltage V OUT will be smoother, i.e. the fluctuation of the output voltage V OUT is reduced.
[0078] In summary, the present application proposes a new feedback control circuit for a step-up / down converter, which uses an extended ramp control scheme. In the feedback circuit, only a single ramp voltage is used to compare with the error voltage to perform the duty cycle control of the switching signal. There is no step-up / down mode in the system, and there is no other ramp voltage used for the duty cycle control. The reference voltage located at half of the peak amplitude of the ramp voltage can be used to generate a reference duty cycle signal, which is further used to determine whether the step-up / down converter should operate in the step-down mode or the step-up mode, thereby realizing the extended ramp control using only a single ramp voltage. The extended ramp control scheme of the present application can improve the efficiency of the step-up / down converter in various aspects, such as a more stable and smoother output voltage with smaller ripple, and less current consumption.
[0079] The above description is only preferred embodiments of the present application and is not used to limit the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.
Claims
1. A feedback circuit for a buck-boost converter having an input voltage and an output voltage, wherein: The feedback circuit includes: an error amplifier for generating an error voltage according to the output voltage; a ramp generator for generating a ramp voltage; a first comparator coupled to the error amplifier and the ramp generator for comparing the error voltage with the ramp voltage to generate a control signal; and a digital control circuit coupled to the first comparator for generating a plurality of switching signals according to the control signal and a reference duty cycle signal.
2. The feedback circuit of claim 1, wherein, The error voltage is compared only with the ramp voltage, but not compared with another ramp voltage.
3. The feedback circuit of claim 1, wherein, The digital control circuit includes: a second comparator coupled to the ramp generator for comparing the ramp voltage with a reference voltage to generate the reference duty cycle signal.
4. The feedback circuit of claim 3, wherein, The reference voltage is substantially equal to half of a peak amplitude of the ramp voltage.
5. The feedback circuit of claim 3, wherein, The buck-boost converter operates in a buck mode when the error voltage is less than the reference voltage, and operates in a boost mode when the error voltage is greater than the reference voltage.
6. The feedback circuit of claim 1, wherein, The reference duty cycle signal is a periodic pulse signal, and a duty cycle of the periodic pulse signal is substantially equal to 50%.
7. The feedback circuit of claim 1, wherein, The plurality of switching signals are switched according to the reference duty cycle signal.
8. The feedback circuit of claim 1, wherein, The digital control circuit includes: a logic circuit for performing a logic operation on the control signal and the reference duty cycle signal to generate at least one of the plurality of switching signals.
9. The feedback circuit of claim 1, wherein, The buck-boost converter includes a plurality of switches controlled by the plurality of switching signals, wherein the plurality of switches includes a first switch, a second switch, a third switch, and a fourth switch; wherein, when the buck-boost converter operates in a buck mode, in a first phase, the first switch is on, the second switch, the third switch, and the fourth switch are off, and in a second phase, the fourth switch is on, the first switch, the second switch, and the third switch are off.
10. The feedback circuit of claim 1, wherein, The buck-boost converter includes a plurality of switches controlled by the plurality of switching signals, wherein the plurality of switches includes a first switch, a second switch, a third switch, and a fourth switch; wherein, when the buck-boost converter operates in a boost mode, in a first phase, the second switch is on, the first switch, the third switch, and the fourth switch are off, and in a second phase, the first switch and the third switch are on, the second switch and the fourth switch are off.
11. A boost-buck converter, characterized by, includes: a power stage for receiving an input voltage to generate an output voltage; and a feedback circuit coupled to the power stage, the feedback circuit including: an error amplifier for generating an error voltage according to the output voltage; a ramp generator for generating a ramp voltage; a first comparator coupled to the error amplifier and the ramp generator for comparing the error voltage with the ramp voltage to generate a control signal; and a digital control circuit coupled to the first comparator for generating a plurality of switching signals according to the control signal and a reference duty cycle signal.
12. The boost-buck converter of claim 11, wherein, The error voltage is compared only with the ramp voltage, but not compared with another ramp voltage.
13. The boost-buck converter of claim 11, wherein, The digital control circuit includes a second comparator coupled to the ramp generator for comparing the ramp voltage with a reference voltage to generate the reference duty cycle signal.
14. The boost-buck converter of claim 13, wherein, The reference voltage is substantially equal to half of a peak amplitude of the ramp voltage.
15. The boost-buck converter of claim 13, wherein, The buck-boost converter operates in a buck mode when the error voltage is less than the reference voltage, and operates in a boost mode when the error voltage is greater than the reference voltage.
16. The boost-buck converter of claim 11, wherein, The reference duty cycle signal is a periodic pulse signal, and a duty cycle of the periodic pulse signal is substantially equal to 50%.
17. The boost-buck converter of claim 11, wherein, The plurality of switch signals are switched according to the reference duty cycle signal.
18. The boost-buck converter of claim 11, wherein, The digital control circuit includes a logic circuit for performing a logic operation on the control signal and the reference duty cycle signal to generate at least one of the plurality of switch signals.
19. The boost-buck converter of claim 11, wherein, The power stage includes a plurality of switches controlled by the plurality of switch signals, wherein the plurality of switches includes a first switch, a second switch, a third switch, and a fourth switch; wherein when the buck-boost converter operates in a buck mode, in a first phase, the first switch is on, the second switch, the third switch, and the fourth switch are off, and in a second phase, the fourth switch is on, the first switch, the second switch, and the third switch are off.
20. The boost-buck converter of claim 11, wherein, The power stage includes a plurality of switches controlled by the plurality of switch signals, wherein the plurality of switches includes a first switch, a second switch, a third switch, and a fourth switch; wherein when the buck-boost converter operates in a boost mode, in a first phase, the second switch is on, the first switch, the third switch, and the fourth switch are off, and in a second phase, the first switch and the third switch are on, the second switch and the fourth switch are off.