Double-layer heat insulation getter chip and preparation method thereof

Abstract

The invention provides a double-layer heat insulation getter chip and a preparation method thereof. The chip comprises a supporting layer, a heat insulation layer and a getter layer which are axially overlapped, wherein the getter layer comprises a getter film and a heater; a heat insulation gap is formed between the supporting layer and the heat insulation layer so as to further prevent heat generated when the heater activates the getter film from being transmitted to the supporting layer. Through the chip provided by the invention, the problems of high activation voltage and large activation power consumption required for activating the getter at present are solved.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a double-layer heat-insulating getter chip and its preparation method. Background Technology

[0002] MEMS gyroscopes, MEMS accelerometers, MEMS RF switches, MEMS infrared sensors, and other microelectronic devices are widely used in various civilian and industrial fields. These devices require hermetically sealed vacuum packaging to ensure a high quality factor and thus improve the signal-to-noise ratio. Currently, device-level vacuum packaging or wafer-level vacuum packaging is widely used. Device-level vacuum packaging involves embedding the device within a ceramic or metal casing; wafer-level vacuum packaging uses bonding processes to seal the device within a microcavity. Regardless of the packaging method, the vacuum level within the sealed cavity gradually deteriorates due to material release, gas leakage, and permeation. Therefore, a getter is typically placed on the cavity wall side of the package, while the microelectronic device is placed at the center of the package. The getter is used to achieve stable control of the gas pressure within the cavity containing the microelectronic device.

[0003] To ensure effective adsorption of residual gases by the getter, annealing activation is required. Traditionally, the entire packaged device is heated for activation, but excessively high temperatures can damage the device. While activating the getter in different temperature zones can mitigate device damage, this requires complex, specialized annealing equipment. To address this, the industry has proposed integrating the heater with the getter, enabling on-chip directional activation of the getter and reducing its impact on the device. However, this approach suffers from high power consumption and high activation voltage during high-temperature operation, making it less compatible with other electrical systems. Summary of the Invention

[0004] To address the aforementioned problems, one objective of this invention is to provide a double-layer heat-insulating getter chip for vacuum packaging of microelectronic devices, thereby solving the problems of high activation voltage and high activation power consumption required for current getter activation. A second objective of this invention is to provide a method for preparing a double-layer heat-insulating getter chip for vacuum packaging of microelectronic devices.

[0005] To achieve one of the objectives, in a first aspect, the present invention provides a double-layer heat-insulating getter chip for vacuum packaging of microelectronic devices, the technical solution of which is: A double-layer heat-insulating getter chip for vacuum packaging of microelectronic devices, the chip comprising a support layer, a heat-insulating layer, and a getter layer arranged axially overlappingly; wherein, The getter layer includes a getter film and a heater; A heat-insulating gap is formed between the support layer and the heat-insulating layer to further prevent the heat generated by the heater activating the getter film from being transferred to the support layer.

[0006] As one of the preferred embodiments, a support column is provided on the support layer, and the support column is connected between the support layer and the heat insulation layer.

[0007] As one preferred embodiment, the support layer comprises glass material and / or silicon material.

[0008] As one of the preferred options, the heat insulation layer comprises glass material.

[0009] As one preferred embodiment, the getter layer further includes a temperature sensor; wherein, The getter film, the heater, and the temperature sensor are coplanarly formed on the top surface of the insulation layer.

[0010] As one preferred embodiment, the getter film, the heater, and the temperature sensor are arranged in a spiral radially alternating pattern, with the heater and the temperature sensor located on opposite radial sides of the getter film.

[0011] As one of the preferred options, the getter film includes a Ti-based getter or a Zr-based getter.

[0012] As one preferred embodiment, the heater includes a conductive thin-film resistor, which includes any one of Pt, Ti, TiN, Cr and polycrystalline silicon.

[0013] As one preferred embodiment, the temperature sensor includes a thermistor thin-film resistor, which includes either Pt or Ni.

[0014] To achieve the second objective, the present invention provides a method for preparing a double-layer heat-insulating getter chip for vacuum packaging of microelectronic devices, the technical solution of which is: A method for preparing a double-layer heat-insulating getter chip for vacuum packaging of microelectronic devices, the method comprising: Select a first substrate, and fabricate a heater, a temperature sensor and their corresponding electrodes on the top surface of the first substrate to obtain a heat insulation layer and a heater and a temperature sensor located on the top surface of the heat insulation layer. Select a second substrate and fabricate support pillars on the top surface of the second substrate to obtain a support layer and support pillars; The bottom surface of the first substrate and the top surface of the support column are bonded together to form a double-layer heat insulation structure; A getter film is fabricated on the top surface of the first substrate to obtain a double-layer heat-insulating getter chip.

[0015] Compared with the prior art, this application has the following advantages: The chip provided in this embodiment of the invention includes a support layer, a heat insulation layer, and a getter layer arranged in an axially overlapping manner; wherein, the getter layer includes a getter film and a heater; a heat insulation gap is formed between the support layer and the heat insulation layer to further prevent the heat generated by the heater activating the getter film from being transferred to the support layer.

[0016] By adopting the scheme of this application, the support layer and the heat insulation layer form a double-layer heat insulation structure. By setting the double-layer heat insulation structure and the heat insulation gap below the getter layer, the heat insulation layer and the heat insulation gap together block the conduction of heat to the substrate, so that the getter film can be fully activated under the action of the heater, significantly improving the temperature retention capability of the upper layer of the chip, minimizing heat dissipation, thereby achieving low-power activation, while avoiding damage to the lower layer of the chip.

[0017] The support layer, heat insulation layer, and getter layer are integrally formed into a chip structure through chip fabrication processes. The getter film is located on the top layer of the chip. Therefore, this chip structure is conducive to miniaturized packaging, reducing the volume of the packaging cavity and improving space utilization. Furthermore, in this embodiment, the getter layer is part of the chip itself and can be processed together with the chip at the wafer level without subsequent assembly. It also has its own heat insulation function, improving system integration.

[0018] The method described above has the same advantages over existing technologies as the aforementioned chip, and will not be repeated here. Attached Figure Description

[0019] To more clearly illustrate the technical solution of this application, the drawings used in the description of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a schematic diagram of the structure of a double-layer heat-insulating getter chip applicable to an embodiment of this application; Figure 2 This is a schematic cross-sectional view of the getter layer applicable to an embodiment of this application; Figure 3 This is a top view of the support layer and support column to which one embodiment of this application applies; Figure 4 This is a flowchart illustrating the manufacturing method of a double-layer heat-insulating getter chip proposed in this application.

[0021] Explanation of reference numerals in the attached figures: 1. Support layer; 2. Heat insulation layer; 3. Getter layer; 31. Getter film; 32. Heater; 33. Temperature sensor; 10. First substrate; 20. Second substrate; 4. Support column. Detailed Implementation

[0022] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0023] In related technologies, annealing activation of the getter is necessary to enable effective adsorption of residual gases. Traditionally, this involves heating the entire packaged device for activation, but excessively high temperatures can damage the device. While activating the getter in different temperature zones can mitigate device damage, this requires complex, specialized annealing equipment. To address this, the industry has proposed integrating the heater with the getter, enabling on-chip directional activation of the getter and reducing its impact on the device. However, this approach suffers from high power consumption and high activation voltage during high-temperature operation, making it less compatible with other electrical systems.

[0024] In view of this, firstly, referring to Figure 1 As shown, Figure 1 This is a diagram illustrating the overall structural composition of the double-layer heat-insulating getter chip of the present invention. Figure 1 As shown, the present invention provides a double-layer heat-insulating getter chip for vacuum packaging of microelectronic devices. The chip includes a support layer 1, a heat insulation layer 2, and a getter layer 3 arranged in an axially overlapping manner. The getter layer 3 includes a getter film 31 and a heater 32. A heat insulation gap is formed between the support layer 1 and the heat insulation layer 2 to further prevent the heat generated by the heater 32 activating the getter film 31 from being transferred to the support layer 1.

[0025] Specifically, the present invention provides a chip structure integrating a getter, wherein a support layer 1, a heat insulation layer 2 and a getter layer 3 are arranged sequentially from bottom to top along the axial direction. The support layer 1 and the heat insulation layer 2 form a double-layer heat insulation structure, which physically isolates the heat-generating area in the getter layer 3 from the area susceptible to temperature influence, preventing the heat generated during activation from dissipating. At the same time, the heat insulation gap between the support layer 1 and the heat insulation layer 2 further blocks the heat dissipation generated during activation.

[0026] The getter layer 3 includes an integrated getter film 31 and a heater 32. When the heater 32 is energized, the getter film 31 is activated on-chip. The heat insulation layer 2 serves as a carrier for the getter layer 3 and simultaneously prevents the transfer of activation heat from the getter layer 3 to the support layer 1. The support layer 1 provides mechanical support for the heat insulation layer 2 and the getter layer 3, integrating them into one unit. It can also serve as a substrate for single-crystal silicon, glass substrates, etc., to support microelectronic devices such as MEMS structures, sensing units, and circuits. Furthermore, it can also function as a second heat insulation layer 2, forming a double-layer heat insulation structure.

[0027] In this embodiment, the double-layer thermal insulation structure has a thermal insulation gap, which can form a heat-insulating zone. The thermal insulation layer 2 can achieve the first level of thermal insulation through a low thermal conductivity material, initially preventing the conduction of activation heat. Since the thermal insulation layer 2 and the support layer 1 are physically separated by the thermal insulation gap, the thermal insulation gap achieves the second level of thermal insulation, effectively blocking the conduction of heat generated during activation to the substrate. Therefore, by setting a double-layer thermal insulation structure and a thermal insulation gap below the getter layer 3, the thermal insulation layer 2 and the thermal insulation gap together block the conduction of heat to the substrate, allowing the getter film 31 to be fully activated under the action of the heater 32, significantly improving the temperature retention capability of the upper layer of the chip, minimizing heat dissipation, thereby achieving low-power activation, while avoiding damage to the lower layer of the chip.

[0028] The thermal insulation gap can be understood as the axial distance between the support layer 1 and the thermal insulation layer 2. For example, a spacer can be placed between the support layer 1 and the thermal insulation layer 2 to partially separate them axially and provide support points. For instance, micron-level bumps can be designed on the surface of the support layer 1, allowing localized contact between the two layers through discrete bumps, reducing the contact area. Another example is etching support pillars 4 on the surface of the support layer 1, forming a thermal insulation gap with the thermal insulation layer 2, allowing heat to pass only through the support pillars 4. Yet another example is etching grooves in the inner region of the support layer 1, bonding the edge region of the thermal insulation layer 2 to the support layer 1 to form a closed cavity.

[0029] As a further explanation of this embodiment, the current getter is disposed on the inner edge of the packaging cavity, such as on the cavity sidewall or cavity top wall, while the microelectronic devices (MEMS structures, sensors, circuits, etc.) are disposed in the inner area of ​​the packaging cavity. During packaging, the getter is first pre-placed on the housing sidewall or cover plate for high-temperature activation, and then bonded to the chip package. This requires a dedicated dual-temperature zone device to ensure that the high activation temperature does not damage other packaged devices, resulting in high process complexity. In this application, the support layer 1, heat insulation layer 2, and getter layer 3 are integrally formed into a chip structure through chip fabrication processes, with the getter film 31 located on the upper layer of the chip. Therefore, this chip structure is conducive to miniaturized packaging, reducing the volume of the packaging cavity and improving space utilization. Due to the design of the double-layer heat insulation structure, the activation heat can be prevented from being transferred to the packaging cavity and other packaged components, thus improving the overall reliability and systemicity of the microelectronic device packaging. Furthermore, in this embodiment, the getter layer 3 is part of the chip itself and can be processed together with the chip at the wafer level without subsequent assembly. It also has its own heat insulation function, improving system integration.

[0030] Of course, this embodiment can set multiple support layers 1 or multiple heat insulation layers 2, and change the setting order of support layer 1 and heat insulation layer 2 to form a variety of multi-layer heat insulation structures, realize multi-level heat insulation, and enhance the heat retention capacity of getter layer 3 on the upper layer of the chip.

[0031] As a further explanation of this embodiment, the gap parameters such as the gap thickness, gap shape, and gap size of the thermal insulation gap can affect the thermal insulation efficiency. For example, increasing the gap thickness and gap shape can improve the thermal insulation efficiency and reduce the conduction of heat to the support layer 1 when the getter activates the heating. Therefore, the present invention can optimize the thermal insulation efficiency by adjusting the gap parameters of the thermal insulation gap. The structure of the double-layer thermal insulation structure is simpler, has a smaller packaging space, fewer process steps, and lower production costs. It is suitable for miniaturized and highly integrated packaging applications of miniaturized electronic devices such as MEMS gyroscopes, MEMS accelerometers, MEMS RF switches, and MEMS infrared sensors.

[0032] It is worth mentioning that in the double-layer heat insulation structure of this application embodiment, a getter layer 3 is provided on the heat insulation layer 2. The heat insulation layer 2 has a wider surface structure and can be used as a substrate to prepare the getter layer 3 through sputtering and peeling processes. The overall structure is more compact and the manufacturing process is simpler.

[0033] Preferably, a support column 4 is provided on the support layer 1, and the support column 4 connects the support layer 1 and the heat insulation layer 2. In this embodiment, the support column 4 suspends and fixes the heat insulation layer 2 and the getter layer 3 thereon above the support layer 1. The top surface of the support layer 1, the bottom surface of the heat insulation layer 2, and the side wall of the support column 4 together define a closed or semi-closed space, forming a heat insulation gap. The gap parameters of the heat insulation gap can be selected by adjusting the number, size, and layout of the support columns 4. Specifically, the support column 4 can be cylindrical, cross-shaped, square column-shaped, umbrella-shaped, conical, inverted conical, hollow column-shaped, or porous. Square column-shaped support columns 4 are preferred to simplify the manufacturing process.

[0034] The support columns 4 can be one or more, evenly distributed or circumferentially distributed on the support layer 1. The design of the support columns 4 can be determined based on a combination of heat dissipation and structural strength, ensuring the double-layer insulation structure is not easily broken while minimizing heat dissipation. This embodiment does not impose specific limitations in this regard. For example, Figure 3 This is a top view of the support layer and support column 4 applicable to the embodiments of this application. Three support columns 4 are fabricated on the surface of the support layer 1, and the three support columns 4 are arranged at equal angles along the circumference on the surface of the support column 4. The height of the support column 4 can be selected to be tens of micrometers.

[0035] As mentioned above, the support layer 1 of this application can serve as a glass substrate or a single-crystal silicon substrate, etc. The support layer 1 can be directly used as a chip substrate and is compatible with MEMS processes. Correspondingly, the support layer 1 includes glass material and / or silicon material, and support pillars 4 can be fabricated on the top surface using dry etching or wet etching processes. The support layer 1 can also be made of a composite of glass and silicon materials. For example, silicon material can be used as the chip substrate, and glass material as the second thermal insulation layer 2, combining mechanical strength and thermal insulation performance. Combined with the thermal insulation gap and thermal insulation layer 2, it maximizes the prevention of heat conduction generated during activation to the silicon substrate.

[0036] Furthermore, the heat insulation layer 2 comprises glass material. In this embodiment, the heat insulation layer 2 can also be a glass substrate or a silicon substrate. Since a getter layer 3 needs to be disposed on the heat insulation layer 2, if a glass substrate is used, the getter can be directly fabricated on the top surface of the glass substrate. If a silicon substrate is used, an insulating layer can be deposited first on the top surface of the silicon substrate, and then the getter can be fabricated on the insulating layer. Therefore, in this embodiment, it is preferable that the heat insulation layer 2 is made of glass material to form a heat insulation barrier and suppress heat conduction to the underlying chip layer.

[0037] As another improvement to the embodiment, the getter layer 3 also includes a temperature sensor 33; wherein, the getter film 31, the heater 32, and the temperature sensor 33 are coplanarly processed on the top surface of the heat insulation layer 2. The activation efficiency of the getter is highly temperature-dependent. By designing the temperature sensor 33 in the getter layer 3, the temperature sensor 33 can monitor the temperature of the getter layer 3 in real time during the activation process of the getter film 31 by the heater 32, thus avoiding overheating that could damage the performance of the getter film 31 or the material of the heat insulation layer 2.

[0038] In this embodiment, the temperature sensor 33, getter film 31, and heater 32 are coplanar and all fabricated on the top surface of the heat insulation layer 2 using sputtering and stripping processes. This not only simplifies the manufacturing process and saves chip size, but also ensures that the temperature sensor 33 is close to the getter film 31 and heater 32, making the temperature measurement position similar to the actual heating position, resulting in higher temperature measurement accuracy. The temperature sensor 33 includes a thermistor element and two temperature sensor 33 electrodes, and the heater 32 includes a heating element and two heater 32 electrodes. A voltage or current is applied to the electrodes of the heater 32 to electrically activate the getter film 31 using the Joule heating effect, and the activation temperature is monitored by the temperature sensor 33.

[0039] In conjunction with the above embodiments, the getter layer 3 can be obtained on the top surface of the heat insulation layer 2 using MEMS wafer-level technology, and the support pillar 4 can be obtained on the support layer 1 using MEMS wafer-level technology. Therefore, a double-layer heat insulation getter chip can be obtained by a single bonding process after processing two substrates, which greatly simplifies the manufacturing process and improves the chip yield.

[0040] In some embodiments, the getter film 31, the heater 32, and the temperature sensor 33 are arranged adjacent to each other in the horizontal or vertical direction on the top surface of the insulation layer 2. In some embodiments, the getter film 31 and the heater 32 are arranged adjacent to each other in the middle region of the insulation layer 2, and the temperature sensor 33 is arranged in the edge region of the top surface of the insulation layer 2.

[0041] Preferably, such as Figure 2 As shown, Figure 2 This is a cross-sectional schematic diagram of the getter layer in this embodiment. The getter film 31, heater 32, and temperature sensor 33 are arranged in a spiral radially alternating pattern, with the heater 32 and temperature sensor 33 located on opposite radial sides of the getter film 31. In this embodiment, in the radial direction, at any segment of the spiral path, the inner and outer sides of the getter film 31 are respectively the heater 32 and the temperature sensor 33. Therefore, the getter film 31 can be heated by the adjacent heater 32 and monitored by the adjacent temperature sensor 33. All three are arranged in a spiral extension, uniformly covering the top surface of the entire heat insulation layer 2, improving heating uniformity and getter activation efficiency.

[0042] For example, to ensure sufficient temperature for activation of the getter film 31, the transverse cross-section of the getter film 31 resembles a hollow strip structure with one end open and the other closed. The hollow strip structure extends in a circular spiral on a plane as a whole, with the closed end at the center of the spiral and the open end forming the two ends of the strip structure. The heater 32 extends spirally along with the getter film 31 within the hollow cavity, and the temperature sensor 33 extends spirally along with the getter film 31 within the space outside the tube wall. All three have the same shape but are located at different inner diameter positions.

[0043] Specifically, the getter film 31 is a non-evaporable getter, including Ti-based or Zr-based getters. Specifically, it can be an alloy getter such as Ti-Zr-V or Zr-V-Fe, or a composite metal getter such as Au-Ti or Au-Zr. Its shape can be designed according to the required getter volume and structural topology. For example, the getter film 31 can be a circular spiral shape, and its thickness can be designed according to the required getter volume.

[0044] The heater 32, with its spiral-shaped conductive film resistor, can be made of materials such as Pt, Ti, TiN, Cr, or polycrystalline silicon. Two lead-out electrodes 32a and 32b are added at both ends of the serpentine trace of the heater 32. The temperature sensor 33, also with a spiral-shaped trace, can be a thermistor made of materials such as Pt or Ni. Two lead-out electrodes 33a and 33b are added at both ends of the spiral trace of the temperature sensor 33. The activation temperature of the getter film 31 can be determined through this temperature sensor 33. All four lead-out electrodes 32a, 32b, 33a, and 33b are metal electrodes, which, from bottom to top, can be Ti, Pt, Au, or Cr / Au.

[0045] Therefore, the path transition of the circular spiral getter film 31, heater 32 and temperature sensor 33 is smooth, and a longer line length can be formed within the same area, resulting in uniform current distribution and a large heating or sensing coverage area.

[0046] In some embodiments, the thicknesses of the getter film 31, the heater 32, and the temperature sensor 33 may be the same or different. Preferably, the thickness of the getter film 31 is greater than the thicknesses of the heater 32 and the temperature sensor 33.

[0047] In summary, please refer to Figure 1The heat insulation layer 2 is made of glass, and a getter film 31 is formed on its surface. The support layer 1 is made of glass or silicon, and its top surface contains three support pillars 4. The bottom surface of the heat insulation layer 2 and the top surface of the support layer 1 are connected by the support pillars 4, which can effectively block the conduction of heat generated during activation to the substrate, significantly improve the temperature retention capability of the upper layer of the chip, minimize heat dissipation, and thus achieve low-power activation. At the same time, this structure can achieve localized heat concentration, ensuring that the devices inside the cavity are not affected by high temperatures during the high-temperature activation process of the getter.

[0048] Correspondingly, regarding the second aspect, please refer to Figure 4 As shown, Figure 4 This is a flowchart illustrating the fabrication method of a double-layer heat-insulating getter chip for vacuum packaging of microelectronic devices. The present invention also provides a method for fabricating a double-layer heat-insulating getter chip for vacuum packaging of microelectronic devices, used to prepare the double-layer heat-insulating getter chip for vacuum packaging of microelectronic devices provided in the first aspect of the present invention. The method includes the following steps: S1. Select the first substrate 10, and fabricate the heater 32, temperature sensor 33 and their corresponding electrodes (32a, 32b, 33a, 33b) on the top surface 10a of the first substrate 10 to obtain the heat insulation layer 2 and the heater 32 and temperature sensor 33 located on the top surface 10a of the heat insulation layer 2.

[0049] In this step, such as Figure 4 In step (a), the first substrate 10 is used to prepare the heat insulation layer 2 and the getter layer 3 thereon. The first substrate 10 has two surfaces, namely a top surface 10a and a bottom surface 10b. The first substrate 10 can be a Prex7740 glass substrate or a silicon substrate. If a glass substrate is used, the getter layer 3 can be directly prepared on the top surface 10a. If a silicon substrate is used, an insulating layer needs to be deposited on the top surface 10a of the silicon substrate first, and then the getter layer 3 is prepared on the insulating layer. In this step, a glass substrate is selected as the first substrate 10.

[0050] Specifically, such as Figure 4 In step (b), the grooves corresponding to the heater 32 and the temperature sensor 33 are formed on the top surface 10a of the first substrate 10 through photolithography, etching, sputtering, and lift-off processes, and a metal thin film is deposited therein. Then, as... Figure 4 In step (c), the electrodes 32a and 32b (not shown) of heater 32 and the electrodes 33a and 33b (not shown) of temperature sensor 33 are fabricated on the top surface 10a of the first substrate 10 through photolithography, sputtering and stripping processes, so that all electrodes are brought out to the outside. The other main parts of the first substrate 10 except the top surface 10a serve as the heat insulation layer 2.

[0051] S2. Select the second substrate 20 and fabricate the support pillar 4 on the top surface 20a of the second substrate 20 to obtain the support layer 1 and the support pillar 4.

[0052] In this step, such as Figure 4 In step (d), the second substrate 20 is used to fabricate the support layer 1 and the support pillars 4 thereon. The second substrate 20 has two surfaces, namely a top surface 20a and a bottom surface 20b. The second substrate 20 can be a Prex7740 glass substrate or a silicon substrate. Figure 4 In step (e), a support pillar 4 is fabricated on the top surface 20a of the second substrate 20 using a dry etching or wet etching process, and the other main parts of the second substrate 20, excluding the top surface 20a, serve as the support layer 1.

[0053] S3. Bond the bottom surface 10b of the first substrate 10 and the top surface of the support column 4 (i.e., the top surface 20a of the second substrate 20) to form a double-layer heat insulation structure.

[0054] In this step, such as Figure 4 In step (f), a bonding process is used to connect the bottom surface 10b of the first substrate 10 to the top surface of the support column 4 on the top surface 20a of the second substrate 20 to form a double-layer heat insulation structure.

[0055] S4. A getter film 31 is formed on the top surface 10a of the first substrate 10 to obtain a double-layer heat-insulating getter chip.

[0056] In this step, such as Figure 4 In step (g), a getter film 31 is fabricated on the top surface 10a of the first substrate 10 by sequentially performing photolithography, etching, sputtering and stripping processes.

[0057] Therefore, through steps S1-S4, a chip is obtained consisting of a support layer 1, a heat insulation layer 2, and a getter layer 3, which are axially overlapped from bottom to top. This chip can effectively block the conduction of heat generated during activation to the substrate, significantly improve the temperature retention capability of the upper layer of the chip, and minimize heat dissipation, thereby achieving low-power activation. Simultaneously, this structure can achieve localized heat concentration, ensuring that the devices inside the cavity are not affected by high temperatures during the high-temperature activation process of the getter. The entire fabrication process employs photolithography, sputtering, etching, and bonding processes, which are compatible with existing MEMS device processes, enabling wafer-level mass production. The fabricated chip exhibits significant heat insulation, a compact structure, and miniaturized size, making it suitable for large-scale applications of vacuum packaging for microelectronic devices.

[0058] It should be noted that photolithography, sputtering, etching, and bonding are mature MEMS micromachining processes, so their specific process parameters and principles will not be elaborated upon in this article.

[0059] It should be noted that, for the method embodiments, the embodiments of this application are not limited to the described order of actions, because according to the embodiments of this application, some steps may be performed in other orders or simultaneously.

[0060] The above method embodiments are basically similar to the chip embodiments, so the description is relatively simple. For relevant details, please refer to the description of the chip embodiments.

[0061] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0062] In the description of this application, it should be understood that the terms "center", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "axial", "radial", "circumferential", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0063] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. Throughout the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0064] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection, an electrical connection, or a communication connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0065] In this application, unless otherwise expressly specified and limited, the "above" or "below" of the second feature can mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. In the description of this specification, references to terms such as "an embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described can be combined in any suitable manner in one or more embodiments or examples.

[0066] The foregoing has provided a detailed description of a double-layer heat-insulating getter chip and its preparation method. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are merely for the purpose of aiding understanding this application, and the content of this specification should not be construed as limiting this application. Furthermore, those skilled in the art will recognize that various modifications may be made to the specific implementation methods and application scope based on this application. It is neither necessary nor possible to exhaustively list all possible implementation methods here, but any obvious variations or modifications derived therefrom are still within the protection scope of this application.

Claims

1. A double-layer heat-insulating getter chip for vacuum packaging of microelectronic devices, characterized in that, The chip includes a support layer, a heat insulation layer, and a getter layer arranged axially overlapping; wherein, The getter layer includes a getter film and a heater; A heat-insulating gap is formed between the support layer and the heat-insulating layer to further prevent the heat generated by the heater activating the getter film from being transferred to the support layer.

2. The double-layer heat-insulating getter chip for vacuum packaging of microelectronic devices according to claim 1, characterized in that, A support column is provided on the support layer, and the support column connects the support layer and the heat insulation layer.

3. A double-layer heat-insulating getter chip for vacuum packaging of microelectronic devices according to claim 1, characterized in that, The support layer comprises glass and / or silicon materials.

4. A double-layer heat-insulating getter chip for vacuum packaging of microelectronic devices according to claim 1, characterized in that, The insulation layer includes glass material.

5. A double-layer heat-insulating getter chip for vacuum packaging of microelectronic devices according to claim 1, characterized in that, The getter layer also includes a temperature sensor; wherein... The getter film, the heater, and the temperature sensor are coplanarly formed on the top surface of the insulation layer.

6. A double-layer heat-insulating getter chip for vacuum packaging of microelectronic devices according to claim 5, characterized in that, The getter film, the heater, and the temperature sensor are arranged in a spiral radially alternating pattern, with the heater and the temperature sensor located on opposite radial sides of the getter film.

7. A double-layer heat-insulating getter chip for vacuum packaging of microelectronic devices according to claim 1, characterized in that, The getter film includes Ti-based or Zr-based getters.

8. A double-layer heat-insulating getter chip for vacuum packaging of microelectronic devices according to claim 1, characterized in that, The heater includes a conductive thin-film resistor, which includes any one of Pt, Ti, TiN, Cr and polycrystalline silicon.

9. A double-layer heat-insulating getter chip for vacuum packaging of microelectronic devices according to claim 5, characterized in that, The temperature sensor includes a thermistor thin-film resistor, which includes either Pt or Ni.

10. A method for preparing a double-layer heat-insulating getter chip for vacuum packaging of microelectronic devices, characterized in that, The methods include: Select a first substrate, and fabricate a heater, a temperature sensor and their corresponding electrodes on the top surface of the first substrate to obtain a heat insulation layer and a heater and a temperature sensor located on the top surface of the heat insulation layer. Select a second substrate and fabricate support pillars on the top surface of the second substrate to obtain a support layer and support pillars; The bottom surface of the first substrate and the top surface of the support column are bonded together to form a double-layer heat insulation structure; A getter film is fabricated on the top surface of the first substrate to obtain a double-layer heat-insulating getter chip.

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