Wafer level fabrication method of split-bonded MOEMS scanning grating

Abstract

The application provides a wafer-level manufacturing method of a split-bonding-based MOEMS scanning grating, relates to the technical field of optoelectronic device manufacturing, and comprises the following steps: preparing a plurality of MEMS actuators in batches on a first wafer; preparing a plurality of optical grating structures corresponding to the positions of the MEMS actuators on a second wafer by using a nano-imprinting process. A wafer-level alignment technology based on infrared perspective and machine vision is used to align the first wafer and the second wafer with high precision. The two aligned wafers are permanently bonded into one by using a low-temperature thermal compression bonding process. The bonded wafer is subjected to structure releasing and wafer dicing to obtain a plurality of independent MOEMS scanning grating devices. The application realizes high performance, high precision and high yield of the devices by completely decoupling the MEMS process and the optical element process and using wafer-level bonding instead of chip-level mounting.

Description

Technical Field

[0001] This application relates to the field of optoelectronic device manufacturing technology, and more specifically, to a wafer-level manufacturing method for MOEMS scanning gratings based on split bonding. Background Technology

[0002] As a core component of systems such as lidar, spectral analysis, and projection display, the optical performance, manufacturing cost, and long-term reliability of MOEMS scanning gratings are crucial to the performance of the entire application system.

[0003] Currently, there are two main technological approaches in the industry for manufacturing such MOEMS scanning gratings. The first mainstream approach is an integrated manufacturing process, characterized by the simultaneous fabrication of the MEMS actuator structure and the optical grating structure on a single silicon wafer using semiconductor processes. However, this process has inherent drawbacks. Because the processing requirements for the optical and mechanical structures differ, manufacturing them in the same process often leads to compromises in their performance, preventing them from achieving their optimal design. Furthermore, the etching of the grating is strictly limited by the silicon lattice orientation, making it difficult to freely optimize the grating parameters, resulting in poor diffraction efficiency and batch-to-batch performance instability in the final device. This process can only manufacture traditional planar gratings; it cannot produce higher-performance three-dimensional concave gratings or advanced metasurface optical structures. In addition, the high-temperature integrated process leaves significant thermal stress inside the device, causing a noticeable drift in the scanning angle when the operating temperature changes, affecting system accuracy.

[0004] Another mainstream technology is discrete chip mounting. This process manufactures MEMS actuator chips and optical grating chips separately, then aligns and bonds them at the chip level. While this method decouples the manufacturing processes of different devices to some extent, it introduces new problems. First, chip-level alignment results in significant errors in the final alignment accuracy, making it difficult to meet the requirements of high-performance optical systems. Second, the chip-by-chip alignment and bonding method is inefficient, significantly increasing manufacturing costs, and due to the complexity of the process, the final yield is often unacceptably low, making large-scale mass production impractical. Furthermore, the bonding materials often have mismatched coefficients of thermal expansion with the silicon-based chip. During temperature cycling, stress can cause deformation of the delicate grating surface, thereby compromising the optical performance and reliability of the device.

[0005] In summary, existing technologies, whether employing integrated or discrete mounting processes, cannot effectively resolve the inherent contradictions between device optical performance, alignment accuracy, production efficiency, manufacturing cost, and operational reliability simultaneously. Therefore, there is an urgent need in the field for a novel MOEMS scanning grating and its manufacturing method to overcome the various shortcomings of the existing technologies. Summary of the Invention

[0006] To address the shortcomings of existing technologies, this application provides a MOEMS scanning grating based on split bonding and its wafer-level manufacturing method and system.

[0007] In a first aspect, this application provides a wafer-level fabrication method for MOEMS scanning gratings based on split bonding, including:

[0008] A first wafer and a second wafer are obtained, wherein a plurality of MEMS actuators are formed in batches on the first wafer, and a plurality of grating structures corresponding to the positions of the MEMS actuators are formed in batches on the second wafer;

[0009] A first alignment mark is formed in the MEMS actuator region of the first wafer, and a second alignment mark corresponding to the position of the first alignment mark is formed in the grating structure region of the second wafer;

[0010] The first wafer and the second wafer are aligned so that the positional deviation between the first alignment mark and the second alignment mark is less than a preset alignment deviation threshold.

[0011] A bonding layer is formed between the first and second wafers after alignment, and wafer bonding is performed by a low-temperature hot pressing process to obtain a bonded wafer.

[0012] The bonding wafer is subjected to a structure release process, and the bonded wafer after structure release is diced to obtain multiple MOEMS scanning grating devices with separate bonding.

[0013] As an optional implementation, the batch formation of multiple grating structures corresponding to the positions of the MEMS actuator includes:

[0014] A nanoimprint adhesive is spin-coated onto the surface of the second wafer;

[0015] The nanoimprint adhesive is imprinted using a pre-prepared grating master plate to form a grating pattern in the nanoimprint adhesive;

[0016] The nanoimprint adhesive is cured and imprinted, and the grating pattern is transferred to the second wafer to form the grating structure.

[0017] As an optional implementation, forming a first alignment mark in the MEMS actuator region of the first wafer and forming a second alignment mark corresponding to the position of the first alignment mark in the grating structure region of the second wafer includes:

[0018] The first alignment mark includes at least one cross-shaped mark disposed above the first wafer and a plurality of bar-shaped marks disposed on the side or below the first wafer;

[0019] The shape and position of the second alignment mark match the first alignment mark so that after the first wafer and the second wafer are aligned, the first alignment mark and the second alignment mark combine to form a preset combined pattern.

[0020] As an optional implementation, aligning the first wafer and the second wafer so that the positional deviation between the first alignment mark and the second alignment mark is less than a preset alignment deviation threshold includes:

[0021] The first and second wafers are transmitted through an infrared light source, and images of the first and second alignment marks are captured using a CCD imaging system. The images are analyzed using a machine vision system, and the positions and parallelism of the first and second wafers are corrected and aligned.

[0022] As an optional implementation, the step of forming a bonding layer between the aligned first and second wafers and performing wafer bonding through a low-temperature hot-pressing process to obtain a bonded wafer includes:

[0023] Benzocyclobutene or polyimide is used as the bonding layer material;

[0024] The low-temperature hot pressing process is carried out at a bonding temperature of 120°C to 180°C and a bonding pressure of 5 kN to 15 kN.

[0025] As an optional implementation, the step of performing a structure release process on the bonding wafer and dicing the structure-released bonding wafer to obtain multiple separately bonded MOEMS scanning grating devices includes:

[0026] The bonding wafer is etched in vapor phase using dixenon hexafluoride gas to implement the structure release process;

[0027] The bonded wafer after structure release is diced using a stealth laser cutting process.

[0028] As an alternative implementation, for the grating pattern formed on the grating mother plate, the extension direction of the grating ridges is parallel to the axial direction of the torsion beam of the MEMS actuator.

[0029] As an optional implementation, prior to forming the bonding layer, the method further includes:

[0030] Interface treatment is performed on the bonding surfaces of the first wafer and / or the second wafer;

[0031] The interface processing includes:

[0032] The surfaces to be bonded are subjected to plasma activation treatment;

[0033] A silane coupling agent is applied to the surface to be bonded.

[0034] As an optional implementation, the batch formation of multiple grating structures corresponding to the positions of the MEMS actuator further includes:

[0035] Pre-compensation is performed using spatial location mapping technology; the pre-compensation includes:

[0036] By bonding and measuring the test wafer, a set of displacement vector field data characterizing the nonlinear deformation of the wafer was obtained;

[0037] The displacement vector field data includes: global low-frequency warping information caused by global thermal mismatch and local high-frequency deformation information caused by local defects or stress concentration.

[0038] Wavelet transform is used to perform multi-resolution analysis on the displacement vector field data, decomposing the displacement vector field data into at least one low-frequency component for characterizing global warping and one high-frequency component for characterizing local deformation.

[0039] By mathematically modeling the low-frequency and high-frequency components, a correction model is generated that simultaneously corrects the global warping and local deformation, existing in the form of a correction lookup table or correction function.

[0040] The coordinate data used to define the geometry in the original photolithography pattern are transformed by applying a correction model to generate the final photolithography pattern after pre-compensation correction.

[0041] The MEMS actuator and the grating structure are formed on the first wafer and the second wafer using the final photolithography pattern.

[0042] As an optional implementation, the batch formation of multiple grating structures corresponding to the positions of the MEMS actuator further includes:

[0043] An annular isolation groove is etched around the periphery of each grating structure to form a surrounding grating structure;

[0044] The formation of a bonding layer between the aligned first and second wafers includes:

[0045] The bonding layer material is applied to the first wafer and / or the second wafer, such that the annular isolation trench divides the bonding layer into two discontinuous regions:

[0046] An inner bonding region is used to fix the grating structure, and an outer bonding region surrounds the inner bonding region, thereby preventing stress transmission from the outer bonding region to the inner bonding region after bonding using the annular isolation groove.

[0047] Compared to existing technologies, this application achieves complete decoupling of the process flows of the MEMS actuator and the optical grating structure by fabricating them separately on two independent wafers. This approach frees the design of the optical grating from the limitations of MEMS processing conditions and silicon lattice constraints, allowing for free optimization of its parameters or the fabrication of complex structures such as concave surfaces and metasurfaces that are impossible to achieve using traditional methods. This significantly improves the optical performance of the device, such as greatly increasing diffraction efficiency. Secondly, this invention employs wafer-level integral alignment and bonding, replacing the traditional inefficient and low-precision chip-level discrete mounting. This not only improves the alignment accuracy to the sub-micron level, achieving precise matching between optical and driving components, but also fundamentally solves the problems of low yield and poor efficiency caused by chip-by-chip mounting, making large-scale, high-throughput mass production of the device possible. Furthermore, the low-temperature bonding process used in this invention effectively avoids damage to the precision optical structure caused by high temperatures and reduces residual stress introduced by material thermal mismatch, improving the reliability and environmental stability of the final device. In summary, this application, through a novel manufacturing paradigm, significantly improves production efficiency and yield while enhancing device performance and precision, thereby substantially reducing the manufacturing cost of individual devices. Attached Figure Description

[0048] Figure 1 A flowchart illustrating the MOEMS scanning grating based on split bonding and its wafer-level manufacturing method provided for embodiments of this application;

[0049] Figure 2 A flowchart of a manufacturing method provided in this application embodiment;

[0050] Figure 3 An exploded view of a split structure provided in an embodiment of this application;

[0051] Figure 4 A schematic diagram of a MEMS wafer marking provided in an embodiment of this application;

[0052] Figure 5 A schematic diagram illustrating MEMS wafer markings provided in an embodiment of this application;

[0053] Figure 6 A schematic diagram of a grating layer wafer marking provided in an embodiment of this application;

[0054] Figure 7 A schematic diagram illustrating the marking of a grating layer wafer is provided in an embodiment of this application;

[0055] Figure 8 This is a microscopic observation image provided for an embodiment of this application. Detailed Implementation

[0056] To make the objectives, technical solutions, and advantages of this application clearer, the specific embodiments of this application will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0057] See Figure 1 The diagram shows a flowchart of a wafer-level fabrication method for a MOEMS scanning grating based on split bonding, provided in an embodiment of this application. The method includes steps S101 to S105, wherein:

[0058] S101: Obtain a first wafer and a second wafer, wherein a plurality of MEMS actuators are formed in batches on the first wafer, and a plurality of grating structures corresponding to the positions of the MEMS actuators are formed in batches on the second wafer;

[0059] S102: A first alignment mark is formed in the MEMS actuator region of the first wafer, and a second alignment mark corresponding to the position of the first alignment mark is formed in the grating structure region of the second wafer;

[0060] S103: Align the first wafer with the second wafer so that the positional deviation between the first alignment mark and the second alignment mark is less than a preset alignment deviation threshold;

[0061] S104: A bonding layer is formed between the first and second wafers after alignment, and wafer bonding is performed by a low-temperature hot pressing process to obtain a bonded wafer;

[0062] S105: Perform a structure release process on the bonded wafer, and dicing the bonded wafer after structure release to obtain multiple MOEMS scanning grating devices with separate bonding.

[0063] Regarding the above S101:

[0064] This step embodies the core idea of ​​the present invention: split manufacturing. The complex MOEMS device is decomposed into two independently fabricable parts: a MEMS actuator and an optical grating structure. These parts are then mass-produced separately on two independent wafers. This decoupling of processes avoids the mutual constraints often found between MEMS microfabrication and precision optical component manufacturing processes, allowing the performance of both parts to be optimized independently, resulting in a device with superior final performance.

[0065] In a specific implementation, the first wafer is preferably a silicon-on-insulator (SOI) wafer, designed for the mass production of multiple MEMS actuators, which can be electrostatic or electromagnetic actuators. First, the SOI wafer undergoes RCA standard cleaning, and a silicon dioxide insulating layer is generated through a thermal oxidation process. Next, drive coils and circuit pins are mass-fabricated on the substrate using processes such as photolithography, sputtering, or electroplating. The drive coils can be made of highly conductive metals such as copper or gold. Then, materials such as silicon nitride or polyimide can be deposited as an insulating protective layer for the coils. Subsequently, the pattern of the movable mesa in the actuator is defined using photolithography and dry etching techniques such as reactive ion etching (RIE). Then, deep reactive ion etching (DRIE) is used to deeply etch out the torsion beam or cantilever beam structure for support and torsion.

[0066] For electromagnetically driven solutions, permanent magnet materials such as neodymium iron boron (NdFeB) can be integrated onto the back of the micromirror. Finally, the bonding surfaces of the MEMS wafer are subjected to chemical mechanical polishing (CMP) to obtain an optically grade flat surface with extremely low surface roughness, providing ideal interface conditions for subsequent high-quality wafer-level bonding.

[0067] Simultaneously, a second wafer is fabricated to mass-produce multiple optical grating structures corresponding one-to-one with the MEMS actuators on the first wafer using nanoimprint lithography. In one embodiment, the second wafer can also be an SOI wafer. The advantages of this nanoimprint lithography method are that it can overcome the limitations of traditional wet etching, freely optimize grating parameters, and fabricate complex structures such as three-dimensional concave gratings or metasurfaces, thereby significantly improving optical performance. The fabrication process first requires high-precision processing methods such as electron beam lithography (EBL) or focused ion beam lithography (FIB) to etch the nanoscale negative structure of the desired grating onto a substrate, such as nickel, to form a high-precision grating master, which can also be called a template. To facilitate subsequent demolding, an anti-adhesion layer, such as fluorosilane, can be coated on the surface of the master. Subsequently, a layer of UV-curable nanoimprint adhesive is spin-coated onto the surface of the second wafer; a preferred example is hydrazine silsesquioxane (HSQ). The prepared grating master is precisely pressed into the adhesive layer, and the imprint adhesive is cured by applying pressure and UV irradiation. After demolding, the pattern in the cured adhesive layer is transferred to the underlying silicon substrate through dry etching processes such as reactive ion etching (RIE) to form the final grating structure.

[0068] In this way, a first wafer and a second wafer, each carrying multiple MEMS actuators and matching optical grating structures, were obtained, which fully prepared for subsequent wafer-level alignment and bonding.

[0069] Regarding S102 above:

[0070] In step S102, to achieve the high-precision wafer-level alignment described in subsequent step S103, this application pre-fabricates mutually matching mechanical positioning marks on the first and second wafers, respectively. These marks are integrally fabricated through processes such as photolithography and etching during the wafer fabrication process described in S101, ensuring the accuracy of their position.

[0071] In a specific implementation, the multiple first alignment marks formed on the first wafer can be made of a metallic material and can be fabricated together with the drive coil during the metallization process in step S101. The first alignment marks can be composed of a combination of various different shaped patterns to provide a reference for subsequent multi-dimensional alignment.

[0072] For example, at least one cross-shaped mark can be set in the upper region of the wafer, and multiple bar marks can be set in other regions such as the sides and bottom of the wafer. These bar marks can have different extension directions, such as some being vertical and some being horizontal.

[0073] Accordingly, on the second wafer, a plurality of second alignment marks are formed at positions that perfectly correspond to the first alignment marks. The shapes of the second alignment marks are specially designed to complement the shapes of the first alignment marks. This complementarity is intended to allow the two sets of marks to be superimposed and combined into a preset pattern that is easy to identify and judge when the two wafers are precisely aligned.

[0074] For example, at the position corresponding to the cross-shaped mark on the first wafer, a cross-shaped mark can also be set on the second wafer; while at the position corresponding to the vertical bar mark on the first wafer, a horizontal bar mark can be set on the second wafer, and vice versa.

[0075] The beneficial effect of this complementary design is that during subsequent alignment operations, the two sets of marks will be superimposed under the observation system. Only when the alignment is perfectly precise will the two cross-shaped marks perfectly overlap, and the originally perpendicular bar marks will combine to form a complete cross shape. By observing the integrity and symmetry of this combined pre-defined shape, it is possible to determine with extremely high precision whether the translation, rotation, and parallelism between the two wafers are aligned, providing a reliable visual basis for achieving sub-micron level alignment accuracy.

[0076] Regarding the above S103:

[0077] As an optional implementation, aligning the first wafer and the second wafer so that the positional deviation between the first alignment mark and the second alignment mark is less than a preset alignment deviation threshold includes:

[0078] The first and second wafers are transmitted through an infrared light source, and images of the first alignment mark and the second alignment mark are captured using a CCD imaging system;

[0079] The image is analyzed by a machine vision system, and the position and parallelism of the first wafer and the second wafer are corrected and aligned.

[0080] In step S103, the first and second wafers prepared in the aforementioned steps are aligned with high precision. The core of this step lies in solving the problem that silicon wafers are opaque under visible light, making direct double-sided viewing alignment impossible. This application utilizes the physical property of silicon material being transparent to infrared light of a specific wavelength, and uses specialized observation methods to simultaneously observe and align the alignment marks located on the two wafers, thereby achieving high-precision wafer-level alignment.

[0081] In practice, this alignment process can be performed on a double-sided mask alignment machine or a dedicated wafer bonding machine. Such equipment requires two imaging systems, one for emitting and the other for receiving infrared light. These systems may include an infrared light source, an infrared CCD camera, and a high-magnification microscope. During operation, the first and second wafers are mounted on the upper and lower disks of the machine's stage, respectively, with their surfaces to be bonded facing each other. Once started, infrared light penetrates both wafers, and the two CCD systems simultaneously capture clear images of the first and second alignment marks on their respective wafers.

[0082] To achieve automation and ultra-high alignment accuracy, the process preferably employs machine vision-assisted correction technology. The captured images of the first and second alignment marks are transmitted in real time to a central processing system and superimposed on a display device. The machine vision system automatically analyzes the combined pattern formed by the superposition of the complementary marks as described in S102 using advanced image recognition algorithms. The system precisely calculates the positional deviation and rotational angle deviation of the two wafers in the X and Y planes. Based on these calculated deviation values, the system drives a platform controlled by piezoelectric ceramics or high-precision motors to fine-tune the orientation of one wafer at the micron or even nanometer level until the relative positional deviation of the two sets of alignment marks is corrected to within a preset threshold.

[0083] Regarding S104 above:

[0084] As an optional implementation, prior to forming the bonding layer, the method further includes:

[0085] Interface treatment is performed on the bonding surfaces of the first wafer and / or the second wafer;

[0086] The interface processing includes:

[0087] The surfaces to be bonded are subjected to plasma activation treatment;

[0088] A silane coupling agent is applied to the surface to be bonded.

[0089] After achieving high-precision alignment in S103, the process proceeds to step S104, where two wafers are permanently bonded together using a low-temperature bonding process to form a single bonded wafer. The key to this step is achieving high-strength, void-free wafer-level bonding while avoiding damage to the upper precision optical grating structure from high temperatures and effectively controlling residual stress introduced by thermal mismatch between different materials. Therefore, this invention preferably uses a low-temperature curing polymer as the bonding layer material, as it can cure at a relatively low temperature, and its elastic modulus helps buffer and compensate for thermal stress. In one embodiment, high-performance polymers such as benzocyclobutene (BCB) or polyimide (PI) can be selected. This bonding layer can be uniformly coated onto the bonding surfaces of the first and / or second wafers using methods such as spin coating.

[0090] To further enhance the bonding strength between the polymer bonding layer and the inorganic wafer surface, thereby ensuring the long-term reliability of the device, preferably, a special interface treatment can be performed on the wafer surface to be bonded before coating the bonding layer material. This treatment may include two consecutive steps: first, plasma activation treatment, which uses high-energy plasma to bombard the wafer surface to increase the surface's chemically active sites and wettability; subsequently, a layer of silane coupling agent is applied to the activated surface. The molecular structure of the silane coupling agent is like a "molecular double-sided adhesive," with one end forming a strong chemical bond with the inorganic material (such as silicon or silica) on the wafer surface, and the other end tightly cross-linking with the polymer bonding layer in the subsequent hot-pressing process, thereby forming an extremely stable chemical transition layer between the heterogeneous materials.

[0091] After interface treatment and bonding layer coating are completed, two precisely aligned wafers are pressed together in a wafer bonding apparatus. The apparatus applies a uniform contact pressure to the wafers while the chamber is evacuated to prevent bubbles or voids from forming at the bonding interface. Subsequently, cryogenic hot pressing is performed according to a preset program.

[0092] It is worth noting that in this step, the annular isolation trench previously fabricated on the second wafer plays a crucial structural role. Due to the presence of this isolation trench, the applied bonding layer material is physically separated into two discontinuous regions: an inner and an outer one. Therefore, the main stress generated during thermo-press bonding is confined to the outer bonding region and effectively blocked by the physical barrier of the isolation trench, preventing it from being transmitted to the grating structure, which is the core functional area and is fixed by the inner bonding region. This design greatly ensures the flatness of the optical surface and improves the stability of the device under varying temperature environments.

[0093] Regarding the above S105:

[0094] As an optional implementation, the step of performing a structure release process on the bonding wafer and dicing the structure-released bonding wafer to obtain multiple separately bonded MOEMS scanning grating devices includes:

[0095] The bonding wafer is etched in vapor phase using dixenon hexafluoride gas to implement the structure release process;

[0096] The bonded wafer after structure release is diced using a stealth laser cutting process.

[0097] After wafer-level bonding in S104, the process moves to the final step, S105, which involves structural release and dicing of the bonded wafer to obtain multiple individually packaged MOEMS scanning grating devices. This step is crucial in determining the final yield, and its core challenge lies in ensuring that the delicate top-layer grating structure and the fragile underlying mechanical support structure are not damaged by any physical or chemical means while releasing the movable MEMS structure and dicing the chip.

[0098] In one specific embodiment, the structure release process preferentially employs vapor phase etching technology. Specifically, the bonding wafer is placed in an etching chamber, and dixenon hexafluoride gas is introduced. Dixenon hexafluoride gas, as a highly selective dry silicon etchant, can efficiently remove the silicon material used as a sacrificial layer, thereby releasing movable structures such as torsion beams and micromirror stages in MEMS actuators from the substrate, allowing them to move freely. The engineering significance of using this dry vapor phase etching is that it completely avoids the "collapse" or "stickiness" phenomenon caused by liquid surface tension in traditional wet release processes. This stickiness phenomenon is one of the main causes of failure in MEMS devices with delicate suspended structures; therefore, the dry process used in this invention greatly improves the success rate and yield of device release.

[0099] After the structure is released, the wafer needs to be diced to separate individual device chips. To protect the optical gratings on the chip surface from mechanical damage and particle contamination, this invention preferably employs an advanced stealth laser cutting process. Unlike traditional abrasive wheel cutting, which generates severe vibration and a large amount of debris, this process focuses a laser beam of a specific wavelength onto the interior of the wafer, forming a controlled, delicate modified layer within it, without causing any ablation or damage to the upper or lower surfaces of the wafer. Subsequently, with only a small amount of mechanical stress applied, the wafer precisely cleaves along the pre-defined path of the modified layer. This "inside-out" cutting method offers significant advantages: the process is debris-free, vibration-free, and thermally shock-free, maximizing the integrity and cleanliness of the device surface.

[0100] Finally, the individual MOEMS scanning grating chips obtained from the cutting process are packaged. For example, they can be vacuum-sealed with a cover plate that integrates getter material to ensure the vacuum environment inside the device and the stability of long-term operation, thereby obtaining a finished device that can be used in applications.

[0101] As an optional implementation, the batch formation of multiple grating structures corresponding to the positions of the MEMS actuator includes:

[0102] A nanoimprint adhesive is spin-coated onto the surface of the second wafer;

[0103] The nanoimprint adhesive is imprinted using a pre-prepared grating master plate to form a grating pattern in the nanoimprint adhesive;

[0104] The nanoimprint adhesive is cured and imprinted, and the grating pattern is transferred to the second wafer to form the grating structure.

[0105] As a preferred embodiment of the batch formation of multiple grating structures in step S101, the present invention can employ a nanoimprint lithography process. As mentioned above, the core of this process lies in replicating nanoscale fine structures on the wafer surface using a high-precision master template (also known as a template). The present invention uses this process to replace traditional wet etching, and its fundamental advantage lies in that it completely eliminates the constraints of anisotropic etching of silicon crystals on grating parameters, providing a great degree of freedom for optical design.

[0106] In one embodiment, this design freedom is reflected in the ability to flexibly design various parameters of the grating according to different application requirements. For example, key parameters such as the grating period, depth, and blaze angle determined by the tilt angle can be precisely and customarily designed within an extremely wide range, thereby maximizing diffraction efficiency for any specific wavelength of light. More importantly, nanoimprint grating technology is not limited to fabricating planar gratings; it can also directly replicate three-dimensional concave gratings or metasurface structures with complex surface shapes on wafers, which is completely impossible with traditional integrated processes, greatly expanding the application potential and performance limits of MOEMS scanning gratings.

[0107] For example, in near-infrared applications such as Raman spectroscopy, the period and depth of the grating can be specifically designed to achieve high diffraction efficiency for a specific wavelength in that band. In mid-infrared applications, the period and depth of the grating can be designed with a completely different set of parameters to accommodate its longer operating wavelength. By employing the nanoimprinting and split bonding methods of this invention, the measured diffraction efficiencies of both types of gratings customized for different application scenarios can reach levels far exceeding those of conventional processes.

[0108] To ensure the performance of the final device, the fabrication of the grating master plate requires precise control during the nanoimprint lithography process. The extension direction of the grating edges defined on the master plate must be strictly parallel to the axial direction of the torsion beam of the MEMS actuator to be bonded to it, so as to ensure the precise coordination between the optical diffraction direction and the mechanical scanning motion direction.

[0109] As an optional implementation, forming a first alignment mark in the MEMS actuator region of the first wafer and forming a second alignment mark corresponding to the position of the first alignment mark in the grating structure region of the second wafer includes:

[0110] The first alignment mark includes at least one cross-shaped mark disposed above the first wafer and a plurality of bar-shaped marks disposed on the side or below the first wafer;

[0111] The shape and position of the second alignment mark match the first alignment mark so that after the first wafer and the second wafer are aligned, the first alignment mark and the second alignment mark can be combined to form a preset combined pattern.

[0112] In step S102, to achieve the high-precision wafer-level alignment described in subsequent step S103, this application pre-fabricates mutually matching mechanical positioning marks on the first and second wafers, respectively. These marks are integrally fabricated through processes such as photolithography and etching during the wafer fabrication process described in S101, ensuring the accuracy of their position.

[0113] For example, the plurality of first alignment marks formed on the first wafer may be made of a metallic material and may be formed together with the drive coil, etc., during the metallization process in step S101. The first alignment marks may be composed of a combination of various different shaped patterns to provide a reference for subsequent multi-dimensional alignment.

[0114] For example, at least one cross-shaped mark can be placed in the upper region of the wafer, and multiple bar marks can be placed in other regions such as the sides and bottom of the wafer. The specific combination and layout of these bar marks can also serve as bar coding to identify specific information on the wafer or chip.

[0115] Accordingly, on the second wafer, a plurality of second alignment marks are formed at positions that perfectly correspond to the first alignment marks. The shapes of the second alignment marks are specially designed to complement the shapes of the first alignment marks. This complementarity is intended to allow the two sets of marks to be superimposed and combined into a preset pattern that is easy to identify and judge when the two wafers are precisely aligned.

[0116] The beneficial effect of this complementary design is that during subsequent alignment operations, the two sets of marks will be superimposed under the observation system. Only when the alignment is perfectly precise will the two cross-shaped marks perfectly overlap, and the originally perpendicular bar marks will combine to form a complete cross shape. By observing the integrity and symmetry of this combined pre-defined shape, it is possible to determine with extremely high precision whether the translation, rotation, and parallelism between the two wafers are aligned, providing a reliable visual basis for achieving high-precision alignment.

[0117] As an optional implementation, the step of forming a bonding layer between the aligned first and second wafers and performing wafer bonding through a low-temperature hot-pressing process to obtain a bonded wafer includes:

[0118] Benzocyclobutene or polyimide is used as the bonding layer material;

[0119] The low-temperature hot pressing process is carried out at a bonding temperature of 120°C to 180°C and a bonding pressure of 5 kN to 15 kN.

[0120] As a preferred and specific embodiment of the low-temperature bonding process described in step S104, the material of the bonding layer can be benzocyclobutene, i.e., BCB, or polyimide, i.e., PI. Both of these materials have excellent thermal and chemical stability and can polymerize and cure at relatively low temperatures, thereby achieving high-strength interfacial bonding.

[0121] Accordingly, in order to achieve the best results with the preferred bonding materials mentioned above, the key parameters in the low-temperature hot pressing process can also be further optimized within a specific process window.

[0122] In specific implementations, the bonding temperature can preferably be set between 120 degrees Celsius and 180 degrees Celsius, while the total pressure applied to the entire wafer can preferably be controlled within the range of 5000 Newtons to 15000 Newtons. By combining specific high-performance polymer materials with an optimized process window, the process temperature can be minimized while ensuring bonding strength, thereby perfectly achieving the low-temperature, low-stress, and high-reliability bonding goals described in this invention.

[0123] Furthermore, for the grating pattern formed on the grating mother plate, the extension direction of its grating ridges is parallel to the axial direction of the torsion beam of the MEMS actuator.

[0124] To further clarify the technical necessity of keeping the direction of the grating ridge line parallel to the direction of the MEMS actuator torsion beam axis on the grating motherboard, the working principle of the device can be analyzed.

[0125] On the one hand, the operating mode of the MEMS actuator is through reciprocating torsion of its torsion beam, which determines that the normal of the micromirror stage will oscillate within a defined mechanical scanning plane. According to its mechanical structure, this mechanical scanning plane must be perpendicular to the axial direction of the torsion beam.

[0126] On the other hand, as a diffractive optical element, the main diffraction direction of the grating structure is determined by the grating equation, and the main extension dimension of its diffracted beam in space, that is, the optical diffraction plane, is necessarily perpendicular to the extension direction of the grating edge.

[0127] The purpose of this application is to use the mechanical scanning motion to drive the diffracted beam to perform a precise scan in space. In order to obtain a distortion-free and predictable linear scan trajectory, the optical diffraction plane must be precisely aligned with the mechanical scanning plane.

[0128] Based on the above analysis, the only geometric condition for two planes that are perpendicular to different reference lines to coincide is that the two reference lines that determine these two planes, namely the axis of the torsion beam and the edge of the grating, must be parallel to each other.

[0129] If the two are not parallel, the mechanical scanning motion will cause the diffracted beam to produce a complex two-dimensional arc or cone-shaped scanning trajectory in space, instead of the required one-dimensional linear scan. This will seriously affect the performance of the device in practical applications and the complexity of subsequent signal processing. Therefore, ensuring that the grating edges are precisely parallel to the axis of the torsion beam is the core design principle to ensure that the MOEMS scanning grating described in this invention can achieve high-quality, distortion-free linear scanning, rather than a simple, arbitrarily adjustable conventional design.

[0130] As an optional implementation, the batch formation of multiple grating structures corresponding to the positions of the MEMS actuator further includes:

[0131] Pre-compensation is performed using spatial location mapping technology; the pre-compensation includes:

[0132] By bonding and measuring the test wafer, a set of displacement vector field data characterizing the nonlinear deformation of the wafer was obtained;

[0133] The displacement vector field data includes: global low-frequency warping information caused by global thermal mismatch and local high-frequency deformation information caused by local defects or stress concentration.

[0134] Wavelet transform is used to perform multi-resolution analysis on the displacement vector field data, decomposing the displacement vector field data into at least one low-frequency component for characterizing global warping and one high-frequency component for characterizing local deformation.

[0135] By mathematically modeling the low-frequency and high-frequency components, a correction model is generated in the form of a correction lookup table or correction function, which can simultaneously correct the global warping and local deformation.

[0136] The coordinate data used to define the geometry in the original photolithography pattern are transformed by applying a correction model to generate the final photolithography pattern after pre-compensation correction.

[0137] The MEMS actuator and the grating structure are formed on the first wafer and the second wafer using the final photolithography pattern.

[0138] As a highly optimized embodiment of the present invention, to address the wafer nonlinear deformation problem caused by differences in the thermal expansion coefficients of different materials and non-uniform thermal fields in the equipment during low-temperature hot-press bonding, which cannot be corrected by traditional alignment techniques, this application proposes a pre-compensation method based on spatial position mapping technology. This method proactively intervenes during the photolithography layout design stage, performing feedforward compensation for foreseeable systematic positional offsets in subsequent processes.

[0139] In practice,

[0140] First, experimental characterization of nonlinear deformation data is performed. The purpose of this step is to accurately "depict" the deformation that the wafer will undergo under actual bonding processes. Specifically, a test wafer pair identical or similar to the actual production wafer can be used, and bonding is performed strictly according to the low-temperature hot-pressing process defined in step S104. After bonding, high-precision metrology equipment, such as a laser interferometer or coordinate measuring machine (CMM), is used to measure the positions of a series of pre-set sampling points on the test wafer before and after bonding. By comparing the coordinate changes of each sampling point before and after bonding, a set of displacement vector field data that can completely describe the deformation of the entire wafer surface can be obtained. This set of data profoundly reflects the complexity of deformation, including both the gradually changing global low-frequency warpage information caused by overall thermal mismatch and the drastically changing local high-frequency deformation information that may be caused by local micro-defects or structural stress concentration.

[0141] Secondly, wavelet transform is used for multi-resolution mathematical modeling. After obtaining the displacement vector field data containing mixed frequency information, it needs to be processed to calculate and generate a correction model that can compensate for the deformation.

[0142] Here, wavelet transform is the preferred mathematical tool. The principle is that traditional methods such as polynomial fitting can handle low-frequency global warping well, but often smooth out high-frequency local details, resulting in information loss. Wavelet transform, however, possesses multi-resolution analysis capabilities, decomposing the input displacement vector field signal at different scales to obtain a set of low-frequency components that can characterize global warping, and multiple high-frequency components that can characterize local deformation at different scales. The algorithm then independently models these successfully separated, more characteristic components mathematically, and finally synthesizes these models to generate a high-fidelity final correction model that can simultaneously and accurately describe and correct both global warping and local deformation.

[0143] In one embodiment, the correction model can be a data-driven correction lookup table or a complex correction function.

[0144] Finally, coordinate transformation and application are performed on the original photolithography layout. After generating the correction model, it can be applied to the original photolithography layout used in actual production. In one embodiment, the original photolithography layout is a standard CAD file format. A specialized software program reads the coordinate data of each vertex in the layout used to define the geometry of all devices. Subsequently, the correction model (lookup table or function) generated in the previous step is applied to perform a coordinate transformation operation on each original coordinate data point to obtain a new coordinate system that has undergone pre-compensation correction. After transforming all the coordinate points in the layout, the final photolithography layout is generated. This final photolithography layout is used in the subsequent step S1t01 to actually form the physical structure of the MEMS actuator and grating on the first and second wafers through photolithography exposure and other means.

[0145] By employing the aforementioned set of pre-compensation techniques, including experimental characterization, multi-resolution modeling, and coordinate transformation, this invention can proactively eliminate nonlinear deformation errors introduced by complex processes at the nanoscale. This results in the alignment accuracy between different internal structures of the device after final bonding, reaching a level that is difficult to achieve with existing technologies, and greatly improving the performance and consistency of the device.

[0146] For example, during the data acquisition phase, multiple arrayed Vernier scales can be fabricated on the surface of a pair of test wafers using standard photolithography. After the test wafer pair undergoes the same bonding process as in actual production, a laser interferometer or a 3D optical profilometer is used to perform high-precision scanning of the actual positions of the bonded Vernier scales to obtain their offsets relative to the design positions. Subsequently, the 3D coordinate measurement results, containing thousands or even tens of thousands of measurement points, can be imported into data analysis software such as MATLAB. By comparing them with the original design coordinates, the displacement vector of each scale position can be calculated, thereby generating a high-resolution, quantified displacement vector field data file.

[0147] Secondly, during the mathematical modeling stage, the built-in Wavelet Toolbox in MATLAB can be used to perform a two-dimensional discrete wavelet transform (2D-DWT) on the aforementioned displacement vector field data file, decomposing it into an approximate component (characterizing low-frequency global warping) and multiple detail components (characterizing high-frequency local deformation at different scales and directions). By performing low-order polynomial fitting on the approximate component and mathematical processing such as thresholding denoising and spline interpolation on the detail components, accurate correction algorithms for the two types of deformation can be obtained respectively. Finally, the two algorithm models are combined into a high-density correction look-up table file covering the entire wafer area and exported. This file records the accurate compensation value corresponding to each original coordinate point by point.

[0148] Finally, in the layout application stage, open-source or commercial layout processing software such as KLayout can be used, along with a custom script (e.g., written in Python or Ruby). This script first reads the original GDSII or OASIS format lithography layout file, then loads the correction lookup table generated in the previous step. The script iterates through the coordinates of every vertex of all shapes (such as polygons and paths) in the layout, interpolates the coordinates in the lookup table to obtain the precise correction value, and transforms the original coordinates. After all coordinate transformations are complete, the script generates a new GDSII or OASIS file with all geometric coordinates "reverse-distorted," which is the final lithography layout delivered for manufacturing.

[0149] Based on the above-described embodiment using customized wavelets, this application also proposes a more intelligent pre-compensation implementation method that includes a dynamic feedback mechanism.

[0150] In this implementation, the first step is to design and establish a custom wavelet basis function library for the various types of MOEMS scanning grating devices that this method can potentially manufacture, such as devices for different wavelengths or application scenarios, using the aforementioned defect feature characterization and template generation methods. Each custom wavelet in the library is matched with a typical local deformation feature generated during the bonding process of a specific device.

[0151] The implementation process of its dynamic feedback is as follows:

[0152] During the pre-compensation process, the first step is not to directly measure the deformation. Instead, in step S103, the alignment device uses a CCD imaging system to first read and identify the pre-set alignment marks, which serve as barcodes, on the first or second wafer. These barcodes contain product type identification information for the wafer currently being processed. After decoding the product type based on this identification information, the pre-compensation algorithm system dynamically selects and calls the optimal wavelet basis function that matches the identified product type from the customized wavelet basis function library.

[0153] Subsequently, the system uses this dynamically selected, optimal wavelet basis function to perform multi-resolution analysis on the subsequently acquired displacement vector field data of the wafer.

[0154] This dynamic feedback mechanism, based on the physical characteristics of the device itself, transforms the pre-compensation algorithm from a static, one-size-fits-all model into an intelligent system capable of adaptive adjustment. It ensures that any product can be analyzed using the mathematical tools best suited to its physical characteristics, thereby pushing the compensation accuracy and the final device performance consistency to the limits of both theory and practice.

[0155] In practice, the process of this implementation example can be divided into two stages: "offline database establishment" and "online automated production".

[0156] First, in the offline research and development and database establishment phase:

[0157] The goal of this phase is to establish a "wavelet model database" containing various custom wavelets. For two different target products, such as a type A device for Raman spectroscopy and a type B device for mid-infrared spectroscopy, researchers will fabricate test wafers for each. Atomic force microscopy (AFM) is used to perform high-precision scanning of typical local defect morphologies produced after bonding of the two devices, such as nanoscale bulges caused by microparticles or stress concentration points, to obtain nanoscale morphological data. This data is then processed in engineering software such as MATLAB, and "defect signal templates" representing type A and type B devices are constructed using statistical averaging and other methods. Subsequently, a specialized algorithm, such as one based on the lifting scheme, is called to design the best-matching "custom wavelet A" and "custom wavelet B" based on these two signal templates. Finally, these two custom wavelet basis functions are stored in a wavelet model database and indexed with product identification codes (e.g., "Raman_1064" and "MWIR_5um") for use during online production.

[0158] Secondly, in the online automated production stage:

[0159] This stage takes place in a fully automated wafer bonding machine. When a new wafer is fed into the alignment station, its integrated machine vision system first uses an infrared CCD camera to capture a pre-defined barcode mark on the wafer. The image processing module within the system, possibly using optical character recognition (OCR) or template matching algorithms, decodes the code to identify the wafer's product identification code, such as "Raman_1064". Based on this identification code, the machine's main control software sends instructions to the pre-compensation algorithm module. The algorithm module then queries the aforementioned wavelet model database and dynamically loads the matching "custom wavelet A" into memory. Only after this does the system initiate deformation measurement of the wafer, for example, by acquiring its displacement vector field data using an integrated laser interferometer. Finally, the algorithm module uses this dynamically selected, optimal "custom wavelet A" to perform multi-resolution analysis on the data and completes the subsequent correction model generation, such as a high-density correction lookup table file and photolithography coordinate transformation, and the entire process, including using KLayout software to call a customized Python script to process GDSII files.

[0160] As an optional implementation, the batch formation of multiple grating structures corresponding to the positions of the MEMS actuator further includes:

[0161] An annular isolation groove is etched around the periphery of each grating structure to form a surrounding grating structure;

[0162] The formation of a bonding layer between the aligned first and second wafers includes:

[0163] The bonding layer material is applied to the first wafer and / or the second wafer, such that the annular isolation trench divides the bonding layer into two discontinuous regions:

[0164] An inner bonding region is used to fix the grating structure, and an outer bonding region surrounds the inner bonding region, thereby preventing stress transmission from the outer bonding region to the inner bonding region after bonding using the annular isolation groove.

[0165] For example, see Figure 2 The diagram shown is a flowchart of a manufacturing method provided in an embodiment of this application, wherein:

[0166] MEMS wafer fabrication:

[0167] Mass production of actuators with driving circuits on SOI wafers (DRIE etching);

[0168] Surface planarization treatment (CMP polishing to Ra < 5nm);

[0169] Grating wafer fabrication:

[0170] Spin-coated nanoimprint adhesive (UV-curable hydrogenated silsesquioxane HSQ);

[0171] Hard template imprinting is performed using electron beam etching (period 400nm-12um, etching depth 120nm-2.7um, tilt angle 8.4°-27.5°);

[0172] Reactive ion etching (RIE) is transferred to the silicon substrate;

[0173] Wafer-level bonding:

[0174] Double-sided alignment (infrared transmission alignment system, accuracy ±0.5μm);

[0175] Low-temperature hot-press bonding (temperature 120-180℃, pressure 5-15kN, holding time 30-120s);

[0176] Post-processing:

[0177] A XeF2 vapor phase etching release scanning grating structure is adopted;

[0178] Slicing and cutting (invisible laser cutting to protect the grating structure);

[0179] Vacuum encapsulation (getter material integrated into the encapsulation cover);

[0180] For example, the detailed steps are as follows:

[0181] Substrate cleaning and oxidation / insulating layer deposition: SOI substrate is selected. Surface contaminants are removed by RCA standard cleaning, followed by thermal oxidation to generate a silicon dioxide (SiO2) insulating layer;

[0182] Coil photolithography and metallization: The coil shape is defined on the substrate using photolithography, while positioning patterns are etched on the wafer; highly conductive metal layers such as copper (Cu) or gold (Au) are deposited using sputtering or electroplating processes to form the drive coil and circuit pins.

[0183] Insulation protection layer deposition: Covering with silicon nitride (Si3N4) or polyimide (PI) as the insulation protection layer for the coil;

[0184] Movable mesa patterning: The mesa shape is defined by photolithography and dry etching (such as RIE);

[0185] Support structure etching (DRIE): Deep reactive ion etching (DRIE) is used to etch a torsion beam / cantilever beam structure in the silicon substrate to form the mechanical support of the micromirror. The beam thickness must be kept in line with the design.

[0186] Magnet integration: Permanent magnet materials (such as neodymium iron boron NdFeB) are deposited on the back of a micromirror by sputtering or electroplating;

[0187] Grating template fabrication: Electron beam lithography (EBL) or focused ion beam (FIB) etching is used to fabricate a nanoscale negative grating template on nickel (the size / position / orientation / number of the grating must be exactly the same as the movable mesa of the MEMS, and the grating edges must be strictly parallel to the torsion beam), and a positioning pattern at the same position as on the wafer is made with an accuracy of <1µm to form the template, and an anti-adhesion layer (such as fluorosilane) is coated to facilitate demolding;

[0188] Template imprinting: A UV-curable adhesive (such as UV-curable hydrogenated silsesquioxane HSQ) is spin-coated onto a wafer (SOI) of the same size as the MEMS; the template is pressed into the adhesive layer, heated and pressure is applied, and then UV cured;

[0189] Demolding: Separate the template, leaving the grating structure;

[0190] Low-temperature bonding: Using an infrared light source and an optical microscope, precise alignment of the grating structure and the MEMS actuator is achieved through positioning patterns on two wafers; BCB material can be used for bonding.

[0191] Sacrificial layer release: XeF2 vapor phase etching or oxygen plasma can be used to remove the organic sacrificial layer (such as photoresist);

[0192] Packaging: The MEMS actuator chip with the bonded grating is packaged together with a permanent magnet and a metal shielding shell to form a MOEMS scanning grating device.

[0193] Thus, the original solution could only create planar gratings with regular variations in the MEMS actuator, while this patent can not only bond planar gratings, but also nanoimprint three-dimensional concave gratings / metasurfaces and bond them to the MEMS actuator; moreover, the grating parameters can be freely optimized and are not limited by the growth direction of the silicon lattice.

[0194] Spatial position mapping technology: Eliminates systematic offset caused by the difference in thermal expansion coefficients between two wafers through photolithography pattern pre-compensation algorithm.

[0195] Heterogeneous interface treatment technology: Plasma activation + silane coupling agent treatment is used to make the bonding strength >15MPa.

[0196] Defect isolation design: An annular isolation groove is set around the grating unit to block the transmission of bonding stress to the functional area.

[0197] Low-temperature bonding process: By selecting low-temperature curing polymer materials and thicknesses, and controlling the bonding pressure and time, the bonding process can prevent damage and impact on the upper optical surface. For example, using a BCB / PI bonding layer avoids high-temperature damage while compensating for the difference in thermal expansion coefficients between dissimilar materials.

[0198] Example material parameters:

[0199] Bonding layer: BCB 4026-46, thickness 2μm, curing conditions 150℃ / 1h

[0200] Grating parameters: period 600nm, depth 520nm, wedge-shaped cross-section sidewall angle 19.3°

[0201] Example of process parameters:

[0202] Imprint pressure: 5 Bar

[0203] Bonding alignment: Dual-sided infrared CCD + machine vision-assisted correction;

[0204] An example is a 1064 nm band MOEMS scanning grating used for Raman spectroscopy:

[0205] The grating period is 1.25 μm, the depth is 0.52 μm, and the blaze angle is 28.3°.

[0206] The bonding layer material is BCB, with a thickness of 3μm and a bonding temperature of 180℃.

[0207] Test results: Diffraction efficiency 78.5% (38% with conventional technology), driving voltage 5V.

[0208] For example, a 5μm band micromirror for mid-infrared:

[0209] The grating period is 5μm, the depth is 1.48μm, and the scintillation angle is 18.2°.

[0210] The bonding layer material is PI, with a thickness of 5μm and a bonding temperature of 150℃;

[0211] Test results: After cycling from -40℃ to 85℃, the grating deformation is <λ / 20.

[0212] For example, please see Figure 3 , Figure 3 An exploded view of a split structure provided in this application embodiment, wherein:

[0213] The pink section on the far left is the MEMS actuator chip, the green section in the middle is the BCB bonding layer, and the rightmost section is the nanoimprinted optical surface. A process of bonding, releasing, and then dicing is employed.

[0214] For example, please see Figure 2 , Figure 2 A manufacturing method flowchart provided for an embodiment of this application, wherein:

[0215] A key feature of this manufacturing method is that it includes two parallel sub-processes for fabricating MEMS wafers and nanoimprint grating wafers, which ultimately converge in a wafer alignment and bonding step.

[0216] Specifically, Figure 3 The workflow diagram on the left illustrates the fabrication process of a MEMS wafer. This process begins with cleaning and pretreatment of the MEMS wafer, followed by thin film deposition, such as the deposition of sacrificial layers and structural layers. Next, photolithography and patterning processes define the desired circuitry and structural patterns on the wafer. Then, wafer etching steps, such as deep reactive ion etching (DRIE), are used to form the three-dimensional structure of the MEMS. After etching, the MEMS wafer undergoes further cleaning and drying. Finally, a bonding layer material, such as BCB, is coated onto the surface of the prepared MEMS wafer and pre-cured. At this point, the MEMS wafer is ready for subsequent bonding.

[0217] at the same time, Figure 3The workflow branch on the right illustrates the fabrication process of a nanoimprint grating wafer. The process begins with the preparation of a template for nanoimprinting using high-precision techniques such as electron beam etching. After cleaning and pre-treating another wafer, an imprinting adhesive is coated onto its surface. Subsequently, the template is used to imprint the adhesive onto the template. After imprinting, demolding and curing steps are performed. Next, the pattern on the imprinting adhesive is transferred to the wafer substrate through processes such as pattern transfer and substrate etching. This step may also include etching vias to the edges of the bonding areas. Afterward, metallization and surface finishing steps may be performed as needed. Finally, the nanoimprint wafer is cleaned and dried, at which point the grating wafer is ready.

[0218] After the two parallel sub-processes are completed, the process enters the main trunk section after merging. First, the prepared MEMS wafer and grating wafer are precisely aligned and bonded. After bonding, bonding layer materials such as BCB are cryogenically cured to form a permanent and robust bond. Subsequently, bonding quality inspection is performed to ensure uniformity and the absence of voids. After passing inspection, the bonded wafer undergoes structural release to unleash the movable structure of the MEMS. Then, advanced cutting techniques such as laser stealth dicing are used to dice the wafer into individual device chips. Finally, the diced chips undergo final cleaning and testing to obtain the finished device.

[0219] For example, please see Figures 4-8 , Figure 4 This is a schematic diagram of a MEMS wafer marking provided in an embodiment of this application. Figure 5 This is a schematic diagram illustrating MEMS wafer markings provided in an embodiment of this application, where the unit is μm. Figure 6 This is a schematic diagram of a grating layer wafer marking provided in an embodiment of this application. Figure 7 This is a schematic diagram illustrating the marking of a grating layer wafer provided in an embodiment of this application. Figure 8 This application provides an example of a microscopic observation of a bonded bond. It should be noted that the image is not to scale for clarity.

[0220] MEMS wafer marking: A cross-shaped metal coating is applied to the top left and right sides, a vertical line metal coating is applied to the left side, and a horizontal line metal coating is applied to the bottom. Figure 5 As shown, the mark size is as follows Figure 6 As shown.

[0221] Grating layer wafer marking: Apply a metal coating at the same location as the MEMS wafer marking, such as... Figure 7 As shown, the mark size is as follows Figure 8 As shown.

[0222] Post-alignment effect: Under near-infrared light transmission, the effect is observed using a microscope as follows. Figure 8 As shown, the inter-wafer bonding positioning error can be less than ±0.5um, while also ensuring parallelism and avoiding wafer thermal expansion errors.

[0223] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed in this application can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

Claims

1. A wafer-level fabrication method for MOEMS scanning gratings based on split bonding, characterized in that, include: A first wafer and a second wafer are obtained, wherein a plurality of MEMS actuators are formed in batches on the first wafer, and a plurality of grating structures corresponding to the positions of the MEMS actuators are formed in batches on the second wafer; A first alignment mark is formed in the MEMS actuator region of the first wafer, and a second alignment mark corresponding to the position of the first alignment mark is formed in the grating structure region of the second wafer; The first wafer and the second wafer are aligned so that the positional deviation between the first alignment mark and the second alignment mark is less than a preset alignment deviation threshold. A bonding layer is formed between the first and second wafers after alignment, and wafer bonding is performed by a low-temperature hot pressing process to obtain a bonded wafer. The bonding wafer is subjected to a structure release process, and the bonded wafer after structure release is diced to obtain multiple MOEMS scanning grating devices with separate bonding. The batch formation of multiple grating structures corresponding to the positions of the MEMS actuator also includes: Pre-compensation is performed using spatial location mapping technology; the pre-compensation includes: By bonding and measuring the test wafer, a set of displacement vector field data characterizing the nonlinear deformation of the wafer was obtained; The displacement vector field data includes: global low-frequency warping information caused by global thermal mismatch and local high-frequency deformation information caused by local defects or stress concentration. Wavelet transform is used to perform multi-resolution analysis on the displacement vector field data, decomposing the displacement vector field data into at least one low-frequency component for characterizing global warping and one high-frequency component for characterizing local deformation. By mathematically modeling the low-frequency and high-frequency components, a correction model is generated that simultaneously corrects the global warping and local deformation, existing in the form of a correction lookup table or correction function. The coordinate data used to define the geometry in the original photolithography pattern are transformed by applying a correction model to generate the final photolithography pattern after pre-compensation correction. The MEMS actuator and the grating structure are formed on the first wafer and the second wafer using the final photolithography pattern.

2. The method according to claim 1, characterized in that, The batch formation of multiple grating structures corresponding to the positions of the MEMS actuator includes: A nanoimprint adhesive is spin-coated onto the surface of the second wafer; The nanoimprint adhesive is imprinted using a pre-prepared grating master plate to form a grating pattern in the nanoimprint adhesive; The nanoimprint adhesive is cured and imprinted, and the grating pattern is transferred to the second wafer to form the grating structure.

3. The method according to claim 1, characterized in that, The step of forming a first alignment mark in the MEMS actuator region of the first wafer and forming a second alignment mark corresponding to the position of the first alignment mark in the grating structure region of the second wafer includes: The first alignment mark includes at least one cross-shaped mark disposed above the first wafer and a plurality of bar-shaped marks disposed on the side or below the first wafer; The shape and position of the second alignment mark match the first alignment mark so that after the first wafer and the second wafer are aligned, the first alignment mark and the second alignment mark combine to form a preset combined pattern.

4. The method according to claim 1, characterized in that, The step of aligning the first wafer and the second wafer to ensure that the positional deviation between the first alignment mark and the second alignment mark is less than a preset alignment deviation threshold includes: The first and second wafers are transmitted through an infrared light source, and images of the first alignment mark and the second alignment mark are captured using a CCD imaging system; The image is analyzed by a machine vision system, and the position and parallelism of the first wafer and the second wafer are corrected and aligned.

5. The method according to claim 1, characterized in that, The process of forming a bonding layer between the aligned first and second wafers and bonding them using a low-temperature hot-pressing process to obtain a bonded wafer includes: Benzocyclobutene or polyimide is used as the bonding layer material; The low-temperature hot pressing process is carried out at a bonding temperature of 120°C to 180°C and a bonding pressure of 5 kN to 15 kN.

6. The method according to claim 1, characterized in that, The process of performing a structure release process on the bonded wafer and then dicing the structure-released bonded wafer to obtain multiple separately bonded MOEMS scanning grating devices includes: The bonding wafer is etched in vapor phase using dixenon hexafluoride gas to implement the structure release process; The bonded wafer after structure release is diced using a stealth laser cutting process.

7. The method according to claim 2, characterized in that, For the grating pattern formed on the grating mother plate, the extension direction of its grating ridges is parallel to the axial direction of the torsion beam of the MEMS actuator.

8. The method according to claim 5, characterized in that, Prior to the formation of the bonding layer, the following is also included: Interface treatment is performed on the bonding surfaces of the first wafer and / or the second wafer; The interface processing includes: The surfaces to be bonded are subjected to plasma activation treatment; A silane coupling agent is applied to the surface to be bonded.

9. The method according to claim 1, characterized in that, The batch formation of multiple grating structures corresponding to the positions of the MEMS actuator also includes: An annular isolation groove is etched around the periphery of each grating structure to form a surrounding grating structure; The formation of a bonding layer between the aligned first and second wafers includes: The bonding layer material is applied to the first wafer and / or the second wafer, such that the annular isolation trench divides the bonding layer into two discontinuous regions: An inner bonding region is used to fix the grating structure, and an outer bonding region surrounds the inner bonding region, thereby preventing stress from being transmitted from the outer bonding region to the inner bonding region after bonding using the annular isolation groove.

Images