Animal invasive plant sampling system

Abstract

The invention discloses an alien invasive plant sampling system, which comprises a sampling circuit and a control circuit, and is characterized in that the control circuit is connected with the sampling circuit and is used for providing a common parameter signal Vout1 and a reset signal IN1 for the sampling circuit; the sampling circuit comprises a plurality of sampling units, each sampling unit outputs parameter protection signals Vout21-Vout2N to the control circuit, and the control circuit feeds back the parameter protection signals to the sampling device; the sampling unit comprises a plurality of resistors, a trigger, a digital potentiometer, an operational amplifier and a NOT gate; one end of a resistor R3 in the plurality of resistors is connected with a pin 5 of the trigger U2 and a pin 3 of the digital potentiometer U1; a pin 6 and a pin 2 of the trigger U2 are connected in parallel, a pin 3 receives an IN1 reset signal, and a pin 1 and a pin 4 are connected with a power supply; and a pin 4 of the digital potentiometer U1 is connected with a clock, and a pin 5 of the digital potentiometer U1 is connected with one end of a resistor R4 and a pin 2 of the NOT gate U4. According to the invention, sampling depth parameters of different plant species can be preset, and the requirements of sampling personnel on professional knowledge and operation skills are reduced.

Description

Technical Field

[0001] This invention relates to the field of plant sampling technology, and in particular to a sampling system for invasive alien plants. Background Technology

[0002] Invasive alien plants pose a serious threat to ecosystems, and in-depth research into their growth characteristics and distribution patterns is crucial for developing effective control strategies. However, existing plant sampling methods face multiple challenges: different plant species exhibit significant differences in growth habits and morphological structures, and environmental factors have complex and variable effects on root systems, requiring samplers to possess solid botanical expertise and extensive practical experience. Furthermore, as the sampling range and frequency increase, the manpower and time costs also rise substantially. Therefore, this paper proposes a sampling system for invasive alien plants that allows for preset sampling depths for different plants, lowers the operational threshold of sampling equipment, and reduces reliance on botanical knowledge. Summary of the Invention

[0003] To address the aforementioned technical problems, the present invention aims to provide a sampling system for invasive alien plants, comprising a sampling circuit and a control circuit. The control circuit is connected to the sampling circuit and provides a common parameter signal Vout1 and a reset signal IN1 to the sampling circuit. The sampling circuit includes multiple sampling units, each of which outputs parameter-preserving signals Vout2_1 to Vout2_N to the control circuit, which then feeds back to the sampling device. Each sampling unit includes several resistors, flip-flops, digital potentiometers, operational amplifiers, and NOT gates. One end of resistor R3 and pin 5 of flip-flop U2 are connected to the digital potentiometer. Pin 3 of potentiometer U1 is connected; pins 6 and 2 of trigger U2 are connected in parallel, pin 3 receives the IN1 reset signal, and pins 1 and 4 are connected to the power supply; pin 4 of digital potentiometer U1 is connected to the clock, pin 5 is connected to one end of resistor R4 and pin 2 of NOT gate U4, pins 6, 14, 10, and 11 are connected to ground, pin 12 is connected to one end of resistor R5, pin 2 of op-amp U3, and Vout2_1; pin 3 of op-amp U3 is connected to Vout1, pin 1 of op-amp U3 is connected to pin 1 of NOT gate U4; the other ends of resistors R3 and R4 are connected to ground.

[0004] Furthermore, the sampling circuit also includes several resistors, several flip-flops, several diodes, several NOT gates, and a decoding chip. Among the resistors, one end of resistor R7 is connected to pin 1 of operational amplifier U3, pin 1 of NOT gate U6, one end of resistor R10, and pin 3 of flip-flop U8; pins 2 and 6 of flip-flop U8 and the anode of the second diode D2 are connected; pin 4 is connected to one end of resistor R6, the cathode of the second diode D2, and the cathode of the third diode D3; pin 5 is connected to one end of resistor R12 and pin 2 of decoder U7; the anode of the third diode D3 and the anode of the fourth diode D4, pin 1 of NOT gate U10, one end of resistor R1, pin 1 of decoder U7, and the... Pin 1 of gate U11 is connected; pin 2 of NOT gate U10 is connected to pin 1 of flip-flop U5 and pin 1 of flip-flop U8; pin 3 of flip-flop U5 is connected to one end of resistor R11 and pin 2 of NOT gate U6, pins 2 and 6 are connected in parallel, pin 5 is connected to one end of resistor R8 and pin 3 of decoder U7, pin 4 is connected to one end of resistor R2, the cathode of first diode D1 and the cathode of fourth diode D4; pin 17 of decoder U7 is connected to pin 1 of NOT gate U9; pin 2 of NOT gate U9 is connected to pin 3 of flip-flop U2; the other ends of resistors R6, R7, R12, R1, R8, R11 and R2 are connected to ground.

[0005] Furthermore, the control circuit includes resistor RV1 and resistor R9. One end of resistor R9 is connected to the power supply, and the other end is connected to one end of resistor RV1, providing a common parameter signal Vout1. The other end of resistor RV1 is connected to a tap and a ground terminal.

[0006] Furthermore, the control circuit includes SW1 and SW2. One end of SW1 is connected to the power supply, and the other end is connected to the common terminal of SW2. The connection terminal provides a reset signal IN1 or IN2 to the sampling circuit.

[0007] Furthermore, the control circuit includes SW3, with one connection terminal of SW3 connected to Vout2_1, the other connection terminal of SW3 connected to Vout1, and the common terminal providing the parameter selection signal Vout.

[0008] Furthermore, it also includes a resistor RC circuit and a comparator circuit. The input terminal of the resistor RC circuit is connected to Vout2_1 to Vout2_N, and the output terminal is connected to the first input terminal of the comparator circuit. The second input terminal of the comparator circuit is set with a reference voltage, and the different voltages are converted into the start-up time of the motor in the actuator.

[0009] Furthermore, it also includes an amplifier circuit, which is connected in series between the comparator circuit and the motor main control circuit of the actuator.

[0010] The beneficial effects of this invention compared to the prior art are:

[0011] This invention allows for the preset sampling depth parameters for different plant species, reducing the requirements for sampling personnel in terms of professional knowledge and operational skills. Attached Figure Description

[0012] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the prior art and embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0013] Figure 1 The sampling circuit structure diagram provided by the present invention.

[0014] Figure 2 , Figure 3 The control circuit structure diagram provided by the present invention. Detailed Implementation

[0015] To make the objectives and advantages of the present invention clearer, the present invention will be specifically described below in conjunction with embodiments. It should be understood that the following text is only used to describe one or more specific embodiments of the present invention and does not strictly limit the scope of protection specifically claimed by the present invention.

[0016] This invention discloses a sampling system for invasive alien plants, including a sampling circuit and a control circuit. The control circuit is connected to the sampling circuit and provides a common parameter signal Vout1 and a reset signal IN1 to the sampling circuit. The sampling circuit includes multiple sampling units, each of which outputs parameter-preserving signals Vout2_1 to Vout2_N to the control circuit, which then feeds back to the sampling device. Each sampling unit includes several resistors, flip-flops, digital potentiometers, operational amplifiers, and NOT gates. One end of resistor R3 and pin 5 of flip-flop U2 and the digital potentiometer U1 are connected. 3-pin connection; pins 6 and 2 of flip-flop U2 are connected in parallel, pin 3 receives the IN1 reset signal, and pins 1 and 4 are connected to the power supply; pin 4 of digital potentiometer U1 is connected to the clock, pin 5 is connected to one end of resistor R4 and pin 2 of NOT gate U4, pins 6, 14, 10, and 11 are connected to ground, pin 12 is connected to one end of resistor R5, pin 2 of op-amp U3, and Vout2_1; pin 3 of op-amp U3 is connected to Vout1, pin 1 of op-amp U3 is connected to pin 1 of NOT gate U4; the other ends of resistors R3 and R4 are connected to ground.

[0017] Specifically, the sampling circuit further includes several resistors, several flip-flops, several diodes, several NOT gates, and a decoding chip. Among the resistors, one end of resistor R7 is connected to pin 1 of operational amplifier U3, pin 1 of NOT gate U6, one end of resistor R10, and pin 3 of flip-flop U8; pins 2 and 6 of flip-flop U8 and the anode of the second diode D2 are connected; pin 4 is connected to one end of resistor R6, the cathode of the second diode D2, and the cathode of the third diode D3; pin 5 is connected to one end of resistor R12 and pin 2 of decoder U7; the anodes of the third diode D3 and the fourth diode D4, pin 1 of NOT gate U10, one end of resistor R1, pin 1 of decoder U7, and the NOT gate... Pin 1 of U11 is connected; pin 2 of NOT gate U10 is connected to pin 1 of flip-flop U5 and pin 1 of flip-flop U8; pin 3 of flip-flop U5 is connected to one end of resistor R11 and pin 2 of NOT gate U6, pins 2 and 6 are connected in parallel, pin 5 is connected to one end of resistor R8 and pin 3 of decoder U7, pin 4 is connected to one end of resistor R2, the cathode of first diode D1, and the cathode of fourth diode D4; pin 17 of decoder U7 is connected to pin 1 of NOT gate U9; pin 2 of NOT gate U9 is connected to pin 3 of flip-flop U2; the other ends of resistors R6, R7, R12, R1, R8, R11, and R2 are connected to ground.

[0018] Specifically, the control circuit includes resistor RV1 and resistor R9. One end of resistor R9 is connected to the power supply, and the other end is connected to one end of resistor RV1, providing a common parameter signal Vout1. The other end of resistor RV1 is connected to a tap and a ground terminal.

[0019] Specifically, the control circuit includes SW1 and SW2. One end of SW1 is connected to the power supply, and the other end is connected to the common terminal of SW2. The connection terminal provides a reset signal IN1 or IN2 to the sampling circuit.

[0020] Specifically, the control circuit includes SW3, with one connection terminal of SW3 connected to Vout2_1, the other connection terminal of SW3 connected to Vout1, and the common terminal providing the parameter selection signal Vout.

[0021] Specifically, it also includes a resistor RC circuit and a comparator circuit. The input terminal of the resistor RC circuit is connected to Vout2_1 to Vout2_N, and the output terminal is connected to the first input terminal of the comparator circuit. The second input terminal of the comparator circuit is set with a reference voltage, which is converted into the start-up time of the motor in the actuator through different voltages.

[0022] Specifically, it also includes an amplifier circuit connected in series between the comparator circuit and the motor main control circuit of the actuator.

[0023] In one embodiment, the goal is to preset sampling depth parameters for different plant species, reducing the requirements for sampling personnel's professional knowledge and operational skills. In this scheme, IN1 is a reset signal used for initial or secondary presets; Vout1 is a common parameter signal used to provide an adjustment reference for each sampling parameter; Vout2_1 is a parameter-preserving signal used to preset the current plant sampling depth, corresponding to Vout2_1 to Vout2_N based on the number of plant samples or the required preset number; Vout is a parameter selection output signal. After Vout2 to Vout2_N are preset, the corresponding voltage parameters can be selected to the execution device via SW3 or a strobe chip. In this embodiment, pin 1 of the trigger U2 is directly connected to the power supply. The voltage range of the common parameter signal Vout1, adjusted by resistors RV1 and R9, corresponds to the required plant sampling parameters. The parameters of Vout1 can also be directly input from the upper-level system. Resistors R9, RV1, and R9... The resistance value of resistor R5 is the same as that of digital potentiometer U1. When the circuit is powered on, the power signal passes through resistor R9, resistor RV1 and ground in one path, and through resistor R5, pins 12 and 11 of digital potentiometer U1 and ground in another path. Then, adjusting the knob of resistor RV1 changes the voltage division ratio of resistors RV1 and R9 and feeds it back to Vout1. Pin 3 of op-amp U3 is used to sample the voltage at the connection point of resistors RV1 and R9, and pin 2 of op-amp U3 samples the voltage at the connection point of resistor R5 and pin 12 of U1. After comparing the voltages at pins 3 and 2, op-amp U3 outputs the result signal to pin 1 of NOT gate U4. NOT gate U4 outputs an inverted signal through pin 2 to pin 5 of U1. U1 pulls up or down its pin 11 relative to pins 12 or 10 based on the potential at pin 5. After the voltage at the connection point of pin 12 of U1 and resistor R5 approaches the voltage at the connection point of resistors RV1 and R9, it is ready to preset or reset the current Vout2_! The parameters in this embodiment are preset in the following way: the input signal to IN1 is manually or automatically spaced, and then fed back to pin 3 of the flip-flop U2 via IN1. In the initial state, due to the pull-down of pin 5 of the flip-flop U2 and the output of pins 6 and 2, after the input signal to IN1, pin 6 of the flip-flop U2 will be set to 0, and the output signal of pin 5 of the flip-flop U2 will be sent to pin 3 of U1, and U1 will be cut off. At this time, Vout2_1 is consistent with Vout1. If Vout2_1 needs to reset the current retained Vout1 parameter voltage, the input signal to IN1 can be applied again. The manual or automatic input interval is the total time of the number of steps of U1 from low resistance to high resistance within the adjustment range of resistors RV1 and R9. The purpose of consistency is to prevent parameter retention errors caused by premature interruption. The manual interval input can be input through SW1 or other control switches, and the corresponding preset or reset of Vout2_1 to Vout2_N can be selected and controlled by SW2.

[0024] In one embodiment, another preset and reset method is provided. Compared to the first method, during the preset and reset process, the IN1 reset signal at the corresponding interval can be automatically generated by the number of steps and duration of the difference between Vout1 and Vout2_1, avoiding premature interruption due to operational errors. In this scheme, since the output state of op-amp U3 corresponding to each Vout2 series during reset is uncertain, the output signal of pin 1 of op-amp U3 is simultaneously input to pin 1 of NOT gate U6 and pin 3 of flip-flop U8. After receiving the signal, NOT gate U6 inverts it and feeds it back to pin 3 of flip-flop U5 after passing through the grounding loop of resistor R11. Compared to the previous comparison parameter of Vout1, if the later adjusted voltage is greater than the earlier adjusted voltage, then pin 1 of op-amp U3 will have an output. The output signal of op-amp U3 is fed back to pin 3 of flip-flop U8 after passing through resistor R7. After the signal input to pin 3 of flip-flop U8, pin 5 is set to 1, pin 6 of flip-flop U8 is set to zero, and pin 4 of flip-flop U8 is pulled down after passing through resistor R6. At the same time, NOT gate U6 inverts the signal input to op-amp U3 and outputs it to pin 3 of flip-flop U5. Pin 5 of flip-flop U5 is set to zero, pin 6 of flip-flop U5 is set to 1, and the output signal is fed back to pin 4 through diode D1, along with pins 1 and 2 of U1. When the voltage is pulled up, and the output of op-amp U3 changes, NOT gate U6 inverts the input signal again to pin 3 of flip-flop U5. Flip-flop U5 outputs at pin 5 and sets pin 6 to zero. At this time, pins 4 of flip-flops U5 and U8 are pulled down through resistors R2 and R6 respectively, causing their corresponding pins 6 to be set to zero. The signals from pins 5 of flip-flops U5 and U8 are fed back to decoder U7 for decoding. Decoder U7 outputs a signal from pin 7 to IN1, completing the acquisition of the IN1 reset signal for the corresponding interval. If the later adjusted voltage is less than the earlier adjusted voltage, then pin 1 of op-amp U3 has no output. NOT gate U6 first inverts the output signal to pin 3 of flip-flop U5, causing flip-flop U5 to... Pin 5 outputs, pin 6 is set to 0, pin 4 of flip-flop U5 is pulled down through resistor R2, and pulled up with the voltage of pin 12 of U1. When the output of op-amp U3 changes, op-amp U3 outputs a signal to pin 3 of flip-flop U8. Flip-flop U8 sets pin 5 to 1 and pin 6 of flip-flop U8 to zero. Pin 4 of flip-flop U8 is also pulled down through resistor R6. At this time, the signals of pin 5 of flip-flop U5 and flip-flop U8 are still fed back to decoder U7 for decoding, completing the acquisition of the IN1 reset signal at the corresponding interval. In this way, the smaller the voltage difference between Vout1, the faster the response speed. In this embodiment, SW1 outputs the IN2 signal to the anode of diode D4.

[0025] When the actuator has no encoder, a resistor RC circuit and a comparator circuit can be set between the sampling circuit and the actuator motor to control the motor start-up time (not shown in the attached figure). The connection method is to connect Vout2_1 to Vout2_N and the input terminal of the resistor RC circuit, connect the output terminal to the non-inverting input terminal of the first input terminal of the operational amplifier in the comparator circuit, set the reference voltage at the inverting input terminal of the second input terminal of the operational amplifier, and connect the output terminal to the relay coil for motor start-up in the main control circuit of the actuator. When a contactor is used as the main control circuit for the motor, an amplifier circuit is added between the output terminal of the operational amplifier and the contactor coil.

[0026] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No markings in the claims should be construed as limiting the scope of the claims.

Claims

1. A sampling system for invasive alien plants, characterized in that, The circuit includes a sampling circuit and a control circuit, which are connected to provide the sampling circuit with a common parameter signal Vout1 and a reset signal IN1. The sampling circuit includes multiple sampling units, each of which outputs parameter-preserving signals Vout2_1 to Vout2_N to the control circuit, which then feeds back to the sampling device. Each sampling unit includes several resistors, flip-flops, digital potentiometers, operational amplifiers, and NOT gates. One end of resistor R3 is connected to pin 5 of flip-flop U2 and pin 3 of digital potentiometer U1. Pins 6 and 2 of U2 are connected in parallel. Pin 3 receives the IN1 reset signal. Pins 1 and 4 are connected to the power supply. Pin 4 of digital potentiometer U1 is connected to the clock. Pin 5 is connected to one end of resistor R4 and pin 2 of NOT gate U4. Pins 6, 14, 10, and 11 are connected to ground. Pin 12 is connected to one end of resistor R5, pin 2 of op-amp U3, and Vout2_1. Pin 3 of op-amp U3 is connected to Vout1. Pin 1 of op-amp U3 is connected to pin 1 of NOT gate U4. The other ends of resistors R3 and R4 are connected to ground.

2. The invasive alien plant sampling system according to claim 1, characterized in that, The sampling circuit also includes several resistors, several flip-flops, several diodes, several NOT gates, and a decoding chip. Among the resistors, one end of resistor R7 is connected to pin 1 of operational amplifier U3, pin 1 of NOT gate U6, one end of resistor R10, and pin 3 of flip-flop U8; pins 2 and 6 of flip-flop U8 are connected to the anode of the second diode; pin 4 is connected to one end of resistor R6, the cathode of the second diode, and the cathode of the third diode; pin 5 is connected to one end of resistor R12 and pin 2 of decoder U7; the anodes of the third diode and the fourth diode, pin 1 of NOT gate U10, one end of resistor R1, pin 1 of decoder U7, and pin 1 of NOT gate U11 are also connected. Pin connections: Pin 2 of NOT gate U10 is connected to pin 1 of flip-flop U5 and pin 1 of flip-flop U8; pin 3 of flip-flop U5 is connected to one end of resistor R11 and pin 2 of NOT gate U6, pins 2 and 6 are connected in parallel, pin 5 is connected to one end of resistor R8 and pin 3 of decoder U7, pin 4 is connected to one end of resistor R2, the cathode of the first diode and the cathode of the fourth diode; pin 17 of decoder U7 is connected to pin 1 of NOT gate U9; pin 2 of NOT gate U9 is connected to pin 3 of flip-flop U2; the other ends of resistors R6, R7, R12, R1, R8, R11 and R2 are connected to ground.

3. The invasive alien plant sampling system according to claim 1, characterized in that, The control circuit includes resistor RV1 and resistor R9. One end of resistor R9 is connected to the power supply, and the other end is connected to one end of resistor RV1, providing a common parameter signal Vout1. The other end of resistor RV1 is connected to a tap and a ground terminal.

4. The invasive alien plant sampling system according to claim 1, characterized in that, The control circuit includes SW1 and SW2. One end of SW1 is connected to the power supply, and the other end is connected to the common terminal of SW2. The connection terminal provides a reset signal IN1 or IN2 to the sampling circuit.

5. The invasive alien plant sampling system according to claim 1, characterized in that, The control circuit includes SW3, with one connection terminal of SW3 connected to Vout2_1 and the other connection terminal of SW3 connected to Vout1. The common terminal provides the parameter selection signal Vout.

6. The invasive alien plant sampling system according to claim 1, characterized in that, It also includes a resistor RC circuit and a comparator circuit. The input terminal of the resistor RC circuit is connected to Vout2_1 to Vout2_N, and the output terminal is connected to the first input terminal of the comparator circuit. The second input terminal of the comparator circuit is set with a reference voltage, which is converted into the start-up time of the motor in the actuator through different voltages.

7. The invasive alien plant sampling system according to claim 6, characterized in that, It also includes an amplifier circuit, which is connected in series between the comparator circuit and the motor main control circuit of the actuator.

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