A shielded wire wiring method, device, storage medium, and product

Abstract

The present application relates to the technical field of integrated circuit design, and particularly relates to a shielding line wiring method, device, storage medium and product. The shielding line wiring method comprises the following steps: providing a design rule file and wiring parameters, the wiring parameters comprising a target line group, a shielding line width and a shielding distance; generating a wiring contour based on the target line group; performing offset processing on the wiring contour based on the shielding line width and the shielding distance to obtain a shielding contour; generating an initial shielding line based on the shielding contour; performing design rule detection and correction processing on the initial shielding line based on the design rule file, and outputting a target shielding line. By abstracting the wiring into a geometric figure and performing geometric processing, the shielding line structure can be flexibly and efficiently and quickly generated.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuit design, and in particular, to a shielding line routing method, device, storage medium and product. BACKGROUND

[0002] In modern 2.5D / 3D integrated circuit design, the integration mode based on silicon interposer or silicon bridge is increasingly common. Such design allows high-density group routing between small chips with different functions. However, high-speed signals in dense interconnection are prone to cause serious electromagnetic interference and electromagnetic radiation problems, which significantly affect the system signal integrity and reliability, and therefore, shielding structure is usually added to the routing.

[0003] The existing technical solutions for adding shielding structure to the routing can be roughly divided into three types: global copper skin shielding, joint routing generation shielding line and manual addition of shielding line depending on design experience.

[0004] Among them, the global copper skin shielding refers to shielding implemented by covering the metal layer on the top layer of the layout, which may introduce excessive parasitic capacitance, increase power consumption and cannot be accurately optimized for sensitive signal lines; joint routing regards the shielding line and the signal line as a whole group for routing, and the shielding line and the signal line are routed as a whole group in the initial routing stage, which lacks flexibility and must be re-routed for complex whole routing once the routing is completed or the shielding strategy needs to be modified; and manual addition of shielding line depending on design experience adds shielding line by manual operation and relies on experience, but the 2.5D interposer routing density reaches micrometer level, manual operation is not feasible, and it is too dependent on the experience of practitioners.

[0005] Therefore, an independent post-processing algorithm is needed, which can automatically generate the required shielding line structure according to the user's flexible definition of geometric parameters, position requirements, levels and shielding modes for the existing group routing with any topology. SUMMARY

[0006] To solve the technical problems of poor shielding line routing effect and low flexibility, the present application provides a shielding line routing method, device, storage medium and product.

[0007] The technical problem of the present application is solved by providing a shielding wire routing method, comprising: providing a design rule file and routing parameters, the routing parameters including a target wire group, a routing spacing within the target wire group, a shielding wire width, and a shielding spacing; generating a routing contour based on the target wire group, including: extracting a polygon contour of each wire in the target wire group; performing a polygon union Boolean operation on the polygon contour to obtain the routing contour; or extracting a polygon contour of each wire in the target wire group, and expanding the polygon contour by one-half of the routing spacing to obtain a first polygon contour; performing a polygon union Boolean operation on the first polygon contour to obtain an initial routing contour; shrinking the routing contour by one-half of the routing spacing to obtain a routing contour; performing offset processing on the routing contour based on the shielding wire width and the shielding spacing to obtain a shielding contour; generating an initial shielding wire based on the shielding contour; and performing design rule detection and correction processing on the initial shielding wire based on the design rule file, and outputting a target shielding wire.

[0008] Preferably, the routing parameters include a routing line width within the target wire group, and after providing the routing parameters, the method further comprises: performing feasibility verification on the routing parameters, and if the routing spacing and the routing line width meet a preset threshold, performing subsequent steps, otherwise, reporting an error and aborting the process.

[0009] Preferably, the offset processing on the routing contour based on the shielding wire width and the shielding spacing to obtain a shielding contour comprises: expanding the routing contour by a first offset amount to obtain a first shielding contour, the first offset amount being equal to the shielding spacing; expanding the routing contour by a second offset amount to obtain a second shielding contour, the second offset amount being equal to the shielding spacing plus the shielding wire width; and subtracting the first shielding contour from the second shielding contour to obtain the shielding contour.

[0010] Preferably, the offset processing on the routing contour based on the shielding wire width and the shielding spacing to obtain a shielding contour comprises: expanding the routing contour by a third offset amount to obtain the shielding contour, wherein the third offset amount is equal to one-half of the value of the shielding wire width minus the routing line width.

[0011] Preferably, generating an initial shielding wire based on the shielding contour comprises: extracting an inner boundary and an outer boundary of the shielding contour; traversing each outer boundary edge and matching it with a nearest inner boundary edge parallel thereto to obtain a set of parallel edges; performing integer processing on end points of the parallel edges to obtain four new end points; and generating the initial shielding wire based on the four new end points.

[0012] Preferably, after the initial shielding lines are generated based on the shielding profile, the method further comprises performing a polygon union Boolean operation on the two initial shielding lines between two adjacent conductive lines to obtain a single shielding line.

[0013] Preferably, the initial shielding lines are generated based on the shielding profile, comprising: traversing a profile edge of the shielding profile and matching a parallel profile edge to obtain a set of parallel edges; performing integer processing on end points of the parallel edges to obtain four new end points; and generating the initial shielding lines based on the four new end points.

[0014] To solve the above technical problems, the application further provides an electronic device comprising a memory, a processor and a computer program stored in the memory, wherein the processor executes the computer program to implement the shielding line routing method according to any one of the above.

[0015] To solve the above technical problems, the application further provides a computer storage medium having computer program instructions stored thereon, wherein the computer program instructions are executed to implement the shielding line routing method according to any one of the above.

[0016] To solve the above technical problems, the application further provides a computer program product comprising a computer program, wherein the computer program is executed by a processor to implement the shielding line routing method according to any one of the above.

[0017] Compared with the prior art, the shielding line routing method, device, storage medium and product provided by the application have the following advantages:

[0018] 1. The shielding line routing method provided by the embodiment of the application provides specific calculation parameters such as target line group, shielding line width and shielding spacing through a design rule file and routing parameters provided by a user, thereby providing a clear basis for subsequent routing calculation; a routing profile is generated through a target line group, and then offset processing is performed on the routing profile to obtain a shielding profile, so that the position and range of the shielding line are accurately controlled, and it is ensured that the shielding line is arranged around the target line group; after an initial shielding line is constructed, detection and correction are performed according to a design rule, so that it is ensured that the target shielding line output finally not only meets the design requirement but also effectively implements the shielding function of the target line group, the overall process is standardized and accurate, and the reliability and effectiveness of the shielding line routing are improved.

[0019] It should be understood that the method converts a complex electromagnetic compatibility design problem into a programmable geometric processing problem through standardized processes such as contour extraction, geometric offset and graphic construction of the target line group, so that the shielding line routing method can be used as a general post-processing step to efficiently and accurately generate a shielding line meeting the requirement, and the technical problems of poor flexibility and low efficiency of the traditional shielding line generation method are solved.

[0020] 2. The shielding line wiring method provided by the embodiment of the present application adds a feasibility checking step after providing the wiring parameters, compares the wiring spacing and wiring line width within the target line group with the preset threshold value, can discover unreasonable parameters in time at the initial stage of the wiring process, stops if the parameters do not meet the requirements, avoids subsequent invalid wiring operations, reduces the waste of time and resources, and continues the process if the parameters are qualified, ensuring that the subsequent wiring steps are based on reasonable parameters, and improving the rationality and efficiency of the shielding line wiring from the source.

[0021] Through this design, the rationality of user parameter setting can be quickly judged, the risk of geometric operation failure or result unable to manufacture caused by unreasonable parameter setting is avoided in advance, the robustness and practicality of the algorithm are significantly improved, meaningless calculation resource consumption is avoided, and the user experience and reliability of the algorithm are improved.

[0022] 3. The shielding line wiring method provided by the embodiment of the present application can accurately capture the spatial form of a single wire by extracting the polygon outline of each wire in the target line group, performs a union Boolean operation on these polygon outlines, abstracts a group of dispersed and complex signal lines into a unified and continuous polygon outline, integrates the overall spatial range of the target line group, simplifies the complexity of the subsequent processing object, ensures that the wiring outline completely covers all target wires, provides an accurate basic outline for the generation of a subsequent shielding outline, and enables the shielding line to fully surround the target line group, ensuring the integrity of the shielding range.

[0023] 4. The shielding line wiring method provided by the embodiment of the present application first expands the polygon outline of each wire by one-half of the wiring spacing to obtain a first polygon outline connected in turn, then performs a union operation on the first polygon outline to obtain a preliminary overall outline of the target line group, eliminates various details of the wiring within the target line group, and only outputs the outer edge outline of the entire wiring, and finally shrinks the initial wiring outline by one-half of the wiring spacing to obtain the accurate outer outline of the target line group; the shielding line generated based on this outline can perfectly wrap the outer edge of the target line group, and realizes effective shielding of the entire target line group with minimized shielding line resources.

[0024] 5、The shielding wire wiring method provided by the embodiment of the present application expands the shielding interval outside the wiring profile to obtain a first shielding profile, clearly defines the safety distance between the shielding wire and the target line group, expands the sum of the shielding interval and the shielding wire width to obtain a second shielding profile, defines the outer boundary of the shielding wire, and subtracts the first shielding profile from the second shielding profile to obtain the shielding profile, which accurately frames the width range and position of the shielding wire. This step quickly generates a ring-shaped shielding band with a line width and an interval that meet the preset parameters through two profile offsetting operations and one Boolean operation, the ring-shaped shielding band defines the spatial position that the shielding wire should occupy, guarantees the structural precision and shielding effect of the shielding wire, and effectively avoids the problems of insufficient shielding or excessive shielding.

[0025] 6、The shielding wire wiring method provided by the embodiment of the present application expands the wiring profile by a third offset to obtain a solid shielding profile, simplifies the calculation logic of the offset processing, is suitable for the application scenario of cross-layer shielding, and quickly generates the shielding profile through single offsetting, while guaranteeing the adaptability of the shielding wire width and the wiring width of the target line group and improving the convenience of the shielding wire wiring design.

[0026] 7、The shielding wire wiring method provided by the embodiment of the present application extracts the inner boundary and the outer boundary of the shielding profile, provides clear boundary references for the construction of the initial shielding wire, traverses the outer boundary edge and matches the nearest parallel inner boundary edge to form a parallel edge group, ensures the parallelism and correspondence of the two side boundaries of the shielding wire, enables the shielding wire to be uniformly distributed along the shielding profile, guarantees the structural regularity and continuity of the shielding wire, and improves the mechanical stability and shielding consistency of the shielding wire; this step intelligently and accurately decomposes a complex ring-shaped area into a series of parallel and paired edges, that is, defines the boundary of a shielding wire, facilitates the conversion of the shielding band into an actual manufacturable conductor pattern, guarantees that each generated shielding wire is geometrically correct and connected without errors, performs integerization processing on the four endpoint coordinates, so that the endpoint coordinates meet the accuracy requirements and integer coordinate specifications in the actual manufacturing process, that is, the floating-point coordinates are aligned to the minimum grid required by the chip manufacturing process, ensures that each generated endpoint is manufacturable, and sequentially connects the new endpoints based on the integerization to form the initial shielding wire, guarantees that the pattern is closed and consistent in direction, effectively avoids the manufacturing errors or processing difficulties that may be caused by non-integer coordinates, improves the manufacturability of the shielding wire, ensures the dimensional accuracy of the shielding wire in actual production, and guarantees the practicality and reliability of the scheme.

[0027] 8、The shielding wire wiring method provided by the embodiment of the present application performs a polygon union Boolean operation on the two adjacent initial shielding wires to obtain a single shielding wire, which can effectively eliminate the gap or overlap problem that may exist between adjacent shielding wires; this step integrates the dispersed initial shielding wires into a continuous and complete shielding structure, enhances the integrity of the shielding wire, avoids the shielding failure caused by the gap, and improves the overall shielding efficiency of the shielding wire.

[0028] 9. The shielding line wiring method provided by the embodiment of the present application, when generating the initial shielding line, makes full use of the convenient features of the shielding contour, ensures that the shielding line is regularly distributed along the contour, performs integer processing on the end points of the parallel edges, so that it is adapted to the precision specification of the manufacturing process, generates the initial shielding line based on the integerized end points, ensures the consistency and size precision of the shielding line structure, and improves the manufacturability and shielding stability of the shielding line.

[0029] 10. The embodiment of the present application further provides an electronic device, which comprises a memory, a processor and a computer program stored on the memory, and the processor executes the computer program to realize the shielding line wiring method according to any one of the above.

[0030] 11. The embodiment of the present application further provides a computer storage medium, which stores computer program instructions, and the computer program instructions are executed to realize the shielding line wiring method according to any one of the above.

[0031] 12. The embodiment of the present application further provides a computer program product, which comprises a computer program, and the computer program is executed by a processor to realize the shielding line wiring method according to any one of the above. BRIEF DESCRIPTION OF DRAWINGS

[0032] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative labor.

[0033] Figure 1 is a step flow chart of the shielding line wiring method provided by the present application.

[0034] Figure 2 is a result schematic diagram of the double-side shielding mode in the shielding line wiring method provided by the present application.

[0035] Figure 3 is a result schematic diagram of the single-side shielding mode in the shielding line wiring method provided by the present application.

[0036] Figure 4 is a result schematic diagram of the grouped edge shielding mode in the shielding line wiring method provided by the present application.

[0037] Figure 5 is a result schematic diagram of the vertical shielding mode in the shielding line wiring method provided by the present application.

[0038] Figure 6is a detail step flow of the wiring profile in the shielding wire wiring method provided by the present application Figure 1 .

[0039] Figure 7 is a detail step flow of the wiring profile in the shielding wire wiring method provided by the present application Figure 2 .

[0040] Figure 8 is a detail step flow of the shielding profile in the shielding wire wiring method provided by the present application

[0041] Figure 9 is a detail step flow of the initial shielding wire generation in the shielding wire wiring method provided by the present application Figure 1 .

[0042] Figure 10 is a detail step flow of the initial shielding wire generation in the shielding wire wiring method provided by the present application Figure 2 .

[0043] Figure 11 is a detail step flow of the design rule detection in the shielding wire wiring method provided by the present application

[0044] Figure 12 is a structural schematic diagram of an electronic device provided by the present application

[0045] Figure 13 is a structural schematic diagram of a computer storage medium provided by the present application

[0046] Figure 14 is a structural schematic diagram of a computer program product provided by the present application

[0047] Corresponding description of the drawings:

[0048] 1, electronic device; 11, memory; 12, processor; 2, computer storage medium; 3, computer program product. DETAILED DESCRIPTION

[0049] In order to make the purpose, technical scheme and advantages of the present application clearer, the present application will be further described in detail below in combination with the drawings and examples. It should be understood that the specific examples described herein are only used to explain the present application, and are not used to limit the present application.

[0050] In the embodiments provided by the present application, it should be understood that "B corresponding to A" means that B is associated with A, and B can be determined according to A. However, it should also be understood that the determination of B according to A does not mean that B is determined only according to A, but B can also be determined according to A and / or other information.

[0051] It should be understood that every feature or combination of features described herein is meant to be within the scope of the application, and that the application can be practiced with only those specific features or only those specific combinations of features described.

[0052] In various embodiments of the present application, it should be understood that the magnitude of the serial number of the above-mentioned processes does not mean the inevitable sequence of execution, and the execution sequence of the processes should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0053] The flow diagrams and block diagrams in the drawings are illustrations of possible architectures, functions, and operations of systems, methods, and computer program products according to various embodiments of the present application. In this regard, each block in the flow diagrams or block diagrams can represent a module, a program segment, or a portion of code, which includes one or more executable instructions for implementing the specified logical function. It should also be noted that, in some alternative implementations, the functions noted in the blocks can occur in a different order than that shown in the drawings. For example, two blocks noted in succession can actually be executed substantially concurrently, or they can be executed in reverse order, depending on the involvement of the functions involved. It should be particularly noted that each block in the block diagrams and / or flow diagrams, and the combination of blocks in the block diagrams and / or flow diagrams, can be implemented by a dedicated hardware-based system that performs the specified functions or operations, or can be implemented by a combination of dedicated hardware and computer instructions.

[0054] Referring to Figure 1 The first embodiment of the present application provides a shielding line routing method for generating shielding lines on a design layout of an integrated circuit which has completed routing, comprising:

[0055] Step S1: providing a design rule file and routing parameters, the routing parameters including a target line group, a shielding line width, and a shielding spacing;

[0056] Step S2: generating a routing contour based on the target line group;

[0057] Step S3: performing offset processing on the routing contour based on the shielding line width and the shielding spacing to obtain a shielding contour;

[0058] Step S4: generating an initial shielding line based on the shielding contour;

[0059] Step S5: performing design rule detection and correction processing on the initial shielding line based on the design rule file to obtain and output a target shielding line.

[0060] It should be noted that the shielding line wiring method of the present application is used to optimize the electromagnetic compatibility of the completed wiring result, that is, to add shielding lines on the design layout of the integrated circuit with completed wiring.

[0061] In some embodiments, the shielding line wiring method of the present application supports diversified shielding modes, which can be classified into double-sided shielding mode, single-sided shielding mode, vertical shielding mode and grouping edge shielding mode according to the positional relationship between the shielding line and the signal line.

[0062] Specifically, refer to Figures 2-5 The double-sided shielding mode refers to placing shielding lines on both sides of the target signal line in the same metal layer, that is, generating a structure mode of "shielding line-signal line-shielding line-shielding line-signal line-shielding line", which can be specifically referred to Figure 2 The single-sided shielding mode refers to placing shielding lines on one side of the target signal line in the same metal layer, that is, generating a structure mode of "signal line-shielding line-signal line-shielding line", which can be specifically referred to Figure 3 The grouping edge shielding mode refers to placing shielding lines on both sides of the target signal line group, that is, generating a structure mode of "shielding line-signal line group-shielding line", which can be specifically referred to Figure 4 The vertical shielding mode refers to placing shielding lines on the metal layer directly above or below the target signal line, which can be specifically referred to Figure 5 .

[0063] By presetting a plurality of standardized shielding modes, the user can select the corresponding shielding mode according to the actual application requirement, so as to efficiently and accurately generate the required shielding line structure.

[0064] The shielding line wiring method provided by the embodiment of the present application clearly defines the specific calculation parameters such as the target line group, the shielding line width and the shielding spacing by using the design rule file and the wiring parameters provided by the user, thereby providing a clear basis for subsequent wiring calculation; the wiring contour is generated by the target line group, and then the offset processing is performed on the wiring contour to obtain the shielding contour, so as to accurately control the position and range of the shielding line and ensure that the shielding line is arranged around the target line group; after the initial shielding line is constructed, the design rule is detected and corrected, so as to ensure that the target shielding line output finally not only meets the design requirement, but also effectively realizes the shielding function of the target line group, the overall process is standardized and accurate, and the reliability and effectiveness of the shielding line wiring are improved.

[0065] It should be understood that the method converts the complex electromagnetic compatibility design problem into a programmable geometric processing problem through the standardized processes of contour extraction, geometric offsetting, and graphic construction of the target line group, so that the shielding line routing method can be used as a general post-processing step to efficiently and accurately generate the required shielding line, solving the technical problems of poor flexibility and low efficiency of the traditional shielding line generation method.

[0066] Further, the routing parameters include the routing spacing and the routing line width within the target line group, and after the routing parameters are provided, the method further includes: performing a feasibility check on the routing parameters, if the routing spacing and the routing line width meet the preset threshold, then performing the subsequent step, otherwise, reporting an error and aborting the process.

[0067] In some embodiments, if the feasibility check result is negative, that is, the routing spacing and the routing line width do not meet the preset threshold, the algorithm will report an error to the user and prompt that the input parameters do not meet the conditions, and also provide the condition formula that meets the conditions, so that the user can quickly and accurately adjust the parameters, thereby quickly passing the feasibility check, so that the algorithm can quickly perform the subsequent step.

[0068] Specifically, when the position of the shielding line is directly above or below the signal line, that is, the shielding mode is a vertical shielding mode, the feasibility check specifically checks whether the routing spacing, the routing line width, the shielding line width, and the minimum distance between the metal layers within the target line group meet the following conditions:

[0069]

[0070] wherein, is the routing line width within the target line group, is the routing spacing within the target line group, is the shielding line width, is the minimum distance between the metal layers.

[0071] When the position of the shielding line is on the same layer or on both sides of the signal line across layers, the feasibility check specifically checks whether the routing spacing, the routing line width, the shielding line width, and the shielding spacing within the target line group meet the following conditions:

[0072] When the shielding mode is a double-sided shielding mode, and the adjacent two shielding lines do not overlap,

[0073]

[0074] wherein, is the shielding spacing, is the shielding line width, is the routing spacing within the target line group.

[0075] When the shielding mode is a double-sided shielding mode, and the adjacent two shielding lines overlap,

[0076]

[0077] wherein, is a shielding distance, is a shielding line width.

[0078] When the shielding mode is a single-sided shielding mode,

[0079]

[0080] wherein, is a shielding line width, is a shielding distance, is an intra-group wiring distance of the target line group.

[0081] When the shielding mode is a group edge shielding mode,

[0082]

[0083] wherein, is a shielding distance, is a shielding line width.

[0084] It should be noted that the algorithm selects the corresponding verification formula for feasibility checking based on the actual shielding line generation mode.

[0085] The shielding line wiring method provided by the embodiment of the application adds a feasibility checking step after providing the wiring parameters, compares the intra-group wiring distance and the wiring line width of the target line group with the preset threshold, can discover unreasonable problems in the initial wiring process, and reports an error and stops if the parameters do not meet the requirements, thereby avoiding subsequent invalid wiring operations and reducing the waste of time and resources; if the parameters are qualified, the process continues, ensuring that the subsequent wiring steps are based on reasonable parameters, and improving the rationality and efficiency of the shielding line wiring from the source.

[0086] Through this design, the rationality of the user parameter setting can be quickly judged, the risk of geometric operation failure or result manufacturing failure caused by unreasonable parameter setting is avoided in advance, the robustness and practicality of the algorithm are significantly improved, meaningless calculation resource consumption is avoided, and the user experience and reliability of the algorithm are improved.

[0087] Further, please refer to Figure 6 , generating a wiring contour based on the target line group, comprising:

[0088] Step S21a: extracting a polygon contour of each wire in the target line group;

[0089] Step S22a: performing a polygon union Boolean operation on the polygon contour to obtain a wiring contour.

[0090] It should be noted that the target line group includes a plurality of metal wires, and the metal wires include horizontal, vertical, 45-degree or 135-degree inclined paths.

[0091] Specifically, the wiring profile obtained in step S22a includes the profile of each wire of the target line group.

[0092] In some embodiments, the pattern of the via and the bump in the corresponding metal layer is ignored when the wire polygon profile is extracted, that is, the algorithm only identifies and extracts the profile of the wire, so as to ensure the accuracy of the polygon profile.

[0093] In another embodiment, when the shielding line needs to be generated across layers, the algorithm first projects the target wiring into the adjacent metal layer, that is, the shielding layer in which the shielding line needs to be generated, and then processes the projection of the target wiring to obtain the wiring profile in the shielding layer.

[0094] The shielding line wiring method provided by the embodiment of the application can accurately capture the spatial form of a single wire by extracting the polygon profile of each wire in the target line group; the union Boolean operation is performed on the polygon profiles, a group of dispersed and complex signal lines are abstracted into a unified and continuous polygon profile, the integration of the overall spatial range of the target line group is realized, and the complexity of the subsequent processing object is simplified; the design ensures that the wiring profile completely covers all target wires, provides an accurate basic profile for the generation of the shielding profile, and enables the shielding line to completely surround the target line group, thereby ensuring the integrity of the shielding range.

[0095] Further, refer to Figure 7 , the wiring profile is generated based on the target line group, including:

[0096] Step 21b: Extracting the polygon profile of each wire in the target line group, and expanding the polygon profile by one-half wiring pitch to obtain a first polygon profile;

[0097] Step 22b: Performing a polygon union Boolean operation on the first polygon profile to obtain an initial wiring profile;

[0098] Step 23b: Shrinking the wiring profile by one-half wiring pitch to obtain a wiring profile.

[0099] It should be noted that the wiring pitch of each wire in the target line group is consistent, and when the polygon profile of each wire is expanded by one-half wiring pitch, the edges of the adjacent two polygon profiles overlap, that is, there is no spacing between the plurality of first polygon profiles after expansion, so that the profile after merging is the outer edge profile of the target line group.

[0100] Specifically, the step is used for generating a wiring profile in a group edge shielding mode, that is, the shielding line is located outside the whole group of wires, the whole group of signals is isolated as a whole, the intra-group crosstalk is not suppressed, only the peripheral protection is provided, and the problem of external defense is mainly solved; the whole group of wires is protected by using the smallest shielding line cost, the efficiency is extremely high, and the influence on the timing and power consumption is minimum.

[0101] Understandably, the shielding line wiring method provided by the embodiment of the application first expands the polygon profile of each wire by one half of the wiring pitch to obtain a first polygon profile connected in sequence, then performs a union operation on the first polygon profile to obtain a preliminary overall contour profile of the target wire group, which eliminates various details of the intra-group wiring of the target wire group and only outputs the outer edge profile of the whole group of wires, and finally shrinks the initial wiring profile by one half of the wiring pitch to obtain an accurate outer profile of the target wire group; the shielding line generated based on the profile can perfectly wrap the outer edge of the target wire group, and effective shielding of the whole target wire group is achieved by using the smallest shielding line resource.

[0102] Further, refer to Figure 8 , the wiring profile is offset based on the shielding line width and the shielding pitch to obtain a shielding profile, including:

[0103] Step S31: expanding the wiring profile by a first offset to obtain a first shielding profile, and the first offset is equal to the shielding pitch;

[0104] Step S32: expanding the wiring profile by a second offset to obtain a second shielding profile, and the second offset is equal to the shielding pitch plus the shielding line width;

[0105] Step S33: subtracting the first shielding profile from the second shielding profile to obtain the shielding profile.

[0106] It should be noted that the step can be used for a double-sided shielding mode, and the generated shielding profile is a ring-shaped shielding band, that is, the generated shielding line is located on both sides of the signal line.

[0107] Understandably, the wiring profile is expanded by the shielding pitch to obtain the first shielding profile, the safety distance between the shielding line and the target wire group is determined, the wiring profile is expanded by the sum of the shielding pitch and the shielding line width to obtain the second shielding profile, the outer boundary of the shielding line is defined, and the width range and position of the shielding line are accurately framed by subtracting the first shielding profile from the second shielding profile. The step quickly generates a ring-shaped shielding band with a line width and a pitch that meet the preset parameters through two profile offsetting and one Boolean operation, the ring-shaped shielding band defines the spatial position that the shielding line should occupy, ensures the structural accuracy and shielding effect of the shielding line, and effectively avoids the problems of insufficient shielding or excessive shielding.

[0108] Further, refer to Figure 9generating an initial shielding line based on the shielding contour, comprising:

[0109] Step S41a: extracting the inner boundary and the outer boundary of the shielding contour;

[0110] Step S42a: traversing each outer boundary edge and matching the nearest inner boundary edge parallel to it to obtain a set of parallel edges;

[0111] Step S43a: performing integer processing on the end points of the parallel edges to obtain four new end points;

[0112] Step S44a: generating an initial shielding line based on the four new end points.

[0113] It should be noted that the parallel edges are all horizontal edges or vertical edges, and the initial shielding line constructed by the parallel edges is a rectangular shielding line; if the parallel edges are diagonal edges, the initial shielding line constructed by the parallel edges is a trapezoidal shielding line or a parallelogram shielding line.

[0114] It should be understood that this step is applicable to the shielding contour of a ring-shaped shielding tape.

[0115] Specifically, if the traversed outer boundary edge is a horizontal edge or a vertical edge, the inner boundary edge with a distance equal to the shielding distance from the traversed outer boundary edge is matched as the parallel edge; if the traversed outer boundary edge is a diagonal edge, the outer boundary edge is projected in the horizontal direction and the vertical direction, the overlapping lengths of the inner boundary edges with the horizontal projection and the vertical projection are calculated, and the inner boundary edge with the longest overlapping length is matched as the parallel edge of the outer boundary edge.

[0116] The shielding line routing method provided by the embodiment of the present application extracts the inner boundary and the outer boundary of the shielding contour, provides a clear boundary reference for the construction of the initial shielding line, traverses the outer boundary edge and matches the nearest parallel inner boundary edge to form a parallel edge group, ensures the parallelism and correspondence of the two side boundaries of the shielding line, and constructs the initial shielding line based on the parallel edges, so that the shielding line can be uniformly distributed along the shielding contour, ensures the structural regularity and continuity of the shielding line, and improves the mechanical stability and shielding consistency of the shielding line; this step intelligently and accurately decomposes a complex ring-shaped region into a series of parallel and paired edges, i.e., defines the boundary of a shielding line, facilitates the conversion of the shielding tape into an actual manufacturable conductor pattern, and ensures that each generated shielding line is geometrically correct and connected without errors.

[0117] It should be noted that the Y coordinate of the horizontal conductor or the X coordinate of the vertical conductor in the target line group of the present application is an integer value.

[0118] In some embodiments, if both parallel edges are horizontal edges, the coordinates of the four endpoints of the two parallel edges are obtained, and each coordinate is rounded off, the endpoint with the maximum X coordinate value and the endpoint with the minimum X coordinate value are selected as reference points, and a perpendicular line is drawn to the other parallel edge, thereby constructing a rectangular shielding line; if the two parallel edges are vertical edges, the maximum and minimum values of the Y coordinates are taken as reference points, and a perpendicular line is drawn to the other edge to construct a rectangle.

[0119] In other embodiments, the two parallel edges are diagonal edges, the midpoints of the two diagonal edges are taken as reference points, the connecting edges of the end points of the diagonal edges are aligned with the X coordinates or Y coordinates, and based on the aligned X coordinates or Y coordinates, the corresponding Y coordinates or X coordinates are calculated from the reference points while maintaining the original diagonal edge vector, thereby obtaining the two integerized endpoint coordinates of the diagonal edge.

[0120] For example, a set of parallel edges is located below a set of parallel diagonal edges, so the end points of the diagonal edges connected to the set of parallel edges are aligned with the lower edge of the set of parallel edges, i.e., the parallel edge with the smaller Y coordinate, and the corresponding X coordinate is calculated while ensuring the direction vector of the diagonal edge, thereby obtaining the coordinates of the end points.

[0121] Specifically, if the midpoint coordinates of the first diagonal edge of a set of parallel 45-degree diagonal edges are (10, 10) and the midpoint coordinates of the second diagonal edge are (10, 15), and the Y coordinates of the two ends to be aligned are 20 and 0 respectively, then the coordinates of the two end points of the first diagonal edge are (20, 20) and (0, 0), and the coordinates of the two end points of the second diagonal edge are (15, 20) and (-5, 0), and connecting these four end points in turn can obtain a shielding line of a parallelogram.

[0122] The shielding line routing method provided by the embodiments of the present application performs integerization processing on the four endpoint coordinates, so that the endpoint coordinates meet the precision requirements and integer coordinate specifications in actual manufacturing processes, i.e., the floating point coordinates are aligned to the minimum grid required by the chip manufacturing process, ensuring that each generated endpoint is manufacturable; the initial shielding line is formed by connecting the new endpoints after integerization in turn, ensuring that the graph is closed and consistent in direction, effectively avoiding manufacturing errors or processing difficulties that may be caused by non-integer coordinates, improving the manufacturability of the shielding line, ensuring the dimensional accuracy of the shielding line in actual production, and ensuring the practicality and reliability of the scheme.

[0123] Further, after generating the initial shielding line based on the shielding contour, a single shielding line is obtained by performing a polygon union Boolean operation on the two initial shielding lines between the two adjacent wires.

[0124] It can be understood that the shielding line generation process of the unilateral shielding mode of the embodiment is to first generate bilateral shielding lines, and then combine two shielding lines of adjacent two conductive lines into a single shielding line, which ingeniously reuses the generation result of the bilateral shielding mode, and then combines the bilateral shielding lines into a unilateral shielding line through a simple polygon union operation. Through the design, it is not necessary to design an independent and complex generation algorithm for the unilateral shielding mode, which greatly simplifies the system complexity, improves the code reuse rate, and ensures the consistency of the generation results of the two modes.

[0125] The shielding line routing method provided by the embodiment of the application can effectively eliminate the gap or overlap problem that may exist between adjacent shielding lines by performing a polygon union Boolean operation on the two adjacent initial shielding lines to obtain a single shielding line. The step integrates the dispersed initial shielding lines into a continuous and complete shielding structure, enhances the integrity of the shielding line, avoids shielding failure caused by the gap, and improves the overall shielding effectiveness of the shielding line.

[0126] Further, the routing contour is offset based on the shielding line width and the shielding spacing to obtain a shielding contour, including: expanding the routing contour outward by a third offset amount to obtain the shielding contour, wherein the third offset amount is equal to half of the value of the shielding line width minus the routing line width.

[0127] It should be noted that this step is used to generate a shielding contour in the vertical shielding mode, that is, to generate a shielding line directly above or below the target line group without occupying valuable routing resources on the same layer. By using the natural isolation of the interlayer medium, the risk of short circuit with the signal line is completely avoided, so that the subsequent design rule check is simpler. By utilizing the three-dimensional stacking characteristics of the integrated circuit, the shielding is performed in the Z-axis direction, effectively suppressing electromagnetic coupling and radiation in the vertical direction.

[0128] The shielding line routing method provided by the embodiment of the application expands the routing contour outward by a third offset amount to obtain a solid shielding contour, which simplifies the calculation logic of the offset processing. It is suitable for cross-layer shielding application scenarios and can quickly generate a shielding contour through a single offset. While ensuring the adaptability of the shielding line width and the routing width of the target line group, the convenience of shielding line routing design is improved.

[0129] Further, please refer to Figure 10 , the initial shielding line is generated based on the shielding contour, including:

[0130] Step S41b: traversing the contour edge of the shielding contour and matching a parallel contour edge to obtain a group of parallel edges;

[0131] Step S42b: performing integerization processing on the end points of the parallel edges to obtain four new end points;

[0132] Step S43b: generating an initial shielding line based on the four new end points.

[0133] It should be noted that in the vertical shielding mode, the target line group is projected into the metal layer above or below it, and after the shielding contour is expanded outside the wiring contour in the corresponding metal layer, the shielding contour is graphically processed to obtain parallel edges on the shielding contour, and the corresponding initial shielding line is constructed based on the parallel edges.

[0134] It should be understood that this step is suitable for processing a solid shielding contour, that is, a shielding contour obtained by single offset on a wiring contour, which has only one closed contour line.

[0135] Specifically, each contour edge of the shielding contour is traversed, if the contour edge is a horizontal edge or a vertical edge, the corresponding parallel edge is searched within the shielding line width, if the contour edge is a diagonal edge, the horizontal projection and the vertical projection along the diagonal edge are made, and the contour edge with the maximum sum of the overlapping lengths of the horizontal projection and the vertical projection on the shielding contour is calculated, which is the matching parallel edge of the diagonal edge; after a group of parallel edges are matched, the endpoints of the group of parallel edges are integerized, and finally the corresponding endpoints are connected in turn to form the initial shielding line.

[0136] The shielding line routing method provided by the embodiment of the application makes full use of the convenient features of the shielding contour when generating the initial shielding line, ensures that the shielding line is regularly distributed along the contour, integerizes the endpoints of the parallel edges to adapt to the precision specifications of the manufacturing process, generates the initial shielding line based on the integerized endpoints, ensures the consistency and dimensional accuracy of the shielding line structure, and improves the manufacturability and shielding stability of the shielding line.

[0137] Further, please refer to Figure 11 , the initial shielding line is subjected to design rule detection and correction processing based on the design rule file, and the target shielding line is output, including:

[0138] Step S51: detecting the initial shielding line based on the design rule file to obtain a violation area;

[0139] Step S52: removing the initial shielding line in the violation area and / or re-routing the initial shielding line in the violation area, and outputting the target shielding line.

[0140] It should be noted that the design rule detection of the initial shielding line based on the design rule file includes but is not limited to checking whether there is a spacing violation between the initial shielding line and the corresponding wire, detecting whether the initial shielding line has a short circuit risk, and detecting whether the initial shielding line has an acute angle violation.

[0141] Specifically, for the detected design rule violation, the initial shielding line with the violation can be directly deleted, or local routing reconstruction can be performed to solve the wiring violation.

[0142] In some embodiments, directly removing the shielding wire may cause the line connection to be interrupted. In this case, the violation area needs to be rewired to ensure that the line is not interrupted when the violation is corrected.

[0143] Please see Figure 12 The present invention also provides an electronic device 1, including a memory 11, a processor 12 and a computer program stored on the memory 11, wherein the processor 12 executes the computer program to implement the shielded wire wiring method described above.

[0144] Specifically, electronic device 1 can be a smartphone, tablet, computer, or portable computer, etc.

[0145] It should be noted that the processor 12 may include one or more cores for processing data and message matrix units. The processor 12 connects to various parts of the entire electronic device 1 using various interfaces and lines, and performs various functions of the electronic device 1 and processes data by running or executing instructions, programs, code sets or instruction sets stored in the memory 11, and by calling data stored in the memory 11.

[0146] Optionally, the processor 12 can be implemented using at least one of the following hardware forms: digital signal processing, field-programmable gate array (FPGA), and programmable logic array (PLA). The processor 12 can integrate one or more of the following: a central processing unit (CPU), a graphics processor (GPU), and a modulation / decoder (MDD). Alternatively, the MDD may not be integrated into the processor 12 and can be implemented separately using a communication chip.

[0147] Understandably, the electronic device 1 implements the shielded wire routing method by executing a corresponding computer program through the processor 12, transforming the method into a function of the actually operable electronic device 1, which is convenient for application in actual integrated circuit design work, improves the work efficiency of designers, and promotes the automation and intelligence of integrated circuit design process. The electronic device 1 in this embodiment also has the same beneficial effects as the shielded wire routing method described above, which will not be repeated here.

[0148] Please see Figure 13 The present invention also provides a computer storage medium 2, on which computer program instructions are stored, and when the computer program instructions are executed, the shielded wire wiring method described above is implemented.

[0149] Understandably, the computer storage medium 2 stores the relevant calculation program instructions, which makes the shielded wire routing method convenient to store, transmit and execute. This facilitates the promotion of the shielded wire routing method, lowers the usage threshold and maintains algorithm consistency. It helps more integrated circuit design scenarios adopt the shielded wire routing method to improve design quality. The computer storage medium 2 in this embodiment also has the same beneficial effects as the shielded wire routing method described above, which will not be elaborated here.

[0150] Please see Figure 14 The present invention also provides a computer program product 3, which includes a computer program that implements the above-described shielded wire routing method when executed by a processor.

[0151] Understandably, the computer program product 3 provided in this embodiment includes computer instructions, which can be stored in a computer storage medium. The processor 12 of the electronic device 1 reads the computer instructions from the storage medium and executes the computer instructions, causing the electronic device 1 to perform the shielded wire routing method described in the various optional implementations above.

[0152] It is understood that, according to the embodiments disclosed in this invention, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of this disclosure include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication component, and / or installed from a removable medium. When the computer program is executed by a central processing unit (CPU), it performs the functions defined in the methods of this application. It should be noted that the computer-readable medium described in this application can be a computer-readable signal medium or a computer-readable storage medium, or any combination of the two. Computer-readable storage media include, but are not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: electrical connections having one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this application, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in connection with an instruction execution system, apparatus, or device. In this application, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A computer-readable signal medium can also be any computer-readable medium other than a computer-readable storage medium, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on a computer-readable medium can be transmitted using any suitable medium, including but not limited to: wireless, wire, optical fiber, RF, etc., or any suitable combination thereof.

[0153] Computer program code for performing the operations of this application can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0154] The shielded wiring method, device, storage medium, and product disclosed in the embodiments of the present invention have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the embodiments above are only for the purpose of helping to understand the method and core ideas of the present invention. Furthermore, those skilled in the art will recognize that, based on the ideas of the present invention, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of the present invention. Any modifications, equivalent substitutions, and improvements made within the principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A shielded wiring method for generating shielded lines on a completed integrated circuit design layout, characterized in that, include: Provide design rule files and routing parameters, the routing parameters including target line group, shield line width and shield spacing, and the routing spacing within the target line group; Generating a wiring profile based on the target line group includes: Extract the polygonal outline of each wire in the target line group; Perform a polygon union Boolean operation on the polygonal outline to obtain the wiring outline; or Extract the polygonal outline of each wire in the target line group, and expand the polygonal outline outward by half the wire spacing to obtain the first polygonal outline; Perform a polygon union Boolean operation on the first polygonal contour to obtain the initial wiring contour; The wiring profile is obtained by shrinking the wiring outline inward by half the wiring spacing; The wiring profile is offset based on the shielding line width and the shielding spacing to obtain the shielding profile. An initial shielding line is generated based on the shielding contour; The initial shielding line is subjected to design rule detection and correction processing based on the design rule file, and the target shielding line is output.

2. The shielded wire wiring method as described in claim 1, characterized in that, The wiring parameters include the wiring width within the target line group. After providing the wiring parameters, the process also includes: performing a feasibility check on the wiring parameters. If the wiring spacing and wiring width meet the preset threshold, the subsequent steps are executed; otherwise, an error is reported and the process is terminated.

3. The shielded wire wiring method as described in claim 1, characterized in that, The wiring profile is offset based on the shielding linewidth and the shielding spacing to obtain the shielding profile, including: The wiring outline is expanded outward by a first offset to obtain a first shielding outline, where the first offset is equal to the shielding spacing. The wiring outline is expanded outward by a second offset to obtain a second shielding outline, where the second offset is equal to the shielding spacing plus the shielding line width; The shielding profile is obtained by subtracting the first shielding profile from the second shielding profile.

4. The shielded wire wiring method as described in claim 1, characterized in that, The wiring profile is offset based on the shielding linewidth and the shielding spacing to obtain the shielding profile, including: The shielding profile is obtained by extending the wiring outline outward by a third offset, wherein the third offset is equal to half the value of the shielding line width minus the wiring line width.

5. The shielded wire wiring method as described in claim 3, characterized in that, Generate an initial shielding line based on the shielding contour, including: Extract the inner and outer boundaries of the shielding contour; Traverse each outer boundary edge and match it with the nearest parallel inner boundary edge to obtain a set of parallel edges; The endpoints of the parallel edges are integerized to obtain four new endpoints; The initial shielding line is generated based on the four new endpoints.

6. The shielded wire wiring method as described in claim 5, characterized in that, After generating the initial shielding line based on the shielding contour, the method further includes: performing a polygon union Boolean operation on the two initial shielding lines between two adjacent conductors to obtain a single shielding line.

7. The shielded wire wiring method as described in claim 4, characterized in that, The initial shielding line is generated based on the shielding contour, including: Traverse the contour edges of the shielded contour and match a parallel contour edge for it to obtain a set of parallel edges. The endpoints of the parallel edges are integerized to obtain four new endpoints; The initial shielding line is generated based on the four new endpoints.

8. An electronic device, characterized in that: It includes a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the shielded wire routing method as described in any one of claims 1-7.

9. A computer storage medium, characterized in that: It stores computer program instructions, which, when executed, implement the shielded wire wiring method as described in any one of claims 1-7.

10. A computer program product, comprising a computer program, characterized in that: When the computer program is executed by the processor, it implements the shielded wire routing method as described in any one of claims 1-7.

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