Resistor and preparation method for simultaneously preparing multiple resistors

Abstract

The invention discloses a preparation method for simultaneously preparing a plurality of resistors, which comprises the following steps: hollowing out an insulating layer, so that the insulating layer is provided with a first through hole penetrating through the thickness of the insulating layer, and the first through hole corresponds between electrodes of adjacent resistors; sequentially laminating and pressing the alloy sheet, the insulating layer and the base material to obtain a pressed sheet; the two opposite surfaces of the pressing plate sheet are attached to a dry film; exposing and developing the dry film to obtain a set first circuit pattern on the dry film; etching to divide the alloy sheet into a plurality of resistor main bodies and divide the base material into a plurality of electrodes, forming a plurality of semi-finished product units by the laminated sheet, and arranging a connecting part between adjacent semi-finished product units; and removing the dry film on the laminated sheet, and obtaining a plurality of resistors at the same time after post-processing and grading.

Description

Technical Field

[0001] This invention belongs to the field of alloy resistor technology, specifically relating to a method for simultaneously preparing multiple resistors and the alloy resistors prepared using this method. Background Technology

[0002] In existing technologies, the methods for simultaneously fabricating multiple resistors are generally as follows: An alloy sheet is first pressed together with an insulating layer to punch out holes for the electrodes; then, it is pressed together a second time with a copper layer. Subsequent processes include etching, resistance repair, solder resist application, and electroplating. Finally, the resistors are stamped, separated, and barrel-plated to form individual products. This existing technology requires two pressing operations, making the process more complex. Furthermore, the existing technology requires stamping to create through-holes between the alloy sheet and the insulating layer, which necessitates specialized equipment and dies, resulting in higher costs.

[0003] The above background information is provided only to aid in understanding the inventive concept and technical solution of this invention. It does not necessarily belong to the prior art of this invention. In the absence of clear evidence that the above information was disclosed before the filing date of this invention, the above background information should not be used to evaluate the novelty and inventiveness of this invention. Summary of the Invention

[0004] In view of this, in order to overcome the shortcomings of the prior art, the object of the present invention is to provide a method for simultaneously fabricating multiple resistors.

[0005] To achieve the above objectives, the present invention adopts the following technical solution:

[0006] A method for simultaneously fabricating multiple resistors includes the following steps:

[0007] The insulating layer is cut out so that there is a first through hole that penetrates its thickness, and the first through hole corresponds to the electrode between adjacent resistors;

[0008] Alloy sheets, insulating layers and substrates are sequentially stacked and pressed together to obtain a pressed sheet;

[0009] The two opposing surfaces of the pressed sheet are bonded to the dry film;

[0010] The dry film is exposed and developed to obtain a predetermined first circuit pattern on the dry film;

[0011] Etching is performed to divide the alloy sheet into multiple resistor bodies, the substrate into multiple electrodes, and the press-fit plate forms multiple semi-finished units, with connecting portions between adjacent semi-finished units;

[0012] After removing the dry film from the pressed plate, and following post-processing and granulation, multiple resistors are obtained simultaneously.

[0013] According to some preferred embodiments of the present invention, the perforation is achieved by laser cutting or die-cutting. That is, the insulating layer is laser-cut or die-cut to create a through-hole at the corresponding electrode location according to a pattern.

[0014] According to some preferred embodiments of the present invention, the pressing is to place the insulating layer between the alloy sheet and the substrate and obtain a pressed sheet by a press. The pressing parameters are pressure 75-85KG, temperature 150-170℃, and time 100-140S.

[0015] According to some preferred embodiments of the present invention, the insulating layer is an epoxy resin film.

[0016] According to some preferred embodiments of the present invention, during the etching, a second circuit pattern corresponding to the first circuit pattern is formed on the resistor body.

[0017] According to some preferred embodiments of the present invention, during the etching, a second through hole is formed between adjacent resistor bodies, the second through hole corresponding to and communicating with the first through hole.

[0018] According to some preferred embodiments of the present invention, during the etching process, a third through hole is formed between the electrodes of adjacent semi-finished units, the third through hole corresponding to and communicating with the first through hole.

[0019] According to some preferred embodiments of the present invention, the spacing of the first through holes is greater than the spacing of the third through holes.

[0020] According to some preferred embodiments of the present invention, the first through hole, the second through hole, and the third through hole are connected in the vertical direction.

[0021] According to some preferred embodiments of the invention, during the etching process, a fourth through hole is formed between the electrodes of the same semi-finished unit.

[0022] According to some preferred embodiments of the present invention, the post-processing includes the following steps:

[0023] The solder resist material is printed for the first time on the semi-finished sheet after the film is removed, so as to form a first solder resist layer on the semi-finished sheet;

[0024] Copper plating is performed to form a conductive layer, which is used to connect the electrode and the resistor body.

[0025] According to some preferred embodiments of the present invention, one end of the conductive layer is in contact with the electrode, and the other end is in contact with the end of the first solder resist layer. The conductive layer extends upward from the top surface of the electrode to the sidewalls of the first through hole and the second through hole, and covers the top surface of the end of the resistor body.

[0026] According to some preferred embodiments of the present invention, the post-processing includes the following steps: repairing the resistor body and printing solder resist a second time to form a second solder resist layer.

[0027] The present invention also provides a resistor prepared according to the preparation method described above.

[0028] Due to the adoption of the above technical solutions, the advantages of the present invention compared with the prior art are as follows: the method for preparing the resistor of the present invention uses laser engraving or die cutting to make through holes in the insulating layer, and then uses etching to make through holes in the alloy surface, which simplifies the process and saves costs. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 This is a schematic diagram of the preparation method in the prior art;

[0031] Figure 2 This is a schematic flowchart of the preparation method in an embodiment of the present invention;

[0032] Figure 3 This is a schematic diagram of the cross-sectional structure of the resistor in an embodiment of the present invention;

[0033] In the attached diagram, resistor-1, resistor body-2, insulating layer-3, electrode-4, first solder resist layer-51, second solder resist layer-52, conductive layer-6, first through hole-71, second through hole-72, third through hole-73, fourth through hole-74, alloy sheet-8, and substrate-9. Detailed Implementation

[0034] To enable those skilled in the art to better understand the technical solutions of the present invention, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0035] like Figure 1As shown, the existing manufacturing method includes the following steps in sequence: alloy + insulating layer 3 lamination → stamping → lamination with copper layer of substrate 9 → first solder resist → copper plating → second solder resist → particle separation. It requires two lamination processes, making the process more complex; furthermore, in the existing technology, the alloy sheet 8 and insulating layer 3 need to be stamped to create through holes, which requires corresponding equipment and stamping dies, resulting in higher costs. Figure 2 As shown, the method for simultaneously fabricating multiple resistors 1 according to the present invention includes the following steps: hollowing out the insulating layer 3 → laminating the alloy + insulating layer 3 + substrate 9 → etching → first solder resist → copper plating → second solder resist → particle separation, thereby forming multiple resistors 1. The present invention uses laser engraving or die cutting to create through holes in the insulating layer 3, and subsequently etches through holes on the alloy surface, simplifying the process and saving costs. Specifically, the method for simultaneously fabricating multiple resistors 1 according to the present invention includes the following steps:

[0036] The insulating layer 3 is hollowed out so that the insulating layer 3 has a first through hole 71 that penetrates its thickness. The first through hole 71 corresponds to the electrode 4 of the adjacent resistor 1.

[0037] The alloy sheet 8, the insulating layer 3 and the substrate 9 are sequentially stacked and pressed together to obtain a pressed plate.

[0038] The two opposing surfaces of the laminated sheet are bonded to the dry film;

[0039] The dry film is exposed and developed to obtain a predetermined first circuit pattern on the dry film.

[0040] Etching is performed to divide the alloy sheet 8 into multiple resistor bodies 2 and the substrate 9 into multiple electrodes 4. The plates are then pressed together to form multiple semi-finished units, with connecting parts between adjacent semi-finished units.

[0041] After removing the dry film from the laminated sheet, and following post-processing and granulation, multiple resistors 1 are obtained simultaneously. Granulation is used to separate the connecting parts, so that the multiple resistors 1 are no longer connected.

[0042] The cutouts are achieved through laser engraving or die-cutting. Specifically, the insulating layer 3 is laser-cut or die-cut to create a through-hole at the corresponding electrode 4 according to the pattern. The laser engraving parameters are: power 4-6W, cutting speed 90-110mm / s.

[0043] The pressing process involves placing the insulating layer 3 between the alloy sheet 8 and the substrate 9 and pressing it through a press to obtain a pressed sheet. The pressing parameters are: pressure 75-85KG, temperature 150-170℃, and time 100-140S. The insulating layer 3 is an epoxy resin film.

[0044] During etching, a second circuit pattern corresponding to the first circuit pattern is formed on the resistor body 2; at the same time, a second through hole 72 is formed between adjacent resistor bodies 2, and the second through hole 72 corresponds to and is connected to the first through hole 71; a third through hole 73 is formed between the electrodes 4 of adjacent semi-finished units, and the third through hole 73 corresponds to and is connected to the first through hole 71; a fourth through hole 74 is formed between the electrodes 4 of the same semi-finished unit.

[0045] The spacing between the first through holes 71 is greater than the spacing between the third through holes 73. The first through holes 71, the second through holes 72, and the third through holes 73 are connected in the vertical direction.

[0046] That is, by etching, the present invention not only forms a second circuit pattern for controlling the resistance value on the resistor body 2, but also forms a second through hole 72 penetrating its thickness on the alloy sheet 8 to divide the alloy sheet 8 into multiple resistor bodies 2; simultaneously, a third through hole 73 penetrating its thickness is formed on the substrate 9 to divide the substrate 9 into electrodes 4 on multiple semi-finished units; and simultaneously, a fourth through hole 74 penetrating its thickness is formed on the substrate 9 to separate the electrodes 4 on a single semi-finished unit. Combined with the first through hole 71 hollowed out in the aforementioned insulating layer 3, the first through hole 71, the second through hole 72, and the third through hole 73 are vertically connected, eliminating the need for secondary pressing, simplifying the process, and improving production efficiency.

[0047] Preferably, the post-processing includes the following steps:

[0048] The solder resist material is printed for the first time on the semi-finished board after the film is removed, so as to form the first solder resist layer 51 on the semi-finished board;

[0049] Copper plating is performed to form a conductive layer 6, which is used to connect the electrode 4 and the resistor body 2.

[0050] The resistor body 2 is repaired and a second solder resist material is printed to form a second solder resist layer 52.

[0051] One end of the conductive layer 6 is in contact with the electrode 4, and the other end is in contact with the end of the first solder resist layer 51. The conductive layer 6 extends upward from the top surface of the electrode 4 to the sidewalls of the first through hole 71 and the second through hole 72, and covers the top surface of the end of the resistor body 2.

[0052] In some embodiments of the present invention, the preparation method specifically includes the following steps:

[0053] Step S1: Hollow out the insulating layer 3

[0054] The insulating layer 3 is cut out to correspond to the gaps between multiple adjacent resistors 1, so that the insulating layer 3 has a first through hole 71 that penetrates its thickness, and the first through hole 71 corresponds to the gap between the electrodes 4 of the adjacent resistors 1.

[0055] The insulating layer 3 is made of epoxy resin film. The cutouts are created using laser engraving or die-cutting. Specifically, the insulating layer 3 is laser-cut or die-cut to create a through-hole at the corresponding electrode 4 according to the pattern. The laser engraving parameters are: power 4-6W, cutting speed 90-110mm / s.

[0056] Step S2: Perform surface pretreatment on alloy sheet 8 and substrate 9 copper plate to remove oxides and oil stains, which is beneficial for the subsequent dry film to fully adhere to the alloy.

[0057] The pretreatment is as follows: the alloy sheet 8 is pretreated with a micro-etching solution to remove surface oil and oxides. The micro-etching speed is 1-3 m / min and the micro-etching temperature is 45±5℃.

[0058] The micro-etching solution is a mixture of sulfuric acid and hydrogen peroxide, with the concentration of sulfuric acid in the mixture being 5% ± 1% and the concentration of hydrogen peroxide being 5% ± 1%.

[0059] Step S3: Prepare the pressed sheet

[0060] The alloy sheet 8, the insulating layer 3 and the substrate 9 are stacked in sequence and pressed together using a press to obtain a pressed plate.

[0061] The pressing parameters are: pressure 75-85KG, temperature 150-170℃, and time 100-140S.

[0062] Step S4: Laying the dry film

[0063] Use a laminating machine to fully press the top and bottom surfaces of the laminating sheet against the dry film.

[0064] Pressing time: 55-65s, pressing pressure: 40-50KG, pressing temperature: 130-150℃.

[0065] Step S5, Exposure and Development

[0066] The top and bottom surfaces of the laminated plate with the dry film are exposed and then developed. A circuit pattern of a certain shape will be obtained on the dry film on both the top and bottom surfaces of the laminated plate.

[0067] The circuit pattern in this step includes a first circuit pattern corresponding to the control resistance value, and a circuit pattern used to separate the alloy sheet 8 and the substrate 9 in subsequent etching.

[0068] Step S6, Etching

[0069] The developed laminated sheet is chemically etched to divide the alloy sheet 8 into multiple resistor bodies 2 and the substrate 9 into multiple electrodes 4. The laminated sheet forms multiple semi-finished units, and there are connecting parts between adjacent semi-finished units.

[0070] Specifically, through etching, not only is a second circuit pattern for controlling resistance formed on the resistor body 2, but a second through hole 72 penetrating its thickness is also formed on the alloy sheet 8 to divide the alloy sheet 8 into multiple resistor bodies 2; simultaneously, a third through hole 73 penetrating its thickness is formed on the substrate 9 to divide the substrate 9 into electrodes 4 on multiple semi-finished units; and simultaneously, a fourth through hole 74 penetrating its thickness is formed on the substrate 9 to separate the electrodes 4 on a single semi-finished unit. The first through hole 71, which is hollowed out in conjunction with the aforementioned insulating layer 3, allows the first through hole 71, the second through hole 72, and the third through hole 73 to be vertically connected without the need for secondary pressing, simplifying the process and improving production efficiency.

[0071] Etching is performed using an acidic etching solution at a rate of 1–3 m / min and a temperature of 45 ± 5 °C. The acidic etching solution is a mixture of copper chloride and hydrochloric acid, with a copper chloride concentration of 90–95% and a hydrochloric acid concentration of 5–10%.

[0072] Step S7, Demolding

[0073] The etched laminated sheet is then stripped of its film to remove the dry film from its surface.

[0074] Film removal speed: 1~2m / min; Film removal temperature: 45±5℃.

[0075] Step S8: First printing of solder resist ink

[0076] The solder resist ink is printed for the first time on the semi-finished board after the film is removed, and then exposed, developed and removed to form the first solder resist layer 51 on the upper surface of the resistor body 2 and in the fourth through hole 74.

[0077] Step S9, Copper Plating

[0078] Copper plating is applied to form a conductive layer 6, which is used to connect the electrode 4 and the resistor body 2. One end of the conductive layer 6 contacts the electrode 4, and the other end contacts the end of the first solder mask 51. The conductive layer 6 extends upward from the top surface of the electrode 4 to the sidewalls of the first through hole 71 and the second through hole 72, and covers the top surface of the end of the resistor body 2.

[0079] Step S10, Resistance Repair

[0080] Adjust the resistance to bring the resistance of resistor 1 to the set range.

[0081] Step S11: Second printing of solder resist ink

[0082] After the resistance is repaired, the board is printed with solder resist ink a second time to cover the repaired cut edges.

[0083] Step S12, Granulation

[0084] The connection between adjacent semi-finished units is cut off, so that multiple resistors 1 are no longer connected to each other, forming a single resistor 1.

[0085] Step S13: Nickel-tin plating on electrode 4

[0086] Nickel-tin is barrel-plated onto the electrode 4 of a single resistor 1 to form the final resistor 1 product.

[0087] The method described above in this invention employs a process of first creating openings in the insulating layer 3 and then laminating it, followed by etching to create through holes in the alloy surface, thus simplifying the process and saving costs. The process eliminates the need for stamping, saving the cost of manufacturing stamping dies, and utilizes only one lamination step, simplifying the process and improving production efficiency.

[0088] Example 1

[0089] like Figure 3 As shown, the resistor 1 in this embodiment includes an electrode 4, an insulating layer 3, a resistor body 2, a first solder resist layer 51, a second solder resist layer 52, and a conductive layer 6, which are arranged sequentially. The conductive layer 6 connects the electrode 4 and the resistor body 2. One end of the conductive layer 6 contacts the electrode 4, and the other end contacts the end of the first solder resist layer 51. The conductive layer 6 extends upward from the top surface of the electrode 4 to the sidewalls of the first through hole 71 and the second through hole 72, and covers the top surface of the end of the resistor body 2.

[0090] The resistor body 2 is formed of alloy sheet 8, and the electrode 4 is formed of substrate 9. The first solder resist layer 51 is located on the long surface of the resistor body 2 and between the conductive layers 6, as well as on the lower surface of the insulating layer 3 and between adjacent electrodes 4. The second solder resist layer 52 is located above the first solder resist layer 51 and between the conductive layers 6.

[0091] Example 2

[0092] like Figure 2 As shown, based on the structure of resistor 1 in Embodiment 1, the method for simultaneously fabricating multiple resistors 1 in this embodiment specifically includes the following steps:

[0093] Step S1: Hollow out the insulating layer 3

[0094] The insulating layer 3 is cut out to correspond to the gaps between multiple adjacent resistors 1, so that the insulating layer 3 has a first through hole 71 that penetrates its thickness, and the first through hole 71 corresponds to the gap between the electrodes 4 of the adjacent resistors 1.

[0095] The insulating layer 3 is made of epoxy resin film. The cutout is done by laser engraving. That is, the insulating layer 3 is laser-cut or die-cut to make the corresponding electrode 4 through the pattern. The laser engraving parameters are 5W power and 100mm / s cutting speed.

[0096] Step S2: Perform surface pretreatment on alloy sheet 8 and substrate 9 copper plate to remove oxides and oil stains, which is beneficial for the subsequent dry film to fully adhere to the alloy.

[0097] The pretreatment process is as follows: the alloy sheet 8 is pretreated with a micro-etching solution to remove surface oil and oxides. The micro-etching speed is 2 m / min and the micro-etching temperature is 45℃.

[0098] The micro-etching solution is a mixture of sulfuric acid and hydrogen peroxide, with the sulfuric acid concentration being 5% and the hydrogen peroxide concentration being 5%.

[0099] Step S3: Prepare the pressed sheet

[0100] The alloy sheet 8, the insulating layer 3 and the substrate 9 are stacked in sequence and pressed together using a press to obtain a pressed plate.

[0101] The pressing parameters are: pressure 80KG, temperature 160℃, and time 120S.

[0102] Step S4: Laying the dry film

[0103] Use a laminating machine to fully press the top and bottom surfaces of the laminating sheet against the dry film.

[0104] Pressing time: 60s, pressing pressure: 45KG, pressing temperature: 140℃.

[0105] Step S5, Exposure and Development

[0106] The top and bottom surfaces of the laminated plate with the dry film are exposed and then developed. A circuit pattern of a certain shape will be obtained on the dry film on both the top and bottom surfaces of the laminated plate.

[0107] The circuit pattern in this step includes a first circuit pattern corresponding to the control resistance value, and a circuit pattern used to separate the alloy sheet 8 and the substrate 9 in subsequent etching.

[0108] Step S6, Etching

[0109] The developed laminated sheet is chemically etched to divide the alloy sheet 8 into multiple resistor bodies 2 and the substrate 9 into multiple electrodes 4. The laminated sheet forms multiple semi-finished units, and there are connecting parts between adjacent semi-finished units.

[0110] Specifically, through etching, not only is a second circuit pattern for controlling resistance formed on the resistor body 2, but a second through hole 72 penetrating its thickness is also formed on the alloy sheet 8 to divide the alloy sheet 8 into multiple resistor bodies 2; simultaneously, a third through hole 73 penetrating its thickness is formed on the substrate 9 to divide the substrate 9 into electrodes 4 on multiple semi-finished units; and simultaneously, a fourth through hole 74 penetrating its thickness is formed on the substrate 9 to separate the electrodes 4 on a single semi-finished unit. The first through hole 71, which is hollowed out in conjunction with the aforementioned insulating layer 3, allows the first through hole 71, the second through hole 72, and the third through hole 73 to be vertically connected without the need for secondary pressing, simplifying the process and improving production efficiency.

[0111] Etching was performed using an acidic etching solution at a rate of 2 m / min and a temperature of 45°C. The acidic etching solution was a mixture of copper chloride and hydrochloric acid, with a copper chloride concentration of 93% and a hydrochloric acid concentration of 8%.

[0112] Step S7, Demolding

[0113] The etched laminated sheet is then stripped of its film to remove the dry film from its surface.

[0114] Film removal speed: 1.5m / min; Film removal temperature: 45℃.

[0115] Step S8: First printing of solder resist ink

[0116] The solder resist ink is printed for the first time on the semi-finished board after the film is removed, and then exposed, developed and removed to form the first solder resist layer 51 on the upper surface of the resistor body 2 and in the fourth through hole 74.

[0117] Step S9, Copper Plating

[0118] Copper plating is applied to form a conductive layer 6, which is used to connect the electrode 4 and the resistor body 2. One end of the conductive layer 6 contacts the electrode 4, and the other end contacts the end of the first solder mask 51. The conductive layer 6 extends upward from the top surface of the electrode 4 to the sidewalls of the first through hole 71 and the second through hole 72, and covers the top surface of the end of the resistor body 2.

[0119] Step S10, Resistance Repair

[0120] Adjust the resistance to bring the resistance of resistor 1 to the set range.

[0121] Step S11: Second printing of solder resist ink

[0122] After the resistance is repaired, the board is printed with solder resist ink a second time to cover the repaired cut edges.

[0123] Step S12, Granulation

[0124] The connection between adjacent semi-finished units is cut off, so that multiple resistors 1 are no longer connected to each other, forming a single resistor 1.

[0125] Step S13: Nickel-tin plating on electrode 4

[0126] Nickel-tin is barrel-plated onto the electrode 4 of a single resistor 1 to form the final resistor 1 product.

[0127] Example 3

[0128] Based on the structure of resistor 1 in Example 1, the method for simultaneously fabricating multiple resistors 1 in this example specifically includes the following steps:

[0129] Step S1: Hollow out the insulating layer 3

[0130] The insulating layer 3 is cut out to correspond to the gaps between multiple adjacent resistors 1, so that the insulating layer 3 has a first through hole 71 that penetrates its thickness, and the first through hole 71 corresponds to the gap between the electrodes 4 of the adjacent resistors 1.

[0131] The insulating layer 3 is made of epoxy resin film. The cutouts are created by laser engraving or die-cutting. Specifically, the insulating layer 3 is laser-cut or die-cut to create a through-hole corresponding to the electrode 4 according to the pattern.

[0132] Step S2: Perform surface pretreatment on alloy sheet 8 and substrate 9 copper plate to remove oxides and oil stains, which is beneficial for the subsequent dry film to fully adhere to the alloy.

[0133] The pretreatment process is as follows: the alloy sheet 8 is pretreated with a micro-etching solution to remove surface oil and oxides. The micro-etching speed is 1 m / min and the micro-etching temperature is 40℃.

[0134] The micro-etching solution is a mixture of sulfuric acid and hydrogen peroxide, with a sulfuric acid concentration of 4% and a hydrogen peroxide concentration of 4%.

[0135] Step S3: Prepare the pressed sheet

[0136] The alloy sheet 8, the insulating layer 3 and the substrate 9 are stacked in sequence and pressed together using a press to obtain a pressed plate.

[0137] The pressing parameters are: pressure 85KG, temperature 170℃, and time 100S.

[0138] Step S4: Laying the dry film

[0139] Use a laminating machine to fully press the top and bottom surfaces of the laminating sheet against the dry film.

[0140] Pressing time: 55s, pressing pressure: 50KG, pressing temperature: 150℃.

[0141] Step S5, Exposure and Development

[0142] The top and bottom surfaces of the laminated plate with the dry film are exposed and then developed. A circuit pattern of a certain shape will be obtained on the dry film on both the top and bottom surfaces of the laminated plate.

[0143] The circuit pattern in this step includes a first circuit pattern corresponding to the control resistance value, and a circuit pattern used to separate the alloy sheet 8 and the substrate 9 in subsequent etching.

[0144] Step S6, Etching

[0145] The developed laminated sheet is chemically etched to divide the alloy sheet 8 into multiple resistor bodies 2 and the substrate 9 into multiple electrodes 4. The laminated sheet forms multiple semi-finished units, and there are connecting parts between adjacent semi-finished units.

[0146] Specifically, through etching, not only is a second circuit pattern for controlling resistance formed on the resistor body 2, but a second through hole 72 penetrating its thickness is also formed on the alloy sheet 8 to divide the alloy sheet 8 into multiple resistor bodies 2; simultaneously, a third through hole 73 penetrating its thickness is formed on the substrate 9 to divide the substrate 9 into electrodes 4 on multiple semi-finished units; and simultaneously, a fourth through hole 74 penetrating its thickness is formed on the substrate 9 to separate the electrodes 4 on a single semi-finished unit. The first through hole 71, which is hollowed out in conjunction with the aforementioned insulating layer 3, allows the first through hole 71, the second through hole 72, and the third through hole 73 to be vertically connected without the need for secondary pressing, simplifying the process and improving production efficiency.

[0147] Etching was performed using an acidic etching solution at a rate of 1 m / min and a temperature of 40°C. The acidic etching solution was a mixture of copper chloride and hydrochloric acid, with a copper chloride concentration of 90% and a hydrochloric acid concentration of 5%.

[0148] Step S7, Demolding

[0149] The etched laminated sheet is then stripped of its film to remove the dry film from its surface.

[0150] Film removal speed: 1m / min; Film removal temperature: 40℃.

[0151] Step S8: First printing of solder resist ink

[0152] The solder resist ink is printed for the first time on the semi-finished board after the film is removed, and then exposed, developed and removed to form the first solder resist layer 51 on the upper surface of the resistor body 2 and in the fourth through hole 74.

[0153] Step S9, Copper Plating

[0154] Copper plating is applied to form a conductive layer 6, which is used to connect the electrode 4 and the resistor body 2. One end of the conductive layer 6 contacts the electrode 4, and the other end contacts the end of the first solder mask 51. The conductive layer 6 extends upward from the top surface of the electrode 4 to the sidewalls of the first through hole 71 and the second through hole 72, and covers the top surface of the end of the resistor body 2.

[0155] Step S10, Resistance Repair

[0156] Adjust the resistance to bring the resistance of resistor 1 to the set range.

[0157] Step S11: Second printing of solder resist ink

[0158] After the resistance is repaired, the board is printed with solder resist ink a second time to cover the repaired cut edges.

[0159] Step S12, Granulation

[0160] The connection between adjacent semi-finished units is cut off, so that multiple resistors 1 are no longer connected to each other, forming a single resistor 1.

[0161] Step S13: Nickel-tin plating on electrode 4

[0162] Nickel-tin is barrel-plated onto the electrode 4 of a single resistor 1 to form the final resistor 1 product.

[0163] Example 4

[0164] Based on the structure of resistor 1 in Example 1, the method for simultaneously fabricating multiple resistors 1 in this example specifically includes the following steps:

[0165] Step S1: Hollow out the insulating layer 3

[0166] The insulating layer 3 is cut out to correspond to the gaps between multiple adjacent resistors 1, so that the insulating layer 3 has a first through hole 71 that penetrates its thickness, and the first through hole 71 corresponds to the gap between the electrodes 4 of the adjacent resistors 1.

[0167] The insulating layer 3 is made of epoxy resin film. The cutouts are created by laser engraving or die-cutting. Specifically, the insulating layer 3 is laser-cut or die-cut to create a through-hole corresponding to the electrode 4 according to the pattern.

[0168] Step S2: Perform surface pretreatment on alloy sheet 8 and substrate 9 copper plate to remove oxides and oil stains, which is beneficial for the subsequent dry film to fully adhere to the alloy.

[0169] The pretreatment process is as follows: the alloy sheet 8 is pretreated with a micro-etching solution to remove surface oil and oxides. The micro-etching speed is 3 m / min and the micro-etching temperature is 50℃.

[0170] The micro-etching solution is a mixture of sulfuric acid and hydrogen peroxide, with a sulfuric acid concentration of 6% and a hydrogen peroxide concentration of 6%.

[0171] Step S3: Prepare the pressed sheet

[0172] The alloy sheet 8, the insulating layer 3 and the substrate 9 are stacked in sequence and pressed together using a press to obtain a pressed plate.

[0173] The pressing parameters are: pressure 75KG, temperature 150℃, and time 140S.

[0174] Step S4: Laying the dry film

[0175] Use a laminating machine to fully press the top and bottom surfaces of the laminating sheet against the dry film.

[0176] Pressing time: 65s, pressing pressure: 40KG, pressing temperature: 130℃.

[0177] Step S5, Exposure and Development

[0178] The top and bottom surfaces of the laminated plate with the dry film are exposed and then developed. A circuit pattern of a certain shape will be obtained on the dry film on both the top and bottom surfaces of the laminated plate.

[0179] The circuit pattern in this step includes a first circuit pattern corresponding to the control resistance value, and a circuit pattern used to separate the alloy sheet 8 and the substrate 9 in subsequent etching.

[0180] Step S6, Etching

[0181] The developed laminated sheet is chemically etched to divide the alloy sheet 8 into multiple resistor bodies 2 and the substrate 9 into multiple electrodes 4. The laminated sheet forms multiple semi-finished units, and there are connecting parts between adjacent semi-finished units.

[0182] Specifically, through etching, not only is a second circuit pattern for controlling resistance formed on the resistor body 2, but a second through hole 72 penetrating its thickness is also formed on the alloy sheet 8 to divide the alloy sheet 8 into multiple resistor bodies 2; simultaneously, a third through hole 73 penetrating its thickness is formed on the substrate 9 to divide the substrate 9 into electrodes 4 on multiple semi-finished units; and simultaneously, a fourth through hole 74 penetrating its thickness is formed on the substrate 9 to separate the electrodes 4 on a single semi-finished unit. The first through hole 71, which is hollowed out in conjunction with the aforementioned insulating layer 3, allows the first through hole 71, the second through hole 72, and the third through hole 73 to be vertically connected without the need for secondary pressing, simplifying the process and improving production efficiency.

[0183] Etching was performed using an acidic etching solution at a rate of 3 m / min and a temperature of 40°C. The acidic etching solution was a mixture of copper chloride and hydrochloric acid, with a copper chloride concentration of 95% and a hydrochloric acid concentration of 10%.

[0184] Step S7, Demolding

[0185] The etched laminated sheet is then stripped of its film to remove the dry film from its surface.

[0186] Film removal speed: 2m / min; Film removal temperature: 50℃.

[0187] Step S8: First printing of solder resist ink

[0188] The solder resist ink is printed for the first time on the semi-finished board after the film is removed, and then exposed, developed and removed to form the first solder resist layer 51 on the upper surface of the resistor body 2 and in the fourth through hole 74.

[0189] Step S9, Copper Plating

[0190] Copper plating is applied to form a conductive layer 6, which is used to connect the electrode 4 and the resistor body 2. One end of the conductive layer 6 contacts the electrode 4, and the other end contacts the end of the first solder mask 51. The conductive layer 6 extends upward from the top surface of the electrode 4 to the sidewalls of the first through hole 71 and the second through hole 72, and covers the top surface of the end of the resistor body 2.

[0191] Step S10, Resistance Repair

[0192] Adjust the resistance to bring the resistance of resistor 1 to the set range.

[0193] Step S11: Second printing of solder resist ink

[0194] After the resistance is repaired, the board is printed with solder resist ink a second time to cover the repaired cut edges.

[0195] Step S12, Granulation

[0196] The connection between adjacent semi-finished units is cut off, so that multiple resistors 1 are no longer connected to each other, forming a single resistor 1.

[0197] Step S13: Nickel-tin plating on electrode 4

[0198] Nickel-tin is barrel-plated onto the electrode 4 of a single resistor 1 to form the final resistor 1 product.

[0199] The preparation method of this invention first involves creating holes in the insulating layer 3 using laser drilling or die cutting. Then, the alloy insulating layer 3 and the copper layer are bonded together by lamination. After etching, the alloy and copper layers are used to create the product pattern and electrode 4. Subsequently, resist repair and solder masking are performed, followed by granular roll plating to produce individual products. Pre-creating holes in the insulating layer 3 before lamination saves on the need for stamping dies. This method uses only one lamination step, eliminating the need for a second lamination step, simplifying the process, improving production efficiency, and reducing production costs.

[0200] The above embodiments prepared by the method of the present invention are only for illustrating the technical concept and features of the present invention, and are intended to enable those skilled in the art to understand the content of the present invention and implement it accordingly. They should not be construed as limiting the scope of protection of the present invention. All equivalent changes or modifications made in accordance with the spirit and essence of the present invention should be covered within the scope of protection of the present invention.

[0201] The endpoints and any values ​​of the ranges disclosed herein are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges or values. For numerical ranges, the endpoint values ​​of the various ranges, the endpoint values ​​of the various ranges and individual point values, and individual point values ​​can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed herein.

Claims

1. A method for simultaneously fabricating multiple resistors, characterized in that, Includes the following steps: The insulating layer is cut out so that there is a first through hole that penetrates its thickness, and the first through hole corresponds to the electrode between adjacent resistors; Alloy sheets, insulating layers and substrates are sequentially stacked and pressed together to obtain a pressed sheet; The two opposing surfaces of the pressed sheet are bonded to the dry film; The dry film is exposed and developed to obtain a predetermined first circuit pattern on the dry film; Etching is performed to divide the alloy sheet into multiple resistor bodies, the substrate into multiple electrodes, and the press-fit plate forms multiple semi-finished units, with connecting portions between adjacent semi-finished units; After removing the dry film from the pressed plate, and following post-processing and granulation, multiple resistors are obtained simultaneously.

2. The preparation method according to claim 1, characterized in that, The cutout is achieved through laser engraving or die-cutting.

3. The preparation method according to claim 1, characterized in that, The pressing parameters are: pressure 75-85KG, temperature 150-170℃, and time 100-140S.

4. The preparation method according to claim 1, characterized in that, The insulating layer is an epoxy resin film.

5. The preparation method according to claim 1, characterized in that, During the etching process, a second circuit pattern corresponding to the first circuit pattern is formed on the resistor body.

6. The preparation method according to claim 1, characterized in that, During the etching process, a second through hole is formed between adjacent resistor bodies, and the second through hole corresponds to and is connected to the first through hole.

7. The preparation method according to claim 6, characterized in that, During the etching process, a third through hole is formed between the electrodes of adjacent semi-finished units. The third through hole corresponds to and is connected to the first through hole.

8. The preparation method according to claim 7, characterized in that, The spacing between the first through holes is greater than the spacing between the third through holes.

9. The preparation method according to claim 7, characterized in that, The first through hole, the second through hole, and the third through hole are connected in the vertical direction.

10. The preparation method according to claim 1, characterized in that, During the etching process, a fourth through hole is formed between the electrodes of the same semi-finished unit.

11. The preparation method according to any one of claims 1-10, characterized in that, The post-processing includes the following steps: The solder resist material is printed for the first time on the semi-finished sheet after the film is removed, so as to form a first solder resist layer on the semi-finished sheet; Copper plating is performed to form a conductive layer, which is used to connect the electrode and the resistor body.

12. The preparation method according to claim 11, characterized in that, One end of the conductive layer is in contact with the electrode, and the other end is in contact with the end of the first solder resist layer. The conductive layer extends upward from the top surface of the electrode to the sidewalls of the first through hole and the second through hole, and covers the top surface of the end of the resistor body.

13. The preparation method according to claim 11, characterized in that, The post-processing includes the following steps: repairing the resistor body and printing solder resist material a second time to form a second solder resist layer.

14. A resistor prepared by the preparation method according to any one of claims 1-13.

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