Power supply with high output stability

Abstract

The invention discloses a power supply with high output stability. The power supply comprises a voltage division circuit, a full-bridge rectifier, a resonant capacitor, a first transformer, a second transformer, a first switcher, a second switcher, a third switcher, an output stage circuit and a detection and control circuit, the first switcher selectively couples the second transformer to the first transformer. The second switcher can selectively couple the output stage circuit to the first transformer. The third switcher can selectively couple the output stage circuit to the second transformer. The detection and control circuit can properly control the first switcher, the second switcher and the third switcher according to a voltage division potential from the voltage division circuit and a capacitance potential from the resonant capacitor.

Description

Technical Field

[0001] This invention relates to a power supply, and more particularly to a power supply with high output stability. Background Technology

[0002] Power supplies are indispensable components in the notebook computer industry. However, insufficient output stability of the power supply can easily lead to a decline in the overall operating performance of the notebook computer. Therefore, it is necessary to propose a completely new solution to overcome the difficulties faced by previous technologies. Summary of the Invention

[0003] In a preferred embodiment, the present invention provides a power supply with high output stability, comprising: a voltage divider circuit for generating a voltage divider potential based on an input potential; a full-bridge rectifier for generating a first rectified potential and a second rectified potential based on the input potential and a drive potential group; a first transformer including a first main coil and a first secondary coil, wherein the first transformer has a built-in leakage inductor and a first magnetizing inductor, and the first main coil receives the first rectified potential via the leakage inductor; a resonant capacitor for providing a capacitor potential; and a second transformer including a second main coil and a second secondary coil, wherein the second transformer has a built-in second magnetizing inductor. The device includes a second main coil receiving the second rectified potential via the resonant capacitor; a first switch selectively coupling the second magnetizing inductor to the first magnetizing inductor according to a first control potential; an output stage circuit generating an output potential; a second switch selectively coupling the output stage circuit to the first secondary coil according to a second control potential; a third switch selectively coupling the output stage circuit to the second secondary coil according to a third control potential; and a detection and control circuit generating the drive potential group, the first control potential, the second control potential, and the third control potential based on the voltage divider potential and the capacitor potential.

[0004] In some embodiments, the voltage divider circuit includes: a first resistor having a first terminal and a second terminal, wherein the first terminal of the first resistor is coupled to an input node to receive the input potential, and the second terminal of the first resistor is coupled to a first node to output the voltage divider potential; and a second resistor having a first terminal and a second terminal, wherein the first terminal of the second resistor is coupled to the first node, and the second terminal of the second resistor is coupled to a ground potential.

[0005] In some embodiments, the drive potential group includes a first drive potential, a second drive potential, a third drive potential, and a fourth drive potential, and the full-bridge rectifier includes: a first transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the first transistor is used to receive the first drive potential, the first terminal of the first transistor is coupled to a second node to output the first rectified potential, and the second terminal of the first transistor is coupled to the input node to receive the input potential; a second transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the second transistor is used to receive the second drive potential, and the second terminal of the second transistor is coupled to the input node to receive the input potential; and a second transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the second transistor is used to receive the second drive potential, and the second terminal of the second transistor is coupled to the input node to receive the input potential. The first terminal is coupled to a third node to output the second rectified potential, and the second terminal of the second transistor is coupled to the input node; a third transistor has a control terminal, a first terminal, and a second terminal, wherein the control terminal of the third transistor is used to receive the third drive potential, the first terminal of the third transistor is coupled to the ground potential, and the second terminal of the third transistor is coupled to the second node; and a fourth transistor has a control terminal, a first terminal, and a second terminal, wherein the control terminal of the fourth transistor is used to receive the fourth drive potential, the first terminal of the fourth transistor is coupled to the ground potential, and the second terminal of the fourth transistor is coupled to the third node.

[0006] In some embodiments, the leakage inductor has a first terminal and a second terminal, the first terminal of the leakage inductor being coupled to the second node to receive the first rectified potential, the second terminal of the leakage inductor being coupled to a fourth node, the first main coil having a first terminal and a second terminal, the first terminal of the first main coil being coupled to the fourth node, the second terminal of the first main coil being coupled to a fifth node, the first magnetizing inductor having a first terminal and a second terminal, the first terminal of the first magnetizing inductor being coupled to the fourth node, the second terminal of the first magnetizing inductor being coupled to the fifth node, the first secondary coil having a first terminal and a second terminal, the first terminal of the first secondary coil being coupled to a sixth node, and the second terminal of the first secondary coil being coupled to a seventh node.

[0007] In some embodiments, the second main coil has a first end and a second end, the first end of the second main coil is coupled to an eighth node, and the second end of the second main coil is coupled to a ninth node. The resonant capacitor has a first end and a second end, the first end of the resonant capacitor is coupled to the third node to receive the second rectified potential, and the second end of the resonant capacitor is coupled to the ninth node to output the capacitor potential. The second magnetizing inductor has a first end and a second end, the first end of the second magnetizing inductor is coupled to the eighth node, and the second end of the second magnetizing inductor is coupled to the ninth node. The second secondary coil has a first end and a second end, the first end of the second secondary coil is coupled to a tenth node, and the second end of the second secondary coil is coupled to an eleventh node.

[0008] In some embodiments, the first switch includes: a fifth transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the fifth transistor is used to receive the first control potential, the first terminal of the fifth transistor is coupled to the eighth node, and the second terminal of the fifth transistor is coupled to the fifth node; wherein the second switch includes: a sixth transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the sixth transistor is used to receive the second control potential, the first terminal of the sixth transistor is coupled to a twelfth node, and the second terminal of the sixth transistor is coupled to the sixth node; wherein the third switch includes: a seventh transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the seventh transistor is used to receive the third control potential, the first terminal of the seventh transistor is coupled to a thirteenth node, and the second terminal of the seventh transistor is coupled to the tenth node.

[0009] In some embodiments, the output stage circuit includes: a first diode having an anode and a cathode, wherein the anode of the first diode is coupled to the twelfth node, and the cathode of the first diode is coupled to an output node to output the output potential; a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to the seventh node, and the cathode of the second diode is coupled to the output node; a third diode having an anode and a cathode, wherein the anode of the third diode is coupled to a common node, and the cathode of the third diode is coupled to the twelfth node; and a fourth diode having an anode and a cathode, wherein the anode of the fourth diode is coupled to the common node, and the cathode of the fourth diode is coupled to the seventh node; and a fifth diode having an anode and a cathode, wherein... The anode of the fifth diode is coupled to the thirteenth node, and the cathode of the fifth diode is coupled to the output node; a sixth diode has an anode and a cathode, wherein the anode of the sixth diode is coupled to the eleventh node, and the cathode of the sixth diode is coupled to the output node; a seventh diode has an anode and a cathode, wherein the anode of the seventh diode is coupled to the common node, and the cathode of the seventh diode is coupled to the thirteenth node; an eighth diode has an anode and a cathode, wherein the anode of the eighth diode is coupled to the common node, and the cathode of the eighth diode is coupled to the eleventh node; and an output capacitor has a first terminal and a second terminal, wherein the first terminal of the output capacitor is coupled to the output node, and the second terminal of the output capacitor is coupled to the common node.

[0010] In some embodiments, the detection and control circuit includes: a first error amplifier having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the first error amplifier is used to receive the voltage divider potential, the second input terminal of the first error amplifier is used to receive a first reference potential, and the output terminal of the first error amplifier is used to output the first control potential; and a timer, wherein in response to the first control potential having a high logic level, the timer starts to calculate a predetermined time, and when the predetermined time has elapsed, the timer outputs an indication potential.

[0011] In some embodiments, the detection and control circuit further includes: an averaging circuit for calculating an average value of the capacitor potential to generate an average potential; a second error amplifier having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the second error amplifier is used to receive the average potential, the second input terminal of the second error amplifier is used to receive a second reference potential, and the output terminal of the second error amplifier is used to output a matching potential; and an AND gate having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the AND gate is used to receive the matching potential, the second input terminal of the AND gate is used to receive the indication potential, and the output terminal of the AND gate is used to output a logic potential.

[0012] In some embodiments, the detection and control circuit further includes: a microcontroller that generates the first reference potential, the second reference potential, and the drive potential group, wherein the microcontroller further generates the second control potential and the third control potential based on the logic potential. Attached Figure Description

[0013] Figure 1 A schematic diagram of a power supply according to an embodiment of the present invention is shown.

[0014] Figure 2 This diagram shows a circuit diagram of a power supply according to an embodiment of the present invention.

[0015] Figure 3 This displays a potential waveform diagram of a power supply according to an embodiment of the present invention.

[0016] The reference numerals in the attached figures are explained as follows:

[0017] 100, 200: Power supply

[0018] 110, 210: Voltage divider circuit

[0019] 120, 220: Full-bridge rectifier

[0020] 130, 230: First Transformer

[0021] 131, 231: First main coil

[0022] 132, 232: First secondary coil

[0023] 140, 240: Second transformer

[0024] 141, 241: Second main coil

[0025] 142, 242: Second auxiliary coil

[0026] 150, 250: First switch

[0027] 160, 260: Second switch

[0028] 170, 270: Third switch

[0029] 180, 280: Output stage circuit

[0030] 190, 290: Detection and control circuits

[0031] 291: First Error Amplifier

[0032] 292: Timer

[0033] 293: Average Circuit

[0034] 294: Second Error Amplifier

[0035] 295: With the door

[0036] 296: Microcontroller

[0037] CO: Output capacitor

[0038] CR: Resonant capacitor

[0039] D1: First diode

[0040] D2: Second diode

[0041] D3: Third diode

[0042] D4: Fourth diode

[0043] D5: Fifth diode

[0044] D6: Sixth diode

[0045] D7: Seventh diode

[0046] D8: Eighth diode

[0047] LM1: First magnetizing inductor

[0048] LM2: Second magnetizing inductor

[0049] LR: Leakage Inductor

[0050] M1: First transistor

[0051] M2: Second transistor

[0052] M3: Third transistor

[0053] M4: Fourth transistor

[0054] M5: Fifth Transistor

[0055] M6: Sixth Transistor

[0056] M7: Seventh Transistor

[0057] N1: First node

[0058] N2: Second node

[0059] N3: Third Node

[0060] N4: Fourth Node

[0061] N5: Fifth Node

[0062] N6: Sixth Node

[0063] N7: Seventh Node

[0064] N8: Eighth Node

[0065] N9: Ninth Node

[0066] N10: Tenth Node

[0067] N11: Eleventh Node

[0068] N12: The twelfth node

[0069] N13: The Thirteenth Node

[0070] NCM: Common Node

[0071] NIN: Input node

[0072] NOUT: Output node

[0073] R1: First resistor

[0074] R2: Second resistor

[0075] T1: First Time Point

[0076] T2: Second Time Point

[0077] T3: Third Time Point

[0078] TD: Scheduled Time

[0079] VA: Mean Potential

[0080] VC1: First control potential

[0081] VC2: Second control potential

[0082] VC3: Third control potential

[0083] VD: Voltage divider potential

[0084] VF1: First reference potential

[0085] VF2: Second reference potential

[0086] VG1: First driving potential

[0087] VG2: Second driving potential

[0088] VG3: Third driving potential

[0089] VG4: Fourth driving potential

[0090] VGM: Drive potential group

[0091] VH: Matching potential

[0092] VIN: Input potential

[0093] VL: Logic Level

[0094] VOUT: Output potential

[0095] VP: Capacitive potential

[0096] VR1: First rectifier voltage

[0097] VR2: Second rectifier potential

[0098] VSS: Grounding Potential

[0099] VT: Indicator potential Detailed Implementation

[0100] To make the objectives, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention are described below in conjunction with the accompanying drawings for detailed explanation.

[0101] Certain terms are used in the specification and claims to refer to specific elements. Those skilled in the art will understand that hardware manufacturers may use different names to refer to the same element. This specification and claims do not distinguish elements by differences in name, but rather by differences in function. The terms "comprising" and "including" used throughout the specification and claims are open-ended and should be interpreted as "including but not limited to". The term "generally" means that within an acceptable margin of error, those skilled in the art can solve the technical problem and achieve the basic technical effect within a certain margin of error. Furthermore, the term "coupled" in this specification includes any direct and indirect electrical connection means. Therefore, if a first device is described as coupled to a second device, it means that the first device can be directly electrically connected to the second device, or indirectly electrically connected to the second device via other devices or connection means.

[0102] Figure 1 This diagram shows a power supply 100 according to an embodiment of the present invention. For example, the power supply 100 can be applied to a desktop computer, a laptop computer, or an all-in-one computer. Figure 1 As shown, the power supply 100 includes: a voltage divider circuit 110, a full-bridge rectifier 120, a resonant capacitor CR, a first transformer 130, a second transformer 140, a first switch 150, a second switch 160, a third switch 170, an output stage circuit 180, and a detection and control circuit 190. It should be noted that, although not shown in... Figure 1 However, the power supply 100 may also include other components, such as a boost power factor corrector.

[0103] Voltage divider circuit 110 can generate a voltage divider potential VD based on an input potential VIN. For example, the input potential VIN can be a DC potential with a potential level between 360V and 440V, but is not limited to this. Full-bridge rectifier 120 can generate a first rectified potential VR1 and a second rectified potential VR2 based on the input potential VIN and a drive potential group VGM. First transformer 130 includes a first main coil 131 and a first secondary coil 132. First transformer 130 may further integrate a leakage inductor LR and a first magnetizing inductor LM1, wherein the leakage inductor LR, the first magnetizing inductor LM1, and the first main coil 131 can all be located on the same side of the first transformer 130, while the first secondary coil 132 can be located on the opposite side of the first transformer 130. The first main coil 131 can receive the first rectified potential VR1 through the leakage inductor LR, while the first secondary coil 132 can operate in response to the first rectified potential VR1. The second transformer 140 includes a second main coil 141 and a second secondary coil 142. The second transformer 140 may further incorporate a second magnetizing inductor LM2, wherein the second magnetizing inductor LM2 and the second main coil 141 are both located on the same side of the second transformer 140, while the second secondary coil 142 is located on the opposite side of the second transformer 140. The second main coil 141 can receive a second rectified potential VR2 via a resonant capacitor CR, while the second secondary coil 142 can operate in response to the second rectified potential VR2. The resonant capacitor CR is further coupled to the second magnetizing inductor LM2, wherein the resonant capacitor CR can also provide a capacitance potential VP.

[0104] The first switch 150 can selectively couple the second magnetizing inductor LM2 to the first magnetizing inductor LM1 based on a first control potential VC1. For example, if the first control potential VC1 is a high logic level (i.e., logic "1"), the first switch 150 can couple the second magnetizing inductor LM2 to the first magnetizing inductor LM1 (i.e., the first switch 150 can approximate a short-circuit path); conversely, if the first control potential VC1 is a low logic level (i.e., logic "0"), the first switch 150 will not couple the second magnetizing inductor LM2 to the first magnetizing inductor LM1 (i.e., the first switch 150 can approximate an open-circuit path). The output stage circuit 180 can generate an output potential VOUT. For example, the output potential VOUT can be another DC potential, with a potential level between 18V and 22V, but is not limited to this. The second switch 160 can selectively couple the output stage circuit 180 to the first secondary coil 132 based on a second control potential VC2. For example, if the second control potential VC2 is a high logic level, the second switch 160 can couple the output stage circuit 180 to the first secondary coil 132 (i.e., the second switch 160 can approximate a short-circuit path); conversely, if the second control potential VC2 is a low logic level, the second switch 160 will not couple the output stage circuit 180 to the first secondary coil 132 (i.e., the second switch 160 can approximate an open-circuit path). The third switch 170 can selectively couple the output stage circuit 180 to the second secondary coil 142 based on a third control potential VC3. For example, if the third control potential VC3 is at a high logic level, the third switch 170 can couple the output stage circuit 180 to the second secondary coil 142 (i.e., the third switch 170 can be approximated as a short-circuit path); conversely, if the third control potential VC3 is at a low logic level, the third switch 170 will not couple the output stage circuit 180 to the second secondary coil 142 (i.e., the third switch 170 can be approximated as an open-circuit path). The detection and control circuit 190 can generate the drive potential group VGM, the first control potential VC1, the second control potential VC2, and the third control potential VC3 based on the voltage divider potential VD and the capacitor potential VP. Under this design, since the detection and control circuit 190 can pre-store the input energy in the first magnetizing inductor LM1, the second magnetizing inductor LM2, and the resonant capacitor CR, the output stability of the power supply 100 can be significantly improved according to actual measurement results.

[0105] The following embodiments will describe the detailed structure and operation of the power supply 100. It must be understood that these figures and descriptions are merely examples and are not intended to limit the scope of the invention.

[0106] Figure 2 This diagram shows a circuit diagram of a power supply 200 according to an embodiment of the present invention. Figure 2 In the embodiments, in Figure 2 In this embodiment, the power supply 200 has an input node NIN and an output node NOUT, and includes: a voltage divider circuit 210, a full-bridge rectifier 220, a resonant capacitor CR, a first transformer 230, a second transformer 240, a first switch 250, a second switch 260, a third switch 270, an output stage circuit 280, and a detection and control circuit 290. The input node NIN of the power supply 200 can receive an input potential VIN from a boost converter or an input power source (not shown), while the output node NOUT of the power supply 200 can be used to output an output potential VOUT to an external device, such as a laptop computer (not shown).

[0107] The voltage divider circuit 210 includes a first resistor R1 and a second resistor R2. The first resistor R1 has a first terminal and a second terminal, wherein the first terminal of the first resistor R1 is coupled to an input node NIN, and the second terminal of the first resistor R1 is coupled to a first node N1 to output a voltage divider potential VD. The second resistor R2 has a first terminal and a second terminal, wherein the first terminal of the second resistor R2 is coupled to the first node N1, and the second terminal of the second resistor R2 is coupled to a ground potential VSS (e.g., 0V).

[0108] The full-bridge rectifier 220 includes a first transistor M1, a second transistor M2, a third transistor M3, and a fourth transistor M4. For example, the first transistor M1, the second transistor M2, the third transistor M3, and the fourth transistor M4 can each be an N-type metal-oxide-semiconductor field-effect transistor (NMOSFET). The first transistor M1 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain), wherein the control terminal of the first transistor M1 is used to receive a first drive potential VG1, the first terminal of the first transistor M1 is coupled to a second node N2 to output a first rectified potential VR1, and the second terminal of the first transistor M1 is coupled to the input node NIN. The second transistor M2 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain). The control terminal of the second transistor M2 is used to receive a second drive potential VG2. The first terminal of the second transistor M2 is coupled to a third node N3 to output a second rectified potential VR2, and the second terminal of the second transistor M2 is coupled to an input node NIN. The third transistor M3 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain). The control terminal of the third transistor M3 is used to receive a third drive potential VG3. The first terminal of the third transistor M3 is coupled to a ground potential VSS, and the second terminal of the third transistor M3 is coupled to a second node N2. The fourth transistor M4 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain). The control terminal of the fourth transistor M4 is used to receive a fourth drive potential VG4. The first terminal of the fourth transistor M4 is coupled to a ground potential VSS, and the second terminal of the fourth transistor M4 is coupled to a third node N3.

[0109] The first transformer 230 includes a first main coil 231 and a first secondary coil 232, wherein the first transformer 230 further integrates a leakage inductor LR and a first magnetizing inductor LM1. The leakage inductor LR and the first magnetizing inductor LM1 are inherent components generated during the manufacture of the first transformer 230 and are not external independent components. The leakage inductor LR, the first main coil 231, and the first magnetizing inductor LM1 can all be located on the same side of the first transformer 230 (e.g., the primary side), while the first secondary coil 232 can be located on the opposite side of the first transformer 230 (e.g., the secondary side, which can be isolated from the primary side). The leakage inductor LR has a first terminal and a second terminal, wherein the first terminal of the leakage inductor LR is coupled to a second node N2 to receive a first rectified potential VR1, and the second terminal of the leakage inductor LR is coupled to a fourth node N4. The first main coil 231 has a first end and a second end, wherein the first end of the first main coil 231 is coupled to a fourth node N4, and the second end of the first main coil 231 is coupled to a fifth node N5. The first magnetizing inductor LM1 has a first end and a second end, wherein the first end of the first magnetizing inductor LM1 is coupled to a fourth node N4, and the second end of the first magnetizing inductor LM1 is coupled to a fifth node N5. The first secondary coil 232 has a first end and a second end, wherein the first end of the first secondary coil 232 is coupled to a sixth node N6, and the second end of the first secondary coil 232 is coupled to a seventh node N7.

[0110] The second transformer 240 includes a second main coil 241 and a second secondary coil 242, wherein the second transformer 240 further integrates a second magnetizing inductor LM2. The second magnetizing inductor LM2 may be an inherent component generated during the manufacture of the second transformer 240, and is not an external independent component. The second main coil 241 and the second magnetizing inductor LM2 may both be located on the same side of the second transformer 240 (e.g., the primary side), while the second secondary coil 242 may be located on the opposite side of the second transformer 240 (e.g., the secondary side, which may be isolated from the primary side). The second main coil 241 has a first terminal and a second terminal, wherein the first terminal of the second main coil 241 is coupled to an eighth node N8, and the second terminal of the second main coil 241 is coupled to a ninth node N9. The resonant capacitor CR has a first terminal and a second terminal, wherein the first terminal of the resonant capacitor CR is coupled to a third node N3 to receive a second rectified potential VR2, and the second terminal of the resonant capacitor CR is coupled to the ninth node N9 to output a capacitance potential VP. The second magnetizing inductor LM2 has a first terminal and a second terminal, wherein the first terminal of the second magnetizing inductor LM2 is coupled to the eighth node N8, and the second terminal of the second magnetizing inductor LM2 is coupled to the ninth node N9. The second auxiliary coil 242 has a first terminal and a second terminal, wherein the first terminal of the second auxiliary coil 242 is coupled to the tenth node N10, and the second terminal of the second auxiliary coil 242 is coupled to the eleventh node N11.

[0111] The first switch 250 includes a fifth transistor M5. For example, the fifth transistor M5 may be an N-type metal-oxide-semiconductor field-effect transistor. The fifth transistor M5 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain), wherein the control terminal of the fifth transistor M5 is used to receive a first control potential VC1, the first terminal of the fifth transistor M5 is coupled to an eighth node N8, and the second terminal of the fifth transistor M5 is coupled to a fifth node N5.

[0112] The second switch 260 includes a sixth transistor M6. For example, the sixth transistor M6 may be an N-type metal-oxide-semiconductor field-effect transistor. The sixth transistor M6 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain), wherein the control terminal of the sixth transistor M6 is used to receive a second control potential VC2, the first terminal of the sixth transistor M6 is coupled to a twelfth node N12, and the second terminal of the sixth transistor M6 is coupled to a sixth node N6.

[0113] The third switch 270 includes a seventh transistor M7. For example, the seventh transistor M7 may be an N-type metal-oxide-semiconductor field-effect transistor. The seventh transistor M7 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain), wherein the control terminal of the seventh transistor M7 is used to receive a third control potential VC3, the first terminal of the seventh transistor M7 is coupled to a thirteenth node N13, and the second terminal of the seventh transistor M7 is coupled to a tenth node N10.

[0114] The output stage circuit 280 includes: a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a fifth diode D5, a sixth diode D6, a seventh diode D7, an eighth diode D8, and an output capacitor CO. The first diode D1 has an anode and a cathode, wherein the anode of the first diode D1 is coupled to the twelfth node N12, and the cathode of the first diode D1 is coupled to the output node NOUT. The second diode D2 has an anode and a cathode, wherein the anode of the second diode D2 is coupled to the seventh node N7, and the cathode of the second diode D2 is coupled to the output node NOUT. The third diode D3 has an anode and a cathode, wherein the anode of the third diode D3 is coupled to a common node NCM, and the cathode of the third diode D3 is coupled to the twelfth node N12. For example, the common node NCM can provide a common potential, which can be considered another ground potential and can be the same as or different from the aforementioned ground potential VSS. The fourth diode D4 has an anode and a cathode, with the anode of D4 coupled to the common node NCM and the cathode coupled to the seventh node N7. The fifth diode D5 has an anode and a cathode, with the anode of D5 coupled to the thirteenth node N13 and the cathode coupled to the output node NOUT. The sixth diode D6 has an anode and a cathode, with the anode of D6 coupled to the eleventh node N11 and the cathode coupled to the output node NOUT. The seventh diode D7 has an anode and a cathode, with the anode of D7 coupled to the common node NCM and the cathode coupled to the thirteenth node N13. The eighth diode D8 has an anode and a cathode, with the anode of D8 coupled to the common node NCM and the cathode coupled to the eleventh node N11. The output capacitor CO has a first terminal and a second terminal, wherein the first terminal of the output capacitor CO is coupled to the output node NOUT, and the second terminal of the output capacitor CO is coupled to the common node NCM.

[0115] The detection and control circuit 290 includes: a first error amplifier 291, a timer 292, an averaging circuit 293, a second error amplifier 294, an AND gate 295, and a microcontroller unit (MCU) 296.

[0116] The first error amplifier 291 has a first input terminal, a second input terminal, and an output terminal. The first input terminal of the first error amplifier 291 is used to receive a voltage divider potential VD, the second input terminal of the first error amplifier 291 is used to receive a first reference potential VF1, and the output terminal of the first error amplifier 291 is used to output a first control potential VC1. For example, if the voltage divider potential VD is exactly equal to the first reference potential VF1, the first error amplifier 291 will output a first control potential VC1 with a high logic level; conversely, if the voltage divider potential VD is different from the first reference potential VF1, the first error amplifier 291 will output a first control potential VC1 with a low logic level.

[0117] Timer 292 monitors the state of the first control potential VC1. If the first control potential VC1 remains at a low logic level, timer 292 takes no action. Conversely, in response to the first control potential VC1 having a high logic level, timer 292 begins to calculate a predetermined time TD. Then, when this predetermined time TD has elapsed, timer 292 also outputs an indication potential VT having a high logic level. In some embodiments, the aforementioned predetermined time may be between 10 ms and 20 ms, for example, approximately 16.67 ms.

[0118] The averaging circuit 293 can calculate an average value of the capacitor potential VP to generate an average potential VA. For example, the average potential VA can represent an average level of the capacitor potential VP over a given period of time, but it is not limited to this.

[0119] The second error amplifier 294 has a first input terminal, a second input terminal, and an output terminal. The first input terminal of the second error amplifier 294 is used to receive an average potential VA, the second input terminal is used to receive a second reference potential VF2, and the output terminal of the second error amplifier 294 is used to output a matching potential VH. For example, if the average potential VA is exactly equal to the second reference potential VF2, the second error amplifier 294 can output a matching potential VH with a high logic level; conversely, if the average potential VA is different from the second reference potential VF2, the second error amplifier 294 can output a matching potential VH with a low logic level.

[0120] AND gate 295 has a first input, a second input, and an output. The first input receives a matching potential VH, the second input receives an indication potential VT, and the output outputs a logic potential VL. For example, if both the matching potential VH and the indication potential VT are at a high logic level, AND gate 295 will output a logic potential VL with a high logic level; conversely, if either the matching potential VH or the indication potential VT is at a low logic level, AND gate 295 will output a logic potential VL with a low logic level.

[0121] The microcontroller 296 can generate a first reference potential VF1, a second reference potential VF2, and a drive potential group VGM. Furthermore, the microcontroller 296 can generate a second control potential VC2 and a third control potential VC3 based on the logic potential VL. In some embodiments, the drive potential group VGM includes the aforementioned first drive potential VG1, second drive potential VG2, third drive potential VG3, and fourth drive potential VG4, all of which can be applied to the full-bridge rectifier 220.

[0122] Figure 3 This diagram displays a potential waveform of a power supply 200 according to an embodiment of the present invention, where the horizontal axis represents time (s) and the vertical axis represents various potential levels (V). Please refer to [other sources]. Figure 2 , Figure 3 To understand the operating principle of the power supply 200, details are provided below.

[0123] Initially, the voltage divider potential VD gradually rises. At a first time point T1, the voltage divider potential VD is exactly equal to the first reference potential VF1, causing the first error amplifier 291 to output a first control potential VC1 with a high logic level. At this time, the first switch 250 will turn on, and the input energy will be stored in the first magnetizing inductor LM1, the second magnetizing inductor LM2, and the resonant capacitor CR. In addition, the timer 292 also begins to calculate the predetermined time TD.

[0124] Because the input energy enters the resonant capacitor CR, the capacitor potential VP and the average potential VA will gradually rise. At a second time point T2, the average potential VA is exactly equal to the second reference potential VF2, so that the output of the second error amplifier 294 has a high logic level matching potential VH.

[0125] When the predetermined time TD has elapsed, at a third time point T3, timer 292 outputs an indicator potential VT with a high logic level. At this time, AND gate 295 also outputs a logic potential VL with a high logic level. In response to the aforementioned logic potential VL, microcontroller 296 switches both the second control potential VC2 and the third control potential VC3 from a low logic level to a high logic level. It is important to note that before the output stage circuit 280 is enabled, the first magnetizing inductor LM1, the second magnetizing inductor LM2, and the resonant capacitor CR have already formed a stable resonant slot, so non-ideal oscillations are less likely to occur on the output potential VOUT of the power supply 200. In other words, the overall stability of the power supply 200 can be effectively improved.

[0126] After the output stage circuit 280 is enabled, the power supply 200 can operate alternately in a first mode and a second mode, but is not limited to these. For example, in the first mode, the first transistor M1, the fourth transistor M4, the first diode D1, the fourth diode D4, the fifth diode D5, and the eighth diode D8 can all be turned on. In addition, in the second mode, the second transistor M2, the third transistor M3, the second diode D2, the third diode D3, the sixth diode D6, and the seventh diode D7 can all be turned on.

[0127] This invention proposes a novel power supply. Based on actual measurement results, the output stability of the power supply using the aforementioned design can be significantly improved, making it well-suited for use in a wide variety of devices.

[0128] It is worth noting that the potential, current, resistance, inductance, capacitance, and other component parameters mentioned above are not limiting conditions of this invention. Designers can adjust these settings according to different needs. The power supply of this invention is not limited to... Figure 1-Figure 3 The state illustrated. This invention may include only... Figure 1-Figure 3 Any one or more features of any one or more embodiments. In other words, not all illustrated features need to be implemented simultaneously in the power supply of the present invention. Although embodiments of the present invention use metal-oxide-semiconductor field-effect transistors as examples, the present invention is not limited thereto. Those skilled in the art can use other types of transistors, such as junction field-effect transistors or fin field-effect transistors, without affecting the effects of the present invention.

[0129] The ordinal numbers in this specification and claims, such as "first", "second", "third", etc., are not sequential in any way; they are only used to distinguish two different elements with the same name.

[0130] While the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the scope of the invention. Any person skilled in the art may make some modifications and refinements without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

Claims

1. A power supply with high output stability, comprising: A voltage divider circuit generates a voltage divider potential based on an input potential; A full-bridge rectifier generates a first rectified potential and a second rectified potential based on the input potential and a drive potential group; A first transformer includes a first main coil and a first secondary coil, wherein the first transformer has a built-in leakage inductor and a first magnetizing inductor, and the first main coil receives the first rectified potential through the leakage inductor. A resonant capacitor provides a capacitance potential; A second transformer includes a second main coil and a second auxiliary coil, wherein the second transformer has a built-in second magnetizing inductor, and the second main coil receives the second rectified potential via the resonant capacitor; A first switch selectively couples the second magnetizing inductor to the first magnetizing inductor according to a first control potential; An output stage circuit generates an output potential; A second switch selectively couples the output stage circuit to the first secondary coil according to a second control potential; A third switch selectively couples the output stage circuit to the second auxiliary coil according to a third control potential; as well as A detection and control circuit generates the drive potential group, the first control potential, the second control potential, and the third control potential based on the voltage divider potential and the capacitor potential.

2. The power supply of claim 1, wherein the voltage divider circuit comprises: A first resistor has a first terminal and a second terminal, wherein the first terminal of the first resistor is coupled to an input node to receive the input potential, and the second terminal of the first resistor is coupled to a first node to output the voltage divider potential. as well as A second resistor has a first end and a second end, wherein the first end of the second resistor is coupled to the first node, and the second end of the second resistor is coupled to a ground potential.

3. The power supply as claimed in claim 2, wherein the drive potential group includes a first drive potential, a second drive potential, a third drive potential, and a fourth drive potential, and the full-bridge rectifier includes: A first transistor has a control terminal, a first terminal, and a second terminal, wherein the control terminal of the first transistor is used to receive the first drive potential, the first terminal of the first transistor is coupled to a second node to output the first rectified potential, and the second terminal of the first transistor is coupled to the input node to receive the input potential. A second transistor has a control terminal, a first terminal, and a second terminal, wherein the control terminal of the second transistor is used to receive the second drive potential, the first terminal of the second transistor is coupled to a third node to output the second rectified potential, and the second terminal of the second transistor is coupled to the input node. A third transistor has a control terminal, a first terminal, and a second terminal, wherein the control terminal of the third transistor is used to receive the third drive potential, the first terminal of the third transistor is coupled to the ground potential, and the second terminal of the third transistor is coupled to the second node. as well as A fourth transistor has a control terminal, a first terminal, and a second terminal, wherein the control terminal of the fourth transistor is used to receive the fourth drive potential, the first terminal of the fourth transistor is coupled to the ground potential, and the second terminal of the fourth transistor is coupled to the third node.

4. The power supply of claim 3, wherein the leakage inductor has a first terminal and a second terminal, the first terminal of the leakage inductor is coupled to the second node to receive the first rectified potential, the second terminal of the leakage inductor is coupled to a fourth node, the first main coil has a first terminal and a second terminal, the first terminal of the first main coil is coupled to the fourth node, the second terminal of the first main coil is coupled to a fifth node, the first magnetizing inductor has a first terminal and a second terminal, the first terminal of the first magnetizing inductor is coupled to the fourth node, the second terminal of the first magnetizing inductor is coupled to the fifth node, the first secondary coil has a first terminal and a second terminal, the first terminal of the first secondary coil is coupled to a sixth node, and the second terminal of the first secondary coil is coupled to a seventh node.

5. The power supply of claim 4, wherein the second main coil has a first end and a second end, the first end of the second main coil is coupled to an eighth node, the second end of the second main coil is coupled to a ninth node, the resonant capacitor has a first end and a second end, the first end of the resonant capacitor is coupled to the third node to receive the second rectified potential, the second end of the resonant capacitor is coupled to the ninth node to output the capacitor potential, the second magnetizing inductor has a first end and a second end, the first end of the second magnetizing inductor is coupled to the eighth node, the second end of the second magnetizing inductor is coupled to the ninth node, the second secondary coil has a first end and a second end, the first end of the second secondary coil is coupled to a tenth node, and the second end of the second secondary coil is coupled to an eleventh node.

6. The power supply of claim 5, wherein the first switch comprises: A fifth transistor has a control terminal, a first terminal, and a second terminal, wherein the control terminal of the fifth transistor is used to receive the first control potential, the first terminal of the fifth transistor is coupled to the eighth node, and the second terminal of the fifth transistor is coupled to the fifth node. The second switch includes: A sixth transistor has a control terminal, a first terminal, and a second terminal, wherein the control terminal of the sixth transistor is used to receive the second control potential, the first terminal of the sixth transistor is coupled to a twelfth node, and the second terminal of the sixth transistor is coupled to the sixth node. The third switch includes: A seventh transistor has a control terminal, a first terminal, and a second terminal, wherein the control terminal of the seventh transistor is used to receive the third control potential, the first terminal of the seventh transistor is coupled to a thirteenth node, and the second terminal of the seventh transistor is coupled to the tenth node.

7. The power supply of claim 6, wherein the output stage circuit comprises: A first diode has an anode and a cathode, wherein the anode of the first diode is coupled to the twelfth node, and the cathode of the first diode is coupled to an output node to output the output potential; A second diode having an anode and a cathode, wherein the anode of the second diode is coupled to the seventh node, and the cathode of the second diode is coupled to the output node; A third diode having an anode and a cathode, wherein the anode of the third diode is coupled to a common node, and the cathode of the third diode is coupled to the twelfth node; as well as A fourth diode having an anode and a cathode, wherein the anode of the fourth diode is coupled to the common node, and the cathode of the fourth diode is coupled to the seventh node; A fifth diode having an anode and a cathode, wherein the anode of the fifth diode is coupled to the thirteenth node, and the cathode of the fifth diode is coupled to the output node; A sixth diode having an anode and a cathode, wherein the anode of the sixth diode is coupled to the eleventh node, and the cathode of the sixth diode is coupled to the output node; A seventh diode having an anode and a cathode, wherein the anode of the seventh diode is coupled to the common node, and the cathode of the seventh diode is coupled to the thirteenth node; An eighth diode has an anode and a cathode, wherein the anode of the eighth diode is coupled to the common node, and the cathode of the eighth diode is coupled to the eleventh node; as well as An output capacitor has a first terminal and a second terminal, wherein the first terminal of the output capacitor is coupled to the output node, and the second terminal of the output capacitor is coupled to the common node.

8. The power supply of claim 1, wherein the detection and control circuitry comprises: A first error amplifier has a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the first error amplifier is used to receive the voltage divider potential, the second input terminal of the first error amplifier is used to receive a first reference potential, and the output terminal of the first error amplifier is used to output the first control potential. as well as A timer, in response to a first control potential having a high logic level, begins to calculate a predetermined time, and when the predetermined time has elapsed, the timer outputs an indication potential.

9. The power supply of claim 8, wherein the detection and control circuit further comprises: An averaging circuit calculates an average value of the capacitor potential to generate an average potential. A second error amplifier has a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the second error amplifier is used to receive the average potential, the second input terminal of the second error amplifier is used to receive a second reference potential, and the output terminal of the second error amplifier is used to output a matching potential. as well as An AND gate has a first input, a second input, and an output, wherein the first input of the AND gate is used to receive the matching potential, the second input of the AND gate is used to receive the indication potential, and the output of the AND gate is used to output a logic potential.

10. The power supply of claim 9, wherein the detection and control circuitry further comprises: A microcontroller generates the first reference potential, the second reference potential, and the drive potential group, wherein the microcontroller further generates the second control potential and the third control potential based on the logic potential.

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