BUCK converter control circuit and DCDC converter

Abstract

The invention discloses a BUCK converter control circuit and a DCDC converter, and the BUCK converter control circuit comprises an error amplifier which is used for comparing a feedback voltage obtained based on the voltage division of an output signal of the BUCK converter with a first reference voltage, and outputting an error amplification signal; the compensation module is used for compensating a conjugate pole generated by an output loop of the BUCK converter; the ramp signal generation module has a zero compensation function and is used for generating a ramp signal, and the descending slope of the ramp signal is irrelevant to the input voltage and the output voltage of the BUCK converter; and the control signal generation module is used for generating a control signal according to the ramp signal and the error amplification signal so as to control on and off of a switching tube in the BUCK converter. The circuit provided by the invention is simple in structure, and can greatly simplify the design of a compensation circuit and the number of elements at the periphery of the system.

Description

Technical Field

[0001] This invention relates to the field of circuit technology, specifically to a BUCK converter control circuit and a DC-DC converter. Background Technology

[0002] DC-DC converters are widely used as converters that can transform input voltage and effectively output a fixed voltage. Currently, most DC-DC converters use COT (Constant on-time) control mode to control the switching of the converter's power transistor. In COT control mode, the on-time of the switching transistor (i.e., the charging time of the inductor) is fixed, and the off-time of the switching transistor is adjusted to respond to changes in load or input voltage. DC-DC converters with COT control mode have a faster transient response and a simpler control loop.

[0003] Figure 1 This is a typical COT control mode DC-DC converter. Its working principle is as follows: The output voltage Vout generates a feedback voltage through voltage divider resistors R1 and R2. This feedback voltage and the internal reference voltage VREF1 are amplified by error amplifier 101 to generate an error amplification signal. The compensation circuit 102, composed of compensation capacitor C1 and compensation resistor R1, is used to compensate for the conjugate poles generated by inductor L and capacitor C in the output circuit. The ramp generation circuit 100 outputs a ramp signal S1. This ramp signal S1 is compared with the error amplification signal by comparator 103 to determine the control signal output by RS flip-flop 104. The duty cycle is specified. The output signal of comparator 103 is output to the S terminal of RS flip-flop 104. When the output signal of comparator 103 is high, the output of RS flip-flop 104 is high. The R terminal of RS flip-flop 104 is connected to the output terminal of timer 105. Timer 105 is used to provide a fixed on-time. When the output signal of timer 105 is high, the output of RS flip-flop 104 is low. The Q terminal of RS flip-flop 104 is connected to the input terminal of driver module 106. Driver module 106 controls the on and off of MOSFETs M1 and M2, extracting energy from the input voltage VIN. The extracted energy is filtered by inductor L and capacitor C to obtain a stable output voltage Vout.

[0004] In this COT mode DC-DC converter, the ramp generation circuit 100 functions to control the duty cycle of the system, thereby obtaining a stable output voltage Vout. For example... Figure 1As shown, the ramp generation circuit 100 typically consists of a switch K1, a capacitor C2, and a controlled current source I1. At the beginning of each switching cycle, switch K1 closes, charging capacitor C2 to VREF2. Then, switch K1 opens, and the controlled current source I1 is proportional to the output voltage Vout, forming a discharge circuit with capacitor C2. When the voltage on capacitor C2 is lower than the error amplification signal output by error amplifier 101, the output of comparator 103 changes from low to high, thereby determining the system's duty cycle.

[0005] Figure 2 for Figure 1 The diagram shows the basic timing of a DC-DC converter in COT control mode.

[0006] Where Vs is the source voltage of MOSFET M1, Iout is the load current, and Vout is the system output voltage.

[0007] Depend on Figure 1 As shown in the timing diagram, when the system load is stable, its current Iout remains stable. The ramp signal S1 descends to the same position each time, and the control signal... The duty cycle remains constant; when the system load changes abruptly, such as a sudden increase in current Iout, the output voltage Vout will drop. At this time, the control signal is boosted by the ramp signal S1. The duty cycle is adjusted to maintain the stability of the output voltage Vout.

[0008] Figure 1 In the ramp generation circuit 100, the discharge current is directly proportional to the output voltage. The slope of the ramp signal S1 is affected by the output voltage, thus fixing its slope and starting point, which do not change with external conditions. Therefore, it does not provide compensation zeros and poles. However, the LC conjugate double pole of the system output requires two zeros for compensation. Therefore, a type III compensation circuit is needed. Typically, a compensation circuit 107 is connected in parallel with the voltage divider resistor R1 to provide zeros. This structure increases the number of system components, making the compensation design more complex. Summary of the Invention

[0009] This invention provides a BUCK converter control circuit and a DC-DC converter to simplify the design of peripheral compensation circuits and the number of components in the system.

[0010] On one hand, embodiments of the present invention provide a BUCK converter control circuit, including:

[0011] An error amplifier is used to compare the feedback voltage obtained by voltage division of the output voltage signal based on the BUCK converter with the first reference voltage, and outputs an error amplification signal.

[0012] The compensation module is used to compensate for the conjugate poles generated in the output circuit of the BUCK converter;

[0013] The ramp signal generation module has a zero-point compensation function and is used to generate a ramp signal. The descent slope of the ramp signal is independent of the input voltage and output voltage of the BUCK converter.

[0014] The control signal generation module is used to generate a switch control signal based on the ramp signal and the error amplification signal, so as to control the conduction and turn-off of the switching transistor in the BUCK converter.

[0015] Optionally, the ramp signal generation module includes:

[0016] A sawtooth wave signal generation unit is used to generate a sawtooth wave signal with a DC bias voltage.

[0017] An AC signal extractor is used to extract the AC component of the sawtooth wave signal to obtain an AC signal.

[0018] An adder is used to add the AC signal to a preset reference voltage signal and output the ramp signal.

[0019] Optionally, the sawtooth wave signal generation unit includes: a first current source, a second current source, a third current source, a charging / discharging unit, and a control unit; the input terminal of the first current source and the input terminal of the second current source are connected, the output terminal of the first current source and the output terminal of the second current source are both connected to one end of the charging / discharging unit, and the other end of the charging / discharging unit is grounded; the input terminal of the third current source is connected to one end of the charging / discharging unit, and the output terminal of the third current source is grounded;

[0020] The first current source and the second current source are controlled by the control unit to charge the charging and discharging unit;

[0021] The second current source and the third current source are controlled by the control unit to discharge the charging and discharging unit.

[0022] Optionally, the first current source and the third current source are variable current sources, and the second current source is a fixed current source.

[0023] Optionally, the control unit includes: a first switch and a second switch; the first switch is connected between the output terminal of the first current source and one end of the charging / discharging unit, and the second switch is connected between the output terminal of the third current source and ground.

[0024] Optionally, the charging and discharging unit includes a resistor and a capacitor connected in parallel.

[0025] Optionally, the AC signal extractor is a high-pass filter.

[0026] Optionally, the compensation module includes an RC network connected in series between the output of the error amplifier and ground.

[0027] Optionally, the control signal generation module includes:

[0028] A comparator is used to compare the ramp signal and the error amplification signal, and output the comparison result;

[0029] A timer is used to output timing signals.

[0030] An RS flip-flop has the timing signal input at its R terminal, the comparison result input at its S terminal, and the switching control signal output at its Q terminal.

[0031] Optionally, the control circuit further includes a feedback signal acquisition module, used to divide the output voltage signal of the BUCK converter to obtain the feedback voltage.

[0032] On the other hand, embodiments of the present invention also provide a DC-DC converter, including: a driving module, a BUCK converter, and a BUCK converter control circuit; the BUCK converter includes: a switching module and an energy storage module;

[0033] The drive module is used to provide drive signals to the BUCK converter according to the switch control signal;

[0034] The switching module is used to turn on or off according to the drive signal to control the on / off state of the input voltage;

[0035] The energy storage module is used to store energy when the switch module is turned on, release energy when the switch module is turned off, and output the output voltage signal.

[0036] The BUCK converter control circuit and DC-DC converter provided in this embodiment of the invention have a ramp signal generation module whose descent slope is independent of the input voltage, output voltage, and frequency of the BUCK converter. Furthermore, the ramp signal generation module also has zero-point compensation functionality. Therefore, the loop bandwidth of the BUCK converter remains independent of the input voltage, output voltage, and frequency, and is only related to the inductors, capacitors, and their ESR (Equivalent Series Resistance) in the loop. Since the conjugate poles generated by the inductors and capacitors in the BUCK converter loop require two zeros for compensation, and the ramp signal generation module in the BUCK converter control circuit provided in this embodiment of the invention already has one zero, loop compensation only requires type II compensation to generate one zero. This simplifies the loop design and facilitates internal loop integration. Attached Figure Description

[0037] Figure 1 A schematic diagram of a typical COT control mode DC-DC converter;

[0038] Figure 2 yes Figure 1 The following is a basic timing diagram of a COT control mode DC-DC converter;

[0039] Figure 3 This is a schematic diagram of a BUCK converter control circuit provided in an embodiment of the present invention;

[0040] Figure 4 This is a schematic diagram of a ramp signal generation module in the BUCK converter control circuit of this invention.

[0041] Figure 5 This is a schematic diagram of a specific structure of the BUCK converter control circuit provided in an embodiment of the present invention;

[0042] Figure 6 This is a schematic diagram of the output signals of each module in an embodiment of the present invention;

[0043] Figure 7 This is a schematic diagram of a DC-DC converter provided in an embodiment of the present invention;

[0044] Figure 8 yes Figure 7 The timing diagram of each signal in the DC-DC converter is shown.

[0045] Figure 9 This is the Bode plot of the DC-DC converter of this embodiment of the invention obtained from simulation testing;

[0046] Figure 10 The output voltage change curves of the DC-DC converter of this invention and the traditional DC-DC converter are obtained from simulation tests when the load increases. Detailed Implementation

[0047] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0048] In existing COT-controlled DC-DC converters, the slope and starting point of the sawtooth wave signal generated by the ramp generation circuit are fixed and do not change with external conditions. In this control mode, the loop bandwidth (i.e., the -3dB frequency point of the closed-loop system, reflecting the response speed of the control system to input / load changes; the higher the bandwidth, the faster the response) is related to peripheral parameters such as input voltage, output voltage, and frequency. The built-in loop compensation cannot still play a good role in some applications, requiring the use of a Type III compensation circuit. This results in a complex compensation circuit structure, affects the integration of the device, and increases costs.

[0049] To address this, embodiments of the present invention provide a BUCK converter control circuit and a DC-DC converter that eliminate the influence of external parameters such as input voltage, output voltage, and frequency on loop bandwidth, and enable the built-in loop compensation to provide dual zeros, simplifying the design of the system's peripheral compensation circuit and the number of components.

[0050] A BUCK converter is a voltage converter that reduces the input voltage to a lower output voltage and is widely used in embedded systems, communication equipment, battery-powered devices and other fields.

[0051] like Figure 3 The diagram shown is a structural schematic of a BUCK converter control circuit 30 provided in an embodiment of the present invention.

[0052] The BUCK converter control circuit 300 includes: an error amplifier 301, a compensation module 302, a ramp signal generation module 303, and a control signal generation module 304. Wherein:

[0053] Error amplifier 301 is used to compare the feedback voltage V obtained by voltage division of the output voltage signal based on the BUCK converter. BF The output error amplification signal is compared with the first reference voltage VREF1. The first reference voltage VREF1 can be set by the manufacturer based on factors such as its process withstand voltage and output voltage, and this embodiment of the invention does not limit this.

[0054] The compensation module 302 is used to compensate for the conjugate poles generated in the output circuit of the BUCK converter.

[0055] The ramp signal generation module 303 has a zero-point compensation function for generating ramp signals. The ramp signal The rate of decrease is independent of the input and output voltages of the BUCK converter.

[0056] The control signal generation module 304 is used to generate signals based on the ramp signal. Sum of error amplification signals Generate switch control signal This is to control the on and off of the switching transistors in the BUCK converter.

[0057] In existing BUCK converter control circuits, the discharge current used to control the ramp generation circuit is directly proportional to the BUCK converter output voltage, causing the slope of the generated ramp signal to be affected by the output voltage. Unlike existing BUCK converter control circuits, the ramp signal generated by the ramp signal generation module 303 in this embodiment of the invention generates a ramp signal... The rate of decrease is independent of the input and output voltages of the BUCK converter and does not change with the output voltage, input voltage, or frequency.

[0058] like Figure 4 The diagram shown is a structural schematic of a ramp signal generation module in the BUCK converter control circuit of an embodiment of the present invention.

[0059] The ramp signal generation module 303 includes: a sawtooth wave signal generation unit 331, an AC signal extractor 332, and an adder 333. Wherein:

[0060] The sawtooth wave signal generation unit 331 is used to generate a sawtooth wave signal with a DC bias voltage.

[0061] The AC signal extractor 332 is used to extract the AC component of the sawtooth wave signal to obtain an AC signal;

[0062] Adder 333 is used to add the AC signal to a preset reference voltage signal and output a ramp signal. .

[0063] like Figure 5 The diagram shown is a specific structural schematic of the BUCK converter control circuit provided in an embodiment of the present invention.

[0064] Simultaneously refer to Figure 4 and Figure 5 A non-limiting embodiment of the sawtooth wave signal generation unit 331 may include: a first current source I31, a second current source I32, a third current source I33, a charging / discharging unit, and a control unit. The input terminals of the first current source I31 and the second current source I32 are connected, and the output terminals of both the first current source I31 and the second current source I32 are connected to one end of the charging / discharging unit, with the other end of the charging / discharging unit grounded; the input terminal of the third current source I33 is connected to one end of the charging / discharging unit, and the output terminal of the third current source I33 is grounded.

[0065] One non-limiting embodiment of the charging / discharging unit may include a resistor R3 and a capacitor C3 connected in parallel. One non-limiting embodiment of the control unit may include a first switch K11 and a second switch K12; the first switch K11 is connected between the output terminal of the first current source I31 and one end of the charging / discharging unit, and the second switch K12 is connected between the output terminal of the third current source I33 and ground.

[0066] In this embodiment, the first current source I31, the second current source I32, and the third current source I33 are all controlled by the control unit. Specifically, the first current source I31 and the second current source I32, controlled by the control unit, charge the charging / discharging unit; the second current source I32 and the third current source I33, controlled by the control unit, discharge the charging / discharging unit.

[0067] In this embodiment, the first current source I31 and the third current source I33 are variable current sources, and the second current source I32 is a fixed current source.

[0068] In specific implementations, the AC signal extractor 332 can be implemented in various ways, such as an RC high-pass filter, an operational amplifier-type AC (Alternating Current) extractor, etc., and the embodiments of the present invention do not limit this.

[0069] Continue to refer to Figure 5 The compensation module 302 may include an RC network connected in series between the output of the error amplifier 301 and ground, the RC network including a resistor R2 and a capacitor C2 connected in series.

[0070] A non-limiting embodiment of the control signal generation module 304 may include: a comparator 341, a timer 342, and an RS flip-flop 343. Wherein:

[0071] Comparator 341 is used to compare ramp signals. Sum of error amplification signals Output the comparison results;

[0072] Timer 342 is used to output timing signals;

[0073] RS flip-flop 343, whose R terminal receives the timing signal, whose S terminal receives the comparison result, and whose Q terminal outputs a switch control signal. Switch control signal It is a PWM signal with an adjustable duty cycle.

[0074] The following combination Figure 5 The working process of the BUCK converter control circuit provided in the embodiments of the present invention will be described in detail.

[0075] At the beginning of each switching cycle, the first switch K11 is turned on and the second switch K12 is turned off. The first current source I31 and the second current source I32 charge capacitor C3 and resistor R3, causing the voltage across capacitor C3, i.e., the voltage at node A, to rise. After a period of time, the first switch K11 is turned off and the second switch K12 is turned on. The second current source I32 and the third current source I33 discharge capacitor C3 together, causing the voltage at node A to drop. Repeating this process generates a sawtooth wave signal with a DC bias voltage at node A, the value of which is I32 × R3.

[0076] The AC signal extractor 332 extracts the AC component from the sawtooth wave signal to obtain the AC signal.

[0077] Adder 333 adds a reference voltage VREF2 to the AC signal to generate a ramp signal. The reference voltage VREF2 can be determined based on the output voltage range of the error amplifier 301, the loop stability, and the acceptable input voltage range of the comparator 341, etc., and this embodiment of the invention does not limit this.

[0078] The waveforms of the sawtooth wave signal with DC bias voltage, the AC signal, the duty cycle control signal, and the signal outputs of each unit in the control signal generation module 304 are shown in the figure below. Figure 6 As shown.

[0079] Figure 6 The horizontal axis represents time t, in milliseconds (ms), and the vertical axis represents voltage. Wherein:

[0080] This is the error amplification signal output by error amplifier 301, in volts (V).

[0081] for Figure 5 The sawtooth wave signal with DC bias voltage generated by the middle node A is the input signal of the AC signal extractor 332. The average value will vary with changes in input voltage, output voltage, and output current, and is measured in volts (V).

[0082] For AC signal extractor 332 to extract the input sawtooth wave signal The average value of the AC signal extracted is 0, and the unit is mV (millivolt).

[0083] The adder 333 adds a ramp signal generated by the reference voltage VREF2 to the AC signal; the average value is VREF2 ( Figure 6 The value is 1V, which does not change with other conditions; the unit is V (volt).

[0084] V1 is used by comparator 341 to compare ramp signals. Sum of error amplification signals The output comparison result signal, in volts (V).

[0085] V2 is the timing signal output by Timer 342, in volts (V).

[0086] The RS trigger 343 outputs the switching control signals based on the above V1 and V2. It is used to control the on and off of the switching transistors in the BUCK converter, and its unit is V (volt).

[0087] In this embodiment of the invention, the three currents (i.e., I31, I32, and I33) in the ramp signal generation module 303 are all constant and do not change with the output voltage, input voltage, or operating frequency of the BUCK converter. Therefore, the generated duty cycle control signal is also unaffected by the input and output signals of the BUCK converter, thus ensuring that the loop bandwidth of the BUCK converter does not change with the input voltage, output voltage, or frequency. Furthermore, the capacitor C3 and resistor R3 in the ramp signal generation module 303 can form a zero point, thus eliminating the need for additional external compensation circuitry.

[0088] In some non-limiting embodiments, the BUCK converter control circuit 300 may further include a feedback signal acquisition module ( Figure 5 (Not shown in the image) is used to divide the output voltage signal of the BUCK converter to obtain the feedback voltage V. BF .

[0089] The loop bandwidth of a COT-controlled BUCK converter cannot exceed 0.5 times the switching frequency. However, to achieve optimal dynamic response, a higher bandwidth is desirable. Therefore, the optimal design target is close to 0.5 times the switching frequency. Existing COT-controlled BUCK converters have loop bandwidths that vary with input voltage, output voltage, and frequency. This necessitates setting the loop bandwidth to a very low frequency to ensure it doesn't exceed 0.5 times the switching frequency under different conditions, thus preventing the dynamic response from being optimally designed. In the present invention, the BUCK converter's loop bandwidth does not change with these parameters. Therefore, the loop bandwidth can be designed to be as close as possible to 0.5 times the switching frequency, and it can be guaranteed not to exceed 0.5 times the switching frequency under different parameter variations. This significantly reduces the output capacitor value while still ensuring a stable dynamic response.

[0090] Accordingly, embodiments of the present invention also provide a DC-DC converter, such as... Figure 7 The diagram shown is a schematic representation of one structure of this DC-DC converter.

[0091] In this example, the DC-DC converter includes: a driver module 400, a BUCK converter 500, and the aforementioned BUCK converter control circuit 300; the feedback signal acquisition module composed of resistors R1 and R2 can be part of the BUCK converter control circuit 300, or it can be independent of the BUCK converter control circuit 300, and this embodiment of the present invention does not limit this.

[0092] The drive module 400 is used to perform the control signal. Provide drive signals for BUCK converter 400.

[0093] The BUCK converter 500 includes a switching module and an energy storage module. The switching module is used to turn the input voltage VIN on or off according to the drive signal; the energy storage module stores energy when the switching module is on and releases energy when the switching module is off, outputting the output voltage signal Vout.

[0094] Reference Figure 7 The switching module includes a power switch M1 and a synchronous rectifier M2. Figure 7 In the example shown, the power switch M1 and the synchronous rectifier M2 are NMOS transistors. Of course, in some embodiments, PMOS transistors can also be used, and the connection method can be adjusted accordingly.

[0095] Figure 7 In the example shown, the gate of the power switch M1 and the gate of the synchronous rectifier M2 are connected to the drive module 400, the source of the power switch M1 and the drain of the synchronous rectifier M2 are connected and connected to the energy storage module, the drain of the power switch M1 is connected to the input voltage VIN, and the source of the synchronous rectifier M2 is grounded.

[0096] The energy storage module includes an inductor L and a capacitor C connected in series between the source of the power switch M1 and ground. The connection terminal of the inductor L and the capacitor C is the signal output terminal, which outputs the output voltage signal Vout.

[0097] In this DC-DC converter, the ramp signal generated by the ramp signal generation module 303 is... The error amplification signal output by error amplifier 301 is compared with the error amplification signal output by comparator 341 to determine the control signal output by RS flip-flop 343. Duty cycle.

[0098] The output signal of comparator 341 is output to the S terminal of RS flip-flop 343, and timer 342 outputs a timing signal to the R terminal of RS flip-flop 343 to provide a fixed conduction time.

[0099] like Figure 8 As shown, is Figure 7 The timing diagram of each signal in the DC-DC converter shown is illustrated, with the horizontal axis representing time t, in milliseconds (ms). Wherein:

[0100] This is the error amplification signal output by error amplifier 301, in volts (V).

[0101] The ramp signal generated by ramp signal generation module 303 is expressed in V (volts).

[0102] The control signal generation module 304 generates signals based on the ramp signal. Sum of error amplification signals The generated switch control signal, in volts (V).

[0103] Vout is the output voltage, in mV (millivolts).

[0104] Iout is the load current, measured in amperes (A).

[0105] The following combination Figure 7 and Figure 8 Detailed explanation Figure 7 The work process.

[0106] When timer 342 finishes counting, a reset signal is sent, the output of RS flip-flop 343 is set low, the power switch M1 in BUCK converter 500 is turned off, and the synchronous rectifier M2 is turned on.

[0107] Current source I31 charges capacitor C3, and the voltage at node A... The voltage rises rapidly, with the charging time being much shorter than the switching cycle. After the charging time ends, due to the discharge of current source I33, the voltage at node A... The voltage begins to decrease, forming a decreasing voltage. This voltage is then processed by AC signal extractor 332 and adder 333 to generate a ramp signal. The input is given to the negative input terminal of comparator 341. When the voltage at the negative input terminal of comparator 341 is lower than the voltage at the positive input terminal... When the comparator 341 sends a set signal, the output of the RS flip-flop 343 goes high, the power switch M1 turns on, and the synchronous rectifier M2 turns off, until the timer 342 finishes counting.

[0108] Assuming the charging time of current source I31 is t1 and the charging time of current source I33 is T, the following relationship must be satisfied:

[0109] (1)

[0110] Furthermore, resistor R3 and capacitor C3 form a built-in zero with a frequency of:

[0111] (2)

[0112] Depend on Figure 8 The waveform shown indicates that the load current jumps from 0 to 30A, indicating a switching control signal... The rapid increase in frequency causes only a small drop in the output voltage Vout, thus maintaining the stability of the system.

[0113] In this embodiment of the invention, the ramp signal It fluctuates with changes in load, but quickly returns to its initial state; this characteristic effectively maintains the stability of the loop.

[0114] To further illustrate the effectiveness of the DC-DC converter provided in this embodiment of the invention, simulation tests were conducted. Figure 9 The Bode plot of the DC-DC converter of this embodiment of the invention obtained from simulation test is shown. The horizontal axis represents frequency f in Hz (Hertz), the upper curve is the phase frequency response curve in degrees (deg), and the lower curve is the amplitude frequency response curve in dB (decibels).

[0115] Simulation results show that under different simulation conditions (e.g., different output voltages, with the red curve corresponding to an output voltage of 1.2V and the green curve corresponding to an output voltage of 3.3V), the Bode plot curves of the DC-DC converter provided in this embodiment of the invention highly overlap, and the loop bandwidth remains at 120KΩ, without changing with the output voltage setting. Furthermore, in the simulation test, the error amplifier 301 used the simplest Type II compensation, and the phase margin was still higher than 45 degrees.

[0116] Furthermore, using the same Type II compensation and the same loop bandwidth, the stability of the DC-DC converter provided by the present invention with load changes was compared with that of the traditional DC-DC converter through simulation tests.

[0117] Figure 10 The simulation test results show the output voltage variation curves of the DC-DC converter of the present invention and the conventional DC-DC converter as the load increases.

[0118] Figure 10 The horizontal axis represents time t, in milliseconds (ms), and the vertical axis represents the output voltage Vout, in millivolts (mV). The green curve represents the output voltage change curve of a conventional DC-DC converter under sudden load changes, while the red curve represents the output voltage change curve of the DC-DC converter of the present invention under sudden load changes.

[0119] Depend on Figure 10It can be seen that the loop stability of the DC-DC converter provided by this invention is significantly better than that of traditional DC-DC converters.

[0120] The loop bandwidth of the COT control mode, that is, the dynamic response capability of the control system to changes in load or input voltage, cannot exceed 0.5 times the switching frequency. However, in order to pursue dynamic response, it is desirable for the bandwidth to be as high as possible. Therefore, the optimal design goal is to be close to 0.5 times the switching frequency.

[0121] The loop bandwidth of the existing COT control mode varies with the input voltage, output voltage and frequency, so the loop bandwidth can only be set low to ensure that it will not exceed 0.5 times the switching frequency under different conditions, which makes it impossible to design the dynamic response to be optimal.

[0122] In the DC-DC converter provided in this embodiment of the invention, since the descent slope of the ramp signal used in the BUCK converter control circuit is independent of the input voltage, output voltage and frequency of the BUCK converter, and the ramp signal generation module also has a zero-point compensation function, the loop bandwidth of the DC-DC converter can be made to remain unchanged with the input voltage, output voltage and frequency, so that the output of the DC-DC converter has good stability.

[0123] In this embodiment of the invention, unless otherwise explicitly specified and limited, ordinal numbers, such as "first," "second," etc., are used only to distinguish and describe related objects, and should not be construed as indicating or implying the relative importance or order between related objects. Furthermore, ordinal numbers do not represent the number of related objects.

[0124] "Multiple" includes two or more, and other classifiers are similar.

[0125] The terms "or" and "and / or" in this invention are used to describe the relationship between related objects, indicating a non-exclusive inclusion. For example, "A and / or B" can include: "A alone", "B alone", or "A and B".

[0126] In the several embodiments provided by this invention, it should be understood that the disclosed methods and apparatus can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for example, the division of modules is merely a logical functional division, and there may be other division methods in actual implementation, which this invention does not limit.

[0127] Furthermore, the functional modules in the various embodiments of the present invention can be integrated into one processing unit, or they can be separate physical units, or two or more units can be integrated into one unit. The integrated unit described above can be implemented in hardware or in the form of hardware and software functional units.

[0128] Integrated units implemented as hardware and software functional units can be implemented by a processor calling software; for example, the system includes a processor connected to memory, which stores instructions. The processor calls the instructions stored in memory to implement any of the above methods or to implement the functions of each module of the system. The processor is, for example, a general-purpose processor, such as a CPU or microprocessor, and the memory is either internal or external to the system. The software described above can be stored in a computer-readable storage medium.

[0129] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A BUCK converter control circuit, characterized in that, include: An error amplifier is used to compare the feedback voltage obtained by voltage division of the output voltage signal based on the BUCK converter with the first reference voltage, and outputs an error amplification signal. The compensation module is used to compensate for the conjugate poles generated in the output circuit of the BUCK converter; The ramp signal generation module has a zero-point compensation function and is used to generate a ramp signal. The descent slope of the ramp signal is independent of the input voltage and output voltage of the BUCK converter. The control signal generation module is used to generate a switch control signal based on the ramp signal and the error amplification signal, so as to control the on and off of the switching transistor in the BUCK converter.

2. The BUCK converter control circuit according to claim 1, characterized in that, The ramp signal generation module includes: A sawtooth wave signal generation unit is used to generate a sawtooth wave signal with a DC bias voltage. An AC signal extractor is used to extract the AC component of the sawtooth wave signal to obtain an AC signal. An adder is used to add the AC signal to a preset reference voltage signal and output the ramp signal.

3. The BUCK converter control circuit according to claim 2, characterized in that, The sawtooth wave signal generation unit includes: a first current source, a second current source, a third current source, a charging and discharging unit, and a control unit; the input terminal of the first current source and the input terminal of the second current source are connected, the output terminal of the first current source and the output terminal of the second current source are both connected to one end of the charging and discharging unit, and the other end of the charging and discharging unit is grounded; the input terminal of the third current source is connected to one end of the charging and discharging unit, and the output terminal of the third current source is grounded; The first current source and the second current source are controlled by the control unit to charge the charging and discharging unit; The second current source and the third current source are controlled by the control unit to discharge the charging and discharging unit.

4. The BUCK converter control circuit according to claim 3, characterized in that, The first current source and the third current source are variable current sources, while the second current source is a fixed current source.

5. The BUCK converter control circuit according to claim 3, characterized in that, The control unit includes: a first switch and a second switch; the first switch is connected between the output terminal of the first current source and one end of the charging and discharging unit, and the second switch is connected between the output terminal of the third current source and ground.

6. The BUCK converter control circuit according to claim 3, characterized in that, The charging and discharging unit includes a resistor and a capacitor connected in parallel.

7. The BUCK converter control circuit according to claim 2, characterized in that, The AC signal extractor is a high-pass filter.

8. The BUCK converter control circuit according to claim 1, characterized in that, The compensation module includes an RC network connected in series between the output of the error amplifier and ground.

9. The BUCK converter control circuit according to claim 1, characterized in that, The control signal generation module includes: A comparator is used to compare the ramp signal and the error amplification signal, and output the comparison result; A timer is used to output timing signals. An RS flip-flop has the timing signal input at its R terminal, the comparison result input at its S terminal, and the switching control signal output at its Q terminal.

10. The BUCK converter control circuit according to any one of claims 1 to 9, characterized in that, The control circuit also includes: The feedback signal acquisition module is used to divide the output voltage signal of the BUCK converter to obtain the feedback voltage.

11. A DC-DC converter, characterized in that, include: The driving module, the BUCK converter, and the BUCK converter control circuit as described in any one of claims 1 to 9; The BUCK converter includes: a switching module and an energy storage module; The drive module is used to provide drive signals to the BUCK converter according to the switch control signal; The switching module is used to turn on or off according to the drive signal to control the on / off state of the input voltage; The energy storage module is used to store energy when the switch module is turned on, release energy when the switch module is turned off, and output the output voltage signal.

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