Boost module protection circuit of motor controller, motor controller and electric control system

Abstract

The invention discloses a boost module protection circuit of a motor controller, the motor controller and an electric control system. The boost module protection circuit comprises a short circuit judgment module which is configured to output a short circuit signal when a first signal input end receives a boost over-current signal, a second signal input end receives a boost module power device over-temperature signal, and a third signal input end receives a boost inductor over-temperature signal; the sub-control module is configured to generate a wave sealing control signal and a first control signal based on the short circuit signal, and the wave sealing control signal is used for controlling a PWM logic chip of the motor controller to stop outputting a PWM driving signal; and the interlocking fault processing module is configured to generate a high-voltage interlocking fault signal based on the first control signal. According to the boost module protection circuit provided by the embodiment of the invention, the high-voltage interlocking fault signal is generated in time when the boost module of the motor controller is short-circuited, so that the power battery assembly can cut off high-voltage energy input to the boost module in time according to the high-voltage interlocking fault signal.

Description

Technical Field

[0001] This application relates to the field of motor controllers, and in particular to a boost module protection circuit for a motor controller, a motor controller, and an electrical control system. Background Technology

[0002] With the rapid development of new energy vehicles, boost circuits will be added to improve vehicle performance and optimize energy utilization. By increasing the voltage, boost circuits can reduce the current at the same power, thereby reducing heat loss of wires and electrical components and improving the overall system efficiency.

[0003] In the power battery packs of new energy vehicles, the fuse specifications are selected based on all high-voltage components in the vehicle. However, for the motor controller, the fuse specifications in the power battery pack are too large. Therefore, in related technologies, when a short circuit occurs inside the boost module of the motor controller, the current during the short circuit cannot trigger the fuse in the power battery pack to blow in a short time. The energy of the power battery pack will continue to be discharged through the high-voltage circuit, which can easily cause the motor controller to burn out. Summary of the Invention

[0004] This application provides a boost module protection circuit for a motor controller, a motor controller, and an electronic control system. It can generate a blocking control signal and a high-voltage interlock fault signal in a timely manner when the boost module of the motor controller is short-circuited. This facilitates the PWM logic chip to stop outputting the PWM drive signal in a timely manner and the power battery pack to cut off the high-voltage energy input to the boost module in a timely manner according to the high-voltage interlock fault signal.

[0005] In a first aspect, embodiments of this application provide a boost module protection circuit for a motor controller, comprising: a short-circuit judgment module, including a first signal input terminal, a second signal input terminal, and a third signal input terminal, the short-circuit judgment module being configured to output a short-circuit signal when receiving a boost overcurrent signal at the first signal input terminal, an overtemperature signal of the boost module power device at the second signal input terminal, and an overtemperature signal of the boost inductor at the third signal input terminal; a sub-control module, electrically connected to the short-circuit judgment module, the sub-control module being configured to generate a blocking control signal and a first control signal based on the short-circuit signal, the blocking control signal being used to control the PWM logic chip of the motor controller to stop outputting PWM drive signals; and an interlock fault handling module, electrically connected to the sub-control module, the interlock fault handling module being configured to generate a high-voltage interlock fault signal based on the first control signal.

[0006] According to the aforementioned embodiments of the first aspect of this application, the sub-control module includes a fourth signal input terminal, a first signal output terminal, a second signal output terminal, and a first switching transistor. The first terminal of the first switching transistor is connected to the positive power supply voltage terminal, and the second terminal of the first switching transistor is connected to ground. The fourth signal input terminal is used to receive the short-circuit signal and is connected to the control terminal of the first switching transistor. The first signal output terminal is used to output the blocking control signal and is connected between the first terminal of the first switching transistor and the positive power supply voltage terminal. The second signal output terminal is used to output the first control signal and is connected between the second terminal of the first switching transistor and ground.

[0007] According to any of the foregoing embodiments of the first aspect of this application, the first switch is configured to be turned on when the level is high, and the short-circuit signal is a low-level signal; the sub-control module further includes a first resistor, a second resistor, a third resistor, and a first node, the first resistor is connected between the second terminal of the first switch and ground, the first node is located between the fourth signal input terminal and the control terminal of the first switch, the second resistor is connected between the positive power supply voltage terminal and the first node, and the third resistor is connected between the first node and ground.

[0008] According to any of the foregoing embodiments of the first aspect of this application, the sub-control module further includes a first capacitor, which is connected in parallel with the third resistor.

[0009] According to any of the foregoing embodiments of the first aspect of this application, the interlock fault handling module includes a detection circuit submodule and an interlock terminal detection submodule; the interlock terminal detection submodule is connected to a high-voltage interlock terminal disposed on the high-voltage input side of the motor controller, and the interlock terminal detection submodule is configured to generate a sub-interlock fault signal when an interlock abnormality is detected in the high-voltage interlock terminal; the detection circuit submodule is connected to the sub-control module and the interlock terminal detection submodule, and the detection circuit submodule is configured to generate the high-voltage interlock fault signal when at least one of the first control signal and the sub-interlock fault signal is received.

[0010] According to any of the foregoing embodiments of the first aspect of this application, the detection circuit submodule includes a second switching transistor, and the interlock fault handling module further includes a logic gate submodule. The input side of the logic gate submodule is connected to the sub-control module and the interlock terminal detection submodule, and the output side of the logic gate submodule is connected to the control terminal of the second switching transistor. The logic gate submodule is configured to control the second switching transistor to disconnect when it receives at least one of the first control signal and the sub-interlock fault signal. The detection circuit submodule is configured to generate the high-voltage interlock fault signal when the second switching transistor is disconnected.

[0011] According to any of the foregoing embodiments of the first aspect of this application, the second switch is configured to be turned on when the level is high, the logic gate submodule includes a first AND gate, the first control signal is a low-level signal, and the sub-interlock fault signal is a low-level signal.

[0012] According to any of the foregoing embodiments of the first aspect of this application, the detection circuit submodule further includes a detection unit, the detection unit including a first detection terminal and a second detection terminal, the first detection terminal being connected to a first terminal of the second switching transistor, the second detection terminal being connected to a second terminal of the second switching transistor, and the detection unit generating the high-voltage interlock fault signal when it detects that the circuit between the first detection terminal and the second detection terminal is broken.

[0013] According to any of the foregoing embodiments of the first aspect of this application, the short-circuit judgment module further includes a first input submodule, a second input submodule, a first OR gate, and a second OR gate; the first signal input terminal is connected to the first input terminal of the first OR gate via the first input submodule, the second signal input terminal is connected to the second input terminal of the first OR gate via the second input submodule; the output terminal of the first OR gate is connected to the first input terminal of the second OR gate, the third signal input terminal is connected to the second input terminal of the second OR gate, and the output terminal of the second OR gate is connected to the sub-control module.

[0014] According to any of the foregoing embodiments of the first aspect of this application, the first input submodule includes a second AND gate and a fourth resistor, the first signal input terminal is connected to the first input terminal of the second AND gate, the fourth resistor is connected between the positive power supply voltage terminal and the second input terminal of the second AND gate, and the output terminal of the second AND gate is connected to the first input terminal of the first OR gate; and / or the second input submodule includes a third AND gate and a fifth resistor, the second signal input terminal is connected to the first input terminal of the third AND gate, the fifth resistor is connected between the positive power supply voltage terminal and the second input terminal of the third AND gate, and the output terminal of the third AND gate is connected to the second input terminal of the first OR gate.

[0015] Secondly, embodiments of this application provide a motor controller, comprising: a boost module including a boost module power device and a boost inductor; a data sampling circuit for sampling the current of the boost module, sampling the temperature of the boost module power device, and sampling the temperature of the boost inductor; a PWM logic chip; and a boost module protection circuit for the motor controller according to any of the foregoing embodiments of the first aspect of this application, wherein the boost module protection circuit of the motor controller is connected to the data sampling circuit and the PWM logic chip.

[0016] Thirdly, embodiments of this application provide an electric vehicle electronic control system, which includes: a power battery assembly; and a boost module protection circuit for a motor controller according to any of the foregoing embodiments of the first aspect of this application, or a motor controller according to any of the foregoing embodiments of the second aspect of this application, wherein the interlock fault handling module is communicatively connected to the power battery assembly.

[0017] The boost module protection circuit of the motor controller according to an embodiment of this application includes a short-circuit judgment module, a sub-control module, and an interlock fault handling module. When the short-circuit judgment module determines that a short circuit has occurred in the boost module based on the boost overcurrent signal, the boost module power device overtemperature signal, and the boost inductor overtemperature signal, it outputs a short-circuit signal. The sub-control module can generate a blocking control signal and a first control signal based on the short-circuit signal, and the interlock fault handling module can generate a high-voltage interlock fault signal based on the first control signal. Therefore, when the boost module of the motor controller is short-circuited, the boost module protection circuit can generate a blocking control signal and a high-voltage interlock fault signal in a timely manner. On the one hand, the blocking control signal can be transmitted to the PWM logic chip of the motor controller, thereby controlling the PWM logic chip to stop outputting the PWM drive signal, causing the motor controller to stop working. On the other hand, the high-voltage interlock fault signal can be transmitted to the power battery pack, thereby controlling the power battery pack to cut off the high-voltage energy input to the boost module of the motor controller. That is, when the boost module of the motor controller is short-circuited, the boost module protection circuit can promptly generate signals to stop the motor controller from working and to cut off the high-voltage energy input to the power battery. At this time, the input capacitor of the boost module will not fail due to high temperature caused by the continued input of high-voltage energy, thus reducing the risk of motor controller burnout and minimizing continuous damage to the motor controller. Furthermore, this improves the overall safety of the new energy vehicle. In this embodiment, a high-voltage interlock fault signal can be generated when the boost module of the motor controller is short-circuited. The power battery pack can cut off the high-voltage energy input to the boost module based on the high-voltage interlock fault signal, solving the problem of motor controller burnout caused by the failure of the boost module to trigger the fuse in the power battery pack to blow in time when the boost module is short-circuited. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the structure of an embodiment of the motor controller of this application; Figure 2 This is a circuit diagram of the boost module in one embodiment of the motor controller of this application; Figure 3 This is a schematic diagram of the structure of an embodiment of the boost module protection circuit of the motor controller of this application; Figure 4 This is a circuit diagram of an embodiment of the boost module protection circuit of the motor controller of this application. Detailed Implementation

[0020] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0021] It should be noted that all directional indicators (such as up, down, left, right, front, back, etc.) in the embodiments of this application are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicator will also change accordingly.

[0022] Furthermore, the use of terms such as "first" and "second" in this application is for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. Additionally, the technical solutions of the various embodiments can be combined with each other, but only on the basis of being achievable by those skilled in the art. When the combination of technical solutions is contradictory or impossible to implement, such a combination of technical solutions should be considered non-existent and not within the scope of protection claimed in this application.

[0023] This application provides a boost module protection circuit for a motor controller and a motor controller. Figure 1This is a schematic diagram of the structure of an embodiment of the motor controller of this application. The motor controller 1000 includes a boost module 200, a data sampling circuit 300, a pulse width modulation (PWM) logic chip 400, and a boost module protection circuit 100 for the motor controller 1000.

[0024] Figure 2 This is a circuit diagram of a boost module in one embodiment of the motor controller of this application. The boost module 200 includes a boost module power device 210 and a boost inductor 220. The boost module power device 210 can be a power device commonly used in the art, such as an insulated gate bipolar transistor (IGBT). In some embodiments, the boost module 200 may also include an input capacitor CP1 and an output capacitor CP2. The input side of the boost module 200 is used to connect to the power battery assembly 2000, and the energy output from the power battery assembly 2000 enters the boost module 200 from the input side of the boost module 200.

[0025] like Figure 1 The data sampling circuit 300 is used to sample the current of the boost module 200, the temperature of the boost module power device 210, and the temperature of the boost inductor 220. In some embodiments, the data sampling circuit 300 includes a current sampling circuit, a first temperature sampling circuit, and a second temperature sampling circuit. The current sampling circuit is used to sample the current of the boost module 200. In one example, the boost module 200 includes a first bridge arm and a second bridge arm, and the current sampling circuit samples the current of the first bridge arm and the second bridge arm, respectively. The first temperature sampling circuit is used to sample the temperature of the boost module power device 210, and the second temperature sampling circuit is used to sample the temperature of the boost inductor 220.

[0026] In some embodiments, when the current in the boost module 200 exceeds a preset current threshold, i.e. when the boost module 200 is overcurrent, the current sampling circuit of the data sampling circuit 300 generates a boost overcurrent signal; when the current in the boost module 200 does not exceed the preset current threshold, i.e. when the current in the boost module 200 is normal, the current sampling circuit of the data sampling circuit 300 generates a boost current normal signal.

[0027] In some embodiments, when the temperature of the boost module power device 210 exceeds the first temperature threshold, i.e. when the boost module power device 210 is overheated, the first temperature sampling circuit of the data sampling circuit 300 generates an overheat signal for the boost module power device. When the temperature of the boost module power device 210 does not exceed the first temperature threshold, i.e. when the temperature of the boost module power device 210 is normal, the first temperature sampling circuit of the data sampling circuit 300 generates a normal temperature signal for the boost module power device.

[0028] In some embodiments, when the temperature of the boost inductor 220 exceeds the second temperature threshold, i.e. when the boost inductor 220 is overheated, the second temperature sampling circuit of the data sampling circuit 300 generates an overheat signal of the boost inductor; when the temperature of the boost inductor 220 does not exceed the second temperature threshold, i.e. when the temperature of the boost inductor 220 is normal, the second temperature sampling circuit of the data sampling circuit 300 generates a normal temperature signal of the boost inductor.

[0029] like Figure 1 The PWM logic chip 400 can output a PWM drive signal, which can be used to generate the power device drive signal in the motor controller 1000.

[0030] In the motor controller 1000 of this embodiment, the boost module protection circuit 100 of the motor controller 1000 can be the boost module protection circuit of the motor controller 1000 in any of the embodiments below.

[0031] Figure 3 This is a schematic diagram of an embodiment of the boost module protection circuit of the motor controller of this application. The boost module protection circuit 100 includes a short-circuit judgment module 110, a sub-control module 120, and an interlock fault handling module 130. The boost module protection circuit 100 of the motor controller 1000 is connected to the data sampling circuit 300 and the PWM logic chip 400.

[0032] like Figure 1 In some embodiments, the motor controller 1000 further includes a microcontroller 500 and a motor control module 600. A data sampling circuit 300 can be connected to the microcontroller 500, and a PWM logic chip 400 can be connected to the microcontroller 500. The motor control module 600 can be connected to the PWM logic chip 400. In one example, the motor control module 600 includes a generator control submodule and a motor control submodule.

[0033] like Figure 3In the boost module protection circuit 100 of this embodiment, the short-circuit judgment module 110 includes a first signal input terminal P1, a second signal input terminal P2, and a third signal input terminal P3. The short-circuit judgment module 110 is configured to output a short-circuit signal when the first signal input terminal P1 receives a boost overcurrent signal, the second signal input terminal P2 receives a boost module power device overtemperature signal, and the third signal input terminal P3 receives a boost inductor overtemperature signal, indicating that a short circuit has occurred in the boost module 200 at this time.

[0034] The sub-control module 120 is electrically connected to the short-circuit judgment module 110. The sub-control module 120 is configured to generate a blocking control signal and a first control signal based on the short-circuit signal. The blocking control signal is used to control the PWM logic chip 400 of the motor controller 1000 to stop outputting the PWM drive signal.

[0035] The interlock fault handling module 130 is electrically connected to the sub-control module 120. The interlock fault handling module 130 is configured to generate a high-voltage interlock fault signal based on a first control signal.

[0036] According to embodiments of this application, a motor controller 1000 and a boost module protection circuit 100 of the motor controller 1000 are provided. The boost module protection circuit 100 includes a short-circuit judgment module 110, a sub-control module 120, and an interlock fault handling module 130. When the short-circuit judgment module 110 determines that a short circuit has occurred in the boost module 200 based on the boost overcurrent signal, the boost module power device overtemperature signal, and the boost inductor overtemperature signal, it outputs a short-circuit signal. The sub-control module 120 can generate a blocking control signal and a first control signal based on the short-circuit signal, and the interlock fault handling module 130 can generate a high-voltage interlock fault signal based on the first control signal. Therefore, when the boost module 200 of the motor controller 1000 is short-circuited, the boost module protection circuit 100 can generate a blocking control signal and a high-voltage interlock fault signal in a timely manner. On the one hand, the blocking control signal can be transmitted to the PWM logic chip 400 of the motor controller 1000, thereby controlling the PWM logic chip 400 to stop outputting PWM drive signals, causing the motor controller 1000 to stop working. On the other hand, the high-voltage interlock fault signal can be transmitted to the power battery pack 2000, thereby controlling the power battery pack 2000 to cut off the high-voltage energy input to the boost module 200 of the motor controller 1000. That is, when the boost module 200 of the motor controller 1000 is short-circuited, the boost module protection circuit 100 can promptly generate signals to control the motor controller 1000 to stop working and signals to cut off the high-voltage energy input of the power battery. At this time, the input capacitor CP1 of the boost module 200 will not fail due to high temperature caused by the continued input of high-voltage energy, thus reducing the risk of burn-out of the motor controller 1000, reducing continuous damage to the motor controller 1000, and further improving the safety of the entire new energy vehicle. In this embodiment, a high-voltage interlock fault signal can be generated when the boost module 200 of the motor controller 1000 is short-circuited. The power battery pack 2000 can cut off the high-voltage energy input to the boost module 200 according to the high-voltage interlock fault signal, which can solve the problem that the motor controller 1000 is prone to burning due to the failure to trigger the fuse in the power battery pack 2000 to blow in time when the boost module 200 of the motor controller 1000 is short-circuited.

[0037] Figure 4This is a circuit diagram of an embodiment of the boost module protection circuit of the motor controller of this application. In some embodiments, the sub-control module 120 includes a fourth signal input terminal P4, a first signal output terminal K1, a second signal output terminal K2, and a first switching transistor Q1. The first terminal of the first switching transistor Q1 is connected to the positive power supply voltage terminal VCC, and the second terminal of the first switching transistor Q1 is connected to ground GND. The fourth signal input terminal P4 is used to receive a short-circuit signal and is connected to the control terminal of the first switching transistor Q1. The first signal output terminal K1 is used to output a blocking control signal and is connected between the first terminal of the first switching transistor Q1 and the positive power supply voltage terminal VCC. The second signal output terminal K2 is used to output a first control signal and is connected between the second terminal of the first switching transistor Q1 and ground GND.

[0038] In the above embodiment, the sub-control module 120 includes a first switching transistor Q1, which may be a metal-oxide-semiconductor field-effect transistor (MOSFET). A first signal output terminal K1 is connected between the first terminal of the first switching transistor Q1 and the positive power supply voltage terminal VCC, and a second signal output terminal K2 is connected between the second terminal of the first switching transistor Q1 and ground GND. By configuring the first switching transistor Q1, when a short-circuit signal is provided to the control terminal of the first switching transistor Q1, the first signal output terminal K1 on one side of the first switching transistor Q1 can output a blocking control signal, and the second signal output terminal K2 on the other side of the first switching transistor Q1 can output a first control signal. This first control signal is used to generate a high-voltage interlock fault signal. The fast response speed of the first switching transistor Q1 makes it faster to obtain the blocking control signal and the first control signal based on a single short-circuit signal, providing a basis for timely obtaining signals to stop the operation of the motor controller 1000 and signals to cut off the high-voltage energy input of the power battery.

[0039] In some embodiments, the first switch Q1 is configured to be turned on when the level is high; in one example, the first switch Q1 is an NMOS. The short-circuit signal is a low-level signal.

[0040] like Figure 4 In some embodiments, the control module 120 further includes a first resistor R1, a second resistor R2, a third resistor R3, and a first node N1. The first resistor R1 is connected between the second terminal of the first switch Q1 and ground GND. The first node N1 is located between the fourth signal input terminal P4 and the control terminal of the first switch Q1. The second resistor R2 is connected between the positive power supply voltage terminal VCC and the first node N1. The third resistor R3 is connected between the first node N1 and ground GND.

[0041] In this embodiment, the short-circuit judgment module 110 is configured to output a short-circuit signal when the first signal input terminal P1 receives a boost overcurrent signal, the second signal input terminal P2 receives a boost module power device overtemperature signal, and the third signal input terminal P3 receives a boost inductor overtemperature signal, indicating that the boost module 200 has a short circuit at this time. In some embodiments, the short-circuit judgment module 110 is further configured to output a no-short-circuit signal when the first signal input terminal P1 does not receive a boost overcurrent signal, and / or the second signal input terminal P2 does not receive a boost module power device overtemperature signal, and / or the third signal input terminal P3 does not receive a boost inductor overtemperature signal, indicating that the boost module 200 has not a short circuit at this time. Alternatively, in some embodiments, the short-circuit judgment module 110 is also configured to output a no-short-circuit signal when the first signal input terminal P1 receives a normal boost current signal, and / or the second signal input terminal P2 receives a normal boost module power device temperature signal, and / or the third signal input terminal P3 receives a normal boost inductor temperature signal, indicating that the boost module 200 has not generated a short circuit at this time.

[0042] In the above embodiment, the short-circuit signal is a low-level signal, and the non-short-circuit signal is a high-level signal. When the short-circuit judgment module 110 outputs a non-short-circuit signal, the first switch Q1 is turned on. At this time, the potential at the first signal output terminal K1 decreases, and a low-level enable signal can be output. The enable signal is used to control the PWM logic chip 400 to work normally.

[0043] In the above embodiment, by setting the first resistor R1 to provide a certain degree of voltage division, the stability of the first switch Q1's operation and the stability of the potential at the first signal output terminal K1 are ensured when the first switch Q1 is turned on. When the boost module 200 is not short-circuited, the short-circuit judgment module 110 outputs a no-short-circuit signal, that is, the fourth signal input terminal P4 of the sub-control module 120 receives the no-short-circuit signal. At this time, due to the setting of the second resistor R2 and the third resistor R3, a relatively stable voltage can be provided to the control terminal of the first switch Q1 when the first switch Q1 is in the turned-on state, thereby ensuring the stable conduction of the first switch Q1 when the boost module 200 is not short-circuited.

[0044] like Figure 4 In some embodiments, the sub-control module 120 further includes a first capacitor C1, which is connected in parallel with the third resistor R3. By setting the first capacitor C1, a more stable voltage can be provided to the control terminal of the first switching transistor Q1 when the boost module 200 is not short-circuited, thereby further ensuring the stable conduction of the first switching transistor Q1.

[0045] like Figure 4In some embodiments, the interlock fault handling module 130 includes a detection loop submodule 131 and an interlock terminal detection submodule 132. The interlock terminal detection submodule 132 is connected to a high-voltage interlock terminal located on the high-voltage input side of the motor controller 1000, and is configured to generate a sub-interlock fault signal when an interlocking abnormality is detected at the high-voltage interlock terminal. The detection loop submodule 131 is connected to the sub-control module 120 and the interlock terminal detection submodule 132, and is configured to generate a high-voltage interlock fault signal upon receiving at least one of a first control signal and a sub-interlock fault signal.

[0046] In the above embodiment, the interlock fault handling module 130 includes an interlock terminal detection submodule 132, which is connected to the high-voltage interlock terminal located on the high-voltage input side of the motor controller 1000. Therefore, when an interlock abnormality is detected at the high-voltage interlock terminal, and / or when the boost module 200 of the motor controller 1000 is short-circuited, the detection circuit submodule 131 will generate a high-voltage interlock fault signal. The power battery pack 2000 can cut off the high-voltage energy input to the motor controller 1000 according to the high-voltage interlock fault signal, thereby providing protection for the motor controller 1000 under more fault conditions.

[0047] like Figure 4 In some embodiments, the detection circuit submodule 131 includes a second switch Q2, and the interlock fault handling module 130 also includes a logic gate submodule 133. The input side of the logic gate submodule 133 is connected to the sub-control module 120 and the interlock terminal detection submodule 132, and the output side of the logic gate submodule 133 is connected to the control terminal of the second switch Q2.

[0048] In some embodiments, the logic gate submodule 133 is configured to control the second switch Q2 to disconnect when it receives at least one of a first control signal and a sub-interlock fault signal; the detection circuit submodule 131 is configured to generate a high-voltage interlock fault signal when the second switch Q2 is disconnected.

[0049] In some embodiments, the second switch Q2 is configured to be turned on when the level is high, the logic gate submodule 133 includes a first AND gate U1, the first control signal is a low-level signal, and the sub-interlock fault signal is a low-level signal.

[0050] like Figure 4In some embodiments, the detection circuit submodule 131 further includes a detection unit 1311, which includes a first detection terminal HVIL+ and a second detection terminal HVIL-. The first detection terminal HVIL+ is connected to the first terminal of the second switching transistor Q2, and the second detection terminal HVIL- is connected to the second terminal of the second switching transistor Q2. The detection unit 1311 generates a high-voltage interlock fault signal when it detects that the circuit between the first detection terminal HVIL+ and the second detection terminal HVIL- is broken.

[0051] In some embodiments, the detection circuit submodule 131 further includes a sixth resistor R6, which is connected between the positive power supply voltage terminal VCC and the first terminal of the second switch Q2, and the first detection terminal HVIL+ is connected between the sixth resistor R6 and the first terminal of the second switch Q2.

[0052] In the above embodiments, the sub-control module 120 is configured to generate a blocking control signal and a first control signal based on a short-circuit signal. In some embodiments, the sub-control module 120 is configured to generate an enable signal and a second control signal based on a non-short-circuit signal. The first control signal or the second control signal can be transmitted to the first input terminal of the first AND gate U1. In one example, the first control signal is a low-level signal and the second control signal is a high-level signal. In the above embodiments, the interlock terminal detection sub-module 132 is configured to generate a sub-interlock fault signal when an interlocking abnormality is detected at the high-voltage interlock terminal. In some embodiments, the interlock terminal detection sub-module 132 is configured to generate a sub-interlock normal signal when no interlocking abnormality is detected at the high-voltage interlock terminal. The sub-interlock fault signal or the sub-interlock normal signal can be transmitted to the second input terminal of the first AND gate U1. In one example, the sub-interlock fault signal is a low-level signal and the sub-interlock normal signal is a high-level signal. Therefore, when the first AND gate U1 receives the second control signal and the sub-interlock normal signal, the first AND gate U1 outputs a high level, causing the second switch Q2 to conduct. At this time, the detection circuit submodule 131 generates a high-voltage interlock normal signal. When the first AND gate U1 receives at least one of the first control signal and the sub-interlock fault signal, the first AND gate U1 outputs a low level, causing the second switch Q2 to turn off. At this time, the detection circuit submodule 131 generates a high-voltage interlock fault signal. For example, when the first AND gate U1 receives the first control signal and the sub-interlock normal signal, the first AND gate U1 outputs a low level, causing the second switch Q2 to turn off, and the detection circuit submodule 131 generates a high-voltage interlock fault signal.

[0053] like Figure 4In some embodiments, the short-circuit detection module 110 further includes a first input submodule 111, a second input submodule 112, a first OR gate U2, and a second OR gate U3. The first signal input terminal P1 is connected to the first input terminal of the first OR gate U2 via the first input submodule 111, and the second signal input terminal P2 is connected to the second input terminal of the first OR gate U2 via the second input submodule 112. The output terminal of the first OR gate U2 is connected to the first input terminal of the second OR gate U3, the third signal input terminal P3 is connected to the second input terminal of the second OR gate U3, and the output terminal of the second OR gate U3 is connected to the sub-control module 120.

[0054] like Figure 4 In some embodiments, the first input submodule 111 includes a second AND gate U4 and a fourth resistor R4. The first signal input terminal P1 is connected to the first input terminal of the second AND gate U4, the fourth resistor R4 is connected between the positive power supply voltage terminal VCC and the second input terminal of the second AND gate U4, and the output terminal of the second AND gate U4 is connected to the first input terminal of the first OR gate U2.

[0055] like Figure 4 In some embodiments, the second input submodule 112 includes a third AND gate U5 and a fifth resistor R5. The second signal input terminal P2 is connected to the first input terminal of the third AND gate U5, the fifth resistor R5 is connected between the positive power supply voltage terminal VCC and the second input terminal of the third AND gate U5, and the output terminal of the third AND gate U5 is connected to the second input terminal of the first OR gate U2.

[0056] The following will combine Figure 4 The signal processing of the boost module protection circuit 100 when a short circuit occurs in the boost module 200 of the motor controller 1000 is explained.

[0057] In the above embodiment, the first switch Q1 and the second switch Q2 are configured to be turned on when the voltage level is high. The boost overcurrent signal, the boost module power device overtemperature signal, and the boost inductor overtemperature signal are all low-level signals. When a short circuit occurs in the boost module 200 of the motor controller 1000, since the boost overcurrent signal is low, the second AND gate U4 outputs a low level; since the boost module power device overtemperature signal is low, the third AND gate U5 outputs a low level. At this time, the first OR gate U2 outputs a low level. Since the first OR gate U2 outputs a low level and the boost inductor overtemperature signal is low, the second OR gate U3 outputs a low level, that is, the second OR gate U3 outputs a short-circuit signal. When the second OR gate U3 outputs a low level (short-circuit signal), the first switch Q1 is in the off state. At this time, the first signal output terminal K1 outputs a high-level blocking control signal, and the second signal output terminal K2 outputs a low-level first control signal. The blocking control signal controls the PWM logic chip 400 of the motor controller 1000 to stop outputting PWM drive signals. The first control signal is transmitted to the interlock fault handling module 130. When the interlock terminal detection submodule 132 detects no interlock abnormality at the high-voltage interlock terminal, it generates a sub-interlock normal signal, which is a high-level signal. Since the first AND gate U1 receives a low-level signal (the first control signal), the first AND gate U1 outputs a low level. At this time, the second switch Q2 is turned off. The detection unit 1311 detects that the circuit between the first detection terminal HVIL+ and the second detection terminal HVIL- is broken, and the detection unit 1311 generates a high-voltage interlock fault signal. The high-voltage interlock fault signal controls the power battery pack 2000 to cut off the high-voltage energy input to the boost module 200 of the motor controller 1000.

[0058] In the above embodiment, when the boost module 200 of the motor controller 1000 is short-circuited, the boost module protection circuit 100 can generate a blocking control signal and a high-voltage interlock fault signal. The power battery pack 2000 can cut off the high-voltage energy input to the boost module 200 according to the high-voltage interlock fault signal, which can solve the problem that the short circuit of the boost module 200 of the motor controller 1000 can not trigger the fuse in the power battery pack 2000 to blow in time, which can easily cause the motor controller 1000 to burn out.

[0059] This application also provides an electric vehicle electronic control system, which includes a power battery pack 2000 and a boost module protection circuit 100 of the motor controller 1000 of any of the foregoing embodiments.

[0060] This application also provides an electric vehicle electronic control system, which includes a power battery pack 2000 and a motor controller 1000 of any of the foregoing embodiments. The motor controller 1000 includes a boost module 200, a data sampling circuit 300, a PWM logic chip 400, and a boost module protection circuit 100 of the motor controller 1000, wherein the boost module protection circuit 100 is the boost module protection circuit 100 of the motor controller 1000 of any of the foregoing embodiments.

[0061] The boost module protection circuit 100 includes a short-circuit detection module 110, a sub-control module 120, and an interlock fault handling module 130. The short-circuit detection module 110 includes a first signal input terminal P1, a second signal input terminal P2, and a third signal input terminal P3. The short-circuit detection module 110 is configured to output a short-circuit signal when the first signal input terminal P1 receives a boost overcurrent signal, the second signal input terminal P2 receives a boost module power device overtemperature signal, and the third signal input terminal P3 receives a boost inductor overtemperature signal, indicating that a short circuit has occurred in the boost module 200. The sub-control module 120 is electrically connected to the short-circuit detection module 110. The sub-control module 120 is configured to generate a blocking control signal and a first control signal based on the short-circuit signal. The blocking control signal is used to control the PWM logic chip 400 of the motor controller 1000 to stop outputting PWM drive signals. The interlock fault handling module 130 is electrically connected to the sub-control module 120. The interlock fault handling module 130 is configured to generate a high-voltage interlock fault signal based on the first control signal.

[0062] In the electric vehicle electronic control system of the above embodiment, the interlock fault handling module 130 is communicatively connected to the power battery pack 2000.

[0063] According to an embodiment of this application, the electric vehicle electronic control system includes a boost module protection circuit 100 of a motor controller 1000. The boost module protection circuit 100 includes a short-circuit judgment module 110, a sub-control module 120, and an interlock fault handling module 130. When the short-circuit judgment module 110 determines that a short circuit has occurred in the boost module 200 based on the boost overcurrent signal, the boost module power device overtemperature signal, and the boost inductor overtemperature signal, it outputs a short-circuit signal. The sub-control module 120 can generate a blocking control signal and a first control signal based on the short-circuit signal, and the interlock fault handling module 130 can generate a high-voltage interlock fault signal based on the first control signal. Therefore, when the boost module 200 of the motor controller 1000 is short-circuited, the boost module protection circuit 100 can generate a blocking control signal and a high-voltage interlock fault signal in a timely manner. On the one hand, the blocking control signal can be transmitted to the PWM logic chip 400 of the motor controller 1000, thereby controlling the PWM logic chip 400 to stop outputting PWM drive signals, causing the motor controller 1000 to stop working. On the other hand, the high-voltage interlock fault signal can be transmitted to the power battery pack 2000, thereby controlling the power battery pack 2000 to cut off the high-voltage energy input to the boost module 200 of the motor controller 1000. That is, when the boost module 200 of the motor controller 1000 is short-circuited, the boost module protection circuit 100 can promptly generate signals to control the motor controller 1000 to stop working and signals to cut off the high-voltage energy input of the power battery. At this time, the input capacitor CP1 of the boost module 200 will not fail due to high temperature caused by the continued input of high-voltage energy, thus reducing the risk of burn-out of the motor controller 1000, reducing continuous damage to the motor controller 1000, and further improving the safety of the entire new energy vehicle. In this embodiment, a high-voltage interlock fault signal can be generated when the boost module 200 of the motor controller 1000 is short-circuited. The power battery pack 2000 can cut off the high-voltage energy input to the boost module 200 according to the high-voltage interlock fault signal, which can solve the problem that the motor controller 1000 is prone to burning due to the failure to trigger the fuse in the power battery pack 2000 to blow in time when the boost module 200 of the motor controller 1000 is short-circuited.

[0064] This application is not limited to the specific configurations and processes described above and shown in the figures. For the sake of brevity, detailed descriptions of known methods are omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of this application is not limited to the specific steps described and shown. Those skilled in the art can make various changes, modifications, and additions, or change the order of steps, after understanding the spirit of this application.

[0065] The above description is merely a specific implementation of this application. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, modules, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here. It should be understood that the protection scope of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the protection scope of this application.

Claims

1. A protection circuit for a boost module of a motor controller, characterized in that, include: The short-circuit detection module includes a first signal input terminal, a second signal input terminal, and a third signal input terminal. The short-circuit detection module is configured to output a short-circuit signal when the first signal input terminal receives a boost overcurrent signal, the second signal input terminal receives a boost module power device overtemperature signal, and the third signal input terminal receives a boost inductor overtemperature signal. The sub-control module is electrically connected to the short-circuit judgment module. The sub-control module is configured to generate a blocking control signal and a first control signal based on the short-circuit signal. The blocking control signal is used to control the PWM logic chip of the motor controller to stop outputting the PWM drive signal. An interlock fault handling module is electrically connected to the sub-control module, and the interlock fault handling module is configured to generate a high-voltage interlock fault signal based on the first control signal.

2. The boost module protection circuit of the motor controller as described in claim 1, characterized in that, The sub-control module includes a fourth signal input terminal, a first signal output terminal, a second signal output terminal, and a first switching transistor. The first terminal of the first switching transistor is connected to the positive power supply voltage terminal, and the second terminal of the first switching transistor is connected to ground. The fourth signal input terminal is used to receive the short-circuit signal and is connected to the control terminal of the first switching transistor. The first signal output terminal is used to output the blocking control signal and is connected between the first terminal of the first switching transistor and the positive power supply voltage terminal. The second signal output terminal is used to output the first control signal and is connected between the second terminal of the first switching transistor and ground.

3. The boost module protection circuit of the motor controller as described in claim 2, characterized in that, The first switch is configured to be turned on when the level is high, and the short-circuit signal is a low-level signal; The sub-control module further includes a first resistor, a second resistor, a third resistor, and a first node. The first resistor is connected between the second terminal of the first switching transistor and ground. The first node is located between the fourth signal input terminal and the control terminal of the first switching transistor. The second resistor is connected between the positive power supply voltage terminal and the first node. The third resistor is connected between the first node and ground.

4. The boost module protection circuit of the motor controller as described in claim 3, characterized in that, The sub-control module also includes a first capacitor, which is connected in parallel with the third resistor.

5. The boost module protection circuit of the motor controller as described in claim 1, characterized in that, The interlock fault handling module includes a detection circuit submodule and an interlock terminal detection submodule. The interlock terminal detection submodule is connected to the high-voltage interlock terminal located on the high-voltage input side of the motor controller. The interlock terminal detection submodule is configured to generate a sub-interlock fault signal when an interlock abnormality is detected in the high-voltage interlock terminal. The detection circuit submodule is connected to the sub-control module and the interlock terminal detection submodule. The detection circuit submodule is configured to generate the high-voltage interlock fault signal when it receives at least one of the first control signal and the sub-interlock fault signal.

6. The boost module protection circuit of the motor controller as described in claim 5, characterized in that, The detection circuit submodule includes a second switching transistor, and the interlock fault handling module also includes a logic gate submodule. The input side of the logic gate submodule is connected to the sub-control module and the interlock terminal detection submodule, and the output side of the logic gate submodule is connected to the control terminal of the second switching transistor. The logic gate submodule is configured to control the second switch to disconnect when it receives at least one of the first control signal and the sub-interlock fault signal. The detection circuit submodule is configured to generate the high-voltage interlock fault signal when the second switch is disconnected.

7. The boost module protection circuit of the motor controller as described in claim 6, characterized in that, The second switch is configured to be turned on when the level is high, the logic gate submodule includes a first AND gate, the first control signal is a low-level signal, and the sub-interlock fault signal is a low-level signal.

8. The boost module protection circuit of the motor controller as described in claim 6, characterized in that, The detection circuit submodule further includes a detection unit, which includes a first detection terminal and a second detection terminal. The first detection terminal is connected to the first terminal of the second switching transistor, and the second detection terminal is connected to the second terminal of the second switching transistor. The detection unit generates the high-voltage interlock fault signal when it detects that the circuit between the first detection terminal and the second detection terminal is broken.

9. The boost module protection circuit of the motor controller as described in claim 1, characterized in that, The short-circuit detection module further includes a first input submodule, a second input submodule, a first OR gate, and a second OR gate; The first signal input terminal is connected to the first input terminal of the first OR gate via the first input submodule, and the second signal input terminal is connected to the second input terminal of the first OR gate via the second input submodule; The output of the first OR gate is connected to the first input of the second OR gate, the third signal input is connected to the second input of the second OR gate, and the output of the second OR gate is connected to the sub-control module.

10. The boost module protection circuit of the motor controller as described in claim 9, characterized in that, The first input submodule includes a second AND gate and a fourth resistor. The first signal input terminal is connected to the first input terminal of the second AND gate. The fourth resistor is connected between the positive power supply voltage terminal and the second input terminal of the second AND gate. The output terminal of the second AND gate is connected to the first input terminal of the first OR gate; and / or The second input submodule includes a third AND gate and a fifth resistor. The second signal input terminal is connected to the first input terminal of the third AND gate. The fifth resistor is connected between the positive power supply voltage terminal and the second input terminal of the third AND gate. The output terminal of the third AND gate is connected to the second input terminal of the first OR gate.

11. A motor controller, characterized in that, include: Boost module, including boost module power devices and boost inductor; The data sampling circuit is used to sample the current of the boost module, sample the temperature of the power devices of the boost module, and sample the temperature of the boost inductor. PWM logic chip; as well as The boost module protection circuit of the motor controller as described in any one of claims 1 to 10, wherein the boost module protection circuit of the motor controller is connected to the data sampling circuit and the PWM logic chip.

12. An electric vehicle electronic control system, characterized in that, include: Power battery components; as well as The boost module protection circuit of the motor controller as described in any one of claims 1 to 10, or the motor controller as described in claim 11, wherein the interlock fault handling module is communicatively connected to the power battery assembly.

Images