A front-end fault degradation control architecture for an inverter system

Abstract

The application discloses a front-stage fault degradation control architecture of an inverter system, comprising an automatic bypass device and a single-stage control loop; the automatic bypass device bypasses a switch tube of a DC / DC converter when detecting a fault of the switch tube, so that the DC / DC converter is degraded into a low-resistance passage; and the single-stage control loop is used for controlling the DC / AC converter to perform MPPT control, bus voltage control and grid-connected power control when the DC / DC converter is degraded into the low-resistance passage. The application has the beneficial effects that when the front-stage DC / DC converter fails, the whole machine does not need to be stopped, and the single-stage operation can be automatically bypassed and degraded within tens of milliseconds, so that the system availability and power generation income are significantly improved.

Description

Technical Field

[0001] This application relates to the field of new energy power generation technology, and in particular to a front-end fault degradation control architecture for an inverter system. Background Technology

[0002] In existing technologies, string photovoltaic inverter systems mostly adopt a two-stage power conversion architecture; for example Figure 1 As shown, the front-end uses a DC / DC converter to perform maximum power point tracking (MPPT) control of the photovoltaic array; the back-end uses a DC / AC converter to control the DC bus voltage and grid-connected power, achieving synchronization with the grid and converting DC power into AC power output.

[0003] However, existing two-stage power conversion architectures have the following drawbacks when used:

[0004] (1) When the power devices (IGBT, MOSFET, etc.) in the current stage DC / DC converter have an open circuit or short circuit fault, the system will shut down immediately to prevent further damage, resulting in power generation interruption.

[0005] (2) Existing string inverters rarely consider the power supply mode after a failure of the upstream stage in their design, which causes the equipment to be unable to maintain power generation operation when some functions are lost.

[0006] (3) For remote areas or unattended power plants, maintenance delays may result in shutdowns lasting from several hours to several days, causing significant power generation losses and economic losses. Summary of the Invention

[0007] One objective of this application is to provide a front-end fault degradation control architecture for an inverter system that can address at least one of the deficiencies in the aforementioned background art.

[0008] To achieve at least one of the above objectives, the technical solution adopted in this application is as follows: a front-stage fault degradation control architecture for an inverter system, the inverter system including a front-stage DC / DC converter and a rear-stage DC / AC converter; the front-stage fault degradation architecture includes an automatic bypass device and a single-stage control loop; the automatic bypass device is disposed in the DC / DC converter and performs fault detection on the switching transistors disposed in the DC / DC converter; when a fault is detected in the switching transistor, the automatic bypass device bypasses the switching transistor, thereby degrading the DC / DC converter into a low-impedance path; the single-stage control loop is used to control the DC / AC converter to perform MPPT tracking, bus voltage control, and grid-connected power control when the DC / DC converter degrades into a low-impedance path.

[0009] Preferably, if the switching transistor is connected in parallel to the positive and negative busbars to form the switching branch, the automatic bypass device is connected in series to the first switching branch; the automatic bypass device is adapted to disconnect the first switching branch when the switching transistor fails; if the switching transistor is connected in series to the busbars to form the second switching branch, the automatic bypass device is connected in parallel to the second switching branch; the automatic bypass device is adapted to short-circuit the switching transistor when the switching transistor fails.

[0010] Preferably, the automatic bypass device includes a detection module, a drive circuit, and a bypass switch; the detection module is used to collect electrical parameters of the switching branch where the switching transistor is installed, and to determine the fault of the switching transistor based on the collected data; the drive circuit is communicatively connected to the detection module, and the drive circuit is adapted to generate a drive signal according to the fault determination result of the detection module; the bypass switch is installed in the switching branch and controlled by the drive circuit, and the bypass switch is closed or opened according to the drive signal of the drive circuit, thereby bypassing the faulty switching transistor.

[0011] Preferably, the automatic bypass device is adapted to continuously sample the branch voltage of the switching branch where the switching transistor is installed; if the branch voltage remains less than a threshold V for a continuous time T. th1 If the switching transistor is determined to have a short circuit fault, and the branch voltage remains greater than the threshold voltage V for a continuous time T. th2 The switch is determined to have an open-circuit fault; wherein the continuous time T is greater than one PWM switching cycle, and the threshold V... th1 Less than threshold V th2 .

[0012] Preferably, the single-stage control loop includes an MPPT loop, a voltage loop, and a current loop; the MPPT loop generates a terminal voltage reference value based on the generator unit terminal voltage, output current, and bus voltage, and performs limiting control; the voltage loop performs power control based on the terminal voltage reference value output by the MPPT loop; the current loop performs rapid adjustment of the output current based on the current reference value output by the voltage loop. The design bandwidth of the current loop is ω. i The design bandwidth of the voltage loop is ω v The design bandwidth of the MPPT ring is ω MPPT The specific possible values ​​are: .

[0013] Preferably, when the inverter system has one DC / DC converter and a switching transistor failure occurs, the MPPT loop includes a downlink limiting unit, an MPPT controller, and a limiting unit. The downlink limiting unit calculates the safe conduction voltage in real time based on the bus voltage and the generator unit terminal voltage and sends it to the MPPT controller. The MPPT controller calculates the terminal voltage reference value based on the generator unit terminal voltage and the output current, and prohibits the downward adjustment of the terminal voltage reference value when the safe conduction voltage is less than a set threshold range. The limiting unit is used to limit the terminal voltage reference value output by the MPPT controller, with the upper limit being the highest bus voltage and the lower limit being the lowest bus voltage required to meet grid connection requirements.

[0014] Preferably, when the inverter system has multiple DC / DC converters, but only one DC / DC converter experiences a switching transistor failure, the MPPT loop includes a downlink limiting unit, an MPPT controller, and a limiting unit. The downlink limiting unit calculates the safe conduction voltage in real time based on the bus voltage and the generator unit terminal voltage and sends it to the MPPT controller. The MPPT controller calculates the terminal voltage reference value based on the generator unit terminal voltage and the output current, and prohibits the downward adjustment of the terminal voltage reference value when the safe conduction voltage is less than a set threshold range. The limiting unit is used to limit the terminal voltage reference value output by the MPPT controller, with the upper limit being the highest bus voltage and the lower limit being v. PV_min The calculation formula is:

[0015] ;

[0016] Among them, v bus_min This indicates the minimum bus voltage required for grid connection. ΔV represents the reference terminal voltage calculated by the MPPT loop of the j-th DC / DC converter in the normal path. MPPT This indicates the set stability threshold.

[0017] Preferably, when the inverter system has multiple DC / DC converters, and at least two of the DC / DC converters experience switching transistor failures, the MPPT loop includes a summing unit, a multi-channel integrated MPPT controller, and a limiting unit. The summing unit is used to sum the output currents of the generator units in all faulty circuits and send them to the multi-channel integrated MPPT controller. The multi-channel integrated MPPT controller calculates a bus voltage reference value based on the sum of the output currents of the generator units in the faulty circuits and the bus voltage. The limiting unit is used to limit the bus voltage reference value output by the multi-channel integrated MPPT controller, with the upper limit being the highest bus voltage and the lower limit being v. PV_min The calculation formula is:

[0018] ;

[0019] Among them, v bus_min This indicates the minimum bus voltage required for grid connection. ΔV represents the reference terminal voltage calculated by the MPPT loop of the j-th DC / DC converter in the normal path. MPPT This indicates the set stability threshold; the bandwidth of the MPPT loop is less than the bandwidth corresponding to the MPPT loop of the DC / DC converter in the normal path.

[0020] Preferably, for the lower limit v of the amplitude limit PV_min The update uses the following latching mechanism: when the bus voltage v bus >v PV_min_last Only when +H is applied will the lower limit of the amplitude be re-applied (v). PV_min Otherwise, maintain the previous calculation's lower limit v. PV_min_last Where H represents the safety margin.

[0021] Preferably, when only one DC / DC converter in the inverter system experiences a switching transistor failure, the voltage loop includes a terminal voltage branch loop, a bus voltage droop branch loop, and a comparator unit; the terminal voltage branch loop compares the generator unit terminal voltage with the terminal voltage reference value v output by the MPPT loop. PV * Comparison to generate a reference value for the d-axis component of the output current i d_PV *; The bus voltage drooping branch is connected to the bus voltage v bus and bus voltage reference value v bus *Reference value for the d-axis component of the bus current i d_bus * Calculation; the comparison unit will use the reference value i d_PV * and i d_bus The maximum value in * is sent to the current loop as a reference value for the d-axis component of the current; reference value i d_bus The formula for calculating * is:

[0022] ;

[0023] ;

[0024] ;

[0025] Where, k droop V represents the droop coefficient. D γ represents the forward voltage drop of the diode in the DC / DC converter, γ represents the grid connection coefficient, and C represents the grid connection voltage drop. bus This indicates the capacitance value of the bus capacitor, V. g Δt represents the magnitude of the grid voltage, and Δt represents the time allowed for the bus voltage to recover.

[0026] Compared with the prior art, the beneficial effects of this application are as follows:

[0027] When the front-end DC / DC converter fails, there is no need to shut down the entire machine. It can automatically bypass and degrade to single-stage operation within tens of milliseconds, which significantly improves system availability and power generation revenue. Moreover, the bypass switching hardware structure is simple and can be adapted to various DC / DC topologies. Attached Figure Description

[0028] Figure 1 This is a schematic diagram of the architecture and control loop of an existing string photovoltaic inverter system.

[0029] Figure 2 This is a schematic diagram of the automatic bypass device of this application installed in the Boost circuit.

[0030] Figure 3 This is a schematic diagram of the automatic bypass device installed in a three-level Boost circuit in this application.

[0031] Figure 4 This is a schematic diagram of the automatic bypass device installed in the Buck circuit in this application.

[0032] Figure 5 This is a schematic diagram of the automatic bypass device in this application.

[0033] Figure 6 A schematic diagram of the scenario and control loop in which a DC / DC converter is set up in the inverter system of this application and a fault occurs.

[0034] Figure 7 This is a schematic diagram illustrating a scenario where the inverter system of this application is equipped with multiple DC / DC converters, but only one of them fails.

[0035] Figure 8 For this application Figure 7 A schematic diagram of the improved MPPT loop structure for the control loop in the scenario shown.

[0036] Figure 9 A schematic diagram illustrating a scenario in which the inverter system of this application is equipped with multiple DC / DC converters and some of them fail.

[0037] Figure 10 For this application Figure 9 A schematic diagram of the control loop structure for the scenario shown.

[0038] In the figure: automatic bypass device 100, detection module 110, drive circuit 120, bypass switch 130. Detailed Implementation

[0039] The present application will now be further described in conjunction with specific embodiments. It should be noted that, in the description of this specification, the use of terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicates that the specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms should not be construed as necessarily referring to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0040] In the description of this application, it should be noted that the terms "center", "lateral", "longitudinal", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc., which indicate the orientation and positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and should not be construed as limiting the specific protection scope of this application.

[0041] It should be noted that the terms "first," "second," etc., in the specification and claims of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0042] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0043] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0044] The terms “comprising” and “having”, and any variations thereof, in the specification and claims of this application are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units that are explicitly listed, but may include other steps or units that are not explicitly listed or that are inherent to such process, method, product, or device.

[0045] To facilitate understanding of the technical solution of this application, the specific control process of the inverter system using a two-stage power conversion architecture will be described in detail below; there are various types of inverter systems, and the string photovoltaic inverter system will be used as an example below.

[0046] like Figure 1 As shown, the inverter system includes a front-end DC / DC converter and a rear-end DC / AC converter. The input side of the DC / DC converter is connected to the photovoltaic string, which serves as the power generation unit, and the output side of the DC / AC converter is connected to the power grid. During normal operation of the inverter system, the control loop of the DC / DC converter can control it to perform MPPT tracking, and the control loop of the DC / AC converter can control it to perform bus voltage control and grid-connected power control, etc. For ease of understanding, the specific control processes of the DC / DC converter and the DC / AC converter's control loop under normal operating conditions are described in detail below.

[0047] For DC / DC converters in the normal operating state of an inverter system, such as Figure 1 As shown, its control loop includes an MPPT loop, a voltage loop, a current loop, and a PWM generation module. The voltage value v output by the photovoltaic string is... PV and current value i PV The data is fed into the MPPT loop, and then the corresponding MPPT algorithm can provide the corresponding voltage reference value v. PV * Voltage reference value V PV *In the voltage loop, with voltage value v PV By comparing, the corresponding current reference value i can be obtained. PV * Current reference value i PV * In the current loop, with current value i PV By comparing, the corresponding duty cycle d can be obtained. DC / DC Duty cycle d DC / DC The PWM generation module can generate control signals (PWM) to control the DC / DC converter. DC / DC .

[0048] For DC / AC converters in the normal operating state of an inverter system, such as Figure 1 As shown, its control loop includes a phase-locked loop, a bus voltage loop, an AC current loop, an abc→dq conversion unit, a dq→abc conversion unit, and a PWM generation module. The grid voltage v... ga v gb v gc As the input to the phase-locked loop (PLL), the grid voltage frequency ω is obtained after passing through the PLL. Then, the grid voltage frequency ω is integrated to obtain the phase θ. g Simultaneously, the three-phase current i on the AC side of the DC / AC converter... a i b i c Transformed into i via the abc→dq transformation unit d i q i0, grid voltage v ga v gb v gc Transformed into v via the abc→dq transformation unit d v q v0. Where i d and v d The d-axis components of current and voltage are respectively, i q and v q These are the q-axis components of current and voltage, respectively, with i0 and v0 injected in 0-sequence. The reference value of the bus voltage v is... bus * As the input of the bus voltage loop, it is related to the bus voltage v. bus Error calculations are performed, and the results are fed into the PI controller. The output of the PI controller serves as the active power reference value i for the AC current loop. d * The current d-axis component i obtained by dq transformation d Error calculation is performed, and the result is sent to the PI controller to output the active power reference value v. d * The reactive power reference value i of the AC current loop q* The current q-axis component i obtained by dq transformation q Error calculation is performed, and the result is sent to the PI controller to output the reactive power reference value v. q * The voltage d-axis component v obtained by dq transformation d and voltage q-axis component v q The active voltage reference value v obtained from the AC current loop output is compared with the voltage reference value v. d * and voltage reactive power reference value v q * Perform feedforward. The two feedforward results, along with the zero-order injection, are converted into a duty cycle d using the dq→abc transformation unit. DC / AC The signal is fed into the PWM generation module, which then outputs the corresponding control signal PWM for the DC / AC converter. DC / AC .

[0049] One preferred embodiment of this application, such as Figure 2 and Figure 6 As shown, a front-end fault degradation control architecture for an inverter system includes an automatic bypass device 100 and a single-stage control loop. The automatic bypass device 100 is located in the DC / DC converter and performs fault detection on the switching transistors connected to the DC / DC converter. When a switching transistor fault is detected, the automatic bypass device 100 bypasses the switching transistor, thereby degrading the DC / DC converter into a low-impedance path. The single-stage control loop is used to control the DC / AC converter to perform MPPT tracking, bus voltage control, and grid-connected power control when the DC / DC converter degrades into a low-impedance path.

[0050] Understandably, when the inverter system is operating normally, its control loop employs a two-stage control loop, comprising a front-end control loop controlling the DC / DC converter and a rear-end control loop controlling the DC / AC converter. The specific control processes of the front-end and rear-end control loops can be found above. However, in the traditional control method of inverter systems, if the switching transistor of the front-end DC / DC converter fails, the corresponding front-end control loop will be unable to operate. In this case, the entire inverter system needs to be shut down to ensure the safety of other components within the inverter system.

[0051] In the technical solution of this application, when the switching transistor of the current-stage DC / DC converter fails, the faulty switching transistor can be bypassed by the automatic bypass device 100. At this time, the DC / DC converter will no longer perform MPPT control, and will instead act as a low-impedance path to directly connect the downstream DC / AC converter to the power generation unit, allowing the inverter system to perform single-stage operation in the current state. Based on the single-stage operation of the DC / AC converter in the inverter system, the traditional two-stage control loop is no longer applicable. The control loop of the inverter system can be switched from a two-stage control loop to a specially configured single-stage control loop. The single-stage control loop can realize MPPT tracking, bus voltage control, and grid-connected power control. That is, the single-stage control loop can control the DC / AC converter to achieve the traditional two-stage control function of a DC / DC converter + DC / AC converter.

[0052] It should be noted that when the front-end DC / DC converter fails, the entire system can automatically bypass and degrade to single-stage operation within tens of milliseconds without shutting down, significantly improving system availability and power generation revenue; moreover, the bypass switching hardware structure is simple and can adapt to various DC / DC topologies.

[0053] Those skilled in the art should know that there are various specific topologies for DC / DC converters, with commonly used DC / DC topologies including Boost circuits and Buck circuits. Based on different DC / DC topologies, the automatic bypass device 100 bypasses faulty switching transistors in different ways. For ease of understanding, three specific examples will be used to illustrate this in detail below.

[0054] Example 1: such as Figure 2 As shown, the DC / DC converter uses a Boost circuit. The switching transistors of the DC / DC converter can be connected in parallel between the positive and negative buses to form a first conversion branch. At this time, the automatic bypass device 100 can be connected in series in the first conversion branch and detect the electrical parameters of the first conversion branch. When the automatic bypass device 100 detects a fault in the switching transistor based on the electrical parameter detection, the automatic bypass device 100 can disconnect the first conversion branch, thereby bypassing the faulty switching transistor from the positive and negative buses.

[0055] Example 2: such as Figure 3As shown, the DC / DC converter uses a three-level Boost circuit. Compared to Example 1, this DC / DC converter has two switching transistors. The first conversion branch formed by the two transistors connected in series can be connected in parallel between the positive and negative buses. Since the midpoint of the first conversion branch serves as a level output, the first conversion branch can be divided into an upper branch and a lower branch. Correspondingly, two automatic bypass devices 100 are also required. The two automatic bypass devices 100 are connected in series in the upper and lower branches, respectively, and detect the electrical parameters of the upper and lower branches. When the automatic bypass device 100 detects a fault in a switching transistor based on the electrical parameter detection, it can disconnect the first conversion branch, thereby bypassing the faulty switching transistor from the positive and negative buses. It should be noted that both automatic bypass devices 100 will disconnect when any switching transistor fails.

[0056] Example 3: such as Figure 4 As shown, the DC / DC converter uses a Buck circuit, and the switching transistor of the DC / DC converter is connected in series with the positive bus to form a second conversion branch. At this time, the automatic bypass device 100 can be connected in parallel with the second conversion branch to detect the electrical parameters of the second conversion branch. When the automatic bypass device 100 detects a fault in the switching transistor based on the electrical parameter detection, the automatic bypass device 100 can short-circuit the switching transistor, thereby bypassing the faulty switching transistor from the positive bus.

[0057] In this embodiment, based on the aforementioned basic functions of the automatic bypass device 100, the automatic bypass device 100 has various specific structures. For ease of understanding, one of these structures will be described in detail below. For example... Figure 5 As shown, the automatic bypass device 100 includes a detection module 110, a drive circuit 120, and a bypass switch 130. The detection module 110 collects electrical parameters of the switching branch in the DC / DC converter where the switching transistors are installed, and determines the fault of the switching transistors based on the collected data. The drive circuit 120 is communicatively connected to the detection module 110, and can generate a drive signal based on the fault determination result of the detection module 110. The bypass switch 130 is installed in the switching branch and controlled by the drive circuit 120. The bypass switch 130 closes or opens according to the drive signal from the drive circuit, thereby bypassing the faulty switching transistor.

[0058] Understandably, if the DC / DC converter uses a Boost circuit, the bypass switch 130 can be connected in series in the first conversion branch. When the switching transistor is working normally, the drive circuit 120 can control the bypass switch 130 to close, ensuring the normal operation of the switching transistor. When the switching transistor fails, the drive circuit 120 can control the bypass switch 130 to open, thereby disconnecting the first conversion branch. If the DC / DC converter uses a Buck circuit, the bypass switch 130 can be connected in parallel in the second conversion branch. When the switching transistor is working normally, the drive circuit 120 can control the bypass switch 130 to open, ensuring the normal operation of the switching transistor. When the switching transistor fails, the drive circuit 120 can control the bypass switch 130 to close, thereby short-circuiting the faulty switching transistor.

[0059] It is important to understand that the specific structure and working principle of the drive circuit 120 and the bypass switch 130 are well-known technologies to those skilled in the art. For ease of understanding, a brief introduction will be provided below. The bypass switch 130 can be of various types, commonly including relays and semiconductor switches (such as MOSFETs and IGBTs). The drive circuit 120 can consist of MCU control signals, an isolation drive module, or a gate drive chip, and it operates immediately upon fault diagnosis.

[0060] It is also known that the detection module 110 requires various types of electrical parameters for switching transistor fault detection. For example, the detection module 110 can detect the voltage of the branch containing the switching transistor to determine if the switching transistor has failed, or it can detect the current of the branch containing the switching transistor to determine if the switching transistor has failed, or it can detect the bus voltage to determine if the switching transistor has failed. For ease of understanding, the following detailed description will focus on the detection module 110 detecting the voltage of the branch containing the switching transistor as an example.

[0061] Specifically, the automatic bypass device 100 can continuously sample the branch voltage of the switching branch where the switching transistor is located through the detection module 110. If the branch voltage remains below the threshold V for a continuous period of T... th1 A short-circuit fault is determined in the switching transistor. If the branch voltage remains above the threshold voltage V for a continuous time T. th2 The switch transistor was determined to have an open-circuit fault.

[0062] It's important to know that the continuous time T must be at least greater than one PWM switching cycle; for example, it can be 2 to 5 times the PWM switching cycle time. Threshold V th1 The value of V can be set close to 0, meaning that when the switching transistor is short-circuited, theoretically the switching branch can be equivalent to a wire, and the branch voltage should be zero; however, considering the internal resistance of the line, the threshold V can be adjusted. th1The value ranges from 0.01 to 0.1 times the terminal voltage of the power generation unit, which is the output voltage of the power generation unit. Correspondingly, the threshold V... th2 The value of V should be close to the voltage at the generator unit terminal. That is, when the switching transistor is open-circuited, theoretically the resistance of the switching branch can be considered very large, and the branch voltage should be the voltage at the generator unit terminal. However, considering line losses, the threshold V can be adjusted. th2 The value is 0.8 to 0.95 times the terminal voltage of the generator unit.

[0063] Those skilled in the art will understand that when the switching transistor of the current-stage DC / DC converter fails and is bypassed, the inverter system will degenerate into a single-stage inverter architecture based on the DC / AC converter. At this time, the control objective of the DC / AC converter is to meet the grid connection conditions, i.e., the bus voltage is located at [v...]. bus_min v bus_max Under the premise of ], the output voltage v of the power generation unit is made PV Operate near the MPPT target to maximize power output; where v bus_min This represents the minimum bus voltage required for grid connection, determined by the grid connection voltage and modulation ratio, v bus_max This indicates the highest bus voltage the system can withstand.

[0064] Meanwhile, when a Boost circuit is used in a DC / DC converter, since the diode is connected in series on the bus, the unidirectional conduction characteristic of the diode introduces a hard constraint: when the bus voltage v bus >v PV -V D When the diode is turned off, the generator unit and the bus will be temporarily in an open circuit state; where V D This represents the forward voltage drop of the diode. For ease of calculation, the line voltage drop and inductance voltage drop can be included in the diode's forward voltage drop. Based on the above objectives and constraints, this application provides a single-stage control loop based on a three-layer structure of MPPT loop-voltage loop-current loop, and a method for handling the unidirectional conduction problem of diodes; for ease of understanding, a detailed description will follow.

[0065] In this embodiment, as Figure 6 As shown, the single-stage control loop includes an MPPT loop as the outer loop, a voltage loop as the middle loop, and a current loop as the inner loop. The MPPT loop generates a terminal voltage reference value based on the generator unit terminal voltage, output current, and bus voltage, and performs limiting control to ensure that the diodes in the degraded DC / DC converter are always turned on when a Boost circuit is used in the DC / DC converter; the voltage loop performs power control based on the terminal voltage reference value output by the MPPT loop; and the current loop performs rapid adjustment of the output current based on the current reference value output by the voltage loop.

[0066] It is important to note that, in order to avoid oscillations caused by loop coupling, especially since the MPPT loop and the voltage loop are physically coupled, the bandwidth design of each loop must meet the following requirements: The design bandwidth of the current loop is ω. i The design bandwidth of the voltage loop is ω v The design bandwidth of the MPPT ring is ω MPPT For bandwidth ω i ω v and ω MPPT The specific value can be selected according to the actual needs of those skilled in the art; for example, the bandwidth ω can be taken. i The value is around 500Hz, and the bandwidth ω v The value is around 20Hz, and the bandwidth ω MPPT The value is around 1Hz; that is, there is an order of magnitude difference between the values ​​of the three bandwidths; thus ensuring the decoupling of each loop during operation.

[0067] It should be understood that the basic architecture of an inverter system mainly includes an architecture with only one DC / DC converter and an architecture with multiple DC / DC converters. For the former architecture, there is only one failure scenario: the switching transistor of only one DC / DC converter fails. For the latter architecture, there are two failure scenarios: one is that the switching transistor of only one DC / DC converter fails, and the other is that the switching transistors of at least two DC / DC converters fail. In general, the failure scenarios of an inverter system can be divided into three types; among them, failure scenario one: ... Figure 6 As shown, the inverter system has one DC / DC converter and a switching transistor failure occurs; Fault scenario two: Figure 7 As shown, the inverter system has multiple DC / DC converters, but only one DC / DC converter experiences a switching transistor failure; Fault Scenario 3: Figure 9 As shown, the inverter system has multiple DC / DC converters, and at least two of the DC / DC converters experience switching transistor failures. The single-stage control loop of this application can be applied to the above three failure scenarios, and compared with traditional inverter systems, it does not require the addition of additional hardware, which can effectively save costs. For ease of understanding, the specific working process of the single-stage control loop for the above three failure scenarios will be described in detail below.

[0068] Example 1: Working process of a single-stage control loop for fault scenario 1.

[0069] In this embodiment, as Figure 6As shown, the MPPT loop in this embodiment is an improvement upon the MPPT loop corresponding to the DC / DC converter during normal operation of the inverter system. Specifically, it adds limiting control and downlink limiting control to the conventional MPPT loop. The limiting control is used to limit the terminal voltage reference value output by the MPPT loop to v. bus_min With v bus_max Between; Downlink limiting control is to avoid bus voltage v bus A voltage higher than the output voltage of the generator unit causes the diodes to cut off, leading to control failure. The voltage loop consists of two parts: the terminal voltage branch and the bus voltage droop branch. The terminal voltage branch ensures MPPT tracking, while the bus voltage droop branch is used to quickly adjust the active power output to support the bus. The specific structure of the current loop is consistent with the AC current loop structure and control method of the DC / AC converter control loop during normal operation of the inverter. For details, please refer to the aforementioned description of the control process of the control loop during normal operation of the inverter system. Therefore, the control process of the current loop will not be elaborated in the following content.

[0070] Specifically, such as Figure 6 As shown, the MPPT loop includes a downlink limiting unit, an MPPT controller, and a limiting unit. The downlink limiting unit adjusts based on the bus voltage v. bus and the voltage v at the generator unit PV The safe on-state voltage M is calculated in real time and sent to the MPPT controller. Safe on-state voltage M = v bus -v PV -V D Among them, the forward voltage drop V of the diode D This can be considered a constant value; when the conduction safety voltage M is less than 0, it indicates that the diode is cut off. The MPPT controller operates based on the voltage v at the generator unit terminals. PV and output current i PV (i.e., the output current of the power generation unit), calculate the reference value of the terminal voltage v PV * Due to the voltage v at the generator unit terminal. PV and output current i PV The voltage changes over time, therefore the terminal voltage reference value v PV *Real-time calculations are required, and the corresponding on-state safety voltage M also needs to be calculated in real time. (Based on the terminal voltage reference value v) PV During the calculation process, if the conduction safety voltage M is greater than or equal to the set threshold range M th This indicates that the diode is forward-biased; if the safe conduction voltage M is less than the set threshold range M... th This indicates that the diode is about to reverse cut off, at which point the MPPT controller will quickly respond to the bus voltage v. bus The change in voltage and the control of its calculated terminal voltage reference value v PV*Downscaling is prohibited. The limiting unit is used to limit the terminal voltage reference value v output by the MPPT controller. PV *Limiting is applied, with the upper limit set at the highest bus voltage V. bus_max The lower limit is the minimum bus voltage V required for grid connection. bus_min .

[0071] It is understandable that for a given threshold range M... th The theoretical value should be 0, that is, the bus voltage v at this time bus =v PV -V D However, considering that the actual voltage drop of the diode deviates from the theoretical value, and that the purpose of the safety voltage M is to ensure that the busbar does not open-circuit, the threshold range M is set. th The value can be a positive value approaching 0, and can be set according to the actual needs of those skilled in the art.

[0072] Specifically, such as Figure 6 As shown, the voltage loop includes a terminal voltage branch, a bus voltage droop branch, and a comparator unit. The terminal voltage branch will convert the generator unit's terminal voltage v... PV The reference value of the terminal voltage v at the output of the MPPT loop PV *A comparison is performed, and the result is used by the PI controller to generate a reference value i for the d-axis component of the output current. d_PV *. The bus voltage drooping branch loop controls the bus voltage v bus Construct the droop coefficient k droop To achieve rapid voltage regulation, it uses the bus voltage v bus and bus voltage reference value v bus * Compare the results, and then introduce the droop coefficient k into the comparison. droop To obtain the reference value i for the d-axis component of the bus current d_bus The calculation of *. The comparison unit will use the reference value i. d_PV * and i d_bus The maximum value in * is used as the reference value for the d-axis component of the current. d *Sent to the current loop.

[0073] Wherein, reference value i d_bus The formula for calculating * is:

[0074] ; ; .

[0075] In the formula: γ represents the grid connection structure coefficient, which is approximately 1 for single-phase grid connection and approximately 1.5 for three-phase grid connection; C bus This indicates the capacitance value of the bus capacitor, V. g The voltage amplitude is represented by Δt, and the allowable bus voltage is represented by v.bus Recovery time.

[0076] It is important to know the bus voltage reference value v bus *Calculate the required terminal voltage reference value v PV *Output from the MPPT ring. When the bus voltage v bus >v bus At * time, the busbar is in an upward surge state, at which time i d_bus *>0 can increase the grid-connected active power to accelerate voltage relief; when the bus voltage v bus <v bus At * time, the busbar is in a downward thrust state, at which time i d_bus * < 0 can reduce the active power of grid connection to avoid bus voltage dip. Under normal circumstances, the voltage loop generally executes the terminal voltage branch loop, and only when the bus voltage deviation is large will the bus voltage droop branch loop be executed. Therefore, when designing the bandwidth of the terminal voltage branch loop and the bus voltage droop branch loop, it is necessary to ensure that the bandwidth of the bus voltage droop branch loop is significantly faster than that of the terminal voltage branch loop. For example, the bandwidth of the terminal voltage branch loop is about 20Hz, and the bandwidth of the bus voltage droop branch loop can be designed to be 50Hz~100Hz; the specific bandwidth design can be selected according to the actual needs of those skilled in the art.

[0077] Example 2: Working process of a single-stage control loop for fault scenario 2.

[0078] It's important to understand that the key issue in Scenario 2 is the DC bus coupling and voltage clamping between multiple MPPTs. For example... Figure 7 As shown, assuming there are N DC / DC converters, where N≥2, and these N DC / DC converters are labeled DC / DC#1 to #N respectively. If the switch of DC / DC#1 fails and is bypassed by the automatic bypass device 100; if the MPPT target voltage of the faulty DC / DC#1 is lower than the MPPT target values ​​of the other normal DC / DC#2 to #N, then based on the control method for scenario one in the above embodiment, the generation unit terminal voltage of the normal DC / DC#2 to #N will be pulled down by the bus voltage to near the MPPT voltage of the faulty DC / DC#1, causing the normal DC / DC#2 to #N to be unable to operate at the optimal operating point, resulting in MPPT tracking failure. Therefore, in this embodiment, the limiting value of the limiting unit of the MPPT ring in Embodiment 1 needs to be improved. This ensures that the DC / DC converter in the normal path still operates in the normal MPPT tracking mode, while ensuring that the single-stage inverter architecture formed by the DC / DC converter in the faulty path can output power as much as possible. This will allow the MPPT voltage of the normal path to be decoupled from the voltage of the generator unit in the faulty path.

[0079] In this embodiment, as Figure 8As shown, the MPPT loop also includes a downlink limiting unit, an MPPT controller, and a limiting unit. The specific operation of the downlink limiting unit and the MPPT controller is the same as in Embodiment 1, and therefore will not be repeated here; please refer to Embodiment 1 above for details. For the limiting unit, its upper limit remains the highest bus voltage, and its lower limit is v. PV_min Dynamic adjustments are required; the specific calculation formula is as follows:

[0080] .

[0081] Among them, v bus_min This indicates the minimum bus voltage required for grid connection; This represents the calculated terminal voltage reference value of the MPPT loop of the j-th DC / DC converter in the normal path; ΔV MPPT This represents the set stability threshold used to suppress MPPT voltage fluctuations in the normal path on the bus voltage v. bus The specific value can be selected according to the actual needs of those skilled in the art, for example, it can be 10V~30V.

[0082] In this embodiment, to avoid limiting the lower limit v PV_min Frequent calculations and updates can improve the lower limit v of the amplitude limit. PV_min The update settings latch mechanism. Specifically, it only updates when the bus voltage v... bus >v PV_min_last Only when +H is applied will the lower limit of the amplitude be re-applied (v). PV_min Otherwise, maintain the previous calculation's lower limit v. PV_min_last Where H represents the safety margin, the specific value of which can be set according to the actual needs of those skilled in the art, for example, it can be 5V~10V. That is, only when the bus voltage v... bus The lower limit v is only applied when the volatility exceeds the safety margin. PV_min_last The calculation update.

[0083] It should be noted that in this embodiment, the voltage loop of the single-stage control loop has the same structure as the voltage loop in Embodiment 1. The specific control process can be referred to Embodiment 1 above, so it will not be repeated here. The current loop has the same structure as the AC current loop of the DC / AC converter when the inverter system is operating normally. The specific control process can be referred to the aforementioned description of the control loop for the inverter system operating normally, so it will not be repeated here.

[0084] Example 3: Working process of a single-stage control loop for fault scenario 3.

[0085] It's important to understand that the key issue in Scenario 3 is the different MPPT voltages of multiple faulty paths, causing some faulty paths to be "open-circuited." Therefore, this embodiment needs to consider the combined maximum power of multiple faulty paths. In this case, multiple faulty paths can be equivalent to multiple series-parallel MPPT tracking problems. We can assume there are N DC / DC converters, where N≥2, and these N DC / DC converters are labeled DC / DC#1 to #N. For ease of understanding, as follows... Figure 9 As shown, the following will be a detailed explanation using the example of the DC / DC #1 and #2 switching transistors failing and being bypassed by the automatic bypass device 100.

[0086] In this embodiment, Figure 10 As shown, the MPPT loop includes a summation unit, a multi-channel integrated MPPT controller, and a limiting unit. The summation unit SUM is used to sum the output currents of the generator units in all faulty circuits and send them to the multi-channel integrated MPPT controller. Specifically, the summation unit SUM sums the output currents i of the generator units corresponding to DC / DC#1 and #2, respectively. PV1 and i PV2 By summing and calculating, we obtain the sum of the output currents i of the generator units in the faulty circuit. PV And send it to the multi-channel integrated MPPT controller. The multi-channel integrated MPPT controller calculates the output current of the generator unit in the faulty circuit based on i. PV and bus voltage v bus Calculate the reference value of bus voltage v bus *; The limiting unit is used to limit the bus voltage reference value v output by the multi-channel integrated MPPT controller. bus *Amplitude limiting is performed. The control method of the amplitude limiting unit in this embodiment is the same as that of the amplitude limiting unit in Embodiment 2. For details, please refer to Embodiment 2 above, so it will not be repeated here; and the lower limit v of the amplitude limiting unit... PV_min A latching mechanism also needs to be set up.

[0087] It is understandable that, in this embodiment, the control method for multi-channel DC / DC converter faults only requires modifying the MPPT control method of the faulty channel to multi-channel MPPT control based on Embodiment 2. At this time, since the bus voltage v is directly used... bus To achieve the desired control objective, downlink limiting of the MPPT loop is no longer necessary, but amplitude limiting control must be retained. The multi-peak MPPT algorithm required for calculation by the multi-channel integrated MPPT controller is well-known to those skilled in the art and will not be described in detail here.

[0088] It's important to note that in this scenario, due to the large number of faulty DC / DC converters, the loop speed can be adjusted to prevent interference between the MPPT loop of the control loop of the normal DC / DC converter and the MPPT loop of the single-stage control loop. Generally, the bandwidth of the MPPT loop of the single-stage control loop should be smaller than the bandwidth of the MPPT loop corresponding to the normal DC / DC converter. For example, the bandwidth of the MPPT loop of the single-stage control loop can be reduced to less than 1Hz, while the bandwidth of the MPPT loop corresponding to the control loop of the normal DC / DC converter can be designed to be around 5Hz. To reduce the impact of bus voltage fluctuations on the normal DC / DC converter, the bandwidth of the voltage loop of the single-stage control loop can be appropriately increased, for example, from 20Hz to 50Hz, thereby accelerating the bus voltage response.

[0089] In this embodiment, as Figure 10 As shown, the specific structure and control method of the voltage loop and current loop are consistent with the bus voltage loop and AC current loop in the control loop of the DC / AC converter when the inverter system is working normally, so they will not be repeated here. For details, please refer to the above description of the control process of the control loop when the inverter system is working normally.

[0090] As can be understood from the foregoing, the DC / AC converter of this application is equipped with four control loops, corresponding to the normal operation scenario, fault scenario one, fault scenario two, and fault scenario three of the inverter system. Specifically, when the inverter system is operating normally, the DC / DC converter performs MPPT tracking, and the DC / AC converter performs bus voltage control and power control. When the inverter system is in fault scenario one, the DC / DC converter degenerates into a low-impedance path. At this time, the control loop of the DC / DC converter does not work, and the inverter system continues to operate by executing the single-stage control loop of embodiment one described above through the DC / AC converter. When the inverter system is in fault scenarios two and three, the faulty DC / DC converter degenerates into a low-impedance path. At this time, the control loop of the faulty DC / DC converter does not work, and the DC / DC converters of the remaining normal paths continue to perform MPPT tracking. The inverter system continues to operate by executing the single-stage control loop of embodiment two or three described above through the DC / AC converter.

[0091] The basic principles, main features, and advantages of this application have been described above. Those skilled in the art should understand that this application is not limited to the above embodiments. The embodiments and descriptions in the specification are merely the principles of this application. Various changes and modifications can be made to this application without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claims. The scope of protection claimed by this application is defined by the appended claims and their equivalents.

Claims

1. A front-stage fault degradation control architecture of an inverter system, the inverter system including a DC / DC converter located at a front stage and a DC / AC converter located at a rear stage; characterized by, The application relates to an automatic bypass device. The automatic bypass device is arranged in the DC / DC converter and detects the failure of a switch tube arranged in the DC / DC converter; when the failure of the switch tube is detected, the automatic bypass device bypasses the switch tube, so that the DC / DC converter is degraded into a low-resistance passage. A single-stage control loop is used to control the DC / AC converter to perform MPPT tracking, bus voltage control and grid-connected power control when the DC / DC converter is degraded into a low-resistance passage. The single-stage control loop comprises: An MPPT loop generates an end voltage reference value based on the end voltage of a power generation unit, output current and bus voltage and performs amplitude limiting control, so that the diode in the degraded DC / DC converter is always turned on when the DC / DC converter adopts a Boost circuit. A voltage loop performs power control based on the end voltage reference value output by the MPPT loop; and A current loop performs rapid regulation of output current based on the current reference value output by the voltage loop. If the switch tube is connected in parallel with positive and negative buses to form a first conversion branch, the automatic bypass device is arranged in series in the first conversion branch; the automatic bypass device is adapted to disconnect the first conversion branch when the switch tube fails. Wherein, the design bandwidth of the current loop is , the design bandwidth of the voltage loop is , and the design bandwidth of the MPPT loop is ; and the specific values are: .

2. The pre-fault degradation control architecture for an inverter system of claim 1, wherein, If the switch tube is connected in series with buses to form a second conversion branch, the automatic bypass device is connected in parallel with the conversion branch; the automatic bypass device is adapted to short-circuit the switch tube when the switch tube fails. The automatic bypass device comprises:

3. The pre-fault degradation control architecture for an inverter system of claim 1, wherein, A detection module is used to collect the electric quantity parameters of the conversion branch in which the switch tube is arranged and to judge the failure of the switch tube based on the collected data; A driving circuit is in communication connection with the detection module; the driving circuit is adapted to generate a driving signal according to the failure judgment result of the detection module; and A bypass switch is arranged in the conversion branch and is in control connection with the driving circuit; the bypass switch is closed or opened according to the driving signal of the driving circuit, so as to bypass the failed switch tube. The automatic bypass device is adapted to continuously sample the branch voltage of the conversion branch in which the switch tube is arranged; 4. The pre-fault degradation control architecture for an inverter system of claim 3, wherein, When the inverter system is provided with one DC / DC converter and the switch tube fails, the MPPT loop comprises: If the branch voltage remains less than a threshold value V for T consecutive times th1 , it is determined that the switch tube has a short circuit fault; if the branch voltage remains greater than the threshold value V for T consecutive times th2 , it is determined that the switch tube has an open circuit failure; Wherein, the continuous time T is greater than one PWM switching period, the threshold value V th1 Less than the threshold value V th2 .

5. The pre-fault degradation control architecture for an inverter system of claim 1, wherein, A downward limiting unit calculates a turn-on safety voltage in real time according to the bus voltage and the end voltage of the power generation unit and sends the turn-on safety voltage to an MPPT controller; The MPPT controller calculates an end voltage reference value according to the end voltage of the power generation unit and the output current and prohibits the downward regulation of the end voltage reference value when the turn-on safety voltage is smaller than a set threshold range; and An amplitude limiting unit is used to limit the amplitude of the end voltage reference value output by the MPPT controller, the upper limit of the amplitude limiting is the highest bus voltage, and the lower limit of the amplitude limiting is the lowest bus voltage required to meet the grid connection. ​ 6. The pre-fault degradation control architecture for an inverter system of claim 1, wherein, When the inverter system is provided with multiple DC / DC converters, and only one of the DC / DC converters has a switch tube failure, the MPPT loop comprises: a downlink limiting unit, which calculates a conduction safety voltage in real time according to a bus voltage and a terminal voltage of a power generation unit, and sends the conduction safety voltage to an MPPT controller; the MPPT controller, which calculates a terminal voltage reference value according to the terminal voltage of the power generation unit and an output current, and prohibits the terminal voltage reference value from being lowered when the conduction safety voltage is less than a set threshold range; and The amplitude limiting unit is configured to limit the end voltage reference output by the MPPT controller, with an upper limit being the highest bus voltage and a lower limit being v PV_min The calculation formula is: ； wherein v bus_min represents the minimum bus voltage required to meet the grid connection, represents the end voltage reference value calculated by the MPPT loop of the jth DC / DC converter in the normal road, V MPPT represents the set stability threshold.

7. The pre-fault degradation control architecture for an inverter system of claim 1, wherein, When the inverter system is provided with multiple DC / DC converters, and at least two of the DC / DC converters have switch tube failures, the MPPT loop comprises: a summation unit, which is used to sum up and send the output currents of the power generation units of all the faulty paths to a multi-path comprehensive MPPT controller; the multi-path comprehensive MPPT controller, which calculates a bus voltage reference value according to the sum of the output currents of the power generation units of the faulty paths and the bus voltage; and The amplitude limiting unit is configured to limit the bus voltage reference value output by the multi-path comprehensive MPPT controller, with the upper limit being the highest bus voltage and the lower limit being v PV_min The calculation formula is: ； wherein v bus_min represents the minimum bus voltage required to meet the grid-connected, represents the end voltage reference value calculated by the MPPT loop of the jth DC / DC converter in the normal road, V MPPT represents the set stability threshold value; the bandwidth of the MPPT loop is less than the bandwidth corresponding to the MPPT loop of the normal path DC / DC converter.

8. The pre-fault degradation control architecture of an inverter system according to claim 6 or 7, characterized in that, For the lower limit of the amplitude v PV_min The update of the lower limit of the amplitude v is performed using a latch mechanism as follows: When the bus voltage v bus > v PV_min_last + H, the calculation of the lower limit of the amplitude limiting v PV_min is restarted, otherwise the last calculated lower limit of the amplitude limiting v PV_min_last is maintained; wherein H represents a safety margin.

9. The pre-fault degradation control architecture for an inverter system of claim 1, wherein, When the inverter system has only one DC / DC converter with a switch tube failure, the voltage loop comprises: end voltage support loop; the end voltage support loop outputs an end voltage reference value v PV * comparison is made to generate an output current d-axis component reference value i d_PV * a bus voltage droop branch; the bus voltage droop branch performing a calculation of a bus voltage reference value v bus and a bus voltage reference value v bus * a bus current d-axis component reference value i d_bus *; and comparing unit; the comparing unit sends the maximum value among the reference values i d_PV * and i d_bus * to the current loop as the current d-axis component reference value; Reference value i d_bus The calculation formula is: ； ； ； wherein k droop represents a droop coefficient, V D represents a conduction voltage drop of a diode in the DC / DC converter, represents a grid-connection structure coefficient, C bus represents a capacitance value of the bus capacitor, V g represents a grid voltage amplitude, t represents a time allowed for the bus voltage to recover.

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