Light-emitting element and light-emitting device

Abstract

The embodiment of the invention relates to a light-emitting element and a light-emitting device. The light-emitting element includes: a substrate; the epitaxial layer is located on the substrate and comprises a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer; the epitaxial layer comprises a plurality of pixel unit areas arranged in an array, each pixel unit area comprises a first sub-pixel area, a second sub-pixel area, a third sub-pixel area and a dummy structure area, and the pixel unit areas are distributed at different positions of the pixel unit areas and extend to the boundaries of the pixel unit areas respectively; the dummy structure region is located in the pixel unit region or extends to the boundary of the pixel unit region; the first electrode bonding pad, the second electrode bonding pad, the third electrode bonding pad and the common electrode bonding pad are located on the sides, away from the substrate, of the first sub-pixel area, the second sub-pixel area, the third sub-pixel area and the dummy structure area respectively; the first electrode bonding pad, the second electrode bonding pad and the third electrode bonding pad are conductively connected with the second conductive semiconductor layer; the common electrode pad is conductively connected with the first conductive semiconductor layer.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a light-emitting element and a light-emitting device. Background Technology

[0002] In related technologies, multiple pixel units in a light-emitting element are electrically connected using a common cathode (or common anode) method, which can reduce the wiring arrangement and simultaneously control the light emission of multiple pixel units. However, this electrical connection method limits the layout of multiple pixel units and the common electrode area, making it difficult to combine and splice multiple light-emitting elements and obtain larger-sized light-emitting devices. Summary of the Invention

[0003] In view of the above, this application provides a light-emitting element and a light-emitting device to solve at least one problem existing in the background art.

[0004] In a first aspect, embodiments of this application provide a light-emitting element, the light-emitting element comprising: a substrate, including a first surface and a second surface opposite to each other; an epitaxial layer, located on the first surface of the substrate, including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer sequentially stacked along a direction away from the substrate; the epitaxial layer is patterned and divided into pixel unit regions comprising a plurality of arrayed pixel unit regions, each pixel unit region comprising a first sub-pixel region, a second sub-pixel region, a third sub-pixel region, and a dummy structure region; the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region are distributed at different positions of the pixel unit regions and respectively extend to the boundary of the pixel unit regions; The dummy structure region is located inside the pixel unit region or extends to the boundary of the pixel unit region; the first electrode pad, the second electrode pad, the third electrode pad, and the common electrode pad are respectively located on the side of the first sub-pixel region, the second sub-pixel region, the third sub-pixel region, and the dummy structure region away from the substrate; the first electrode pad, the second electrode pad, and the third electrode pad are electrically connected to the second conductive semiconductor layer in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region, respectively; the common electrode pad is electrically connected to the first conductive semiconductor layer in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region.

[0005] In conjunction with the first aspect of this application, in an optional embodiment, the dummy structure region extends to the boundary of the pixel unit region; the projections of the first sub-pixel region, the second sub-pixel region, the third sub-pixel region, and the dummy structure region onto the plane of the substrate are respectively located at the four vertices of the first quadrilateral region.

[0006] In conjunction with the first aspect of this application, in an optional embodiment, the first sub-pixel area is the luminous area of ​​a red sub-pixel, the second sub-pixel area is the luminous area of ​​a green sub-pixel, and the third sub-pixel area is the luminous area of ​​a blue sub-pixel; the second sub-pixel area is arranged adjacent to the dummy structure area; the dummy structure area and the third sub-pixel area are arranged along the diagonal of the first quadrilateral area.

[0007] In conjunction with the first aspect of this application, in an optional embodiment, the light-emitting element further includes: a first pixel groove, a second pixel groove, and a third pixel groove, all extending from the second surface of the substrate toward the epitaxial layer, and corresponding to the positions of the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region, respectively; and an optical material located in the first pixel groove and the second pixel groove; wherein the optical material located in the first pixel groove includes a red light conversion material, and the optical material located in the second pixel groove includes a green light conversion material.

[0008] In conjunction with the first aspect of this application, in an optional embodiment, the light-emitting element further includes: a second pixel groove extension extending from the second surface of the substrate toward the epitaxial layer and corresponding to the position of the dummy structure region; the second pixel groove extension communicates with the second pixel groove, and the green light conversion material is also located in the second pixel groove extension.

[0009] In conjunction with the first aspect of this application, in an optional embodiment, the sum of the projected areas of the second pixel groove and the second pixel groove extension on the plane where the substrate is located is greater than the projected area of ​​the first pixel groove on the plane where the substrate is located.

[0010] In conjunction with the first aspect of this application, in an optional embodiment, on the plane where the substrate is located, the projected area of ​​the third pixel groove is smaller than the projected area of ​​the first pixel groove and smaller than the projected area of ​​the second pixel groove.

[0011] In conjunction with the first aspect of this application, in an optional embodiment, on the plane where the substrate is located, the projected area of ​​the third sub-pixel region is smaller than the projected area of ​​the first sub-pixel region and smaller than the projected area of ​​the second sub-pixel region; the projected area of ​​the dummy structure region is smaller than the projected area of ​​the first sub-pixel region and smaller than the projected area of ​​the second sub-pixel region.

[0012] In conjunction with the first aspect of this application, in an optional embodiment, the ratio of the maximum width of the first pixel slot along the first direction to the maximum width of the second pixel slot along the first direction is 0.4:0.6 to 0.6:0.4; the first direction is the direction of the line connecting the farthest ends of the first pixel slot and the second pixel slot relative to each other.

[0013] In conjunction with a first aspect of this application, in an optional embodiment, the projections of the first pixel slot, the second pixel slot, the second pixel slot extension, and the third pixel slot onto the plane of the substrate are located in a second quadrilateral region; the first pixel slot extends to a first side and a second side of the second quadrilateral region, the first side and the second side intersecting each other; the second pixel slot extends to a third side and a fourth side of the second quadrilateral region, the third side and the fourth side intersecting each other; the third pixel slot extends to a second side and a third side of the second quadrilateral region; the second pixel slot extension extends to a first side and a fourth side of the second quadrilateral region; along the extension direction of the first side, the maximum slot width of the first pixel slot is greater than half the length of the first side; along the extension direction of the second side, the maximum slot width of the first pixel slot is greater than half the length of the second side; along the extension direction of the third side, the maximum slot width of the second pixel slot is greater than half the length of the third side; along the extension direction of the fourth side, the maximum slot width of the through slot formed by the second pixel slot extension and the second pixel slot intersecting each other is equal to the length of the fourth side.

[0014] In conjunction with the first aspect of this application, in an optional embodiment, the projection of the first pixel slot onto the plane of the substrate is composed of a first rectangle and a first right-angled trapezoid, the lower base of the first right-angled trapezoid coinciding with one side of the first rectangle; the projection of the through slot formed by the mutual penetration of the second pixel slot and the extension of the second pixel slot onto the plane of the substrate is composed of a second rectangle, a third rectangle, and a second right-angled trapezoid, the upper and lower bases of the second right-angled trapezoid coinciding with one side of the second rectangle and the third rectangle, respectively; the sloping sides of the second right-angled trapezoid and the sloping sides of the first right-angled trapezoid are adjacent and parallel to each other; the projection of the third pixel slot onto the plane of the substrate is a rectangle.

[0015] In conjunction with a first aspect of this application, in an optional embodiment, the green light conversion material comprises quantum dots; the optical material is located in the second pixel slot and the extension of the second pixel slot, and the optical material further comprises a light diffusion material located between the green light conversion material and the epitaxial layer.

[0016] In conjunction with the first aspect of this application, in an optional embodiment, the light-emitting element further includes: an isolation barrier comprising a first sub-segment, a second sub-segment, a third sub-segment, and a fourth sub-segment; wherein the first sub-segment is formed by a substrate located between the first pixel groove and the third pixel groove, the second sub-segment is formed by a substrate located between the second pixel groove and the third pixel groove, the third sub-segment is formed by a substrate located between the first pixel groove and the second pixel groove, and the fourth sub-segment is formed by a substrate located between the extension of the second pixel groove and the first pixel groove; one end of the third sub-segment is connected to the first sub-segment and the second sub-segment, and the other end of the third sub-segment is connected to the fourth sub-segment; the substrate is the growth substrate of the epitaxial layer.

[0017] In conjunction with the first aspect of this application, in an optional embodiment, the light-emitting element further includes: an isolation channel, comprising a first sub-channel, a second sub-channel, a third sub-channel, and a fourth sub-channel; wherein the first sub-channel is located between the first sub-pixel area and the third sub-pixel area; the second sub-channel is located between the second sub-pixel area and the third sub-pixel area; the third sub-channel is located between the first sub-pixel area and the second sub-pixel area; the fourth sub-channel is located between the first sub-pixel area and the dummy structure area; one end of the third sub-channel is connected to the first sub-channel. The third sub-channel is connected to the fourth sub-channel at one end, and the second sub-channel is connected to the third sub-channel at the other end. On the plane where the substrate is located, the projection shapes of the first sub-segment, the second sub-segment, the third sub-segment, and the fourth sub-segment in the isolation barrier are consistent with the projection shapes of the first sub-channel, the second sub-channel, the third sub-channel, and the fourth sub-channel in the isolation channel, and the projections of the first sub-channel, the second sub-channel, the third sub-channel, and the fourth sub-channel fall within the projections of the first sub-segment, the second sub-segment, the third sub-segment, and the fourth sub-segment, respectively.

[0018] In conjunction with the first aspect of this application, in an optional embodiment, the light-emitting element further includes: a first pixel groove, a second pixel groove, and a third pixel groove, all extending from the second surface of the substrate toward the epitaxial layer, and respectively corresponding to the positions of the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; wherein, on the plane where the substrate is located, the projections of the active layer in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region fall within the projections of the first pixel groove, the second pixel groove, and the third pixel groove, respectively.

[0019] In conjunction with the first aspect of this application, in an optional embodiment, the light-emitting element further includes: an isolation channel, including a fifth sub-channel, the fifth sub-channel being located between the second sub-pixel region and the dummy structure region; the fifth sub-channel extending from the epitaxial layer toward the substrate through the second conductive semiconductor layer and the active layer, but not through the first conductive semiconductor layer.

[0020] In conjunction with the first aspect of this application, in an optional embodiment, the light-emitting element further includes: a first upper reflective electrode, a second upper reflective electrode, and a third upper reflective electrode; the first upper reflective electrode is located between a second conductive semiconductor layer and a first electrode pad in the first sub-pixel region; the second upper reflective electrode is located between a second conductive semiconductor layer and a second electrode pad in the second sub-pixel region; the third upper reflective electrode is located between a second conductive semiconductor layer and a third electrode pad in the third sub-pixel region; an insulating layer including a first insulating portion, a second insulating portion, and a third insulating portion; wherein the first insulating portion covers a portion of the sidewall of the first sub-pixel region and extends to the first upper reflective electrode; the second insulating portion covers a portion of the sidewall of the second sub-pixel region and extends to the second upper reflective electrode; the third ... third insulating portion covers a portion of the sidewall of the second sub-pixel region and extends to the second upper reflective The third sub-pixel region has a partial sidewall that extends to the third upper reflective electrode; a first lower reflective electrode, a second lower reflective electrode, and a third lower reflective electrode; the first lower reflective electrode covers the sidewall of the first sub-pixel region that is not covered by the first insulating portion and extends to the first insulating portion; the second lower reflective electrode covers the sidewall of the second sub-pixel region that is not covered by the second insulating portion and extends to the second insulating portion; the third lower reflective electrode covers the sidewall of the third sub-pixel region that is not covered by the third insulating portion and extends to the third insulating portion; wherein, in the substrate thickness direction, the first lower reflective electrode partially overlaps with the first upper reflective electrode, the second lower reflective electrode partially overlaps with the second upper reflective electrode, and the third lower reflective electrode partially overlaps with the third upper reflective electrode.

[0021] In conjunction with the first aspect of this application, in an optional embodiment, the light-emitting element further includes: a first filter layer, a second filter layer, and a third filter layer, all located on the second surface of the substrate; wherein the first filter layer covers the first pixel groove, the second filter layer covers the second pixel groove and the extension of the second pixel groove, and the third filter layer covers the third pixel groove; and a protective capping layer covers the first filter layer, the second filter layer, the third filter layer, and the second surface of the substrate.

[0022] In conjunction with the first aspect of this application, in an optional embodiment, the shortest distance at the boundary between the pixel unit region and the light-emitting element is half the distance between two adjacent pixel unit regions.

[0023] Secondly, embodiments of this application provide a light-emitting device, which includes a plurality of seamlessly spliced ​​light-emitting elements as described in any of the above embodiments.

[0024] The light-emitting element provided in this application embodiment has three sub-pixel areas: a first sub-pixel area, a second sub-pixel area, and a third sub-pixel area, distributed at different positions within a pixel unit area and extending to the boundary of the pixel unit area. A dummy structure area is located inside the pixel unit area or extends to its boundary. Furthermore, a common electrode pad on the dummy structure area is electrically connected to the first conductive semiconductor layer in the first, second, and third sub-pixel areas. In this way, each sub-pixel area within a pixel unit area shares an electrode, reducing lead arrangement while allowing multiple pixel unit areas to operate independently. This allows for flexible arrangement of multiple pixel unit areas within the light-emitting element, facilitating the combination and splicing of multiple light-emitting elements to obtain larger-sized light-emitting devices.

[0025] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0026] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments of this application and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0027] Figure 1 A schematic diagram of the arrangement of pixel units at the boundary of the pixel unit area where the dummy structure area extends to the pixel unit area, as provided in the embodiments of this application.

[0028] Figure 2 A schematic diagram of the pixel unit area where the dummy structure area is located inside the pixel unit area, as provided in the embodiments of this application;

[0029] Figure 3 This is a schematic diagram of the cross-sectional structure of the pixel unit region provided in the embodiments of this application, wherein (a), (b), and (c) are respectively a cross-sectional view along the pixel unit region. Figure 1 Schematic diagram of the cross-sectional structure of lines A-A', B-B', and C-C';

[0030] Figure 4 A schematic diagram of the projection of the first semiconductor layer in the first sub-pixel region, second sub-pixel region, third sub-pixel region and dummy structure region provided in the embodiments of this application onto the plane where the substrate is located.

[0031] Figure 5 A schematic diagram of the projection of the second semiconductor layer in the first sub-pixel region, second sub-pixel region, third sub-pixel region and dummy structure region provided in the embodiments of this application onto the plane where the substrate is located.

[0032] Figure 6 Microscopic image of the light-emitting element provided in the embodiments of this application;

[0033] Figure 7 A schematic diagram of the projection of the first pixel groove, the second pixel groove, the extension of the second pixel groove, and the third pixel groove onto the plane of the substrate, as provided in the embodiments of this application;

[0034] Figure 8 This application provides a cross-sectional structural diagram of the first pixel slot, the second pixel slot, the extension of the second pixel slot, and the third pixel slot, as shown in Figures (a), (b), and (c), respectively. Figure 6 Schematic diagram of the cross-sectional structure of lines D-D', E-E', and F-F';

[0035] Figure 9 This is a schematic diagram of the cross-sectional structure of a pixel unit provided in an embodiment of this application, wherein (a), (b), and (c) are respectively along... Figure 6 Schematic diagram of the cross-sectional structure of lines D-D', E-E', and F-F'. Detailed Implementation

[0036] Exemplary embodiments of the present application will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application may be implemented in various forms and should not be limited to the specific embodiments set forth herein. Rather, these embodiments are provided to enable a more thorough understanding of the present application and to fully convey the scope of the disclosure of the present application to those skilled in the art.

[0037] In the following description, numerous specific details are set forth in order to provide a more thorough understanding of this application. However, it will be apparent to those skilled in the art that this application can be practiced without one or more of these details. In other instances, to avoid confusion with this application, some technical features well-known in the art have not been described; that is, not all features of actual embodiments are described herein, nor are well-known functions and structures described in detail.

[0038] In the accompanying drawings, for clarity, the dimensions of layers, areas, and elements, as well as their relative dimensions, may be exaggerated. The same reference numerals denote the same elements throughout.

[0039] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this application, the first element, component, area, layer, or portion discussed below may be referred to as a second element, component, area, layer, or portion. And the discussion of a second element, component, area, layer, or portion does not imply that the first element, component, area, layer, or portion necessarily exists in this application.

[0040] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein for convenience of description to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, then the element or feature described as “below,” “under,” or “below” other elements or features will be oriented “above” other elements or features. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. The device may be otherwise oriented (rotated 90 degrees or otherwise) and the spatial descriptive terms used herein will be interpreted accordingly.

[0041] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising” and / or “including,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0042] To fully understand this application, detailed steps and structures will be presented in the following description to illustrate the technical solution of this application. Preferred embodiments of this application are described in detail below; however, in addition to these detailed descriptions, this application may have other implementation methods.

[0043] Figure 1 A schematic diagram of the arrangement of pixel units at the boundary of the pixel unit area where the dummy structure area extends to the pixel unit area, as provided in the embodiments of this application. Figure 2 A schematic diagram of the pixel unit area where the dummy structure area is located inside the pixel unit area, as provided in the embodiments of this application; Figure 3 This is a schematic diagram of the cross-sectional structure of the pixel unit region provided in the embodiments of this application, wherein (a), (b), and (c) are respectively a cross-sectional view along the pixel unit region. Figure 1 Schematic diagram of the cross-sectional structure of lines A-A', B-B', and C-C'.

[0044] This application provides a light-emitting element; please refer to... Figures 1 to 3 The light-emitting element includes:

[0045] The substrate 100 includes a first surface 101 and a second surface 102 that are opposite to each other;

[0046] An epitaxial layer 110, located on the first surface 101 of the substrate 100, includes a first conductive semiconductor layer 111, an active layer 112, and a second conductive semiconductor layer 113 sequentially stacked along a direction away from the substrate 100. The epitaxial layer 110 is patterned and divided into multiple pixel unit regions 120 arranged in an array. Each pixel unit region 120 includes a first sub-pixel region 120a, a second sub-pixel region 120b, a third sub-pixel region 120c, and a dummy structure region 120d. The first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c are distributed at different positions in the pixel unit region 120 and extend to the boundary of the pixel unit region 120, respectively. The dummy structure region 120d is located inside the pixel unit region 120 (e.g., ...). Figure 2 (as shown) or extending to the boundary of pixel unit area 120 (such as...) Figure 1 (as shown);

[0047] The first electrode pad 210a, the second electrode pad 210b, the third electrode pad 210c, and the common electrode pad 220 are located on the side away from the substrate 100 of the first sub-pixel region 120a, the second sub-pixel region 120b, the third sub-pixel region 120c, and the dummy structure region 120d, respectively. The first electrode pad 210a, the second electrode pad 210b, and the third electrode pad 210c are electrically connected to the second conductive semiconductor layer 113 in the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c, respectively. The common electrode pad 220 is electrically connected to the first conductive semiconductor layer 111 in the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c.

[0048] It is understood that the light-emitting element provided in this application embodiment, by setting the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c to be distributed at different positions in the pixel unit region 120 and extending to the boundary of the pixel unit region 120, and the dummy structure region 120d located inside the pixel unit region 120 or extending to the boundary of the pixel unit region 120, and the common electrode pad 220 located on the dummy structure region 120d being electrically connected to the first conductive semiconductor layer 111 in the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c, allows each sub-pixel region in a pixel unit region 120 to share an electrode, which can reduce the wiring arrangement while making multiple pixel unit regions 120 independent of each other. In this way, multiple pixel unit regions 120 in the light-emitting element can be flexibly arranged, which is beneficial for combining and splicing multiple light-emitting elements to obtain a larger size light-emitting device.

[0049] In some embodiments, please refer to Figure 3 The substrate 100 may be a sapphire substrate, a silicon carbide substrate, a gallium nitride substrate, a gallium arsenide substrate, a silicon substrate, or other semiconductor material substrates known in the art. In the embodiments of this application, the substrate 100 may be a silicon substrate.

[0050] It should be noted that the plane on which the first surface 101 and the second surface 102 of the substrate 100 are located, or more precisely, the center plane in the thickness direction of the substrate 100, is defined as the plane on which the substrate 100 is located, and the direction perpendicular to the plane on which the substrate 100 is located is along the thickness direction of the substrate 100.

[0051] In some specific embodiments, please refer to Figure 3 The substrate 100 can be a growth substrate, and the epitaxial layer 110 is formed on the growth substrate through an epitaxial growth process. The epitaxial layer 110 is patterned (e.g., photolithography, etching, etc.) and divided into pixel unit regions 120 including multiple arrays (e.g., ...). Figure 1 and Figure 2(As shown).

[0052] It should be understood that, Figure 1 and Figure 2 This illustration only shows the case where the projection shape of the pixel unit area 120 onto the plane of the substrate 100 is rectangular or circular, and each pixel unit area 120 includes three sub-pixel areas and one dummy structure area. This application does not exclude the possibility that the projection shape of the pixel unit area 120 onto the plane of the substrate 100 is triangular, trapezoidal, pentagonal, or other suitable shape. This application also does not exclude the possibility that the pixel unit area 120 includes four, five, or more sub-pixel areas; and / or that the pixel unit area 120 includes multiple dummy structure areas.

[0053] In some embodiments, the shortest distance between the pixel unit area 120 and the boundary of the light-emitting element is half the distance between two adjacent pixel unit areas 120. Thus, after multiple light-emitting elements are combined and spliced, the distance between two adjacent pixel unit areas on different light-emitting elements is equal to the distance between two adjacent pixel unit areas in a single light-emitting element, which helps improve the display performance, such as display consistency, of the light-emitting device obtained by splicing multiple light-emitting elements.

[0054] In some embodiments, the distance between two adjacent pixel unit areas 120 is greater than the distance between the first sub-pixel area 120a, the second sub-pixel area 120b, the third sub-pixel area 120c and the dummy structure area 120d in the same pixel unit area 120.

[0055] In some embodiments, please refer to Figure 1 and Figure 3 The light-emitting element further includes: an isolation channel 230, including a first sub-channel 231, a second sub-channel 232, a third sub-channel 233, and a fourth sub-channel 234; wherein, the first sub-channel 231 is located between the first sub-pixel area 120a and the third sub-pixel area 120c; the second sub-channel 232 is located between the second sub-pixel area 120b and the third sub-pixel area 120c; the third sub-channel 233 is located between the first sub-pixel area 120a and the second sub-pixel area 120b; the fourth sub-channel 234 is located between the first sub-pixel area 120a and the dummy structure area 120d; one end of the third sub-channel 233 is connected to the first sub-channel 231 and the second sub-channel 232, and the other end of the third sub-channel 233 is connected to the fourth sub-channel 234.

[0056] Thus, through the isolation effect of each sub-channel in the isolation channel 230, while ensuring the isolation of each sub-pixel area from each other, each sub-pixel area obtains a more reasonable distribution and a suitable regional outline, which is conducive to adjusting the arrangement of multiple sub-pixels of different colors and the size of the light-emitting area.

[0057] Figure 4A schematic diagram of the projection of the first semiconductor layer in the first sub-pixel region, second sub-pixel region, third sub-pixel region and dummy structure region provided in the embodiments of this application onto the plane where the substrate is located. Figure 5 A schematic diagram of the projection of the second semiconductor layer in the first sub-pixel region, second sub-pixel region, third sub-pixel region and dummy structure region provided in the embodiments of this application onto the plane where the substrate is located.

[0058] For details, please refer to Figure 4 and Figure 5 The first sub-channel 231, the second sub-channel 232, the third sub-channel 233, and the fourth sub-channel 234 extend from the epitaxial layer 110 into the substrate 100, penetrating the second conductive semiconductor layer 113, the active layer 112, and the first conductive semiconductor layer 111. That is, the first conductive semiconductor layer 111, the active layer 112, and the second conductive semiconductor layer 113 located on the first sub-channel 231, the second sub-channel 232, the third sub-channel 233, and the fourth sub-channel 234 are all completely removed. The first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c are mutually isolated. Of course, in some other embodiments, the epitaxial layers located on the first sub-channel 231, the second sub-channel 232, the third sub-channel 233, and the fourth sub-channel 234 may only be partially removed.

[0059] In some embodiments, please refer to Figure 1 and Figure 3 The isolation channel 230 also includes a fifth sub-channel 235, which is located between the second sub-pixel region 120b and the dummy structure region 120d. The fifth sub-channel 235 extends from the epitaxial layer 110 toward the substrate 100, penetrating the second conductive semiconductor layer 113 and the active layer 112, but not penetrating the first conductive semiconductor layer 111. That is, the active layer 112 and the second conductive semiconductor layer 113 located on the fifth sub-channel 235 are completely removed, while only a portion of the first conductive semiconductor layer 111 is removed. The epitaxial layers in the second sub-pixel region 120b and the dummy structure region 120d are not completely isolated; the first conductive semiconductor layer 111 in the dummy structure region 120d and the first conductive semiconductor layer 111 in the second sub-pixel region 120b are connected via the first conductive semiconductor layer 111 located on the fifth sub-channel 235 (e.g., ...). Figure 4 (as shown); or in other words, the first conductive semiconductor layer 111 in the virtual structure region 120d is physically connected to the first conductive semiconductor layer 111 in the second sub-pixel region 120b.

[0060] In some embodiments, please refer to Figure 3The common electrode pad 220 forms an ohmic contact with the first conductive semiconductor layer 111 in the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c, which can provide low series resistance electrical conduction for the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c, thereby achieving uniformity of series resistance.

[0061] It should be noted that the dummy structure region 120d corresponding to the common electrode pad 220 is a structure that provides support for the common electrode pad 220 and is used to adjust the height of the common electrode pad 220. Here, the dummy structure region is not used as a light-emitting region, and the active layer 112 in the dummy structure region 120d will not emit light.

[0062] In this embodiment, along the thickness direction of the substrate 100, the height of the dummy structure region 120d is consistent with the heights of the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c. Thus, along the thickness direction of the substrate 100, the distances between the first electrode pad 210a, the second electrode pad 210b, the third electrode pad 210c, and the common electrode pad 220 and the first surface 101 of the substrate 100 are consistent. This improves the height difference between the electrode pads, thereby reducing the phenomena of poor soldering and over-soldering, further reducing damage to the light-emitting element, improving flip-chip soldering yield, and lowering manufacturing costs.

[0063] In some embodiments, please refer to Figure 3 The first conductive semiconductor layer 111 can be an N-type conductive semiconductor layer, and the second conductive semiconductor layer 113 can be a P-type conductive semiconductor layer; the active layer 112 can be a multi-quantum well layer. Correspondingly, the first electrode pad 210a, the second electrode pad 210b, and the third electrode pad 210c can be P-type electrode pads (P-PADs), and the common electrode pad 220 can be an N-type electrode pad (N-PAD). Here, the first conductive semiconductor layer 111 can also be referred to as the "first semiconductor layer," the second conductive semiconductor layer 113 can also be referred to as the "second semiconductor layer," and the active layer 112 can also be referred to as the "semiconductor light-emitting layer."

[0064] In some specific embodiments, the materials of the first conductive semiconductor layer 111 and the second conductive semiconductor layer 113 may include at least one of gallium nitride (GaN), gallium arsenide nitride (GaNAs), gallium phosphide (GaP), aluminum gallium arsenide (AlGaAs), and indium phosphide (InP). The materials of the first electrode pad 210a, the second electrode pad 210b, the third electrode pad 210c, and the common electrode pad 220 include at least one of titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), silver (Ag), and tin (Sn), or alloys of the above metal materials.

[0065] In some embodiments, please refer to Figure 2 The dummy structure region 120d is located inside the pixel unit region 120; the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c surround the dummy structure region 120d. The projections of the first sub-pixel region 120a, the second sub-pixel region 120b, the third sub-pixel region 120c, and the dummy structure region 120d onto the plane of the substrate 100 are located in a circular region.

[0066] In other embodiments, please refer to Figure 1 The dummy structure region 120d extends to the boundary of the pixel unit region 120; the projections of the first sub-pixel region 120a, the second sub-pixel region 120b, the third sub-pixel region 120c, and the dummy structure region 120d onto the plane of the substrate 100 are respectively located at the four vertices of the first quadrilateral region 310. Thus, with a fixed distance between each pixel unit region 120, the occupied area of ​​the pixel unit region 120 can be further increased, thereby increasing the effective light-emitting area of ​​the light-emitting element.

[0067] It should be understood that, although Figure 1 Only the projections of the first sub-pixel area 120a, the second sub-pixel area 120b, the third sub-pixel area 120c, and the dummy structure area 120d onto the plane of the substrate 100 are shown, located at the four vertices of a rectangular area. However, this application does not exclude the possibility that the projections of the first sub-pixel area 120a, the second sub-pixel area 120b, the third sub-pixel area 120c, and the dummy structure area 120d are located at the four vertices of a trapezoidal, parallelogram, rhomboid, or other quadrilateral area.

[0068] In some specific embodiments, the projected shapes of the first sub-pixel region 120a, the second sub-pixel region 120b, the third sub-pixel region 120c, and the dummy structure region 120d on the plane of the substrate 100 can be rectangular, trapezoidal, circular, triangular, or other suitable shapes; the projected shapes of the first sub-pixel region 120a, the second sub-pixel region 120b, the third sub-pixel region 120c, and the dummy structure region 120d can be the same or different. This application does not impose specific limitations on this.

[0069] In some embodiments, please refer to Figure 1 The first sub-pixel area 120a is the light-emitting area of ​​the red sub-pixel, the second sub-pixel area 120b is the light-emitting area of ​​the green sub-pixel, and the third sub-pixel area 120c is the light-emitting area of ​​the blue sub-pixel; the second sub-pixel area 120b is arranged adjacent to the dummy structure area 120d; the dummy structure area 120d and the third sub-pixel area 120c are arranged along the diagonal of the first quadrilateral area 310.

[0070] It is understandable that red, green, and blue sub-pixels can constitute a single light-emitting pixel unit (full-color LED chip), emitting red, green, and blue light. This arrangement allows the red and green sub-pixels to be arranged diagonally, and the blue sub-pixel to be diagonally arranged with the common electrode area (i.e., the area containing the dummy structure region 120d), providing more space for the red and green sub-pixels. This helps to increase the light-emitting area of ​​the red and green sub-pixels, reduces the difficulty of filling the light conversion material within them, and consequently reduces the blue light radiation intensity per unit area of ​​the light conversion material, thus increasing its lifespan.

[0071] It should be noted that the sub-pixel area is also called the "light-emitting core," and the pixel unit area is also called the "light-emitting chip." The light-emitting chip can be a blue light chip or an ultraviolet light chip; the light-emitting chip can be a Micro LED (micro light-emitting diode) chip. The red, green, and blue sub-pixels use the same light-emitting chip, and the materials and light-emitting characteristics of the light-emitting areas of each sub-pixel are highly consistent, which is beneficial to improving the display effect and long-term stability of the light-emitting element (full-color LED wafer).

[0072] In the embodiments of this application, please refer to Figure 1 On the plane where the substrate 100 is located, the projected area of ​​the third sub-pixel region 120c is smaller than the projected area of ​​the first sub-pixel region 120a and smaller than the projected area of ​​the second sub-pixel region 120b; the projected area of ​​the dummy structure region 120d is smaller than the projected area of ​​the first sub-pixel region 120a and smaller than the projected area of ​​the second sub-pixel region 120b.

[0073] In some specific embodiments, please refer to Figure 1 The first sub-pixel area 120a and the second sub-pixel area 120b can be located at the upper right corner and the lower left corner of the first quadrilateral area 310, respectively; the third sub-pixel area 120c and the virtual structure area 120d can be located at the lower right corner and the upper left corner of the first quadrilateral area 310, respectively.

[0074] Of course, in some other embodiments, the first sub-pixel area 120a and the second sub-pixel area 120b can be located at the lower left corner and the upper right corner of the first quadrilateral area 310, respectively; the third sub-pixel area 120c and the dummy structure area 120d can be located at the lower right corner and the upper left corner of the first quadrilateral area 310, respectively, or they can be located at the upper left corner and the lower right corner of the first quadrilateral area 310, respectively.

[0075] Figure 6 Microscopic image of the light-emitting element provided in the embodiments of this application; Figure 7A schematic diagram of the projection of the first pixel groove, the second pixel groove, the extension of the second pixel groove, and the third pixel groove onto the plane of the substrate, as provided in the embodiments of this application; Figure 8 This application provides a cross-sectional structural diagram of the first pixel slot, the second pixel slot, the extension of the second pixel slot, and the third pixel slot, as shown in Figures (a), (b), and (c), respectively. Figure 6 Schematic diagram of the cross-sectional structure of lines D-D', E-E', and F-F'.

[0076] In some embodiments, please refer to Figures 6 to 8 The light-emitting element also includes a first pixel groove 130a, a second pixel groove 130b and a third pixel groove 130c, all of which extend from the second surface 102 of the substrate 100 toward the epitaxial layer 110 and correspond to the positions of the first sub-pixel region 120a, the second sub-pixel region 120b and the third sub-pixel region 120c, respectively.

[0077] It should be noted that in actual fabrication, the fabricated pixel unit region 120 needs to be flip-chip bonded to a temporary carrier plate so that the first pixel groove 130a, the second pixel groove 130b, and the third pixel groove 130c can be fabricated on the second surface 102 of the substrate 100 using processes such as photolithography and etching. Therefore, it is understandable that... Figure 6 and Figure 7 This is a schematic diagram showing that the pixel unit area 120 is flipped onto a temporary carrier board, and the first pixel slot 130a, the second pixel slot 130b, and the third pixel slot 130c are located above the pixel unit area 120.

[0078] In some specific embodiments, the first pixel groove 130a, the second pixel groove 130b and the third pixel groove 130c can penetrate the substrate 100 to expose the surface of the epitaxial layer 110 in contact with the substrate 100; when the substrate 100 has good light transmittance, each pixel groove can also extend only into the substrate 100.

[0079] In the embodiments of this application, please refer to Figure 8 The first pixel groove 130a, the second pixel groove 130b and the third pixel groove 130c all penetrate the substrate 100; along the thickness direction of the substrate 100, the depth of the first pixel groove 130a, the second pixel groove 130b and the third pixel groove 130c is equal to the thickness of the substrate 100.

[0080] In some embodiments, the projected shapes of the first pixel slot 130a, the second pixel slot 130b, and the third pixel slot 130c on the plane of the substrate 100 can be rectangular, trapezoidal, circular, triangular, or other suitable shapes; the projected shapes of the first pixel slot 130a, the second pixel slot 130b, and the third pixel slot 130c can be the same or different.

[0081] In some specific embodiments, please refer to Figure 7 The projected shapes of the first pixel slot 130a, the second pixel slot 130b, and the third pixel slot 130c are the same as the projected shapes of the corresponding first sub-pixel areas 120a, 120b, and 120c, respectively. Of course, in some other embodiments, the projected shapes of the first pixel slot 130a, the second pixel slot 130b, and the third pixel slot 130c may not be the same as the projected shapes of the corresponding first sub-pixel areas 120a, 120b, and 120c. This application does not impose specific limitations in this regard.

[0082] In some embodiments, please refer to Figure 8 On the plane where the substrate 100 is located, the projections of the first pixel groove 130a, the second pixel groove 130b and the third pixel groove 130c fall into the projections of the first conductive semiconductor layer 111 of the first sub-pixel area 120a, the second sub-pixel area 120b and the third sub-pixel area 120c, respectively.

[0083] In some embodiments, please refer to Figure 8 On the plane of substrate 100, the projections of the active layer 112 in the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c fall within the projections of the first pixel slot 130a, the second pixel slot 130b, and the third pixel slot 130c, respectively. Thus, the active layer 112 has a smaller area, which is beneficial for increasing the current density of the light-emitting element, enabling the light-emitting element to operate at a higher current density, thereby improving light output efficiency.

[0084] Figure 9 This is a schematic diagram of the cross-sectional structure of a pixel unit provided in an embodiment of this application, wherein (a), (b), and (c) are respectively along... Figure 6 Schematic diagram of the cross-sectional structure of lines D-D', E-E', and F-F'.

[0085] In some embodiments, please refer to Figure 9 The light-emitting element also includes: optical materials located in the first pixel slot 130a and the second pixel slot 130b; wherein the optical material located in the first pixel slot 130a includes red light conversion material 150a, and the optical material located in the second pixel slot 130b includes green light conversion material 150b.

[0086] In some specific embodiments, the red light conversion material 150a and the green light conversion material 150b may include phosphors or quantum dots. When excited by external energy, both phosphors and quantum dots undergo electron transitions, releasing energy in the form of light. Furthermore, by adjusting the composition and size of the phosphors and quantum dots, the emitted color can be controlled, allowing each pixel slot to emit light of different colors. Here, the light conversion material is also referred to as a "color conversion material" or a "color conversion layer."

[0087] In actual preparation, please refer to Figure 9 When both the red light conversion material 150a and the green light conversion material 150b include quantum dots, the optical materials located in the first pixel slot 130a and the second pixel slot 130b also include a light diffusion material 140. The light diffusion material 140 is located between the red light conversion material 150a and the epitaxial layer 110, and between the green light conversion material 150b and the epitaxial layer 110.

[0088] Here, the light-diffusing material 140 is set, which is conducive to the quantum dot receiving uniform light irradiation, thereby effectively reducing the light intensity at the center of the quantum dot, greatly improving the light stability of the quantum dot, and improving the situation where local quantum dots are prone to light quenching due to excessive light intensity at the center, thus effectively extending the luminescence lifetime.

[0089] The light-diffusing material 140 includes diffusing particles, which can be organic materials, inorganic materials, or organic-inorganic composite materials, such as polystyrene, silicon dioxide, and titanium dioxide. By incorporating the light-diffusing particles into the interior or surface of a matrix, the light-diffusing properties are achieved through the reflection and refraction of light between the diffusing particles. The light-diffusing material 140 is also known as a "light-diffusing layer".

[0090] In some embodiments, the optical material may also be located in the third pixel slot 130c. Specifically, when the light emitted by the first sub-pixel area 120a, the second sub-pixel area 120b, and the third sub-pixel area 120c is blue light, the optical material located in the third pixel slot 130c includes a light-diffusing material 140 (such as...). Figure 9 (as shown in Figure (a)); when the light emitted by the first sub-pixel region 120a, the second sub-pixel region 120b and the third sub-pixel region 120c is ultraviolet light, the optical material located in the third pixel slot 130c may include a blue light conversion material and a light diffusion material located between the blue light conversion material and the epitaxial layer 110.

[0091] In some embodiments, please refer to Figure 7On the plane of substrate 100, the projected area of ​​the third pixel groove 130c is smaller than the projected area of ​​the first pixel groove 130a and smaller than the projected area of ​​the second pixel groove 130b. This is beneficial for increasing the filling area of ​​the red light conversion material 150a and the green light conversion material 150b, reducing the filling difficulty of the red light conversion material 150a and the green light conversion material 150b, reducing the blue light radiation intensity per unit area of ​​the red light conversion material 150a and the green light conversion material 150b, and improving the service life of the red light conversion material 150a and the green light conversion material 150b.

[0092] In some embodiments, please refer to Figure 7 The ratio of the maximum width D1 of the first pixel slot 130a along the first direction X to the maximum width D2 of the second pixel slot 130b along the first direction X is 0.4:0.6 to 0.6:0.4; the first direction X is the direction of the line connecting the farthest ends of the first pixel slot 130a and the second pixel slot 130b relative to each other.

[0093] Understandably, if the ratio of D1 to D2 is too low or too high, the width of the first pixel slot 130a or the second pixel slot 130b along the first direction X will be too small, thus affecting the efficiency of filling optical material in the first pixel slot 130a and the second pixel slot 130b. Therefore, a ratio of D1 to D2 of 0.4:0.6 to 0.6:0.4 is beneficial to reducing the difficulty of filling optical material in the first pixel slot 130a or the second pixel slot 130b and improving production efficiency.

[0094] In some embodiments, please refer to Figure 7 and Figure 8 The light-emitting element further includes: a second pixel groove extension 130b', which extends from the second surface 102 of the substrate 100 toward the epitaxial layer 110 and corresponds to the position of the dummy structure region 120d; the second pixel groove extension 130b' and the second pixel groove 130b are interconnected, and the green light conversion material 150b is also located in the second pixel groove extension 130b'.

[0095] It should be noted that, since the first conductive semiconductor layer 111 in the dummy structure region 120d and the first conductive semiconductor layer 111 in the third sub-pixel region 120c are connected by the first conductive semiconductor layer 111 located on the fifth sub-channel 235, when the second pixel groove extension 130b' and the second pixel groove 130b are interconnected, the first conductive semiconductor layer 111 located on the fifth sub-channel 235 can provide support for the green light conversion material 150b.

[0096] In some specific embodiments, the depth of the second pixel groove extension 130b' along the thickness direction of the substrate 100 is consistent with the depth of the second pixel groove 130b.

[0097] It is understandable that the second pixel slot extension 130b' and the second pixel slot 130b are interconnected to form a through slot, which expands the pixel slot filled with green light conversion material 150b to the area where the dummy structure area 120d is located. The area of ​​the pixel slot corresponding to the green sub-pixel is further increased, which is beneficial to the filling of green light conversion material 150b and the reduction of blue light radiation intensity of green light conversion material 150b, thereby improving the service life of green light conversion material 150b.

[0098] In some embodiments, please refer to Figure 7 The sum of the projected areas of the second pixel slot 130b and the second pixel slot extension 130b' on the plane of the substrate 100 is greater than the projected area of ​​the first pixel slot 130a on the plane of the substrate 100. This is beneficial for the pixel unit to emit white light. Specifically, the ratio of the areas of the first pixel slot 130a, the through slot, and the third pixel slot 130c is 3:6:1.

[0099] In some embodiments, please refer to Figure 9 The green light conversion material 150b includes quantum dots; the optical material is located in the second pixel slot 130b and the second pixel slot extension 130b', and the optical material also includes a light diffusion material 140 located between the green light conversion material 150b and the epitaxial layer 110.

[0100] It is understandable that when the active layer 112 of the dummy structure region 120d does not emit light, by providing a light diffusion material 140 at the bottom of the second pixel slot 130b and the second pixel slot extension 130b', the light emitted by the second sub-pixel region 120b can be diffused into the second pixel slot extension 130b', thereby making the green sub-pixel emit uniform green light.

[0101] In some embodiments, please refer to Figure 7The projections of the first pixel slot 130a, the second pixel slot 130b, the second pixel slot extension 130b', and the third pixel slot 130c onto the plane of the substrate 100 are located in the second quadrilateral region 320; the first pixel slot 130a extends to the first side S1 and the second side S2 of the second quadrilateral region 320, and the first side S1 and the second side S2 intersect each other; the second pixel slot 130b extends to the third side S3 and the fourth side S4 of the second quadrilateral region 320, and the third side S3 and the fourth side S4 intersect each other; the third pixel slot 130c extends to the second side S2 and the third side S3 of the second quadrilateral region 320; the projections of the second pixel slot extension 130a, the second pixel slot 130b', the second pixel slot extension 130b', and the third pixel slot 130c onto the plane of the substrate 100 are located in the second quadrilateral region 320. 0b' extends to the first side S1 and the fourth side S4 of the second quadrilateral region 320; along the extension direction of the first side S1, the maximum width D3 of the first pixel groove 130a is greater than half the length of the first side S1; along the extension direction of the second side S2, the maximum width D4 of the first pixel groove 130a is greater than half the length of the second side S2; along the extension direction of the third side S3, the maximum width D5 of the second pixel groove 130b is greater than half the length of the third side S3; along the extension direction of the fourth side S4, the maximum width D6 of the through groove formed by the mutual penetration of the second pixel groove extension 130b' and the second pixel groove 130b is equal to the length of the fourth side S4.

[0102] In this way, the area of ​​the pixel slots corresponding to the red and green sub-pixels can be further increased, which is beneficial to the filling of red light conversion material 150a and green light conversion material 150b, reduces the blue light radiation intensity of red light conversion material 150a and green light conversion material 150b, and improves the service life of red light conversion material 150a and green light conversion material 150b.

[0103] In some specific embodiments, please refer to Figure 7 The projection of the first pixel slot 130a onto the plane of the substrate 100 is composed of a first rectangle R1 and a first right trapezoid T1, with the lower base of the first right trapezoid T1 coinciding with one side of the first rectangle R1; the projection of the through slot formed by the interconnection of the second pixel slot 130b and the second pixel slot extension 130b' onto the plane of the substrate 100 is composed of a second rectangle R2, a third rectangle R3, and a second right trapezoid T2, with the upper and lower bases of the second right trapezoid T2 coinciding with one side of the second rectangle R2 and the third rectangle R3, respectively; the sloping sides of the second right trapezoid T2 and the sloping sides of the first right trapezoid T1 are adjacent and parallel to each other; the projection of the third pixel slot 130c onto the plane of the substrate 100 is a rectangle.

[0104] This maximizes the area of ​​the pixel slots corresponding to the red and green sub-pixels, which is beneficial for filling the red light conversion material 150a and the green light conversion material 150b, reducing the blue light radiation intensity of the red light conversion material 150a and the green light conversion material 150b, and improving the service life of the red light conversion material 150a and the green light conversion material 150b.

[0105] It should be noted that in actual fabrication, the corners and edges of the first pixel groove 130a, the through groove, and the third pixel groove 130c need to be chamfered to create a rounded transition between the sharp protruding parts of these three grooves. Therefore, the rectangles and trapezoids mentioned above refer to shapes whose general outlines are the same as those of rectangles and trapezoids.

[0106] Specifically, the vertex corners of the projected shape of the first pixel groove 130a, which is composed of the first rectangle R1 and the first right trapezoid T1, are chamfered; the vertex corners of the projected shape of the through groove, which is composed of the second rectangle R2, the third rectangle R3, and the second right trapezoid T2, are chamfered; and the vertex corners of the rectangle obtained by projecting the third pixel groove 130c onto the plane of the substrate 100 are chamfered.

[0107] In some embodiments, the sidewalls of the first pixel slot 130a, the through slot, and the third pixel slot 130c are further provided with an optically insulating reflective layer (not shown in the figure) to improve the optical crosstalk phenomenon between sub-pixels. The optically insulating reflective layer can be a metal reflective layer, and the material of the metal reflective layer includes, for example, chromium (Cr) and aluminum (Al); the optically insulating reflective layer can also be a DBR reflective layer (Bragg reflective layer), and the material of the DBR reflective layer includes, for example, silicon oxide (SiO2) and titanium oxide (TiO2).

[0108] In some embodiments, please refer to Figure 7 and Figure 8 The light-emitting element also includes:

[0109] The isolation barrier 160 includes a first sub-segment 160a, a second sub-segment 160b, a third sub-segment 160c, and a fourth sub-segment 160d. The first sub-segment 160a is formed by a substrate 100 located between a first pixel groove 130a and a third pixel groove 130c; the second sub-segment 160b is formed by a substrate 100 located between a second pixel groove 130b and a third pixel groove 130c; the third sub-segment 160c is formed by a substrate 100 located between a first pixel groove 130a and a second pixel groove 130b; and the fourth sub-segment 160d is formed by a substrate 100 located between a second pixel groove extension 130b' and a first pixel groove 130a. One end of the third sub-segment 160c is connected to the first sub-segment 160a and the second sub-segment 160b, and the other end of the third sub-segment 160c is connected to the fourth sub-segment 160d. The substrate 100 is the growth substrate of the epitaxial layer 110.

[0110] Understandably, when it is necessary to maximize the size of the first pixel slot 130a, the through slot, and the third pixel slot 130c, a smaller width of the isolation barrier 160 may result in poor structural stability of the light-emitting element. Therefore, using the growth substrate of the epitaxial layer 110 (i.e., substrate 100) as the isolation barrier 160 is beneficial to improving the support strength of the isolation barrier 160 and enhancing the structural stability of the light-emitting element.

[0111] In some embodiments, the material of the isolation barrier 160 includes an opaque colloidal material, which effectively prevents interference from some light emitted by a sub-pixel entering adjacent sub-pixels. It also increases refraction within the same sub-pixel area, improving light utilization efficiency, and avoids re-excitation between different sub-pixel areas. The isolation barrier 160 is used to isolate the first pixel slot 130a, the second pixel slot 130b, the through slot, and the third pixel slot 130c. In this embodiment, the substrate 100 is a silicon substrate, and the material of the isolation barrier 160 is silicon; the isolation barrier is also referred to as a "silicon wall."

[0112] In some embodiments, please refer to Figure 1 and Figure 7 On the plane of substrate 100, the projected shapes of the first sub-segment 160a, the second sub-segment 160b, the third sub-segment 160c, and the fourth sub-segment 160d in the isolation barrier 160 are consistent with the projected shapes of the first sub-channel 231, the second sub-channel 232, the third sub-channel 233, and the fourth sub-channel 234 in the isolation channel 230, and the projections of the first sub-channel 231, the second sub-channel 232, the third sub-channel 233, and the fourth sub-channel 234 fall within the projections of the first sub-segment 160a, the second sub-segment 160b, the third sub-segment 160c, and the fourth sub-segment 160d, respectively. It can be seen that the linewidth of the isolation barrier 160 is greater than the linewidth of the isolation channel 230; thus, it is beneficial to further improve the structural strength of the light-emitting element.

[0113] In some embodiments, please refer to Figure 3 The light-emitting element also includes:

[0114] A first upper reflective electrode 240a, a second upper reflective electrode 240b, and a third upper reflective electrode 240c; the first upper reflective electrode 240a is located between the second conductive semiconductor layer 113 and the first electrode pad 210a in the first sub-pixel region 120a; the second upper reflective electrode 240b is located between the second conductive semiconductor layer 113 and the second electrode pad 210b in the second sub-pixel region 120b; and the third upper reflective electrode 240c is located between the second conductive semiconductor layer 113 and the third electrode pad 210c in the third sub-pixel region 120c.

[0115] An insulating layer includes a first insulating portion 250a, a second insulating portion 250b, and a third insulating portion 250c; wherein the first insulating portion 250a covers a portion of the sidewall of the first sub-pixel region 120a and extends to the first upper reflective electrode 240a; the second insulating portion 250b covers a portion of the sidewall of the second sub-pixel region 120b and extends to the second upper reflective electrode 240b; and the third insulating portion 250c covers a portion of the sidewall of the third sub-pixel region 120c and extends to the third upper reflective electrode 240c.

[0116] A first lower reflective electrode 260a, a second lower reflective electrode 260b, and a third lower reflective electrode 260c; the first lower reflective electrode 260a covers the sidewall of the first sub-pixel region 120a not covered by the first insulating portion 250a and extends onto the first insulating portion 250a; the second lower reflective electrode 260b covers the sidewall of the second sub-pixel region 120b not covered by the second insulating portion 250b and extends onto the second insulating portion 250b; the third lower reflective electrode 260c covers the sidewall of the third sub-pixel region 120c not covered by the third insulating portion 250c and extends onto the third insulating portion 250c; wherein,

[0117] In the thickness direction of the substrate 100, the first lower reflective electrode 260a and the first upper reflective electrode 240a partially overlap, the second lower reflective electrode 260b and the second upper reflective electrode 240b partially overlap, and the third lower reflective electrode 260c and the third upper reflective electrode 240c partially overlap.

[0118] Understandably, on the one hand, by setting multiple lower reflective electrodes as optical isolation reflective layers, optical isolation between each sub-pixel region can be achieved, and optical crosstalk between each sub-pixel can be prevented; on the other hand, multiple upper reflective electrodes partially overlap with their corresponding lower reflective electrodes (the upper reflective electrodes and the lower reflective electrodes overlap in the vertical direction), which can reflect all the emitted light from the active layer 112 to the first light-emitting surface (the side of the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c that is close to the first surface 101 of the substrate 100).

[0119] In some specific embodiments, the first upper reflective electrode 240a, the second upper reflective electrode 240b, and the third upper reflective electrode 240c are respectively electrically connected to at least a portion of the second conductive semiconductor layer 113 in the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c to form ohmic contacts; and the first upper reflective electrode 240a, the second upper reflective electrode 240b, and the third upper reflective electrode 240c are respectively electrically connected to at least a portion of the first electrode pad 210a, the second electrode pad 210b, and the third electrode pad 210c to form ohmic contacts.

[0120] The first lower reflective electrode 260a, the second lower reflective electrode 260b, and the third lower reflective electrode 260c are respectively electrically connected to at least a portion of the first conductive semiconductor layer 111 in the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c to form ohmic contacts.

[0121] The first upper reflective electrode 240a, the second upper reflective electrode 240b, and the third upper reflective electrode 240c can be P-ohm contact electrodes, and the first lower reflective electrode 260a, the second lower reflective electrode 260b, and the third lower reflective electrode 260c can be N-ohm contact electrodes.

[0122] In some embodiments, please refer to Figure 3 The light-emitting element also includes a conductive connection portion 270, which covers the isolation channel 230, the sidewalls of the dummy structure region 120d, and extends to the surface of the dummy structure region 120d away from the substrate 100. The first lower reflective electrode 260a, the second lower reflective electrode 260b, and the third lower reflective electrode 260c are electrically connected to the common electrode pad 220 through the conductive connection portion 270 to form an ohmic contact.

[0123] In some specific embodiments, the conductive connection portion 270 is integrally formed with the first lower reflective electrode 260a, the second lower reflective electrode 260b, and the third lower reflective electrode 260c.

[0124] In some embodiments, please refer to Figure 3 The light-emitting element also includes an isolation layer 280, which covers the first lower reflective electrode 260a, the second lower reflective electrode 260b, the third lower reflective electrode 260c, and the conductive connection portion 270. The isolation layer 280 electrically isolates the first upper reflective electrode 240a and the first lower reflective electrode 260a from each other, electrically isolates the second upper reflective electrode 240b and the second lower reflective electrode 260b from each other, and electrically isolates the third upper reflective electrode 240c and the third lower reflective electrode 260c from each other.

[0125] In actual fabrication, the materials of the first upper reflective electrode 240a, the second upper reflective electrode 240b, and the third upper reflective electrode 240c may include at least one of titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and silver (Ag); the materials of the first lower reflective electrode 260a, the second lower reflective electrode 260b, and the third lower reflective electrode 260c may include at least one of titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and silver (Ag); and the materials of the insulating layer and the isolation layer 280 include, but are not limited to, silicon oxide and silicon nitride.

[0126] In some embodiments, please refer to Figure 9 The light-emitting element also includes:

[0127] The first filter layer 170a, the second filter layer 170b, and the third filter layer 170c are all located on the second surface 102 of the substrate 100. The first filter layer 170a covers the first pixel slot 130a, the second filter layer 170b covers the second pixel slot 130b and the second pixel slot extension 130b', and the third filter layer 170c covers the third pixel slot 130c. This facilitates further improvement in the color purity of the red, green, and blue sub-pixels, enabling more precise control of the displayed colors. Furthermore, it improves the blackness of the light-emitting elements, reducing reflection of ambient light and thus enhancing contrast.

[0128] In some specific embodiments, the filter layer can be a color filter (CF) that only allows light within a specific wavelength range to pass through. The type of filter can be set according to the desired color of the emitted light. For example, a red filter layer (CF-R) can cover the first pixel slot 130a, a green filter layer (CF-G) can cover the through slot, and a blue filter layer (CF-B) can cover the third pixel slot 130c.

[0129] In actual fabrication, when the light emitted by each sub-pixel region is blue light, the red and green filter layers can be filter materials used to filter out blue light that is not absorbed by the light conversion material. The blue filter layer can be a transparent layer or a filter material used to filter wavelengths other than blue light.

[0130] In some embodiments, please refer to Figure 9 The light-emitting element also includes:

[0131] A protective capping layer 180 covers the first filter layer 170a, the second filter layer 170b, the third filter layer 170c, and the second surface 102 of the substrate 100.

[0132] Understandably, by setting a protective capping layer 180, on the one hand, the structural strength of the light-emitting unit can be improved; on the other hand, it can effectively isolate the optical materials, filter layer and outside air from contact, thus protecting the optical materials and filter layer. For example, when the optical materials include quantum dots, it can reduce the problem of quantum dot particles decaying or even becoming inactive due to water vapor and oxygen in the air, thereby improving the lifespan of the quantum dots.

[0133] In some specific embodiments, the protective capping layer 180 can be formed on the first filter layer 170a, the second filter layer 170b, the third filter layer 170c, and the second surface 102 of the substrate 100 by sputtering or vapor deposition. The material of the protective capping layer 180 can be an insulating material with high light transmittance. For example, the material of the protective capping layer 180 includes inorganic materials such as silicon oxide (SiO2), silicon nitride (SiN), aluminum oxide (Al2O3), glass, and sapphire, or transparent polymer materials such as silicone and resin.

[0134] Based on this, the present application also provides a light-emitting device, which includes a plurality of seamlessly spliced ​​light-emitting elements as described in any of the above embodiments.

[0135] Understandably, light-emitting devices obtained by seamlessly splicing multiple light-emitting elements have a large size and are suitable for large-screen display devices, such as LCD TVs, computer monitors, etc.

[0136] Based on this, please refer to Figure 1 This application also provides a light-emitting element, including:

[0137] The substrate 100 includes a first surface 101 and a second surface 102 that are opposite to each other;

[0138] The epitaxial layer 110 is located on the first surface 101 of the substrate 100 and includes a first conductive semiconductor layer 111, an active layer 112, and a second conductive semiconductor layer 113 stacked sequentially in a direction away from the substrate 100. The epitaxial layer 110 is patterned and divided into multiple pixel unit regions 120 arranged in an array. Each pixel unit region 120 includes a first sub-pixel region 120a, a second sub-pixel region 120b, a third sub-pixel region 120c, and a dummy structure region 120d. The first sub-pixel region 120a, the second sub-pixel region 120b, the third sub-pixel region 120c, and the dummy structure region 120d are distributed at different positions in the pixel unit region 120 and extend to the boundary of the pixel unit region 120 respectively.

[0139] The projections of the first sub-pixel area 120a, the second sub-pixel area 120b, the third sub-pixel area 120c, and the dummy structure area 120d onto the plane of the substrate 100 are located at the four vertices of the first quadrilateral region 310, respectively. The second sub-pixel area 120b is arranged adjacent to the dummy structure area 120d. The dummy structure area 120d and the third sub-pixel area 120c are arranged along the diagonal of the first quadrilateral region 310. The first sub-pixel area 120a is the light-emitting area of ​​the red sub-pixel, the second sub-pixel area 120b is the light-emitting area of ​​the green sub-pixel, and the third sub-pixel area 120c is the light-emitting area of ​​the blue sub-pixel.

[0140] It is understood that in this embodiment of the application, the second sub-pixel area 120b is arranged adjacent to the dummy structure area 120d; the dummy structure area 120d and the third sub-pixel area 120c are arranged along the diagonal of the first quadrilateral area 310. This allows the red and green sub-pixels to be arranged diagonally, and the blue sub-pixel to be arranged diagonally with the common electrode area (i.e., the area where the dummy structure area 120d is located), providing more space for the red and green sub-pixels. This helps to increase the area of ​​the red and green sub-pixels, reduces the difficulty of filling the light conversion material in the red and green sub-pixels, thereby reducing the blue light radiation intensity per unit area of ​​the light conversion material and increasing the service life of the light conversion material.

[0141] It should be noted that the light-emitting element embodiments and light-emitting device embodiments provided in this application belong to the same concept; the technical features in the technical solutions described in each embodiment can be arbitrarily combined without conflict.

[0142] It should be understood that the above embodiments are exemplary and are not intended to encompass all possible implementations included in the claims. Various modifications and changes can be made to the above embodiments without departing from the scope of this disclosure. Similarly, the various technical features of the above embodiments can be arbitrarily combined to form other embodiments of this application that may not be explicitly described. Therefore, the above embodiments only illustrate several implementations of this application and do not limit the scope of protection of this patent application.

Claims

1. A light-emitting element, characterized in that, The light-emitting element includes: The substrate includes a first surface and a second surface that are opposite to each other; An epitaxial layer, located on a first surface of the substrate, comprises a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer sequentially stacked along a direction away from the substrate; the epitaxial layer is patterned and divided into multiple pixel unit regions arranged in an array, each pixel unit region comprising a first sub-pixel region, a second sub-pixel region, a third sub-pixel region, and a dummy structure region; the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region are distributed at different positions in the pixel unit region and extend to the boundary of the pixel unit region respectively; the dummy structure region is located inside the pixel unit region or extends to the boundary of the pixel unit region. The first electrode pad, the second electrode pad, the third electrode pad, and the common electrode pad are located on the side of the first sub-pixel region, the second sub-pixel region, the third sub-pixel region, and the dummy structure region away from the substrate, respectively; the first electrode pad, the second electrode pad, and the third electrode pad are electrically connected to the second conductive semiconductor layer in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region, respectively; the common electrode pad is electrically connected to the first conductive semiconductor layer in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region.

2. The light-emitting element according to claim 1, characterized in that, The virtual structure region extends to the boundary of the pixel unit region; The projections of the first sub-pixel region, the second sub-pixel region, the third sub-pixel region, and the dummy structure region onto the plane of the substrate are respectively located at the four vertices of the first quadrilateral region.

3. The light-emitting element according to claim 2, characterized in that, The first sub-pixel area is the light-emitting area of ​​the red sub-pixel, the second sub-pixel area is the light-emitting area of ​​the green sub-pixel, and the third sub-pixel area is the light-emitting area of ​​the blue sub-pixel; The second sub-pixel region is arranged adjacent to the virtual structure region; The virtual structure area and the third sub-pixel area are arranged along the diagonal of the first quadrilateral area.

4. The light-emitting element according to any one of claims 1 to 3, characterized in that, The light-emitting element also includes: The first pixel slot, the second pixel slot, and the third pixel slot all extend from the second surface of the substrate toward the epitaxial layer, and correspond to the positions of the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region, respectively. Optical materials are located in the first pixel slot and the second pixel slot; wherein the optical material located in the first pixel slot includes a red light conversion material, and the optical material located in the second pixel slot includes a green light conversion material.

5. The light-emitting element according to claim 4, characterized in that, The light-emitting element also includes: The second pixel groove extension extends from the second surface of the substrate toward the epitaxial layer and corresponds to the position of the dummy structure region; the second pixel groove extension is interconnected with the second pixel groove, and the green light conversion material is also located in the second pixel groove extension.

6. The light-emitting element according to claim 5, characterized in that, The sum of the projected areas of the second pixel slot and the extension of the second pixel slot on the plane of the substrate is greater than the projected area of ​​the first pixel slot on the plane of the substrate.

7. The light-emitting element according to claim 4, characterized in that, On the plane where the substrate is located, the projected area of ​​the third pixel slot is smaller than the projected area of ​​the first pixel slot and smaller than the projected area of ​​the second pixel slot.

8. The light-emitting element according to claim 1, characterized in that, On the plane where the substrate is located, the projected area of ​​the third sub-pixel region is smaller than the projected area of ​​the first sub-pixel region and smaller than the projected area of ​​the second sub-pixel region; the projected area of ​​the dummy structure region is smaller than the projected area of ​​the first sub-pixel region and smaller than the projected area of ​​the second sub-pixel region.

9. The light-emitting element according to claim 4, characterized in that, The ratio of the maximum width of the first pixel slot along the first direction to the maximum width of the second pixel slot along the first direction is 0.4:0.6 to 0.6:0.4; the first direction is the direction of the line connecting the farthest ends of the first pixel slot and the second pixel slot relative to each other.

10. The light-emitting element according to claim 5, characterized in that, The projections of the first pixel slot, the second pixel slot, the extension of the second pixel slot, and the third pixel slot onto the plane of the substrate are located in the second quadrilateral region. The first pixel slot extends to the first and second sides of the second quadrilateral region, and the first and second sides intersect each other; The second pixel slot extends to the third and fourth sides of the second quadrilateral region, and the third and fourth sides intersect each other; The third pixel slot extends to the second side and the third side of the second quadrilateral region; the second pixel slot extension extends to the first side and the fourth side of the second quadrilateral region; Along the extension direction of the first side, the maximum width of the first pixel slot is greater than half the length of the first side; along the extension direction of the second side, the maximum width of the first pixel slot is greater than half the length of the second side; along the extension direction of the third side, the maximum width of the second pixel slot is greater than half the length of the third side; along the extension direction of the fourth side, the maximum width of the through slot formed by the interconnection between the extension portion of the second pixel slot and the second pixel slot is equal to the length of the fourth side.

11. The light-emitting element according to claim 5, characterized in that, The projection of the first pixel slot onto the plane of the substrate is composed of a first rectangle and a first right trapezoid, wherein the lower base of the first right trapezoid coincides with one side of the first rectangle; The projection of the through groove formed by the mutual penetration of the second pixel groove and the extension of the second pixel groove on the plane of the substrate is composed of a second rectangle, a third rectangle and a second right trapezoid, wherein the upper base and the lower base of the second right trapezoid coincide with one side of the second rectangle and the third rectangle respectively; The hypotenuse of the second right trapezoid is adjacent to and parallel to the hypotenuse of the first right trapezoid; The projection of the third pixel slot onto the plane of the substrate is rectangular.

12. The light-emitting element according to claim 5, characterized in that, The green light conversion material includes quantum dots; The optical material is located in the second pixel slot and the extension of the second pixel slot, and the optical material also includes a light diffusion material located between the green light conversion material and the epitaxial layer.

13. The light-emitting element according to claim 5, characterized in that, The light-emitting element also includes: An isolation barrier includes a first sub-segment, a second sub-segment, a third sub-segment, and a fourth sub-segment; wherein the first sub-segment is formed by a substrate located between the first pixel slot and the third pixel slot; the second sub-segment is formed by a substrate located between the second pixel slot and the third pixel slot; the third sub-segment is formed by a substrate located between the extension of the second pixel slot and the first pixel slot; one end of the third sub-segment is connected to the first sub-segment and the second sub-segment, and the other end of the third sub-segment is connected to the fourth sub-segment; the substrate is the growth substrate of the epitaxial layer.

14. The light-emitting element according to claim 13, characterized in that, The light-emitting element also includes: An isolation channel includes a first sub-channel, a second sub-channel, a third sub-channel, and a fourth sub-channel; wherein, the first sub-channel is located between the first sub-pixel area and the third sub-pixel area; the second sub-channel is located between the second sub-pixel area and the third sub-pixel area; the third sub-channel is located between the first sub-pixel area and the second sub-pixel area; the fourth sub-channel is located between the first sub-pixel area and the virtual structure area; one end of the third sub-channel connects the first sub-channel and the second sub-channel, and the other end of the third sub-channel connects the fourth sub-channel; On the plane where the substrate is located, the projected shapes of the first sub-segment, the second sub-segment, the third sub-segment, and the fourth sub-segment in the isolation barrier are consistent with the projected shapes of the first sub-channel, the second sub-channel, the third sub-channel, and the fourth sub-channel in the isolation channel, and the projections of the first sub-channel, the second sub-channel, the third sub-channel, and the fourth sub-channel fall within the projections of the first sub-segment, the second sub-segment, the third sub-segment, and the fourth sub-channel, respectively.

15. The light-emitting element according to claim 1, characterized in that, The light-emitting element also includes: The first pixel slot, the second pixel slot, and the third pixel slot all extend from the second surface of the substrate toward the epitaxial layer, and respectively correspond to the positions of the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; wherein... On the plane where the substrate is located, the projections of the active layer in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region fall into the projections of the first pixel slot, the second pixel slot, and the third pixel slot, respectively.

16. The light-emitting element according to claim 1, characterized in that, The light-emitting element also includes: The isolation channel includes a fifth sub-channel, which is located between the second sub-pixel region and the dummy structure region; the fifth sub-channel extends from the epitaxial layer toward the substrate through the second conductive semiconductor layer and the active layer, but does not extend through the first conductive semiconductor layer.

17. The light-emitting element according to claim 1, characterized in that, The light-emitting element also includes: A first upper reflective electrode, a second upper reflective electrode, and a third upper reflective electrode; the first upper reflective electrode is located between the second conductive semiconductor layer and the first electrode pad in the first sub-pixel region; the second upper reflective electrode is located between the second conductive semiconductor layer and the second electrode pad in the second sub-pixel region; the third upper reflective electrode is located between the second conductive semiconductor layer and the third electrode pad in the third sub-pixel region; An insulating layer includes a first insulating portion, a second insulating portion, and a third insulating portion; wherein the first insulating portion covers a portion of the sidewall of the first sub-pixel region and extends to the first upper reflective electrode; the second insulating portion covers a portion of the sidewall of the second sub-pixel region and extends to the second upper reflective electrode; and the third insulating portion covers a portion of the sidewall of the third sub-pixel region and extends to the third upper reflective electrode. A first lower reflective electrode, a second lower reflective electrode, and a third lower reflective electrode; the first lower reflective electrode covers the sidewall of the first sub-pixel region not covered by the first insulating portion and extends to the first insulating portion; the second lower reflective electrode covers the sidewall of the second sub-pixel region not covered by the second insulating portion and extends to the second insulating portion; the third lower reflective electrode covers the sidewall of the third sub-pixel region not covered by the third insulating portion and extends to the third insulating portion; wherein... In the substrate thickness direction, the first lower reflective electrode partially overlaps with the first upper reflective electrode, the second lower reflective electrode partially overlaps with the second upper reflective electrode, and the third lower reflective electrode partially overlaps with the third upper reflective electrode.

18. The light-emitting element according to claim 5, characterized in that, The light-emitting element also includes: The first filter layer, the second filter layer, and the third filter layer are all located on the second surface of the substrate; wherein, the first filter layer covers the first pixel groove, the second filter layer covers the second pixel groove and the extension of the second pixel groove, and the third filter layer covers the third pixel groove; A protective capping layer covers the first filter layer, the second filter layer, the third filter layer, and the second surface of the substrate.

19. The light-emitting element according to claim 1, characterized in that, The shortest distance between the pixel unit area and the boundary of the light-emitting element is half the distance between two adjacent pixel unit areas.

20. A light-emitting device, characterized in that, The light-emitting device includes a plurality of seamlessly spliced ​​light-emitting elements as described in any one of claims 1 to 19.

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