Hardware interrupt control method and electronic equipment

Abstract

The invention discloses a hardware interrupt control method and electronic equipment, and relates to the technical field of computers. A fault threshold for triggering hardware interrupt and a preset timing duration of a timer in a polling mode are adjusted through the polling mode; after polling is finished, adjusting a fault threshold of triggering hardware interruption next time and a preset timing duration of a timer in a polling mode according to a fault threshold of triggering hardware interruption last time, a preset timing duration of the timer, a fluctuation quantity of each polling period of polling and a hardware error count, and continuously and repeatedly adjusting the fault threshold of triggering hardware interruption next time and the preset timing duration of the timer in the polling mode; and finally, the fault threshold for triggering hardware interruption and the preset timing duration of the timer in the polling mode are stabilized at a fixed value, so that the balanced storage performance and the fault localization are realized.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a hardware interrupt control method and electronic device. Background Technology

[0002] Storage devices can experience correctable errors (CE) and uncorrectable errors (UCE) during data storage. For uncorrectable errors, the fault location must be identified and repaired. The CPU portion of storage device fault localization is the most complex, with hardware faults categorized as CPU-specific CE / UCE errors, memory CE / UCE errors, and PCIe device CE / UCE errors. When a hardware fault occurs, it's necessary to determine whether to enable CPU hardware interrupts (SMI interrupts). During a hardware interrupt, the fault type and location are parsed and sent to the BMC, which records it in the SEL log. However, frequent hardware interrupts can negatively impact storage performance. Therefore, storage performance and fault localization are contradictory and require a balance. Summary of the Invention

[0003] This application provides a hardware interrupt control method and electronic device to at least solve the problem in the related art where the storage performance and fault location of storage devices are contradictory, and frequent hardware interruptions affect the performance of storage services.

[0004] This application provides a hardware interrupt control method, including: A hardware interrupt is triggered in response to a hardware error occurring in the target hardware of the storage device, and the status of the hardware interrupt is monitored. In response to the hardware interrupt being disabled, the current fault threshold that triggered the hardware interrupt is obtained, a timer is started, and a polling task is initiated within the preset timeout period of the timer to query the hardware error count in each polling cycle. Obtain the fluctuation of the error count in the current polling period relative to the error count in the first polling period, and sequentially determine whether the fluctuation of each polling period within the preset time period is greater than or equal to the first threshold. If the fluctuation amount of any polling cycle within the preset time period is greater than or equal to the first threshold, the polling task is stopped, the timer is cleared, the preset time period is kept unchanged, and the current fault threshold is adjusted according to the hardware error count. In response to the fact that the fluctuation of each polling cycle within the preset time period is less than the first threshold, the polling task is stopped, the timer is cleared, the current fault threshold is kept unchanged, and the preset time period is adjusted according to the hardware error count. In response to the completion of the current fault threshold or preset timer duration adjustment, a new determination is made as to whether to trigger a hardware interrupt.

[0005] This application also provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of any of the above-described hardware interrupt control methods when executing the computer program. A hardware interrupt is triggered in response to a hardware error occurring in the target hardware of the storage device, and the status of the hardware interrupt is monitored. In response to the hardware interrupt being disabled, the current fault threshold that triggered the hardware interrupt is obtained, a timer is started, and a polling task is initiated within the preset timeout period of the timer to query the hardware error count in each polling cycle. Obtain the fluctuation of the error count in the current polling period relative to the error count in the first polling period, and sequentially determine whether the fluctuation of each polling period within the preset time period is greater than or equal to the first threshold. If the fluctuation amount of any polling cycle within the preset time period is greater than or equal to the first threshold, the polling task is stopped, the timer is cleared, the preset time period is kept unchanged, and the current fault threshold is adjusted according to the hardware error count. In response to the fact that the fluctuation of each polling cycle within the preset time period is less than the first threshold, the polling task is stopped, the timer is cleared, the current fault threshold is kept unchanged, and the preset time period is adjusted according to the hardware error count. In response to the completion of the current fault threshold or preset timer duration adjustment, a new determination is made as to whether to trigger a hardware interrupt.

[0006] This application utilizes a polling method to adjust the fault threshold that triggers a hardware interrupt and the preset duration of the timer in the polling method. After the polling ends, the fault threshold that triggers the hardware interrupt and the preset duration of the timer in the polling method are adjusted based on the previous fault threshold, the preset duration of the timer, the fluctuation of each polling cycle, and the hardware error count. This adjustment is repeated continuously until the fault threshold that triggers the hardware interrupt and the preset duration of the timer in the polling method are stabilized at a fixed value, thereby achieving a balance between storage performance and fault location. Attached Figure Description

[0007] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0008] Figure 1 This is a schematic diagram of the first hardware fault handling process in the prior art; Figure 2This is a schematic diagram of the second type of hardware fault handling in the prior art; Figure 3 This is an application environment diagram of a hardware interrupt control method in one embodiment of this application; Figure 4 This is a flowchart illustrating a hardware interrupt control method in one embodiment of this application; Figure 5 This is a structural block diagram of a hardware interrupt control device in one embodiment of this application; Figure 6 This is an internal structural diagram of a computer device in one embodiment of this application. Detailed Implementation

[0009] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0010] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0011] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0012] RAS: Reliability, Availability, and Serviceability are three core metrics for measuring the reliability of a storage system. Reliability refers to the system's ability to self-heal or isolate minor faults, preventing unexpected crashes. Availability emphasizes the system's continuous operation capability, enabling rapid recovery even in the event of a failure, minimizing system downtime. Maintainability refers to the system providing diagnostic tools and logs for quick problem localization. Reliability and availability require comprehensive consideration from the system design perspective, which is technically challenging. Storage device manufacturers typically start with maintainability, increasing the localization of problems. Hardware fault categories include CPU CE / UCE errors, memory CE / UCE errors, and PCIe device CE / UCE errors.

[0013] like Figure 1 As shown, the HYGON platform CPU, similar to x86, also has RSA-related mechanisms, and the RSA fault reporting process is largely the same. Enabling the CPU's SMI interrupt (hardware interrupt), the CPU triggers an SMI interrupt upon detecting a fault, notifying the BIOS. In the SMI interrupt service routine (belonging to the BIOS firmware), the error type is parsed, and an IPMI-SEL message is encapsulated and sent to the BMC. The BMC records this in the SEL log (system event log). Alternatively, the operating system (OS) can be notified via an NMI interrupt. This provides the storage system with extremely high RSA fault localization (because the SEL log can accurately pinpoint the memory fault type and location, PCIe device fault type and corresponding BDF number, and CPU fault type). However, this also introduces a problem: frequent interrupts can impact storage service performance. Actual testing showed that with continuous CE / UCE faults, a 96% performance drop occurs if an SMI interrupt occurs every 1 second, and a 20% performance drop occurs every 5 seconds. Therefore, fault localization and performance are contradictory, requiring a balance to be found.

[0014] like Figure 2 As shown, if a fixed CE / UCE error threshold is set before an interrupt is triggered by the CE or UCE error counter, and an SMI interrupt is only triggered when the error threshold is exceeded, then if the CE / UCE error threshold is too high, the BIOS cannot report the fault to the BMC or OS in a timely manner, affecting the localization and fault handling at the OS level, especially for UCE errors. If the CE / UCE error threshold is too low, SMI interrupts may still be relatively frequent, and if the traffic volume is high at this time, the impact on performance will inevitably be significant.

[0015] The hardware interrupt control method provided in this application can be applied to, for example... Figure 3 In the application environment shown, by dynamically switching between SMI interrupts and polling, and dynamically adjusting CE / UCE error thresholds based on business performance status, a dynamic balance can be found between storage performance and fault localization. This mainly consists of the following parts: the initial fault trigger interrupt part (i.e., the default configuration); triggering the interrupt, reporting the CE / UCE fault to the BMC, and reconfiguring the CE / UCE threshold and timer parts; switching CE / UCE error handling from interrupt to polling; the timer processing part; and readjusting the CE / UCE threshold and timer parts based on business performance.

[0016] like Figure 4 As shown, an embodiment of this application provides a hardware interrupt control method, including the following steps: Step S1: In response to a hardware error occurring in the target hardware of the storage device, a hardware interrupt is triggered, and the system monitors whether the hardware interrupt is disabled. Step S2: In response to the hardware interrupt being disabled, the current fault threshold that triggered the hardware interrupt is obtained, a timer is started, and a polling task is initiated within the preset timeout period to query the hardware error count in each polling cycle. Step S3: Obtain the fluctuation of the error count in the current polling cycle relative to the error count in the first polling cycle, and sequentially determine whether the fluctuation of each polling cycle within the preset time period is greater than or equal to the first threshold. Step S4: In response to the fluctuation amount of any polling cycle within the preset time period being greater than or equal to the first threshold, stop the polling task, clear the timer, keep the preset time period unchanged, and adjust the current fault threshold according to the hardware error count. Step S5: In response to the fact that the fluctuation amount of each polling cycle within the preset time period is less than the first threshold, the polling task is stopped, the timer is cleared, the current fault threshold is kept unchanged, and the preset time period is adjusted according to the hardware error count. Step S6: In response to the completion of the current fault threshold or preset timer duration adjustment, re-determine whether to trigger a hardware interrupt.

[0017] Among them, the fault threshold is a critical value used to define the change in the state of a system or component.

[0018] This application achieves a balance between storage performance and fault location by adjusting the fault threshold that triggers hardware interrupts and the preset timing duration of the timer in the polling method.

[0019] In this embodiment, in response to a hardware error occurring in the target hardware of the storage device, a hardware interrupt is triggered, and monitoring whether the hardware interrupt is disabled includes: Obtain the fault type of the target hardware of the storage device. The fault type includes correctable faults and uncorrectable faults. Set default fault thresholds for correctable and uncorrectable faults of the target hardware respectively. Monitor whether the target hardware has encountered a hardware error; In response to a hardware error in the target hardware, a hardware interrupt is triggered, the fault information is parsed to obtain the fault type and location of the target hardware, and the fault type and location are encapsulated as fault information and sent to the manager to be recorded in the system event log. In response to recording the failure information in the system event log, hardware interrupts are disabled.

[0020] Initially, SMI interrupts are enabled, and the threshold for triggering an SMI interrupt with CE / UCE is set to one, so timers are not yet needed. Therefore, when a CE / UCE occurs, an SMI interrupt is triggered. After an SMI interrupt is triggered, the BIOS enters SMM state. In the SMI interrupt service routine, the error information (CPU-CE / UCE, PCIe-CE / UCE, or MEM-CE / UCE) is first parsed, and then the fault information is encapsulated in the IPMI-SEL data field and sent to the BMC. Upon receiving this message, the BMC records the SEL log according to the SEL format, facilitating subsequent export of the SEL log to locate the problem. Finally, SMI interrupts are disabled, the threshold is reconfigured (consistent with the default value on the first trigger), the timer is enabled (with the timing interval as the base value), and the CE / UCE polling mode is enabled to check its count.

[0021] In this embodiment, obtaining the fluctuation of the error count in the current polling period relative to the error count in the first polling period, and sequentially determining whether the fluctuation in each polling period within a preset time interval is greater than or equal to a first threshold includes: Errors within the current polling cycle are classified into correctable errors and uncorrectable errors. Record the first correctable error count and the first uncorrectable error count of the target hardware within the first polling cycle; Record the current correctable error count and the current uncorrectable error count of the target hardware in the next query cycle; The difference between the current correctable error count and the first correctable error count is used as the fluctuation of correctable errors in the current polling period. It is then determined whether the fluctuation of correctable errors is greater than or equal to the first threshold. The difference between the current uncorrectable error count and the initial uncorrectable error count is used as the fluctuation of uncorrectable errors within the current polling period. It is then determined whether the fluctuation of uncorrectable errors is greater than or equal to the first threshold.

[0022] In this embodiment, in response to the fluctuation amount of any polling cycle within a preset time period being greater than or equal to a first threshold, the polling task is stopped, the timer is cleared, the preset time period remains unchanged, and the current fault threshold is adjusted according to the hardware error count, including: If the fluctuation of correctable or uncorrectable errors in any polling cycle within the preset time interval is greater than or equal to the first threshold, the polling task is stopped, the timer corresponding to the correctable or uncorrectable error is cleared, and the preset time interval of the timer corresponding to the correctable or uncorrectable error remains unchanged. In response to the current correctable error count being greater than or equal to the second threshold, the current fault threshold for correctable errors is increased. In response to the current uncorrectable error count being greater than or equal to the second threshold, the current fault threshold for uncorrectable errors is increased. When the current correctable error count is less than the second threshold, the current fault threshold for correctable errors remains unchanged. When the current uncorrectable error count is less than the second threshold, the current fault threshold for uncorrectable errors remains unchanged.

[0023] When the fluctuation of the error count exceeds the preset fluctuation range within the preset timer duration, simply increasing the current fault threshold can reduce the number of hardware interrupts triggered, thereby balancing storage performance and fault localization.

[0024] In this embodiment, increasing the current fault threshold for correctable errors or increasing the current fault threshold for uncorrectable errors includes: Set the fault threshold for correctable or uncorrectable errors to 10. x x is a positive integer; When setting the default fault threshold, the value of x is zero; When the current fault threshold for correctable or uncorrectable errors is increased, the adjusted fault threshold becomes 10. x +1 .

[0025] In this case, the default fault threshold is x=0, and the default fault threshold is 10. 0 =1; When the current fault threshold is increased, the adjusted fault threshold is 10. x+1 That is, 10 1 =10; that is, the first increase in the current fault threshold is from 1 to 10.

[0026] In this embodiment, in response to the fact that the fluctuation amount of each polling cycle within the preset time interval is less than the first threshold, the polling task is stopped, the timer is cleared, the current fault threshold remains unchanged, and the preset time interval is adjusted according to the hardware error count, including: If the fluctuation of correctable or uncorrectable errors in each polling cycle within the preset time period is less than the first threshold, then the polling task is stopped, the timer corresponding to the correctable or uncorrectable error is cleared, and the current fault threshold corresponding to the correctable or uncorrectable error remains unchanged. In response to the current correctable error count being greater than or equal to the second threshold, the preset timing duration of the timer corresponding to the correctable error is increased; In response to the current uncorrectable error count being greater than or equal to the second threshold, the preset timing duration of the timer corresponding to the uncorrectable error is increased; When the current correctable error count is less than or equal to the second threshold, the preset timing duration of the timer corresponding to the correctable error remains unchanged; When the current uncorrectable error count is less than or equal to the second threshold, the preset timing duration of the timer corresponding to the uncorrectable error remains unchanged.

[0027] If no error count fluctuation exceeds the preset fluctuation range within the preset timer duration, simply increasing the preset timer duration can improve the accuracy of fault location, thus balancing storage performance and fault location.

[0028] In this embodiment, increasing the preset timing duration of the timer corresponding to a correctable error or increasing the preset timing duration of the timer corresponding to an uncorrectable error includes: Set the preset timing duration for the timer corresponding to correctable or uncorrectable errors to 2 seconds. y y is a positive integer; When setting the initial value of the preset timer duration, the value of y is one; When the preset timer duration is increased, the adjusted preset timer duration is 2. y+1 .

[0029] When setting the initial value of the preset timer duration, y=1, and the initial value of the preset timer duration is 2. 1 =2 seconds; When the preset timer duration is increased, the adjusted preset timer duration is 2 seconds. y+1 , that is, 2 2 =4 seconds; that is, the first time the preset timer duration is increased from 2 seconds to 4 seconds.

[0030] In this embodiment, the hardware interrupt control method further includes: Obtain the hardware type of the storage device, which includes the processor, memory, and pluggable devices; Obtain the storage performance of the storage device and classify the performance level of the storage device into idle, typical, and busy categories based on its storage performance. Obtain the fault type of the target hardware when a hardware interrupt is triggered; Adjust the preset timing duration of the timer or the current fault threshold corresponding to each fault type according to the hardware type and current performance level of the storage device.

[0031] CPU RAS faults are categorized into three main types: PCIe-CE / PCIe-UCE, CPU-CE / CPU-UCE, and MEM-CE / MEM-UCE. The thresholds for each type of error can differ. CE faults are correctable and have a small impact on the system, while UCE faults are uncorrectable and have a relatively larger impact. Therefore, the CE threshold can differ from the UCE threshold. The CE fault threshold can be defined as larger, and the UCE fault threshold as smaller. However, for ease of description, this application temporarily defines the CE and UCE fault thresholds as exactly the same, without distinguishing between the PCIe / CPU / MEM categories.

[0032] In this embodiment, in response to the fluctuation amount of any polling cycle within the preset time period being greater than or equal to the first threshold, the polling task is stopped, the timer is cleared, the preset time period is kept unchanged, and the current fault threshold is adjusted according to the hardware error count. The corresponding strategy is shown in Table 1.

[0033] Table 1

[0034] In this embodiment, in response to the fact that the fluctuation amount of each polling cycle within the preset time period is less than the first threshold, the polling task is stopped, the timer is cleared, the current fault threshold is kept unchanged, and the preset time period is adjusted according to the hardware error count. The corresponding strategy is shown in Table 2.

[0035] Table 2

[0036] In Tables 1 and 2, the second threshold value varies for different performance levels. When the performance level is typical, the second threshold is 10% of the maximum typical hardware error count. When the performance level is busy, the second threshold is 5% of the maximum typical hardware error count.

[0037] Understandably, hardware interrupt control methods also include: A second threshold is set based on the performance level of the storage device. The second threshold for a busy performance level is less than the second threshold for a typical performance level, and the second threshold for a typical performance level is less than the second threshold for an idle performance level.

[0038] By setting different second thresholds for different performance levels, the fluctuation of error counts in each polling cycle can be improved to adapt to storage performance. This allows for more precise adjustment of the preset timing duration of the timer when storage performance is busy compared to when it is typical, resulting in more accurate triggering of hardware interrupts.

[0039] In this embodiment, the process of re-determining whether to trigger a hardware interrupt in response to the completion of the current fault threshold or preset timeout duration adjustment includes: When adjusting the current fault threshold, check whether the target hardware is executing a hardware interrupt. If so, configure a new fault threshold after disabling the hardware interrupt; otherwise, configure a new fault threshold directly. When adjusting the preset timer duration, check if the timer is running. If it is, clear the timer and then configure a new preset timer duration. Otherwise, directly configure a new preset timer duration. In response to the completion of configuring a new fault threshold or a preset timeout period, a new timer is started to re-detect the new hardware error count generated by the target hardware of the storage device; Determine if the new hardware error count is greater than the new fault threshold; if so, trigger a hardware interrupt.

[0040] By controlling the current fault threshold or preset timer duration adjustment to complete within the same thread, and then re-determining whether to trigger a hardware interrupt, it is possible to ensure that the fault threshold or preset timer duration is updated before the next hardware interrupt occurs.

[0041] In this embodiment, the process of re-determining whether to trigger a hardware interrupt in response to the completion of the current fault threshold or preset timeout duration adjustment includes: In response to the completion of the current fault threshold or preset timeout duration adjustment, based on the performance level of the storage device, the fault threshold for the next hardware interrupt and the preset timeout duration of the timer are adjusted according to the previous hardware interrupt fault threshold, the preset timeout duration of the timer, the fluctuation of each polling cycle and the hardware error count. In response to the fault threshold that will trigger the next hardware interrupt and the completion of the preset timing duration adjustment of the timer in the polling mode, a new thread is started to detect the new hardware error count generated by the target hardware of the storage device, and to determine whether the new hardware error count is greater than the adjusted fault threshold. If so, a hardware interrupt is triggered.

[0042] By controlling the triggering of hardware interrupts through multiple different threads, timely adjustments and updates can be made when the current fault threshold or preset timeout duration changes. The use of new threads to determine whether to trigger hardware interrupts improves the speed of achieving balanced storage performance and fault location.

[0043] In the aforementioned hardware interrupt control method, the fault threshold for triggering a hardware interrupt and the preset timing duration of the timer in the polling method are adjusted by polling. After the polling ends, the fault threshold for triggering the next hardware interrupt and the preset timing duration of the timer in the polling method are adjusted based on the fault threshold for the previous hardware interrupt, the preset timing duration of the timer, the fluctuation of each polling cycle, and the hardware error count. This adjustment is repeated continuously until the fault threshold for triggering the hardware interrupt and the preset timing duration of the timer in the polling method are stabilized at a fixed value, thereby achieving a balance between storage performance and fault location.

[0044] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0045] In one embodiment, such as Figure 5 As shown, a hardware interrupt control device 10 is provided, including: a hardware interrupt monitoring module 1, a polling management module 2, a fluctuation detection module 3, a fault threshold adjustment module 4, a timing duration adjustment module 5, and a reset interrupt module 6.

[0046] The hardware interrupt monitoring module 1 is used to trigger a hardware interrupt in response to a hardware error in the target hardware of the storage device and to monitor whether the hardware interrupt is disabled.

[0047] Polling management module 2 is used to respond to hardware interrupt shutdown by obtaining the current fault threshold that triggered the hardware interrupt, starting a timer, and starting a polling task within the preset timer duration to query the hardware error count in each polling cycle.

[0048] The fluctuation detection module 3 is used to obtain the fluctuation of the error count in the current polling period relative to the error count in the first polling period, and to determine in turn whether the fluctuation of each polling period within the preset time period is greater than or equal to the first threshold.

[0049] The fault threshold adjustment module 4 is used to respond to the fact that if the fluctuation amount of any polling cycle within the preset time period is greater than or equal to the first threshold, then stop the polling task, clear the timer, keep the preset time period unchanged, and adjust the current fault threshold according to the hardware error count.

[0050] The timing duration adjustment module 5 is used to respond to the fact that the fluctuation amount of each polling cycle within the preset timing duration is less than the first threshold, then stop the polling task, clear the timer, keep the current fault threshold unchanged, and adjust the preset timing duration according to the hardware error count.

[0051] The reset interrupt module 6 is used to re-determine whether to trigger a hardware interrupt after the current fault threshold or preset timer duration adjustment is completed.

[0052] In this embodiment, in response to a hardware error occurring in the target hardware of the storage device, a hardware interrupt is triggered, and monitoring whether the hardware interrupt is disabled includes: Obtain the fault type of the target hardware of the storage device. The fault type includes correctable faults and uncorrectable faults. Set default fault thresholds for correctable and uncorrectable faults of the target hardware respectively. Monitor whether the target hardware has encountered a hardware error; In response to a hardware error in the target hardware, a hardware interrupt is triggered, the fault information is parsed to obtain the fault type and location of the target hardware, and the fault type and location are encapsulated as fault information and sent to the manager to be recorded in the system event log. In response to recording the failure information in the system event log, hardware interrupts are disabled.

[0053] In this embodiment, obtaining the fluctuation of the error count in the current polling period relative to the error count in the first polling period, and sequentially determining whether the fluctuation in each polling period within a preset time interval is greater than or equal to a first threshold includes: Errors within the current polling cycle are classified into correctable errors and uncorrectable errors. Record the first correctable error count and the first uncorrectable error count of the target hardware within the first polling cycle; Record the current correctable error count and the current uncorrectable error count of the target hardware in the next query cycle; The difference between the current correctable error count and the initial correctable error count is used as the fluctuation of correctable errors in the current polling period. It is then determined whether the fluctuation is greater than or equal to the first threshold. The difference between the current uncorrectable error count and the initial uncorrectable error count is used as the fluctuation of uncorrectable errors within the current polling period. It is then determined whether the fluctuation is greater than or equal to the first threshold.

[0054] In this embodiment, in response to the fluctuation amount of any polling cycle within a preset time period being greater than or equal to a first threshold, the polling task is stopped, the timer is cleared, the preset time period remains unchanged, and the current fault threshold is adjusted according to the hardware error count, including: If the fluctuation of correctable or uncorrectable errors in any polling cycle within the preset time interval is greater than or equal to the first threshold, the polling task is stopped, the timer corresponding to the correctable or uncorrectable error is cleared, and the preset time interval of the timer corresponding to the correctable or uncorrectable error remains unchanged. In response to the current correctable error count being greater than or equal to the second threshold, the current fault threshold for correctable errors is increased. In response to the current uncorrectable error count being greater than or equal to the second threshold, the current fault threshold for uncorrectable errors is increased. When the current correctable error count is less than the second threshold, the current fault threshold for correctable errors remains unchanged. When the current uncorrectable error count is less than the second threshold, the current fault threshold for uncorrectable errors remains unchanged.

[0055] In this embodiment, increasing the current fault threshold for correctable errors or increasing the current fault threshold for uncorrectable errors includes: Set the fault threshold for correctable or uncorrectable errors to 10. x x is a positive integer; When setting the default fault threshold, the value of x is zero; When the current fault threshold for correctable or uncorrectable errors is increased, the adjusted fault threshold becomes 10. x +1 .

[0056] In this case, the default fault threshold is x=0, and the default fault threshold is 10. 0 =1; When the current fault threshold is increased, the adjusted fault threshold is 10. x+1 That is, 10 1 =10; that is, the first increase in the current fault threshold is from 1 to 10.

[0057] In this embodiment, in response to the fact that the fluctuation amount of each polling cycle within the preset time interval is less than the first threshold, the polling task is stopped, the timer is cleared, the current fault threshold remains unchanged, and the preset time interval is adjusted according to the hardware error count, including: If the fluctuation of correctable or uncorrectable errors in each polling cycle within the preset time period is less than the first threshold, then the polling task is stopped, the timer corresponding to the correctable or uncorrectable error is cleared, and the current fault threshold corresponding to the correctable or uncorrectable error remains unchanged. In response to the current correctable error count being greater than or equal to the second threshold, the preset timing duration of the timer corresponding to the correctable error is increased; In response to the current uncorrectable error count being greater than or equal to the second threshold, the preset timing duration of the timer corresponding to the uncorrectable error is increased; When the current correctable error count is less than or equal to the second threshold, the preset timing duration of the timer corresponding to the correctable error remains unchanged; When the current uncorrectable error count is less than or equal to the second threshold, the preset timing duration of the timer corresponding to the uncorrectable error remains unchanged.

[0058] In this embodiment, increasing the preset timing duration of the timer corresponding to a correctable error or increasing the preset timing duration of the timer corresponding to an uncorrectable error includes: Set the preset timing duration for the timer corresponding to correctable or uncorrectable errors to 2 seconds. y y is a positive integer; When setting the initial value of the preset timer duration, the value of y is one; When the preset timer duration is increased, the adjusted preset timer duration is 2. y+1 .

[0059] When setting the initial value of the preset timer duration, y=1, and the initial value of the preset timer duration is 2. 1 =2 seconds; When the preset timer duration is increased, the adjusted preset timer duration is 2 seconds. y+1 , that is, 2 2 =4 seconds; that is, the first time the preset timer duration is increased from 2 seconds to 4 seconds.

[0060] In this embodiment, as Figure 5 As shown, the hardware interrupt control device 10 also includes a classification management module 7. The classification management module 7 is used for: Obtain the hardware type of the storage device, which includes the processor, memory, and pluggable devices; Obtain the storage performance of the storage device and classify the performance level of the storage device into idle, typical, and busy categories based on its storage performance. Obtain the fault type of the target hardware when a hardware interrupt is triggered; Adjust the preset timing duration of the timer or the current fault threshold corresponding to each fault type according to the hardware type and current performance level of the storage device.

[0061] In this embodiment, the process of re-determining whether to trigger a hardware interrupt in response to the completion of the current fault threshold or preset timeout duration adjustment includes: When adjusting the current fault threshold, check whether the target hardware is executing a hardware interrupt. If so, configure a new fault threshold after disabling the hardware interrupt; otherwise, configure a new fault threshold directly. When adjusting the preset timer duration, check if the timer is running. If it is, clear the timer and then configure a new preset timer duration. Otherwise, directly configure a new preset timer duration. In response to the completion of configuring a new fault threshold or a preset timeout period, a new timer is started to re-detect the new hardware error count generated by the target hardware of the storage device; Determine if the new hardware error count is greater than the new fault threshold; if so, trigger a hardware interrupt.

[0062] In the aforementioned hardware interrupt control device, the fault threshold for triggering a hardware interrupt and the preset timing duration of the timer in the polling method are adjusted by polling. After the polling ends, the fault threshold for triggering the next hardware interrupt and the preset timing duration of the timer in the polling method are adjusted based on the fault threshold for triggering the previous hardware interrupt, the preset timing duration of the timer, the fluctuation of each polling cycle, and the hardware error count. This adjustment is repeated continuously until the fault threshold for triggering the hardware interrupt and the preset timing duration of the timer in the polling method are stabilized at a fixed value, thereby achieving a balance between storage performance and fault location.

[0063] For a description of the features in the embodiment corresponding to the hardware interrupt control device, please refer to the relevant description of the embodiment corresponding to the hardware interrupt control method, which will not be repeated here.

[0064] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above-described hardware interrupt control method embodiments.

[0065] In one embodiment, the electronic device may be a server, and its internal structure diagram may be as follows: Figure 6 As shown, this electronic device includes a processor, memory, network interface, and database connected via a system bus. The processor provides computing and control capabilities. The memory includes a non-volatile storage medium and internal memory. The non-volatile storage medium stores the operating system, computer programs, and the database. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage medium. The database stores hardware interrupt control data. The network interface communicates with external terminals via a network connection. When the computer program is executed by the processor, it implements a hardware interrupt control method.

[0066] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above-described hardware interrupt control method embodiments when it is run.

[0067] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0068] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above-described hardware interrupt control method embodiments: In response to a hardware error occurring in the target hardware of the storage device, a hardware interrupt is triggered, and the system monitors whether the hardware interrupt is disabled. In response to the hardware interrupt being disabled, the current fault threshold that triggered the hardware interrupt is obtained, a timer is started, and a polling task is initiated within the preset timer duration to query the hardware error count in each polling cycle. Get the fluctuation of the error count in the current polling period relative to the error count in the first polling period, and then determine whether the fluctuation of each polling period within the preset time period is greater than or equal to the first threshold. If the fluctuation amount in any polling cycle within the preset time period is greater than or equal to the first threshold, the polling task is stopped, the timer is cleared, the preset time period remains unchanged, and the current fault threshold is adjusted according to the hardware error count. If the fluctuation of each polling cycle within the preset time interval is less than the first threshold, the polling task is stopped, the timer is cleared, the current fault threshold is kept unchanged, and the preset time interval is adjusted according to the hardware error count. In response to the completion of the current fault threshold or preset timer duration adjustment, a new determination is made as to whether to trigger a hardware interrupt.

[0069] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above-described hardware interrupt control method embodiments: In response to a hardware error occurring in the target hardware of the storage device, a hardware interrupt is triggered, and the system monitors whether the hardware interrupt is disabled. In response to the hardware interrupt being disabled, the current fault threshold that triggered the hardware interrupt is obtained, a timer is started, and a polling task is initiated within the preset timer duration to query the hardware error count in each polling cycle. Get the fluctuation of the error count in the current polling period relative to the error count in the first polling period, and then determine whether the fluctuation of each polling period within the preset time period is greater than or equal to the first threshold. If the fluctuation amount in any polling cycle within the preset time period is greater than or equal to the first threshold, the polling task is stopped, the timer is cleared, the preset time period remains unchanged, and the current fault threshold is adjusted according to the hardware error count. If the fluctuation of each polling cycle within the preset time interval is less than the first threshold, the polling task is stopped, the timer is cleared, the current fault threshold is kept unchanged, and the preset time interval is adjusted according to the hardware error count. In response to the completion of the current fault threshold or preset timer duration adjustment, a new determination is made as to whether to trigger a hardware interrupt.

[0070] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0071] The hardware interrupt control method and electronic device provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only intended to help understand the method and core ideas of this application. It should be noted that those skilled in the art can make several improvements and modifications to this application without departing from the principles of this application, and these improvements and modifications also fall within the protection scope of this application.

Claims

1. A hardware interrupt control method, characterized in that, include: A hardware interrupt is triggered in response to a hardware error occurring in the target hardware of the storage device, and the status of the hardware interrupt is monitored. In response to the hardware interrupt being disabled, the current fault threshold that triggered the hardware interrupt is obtained, a timer is started, and a polling task is initiated within the preset timeout period of the timer to query the hardware error count in each polling cycle. Obtain the fluctuation of the error count in the current polling period relative to the error count in the first polling period, and sequentially determine whether the fluctuation of each polling period within the preset time period is greater than or equal to the first threshold. If the fluctuation amount of any polling cycle within the preset time period is greater than or equal to the first threshold, the polling task is stopped, the timer is cleared, the preset time period is kept unchanged, and the current fault threshold is adjusted according to the hardware error count. In response to the fact that the fluctuation of each polling cycle within the preset time period is less than the first threshold, the polling task is stopped, the timer is cleared, the current fault threshold is kept unchanged, and the preset time period is adjusted according to the hardware error count. In response to the completion of the current fault threshold or preset timer duration adjustment, a new determination is made as to whether to trigger a hardware interrupt.

2. The hardware interrupt control method according to claim 1, characterized in that, The step of triggering a hardware interrupt in response to a hardware error in the target hardware of the storage device, and monitoring whether the hardware interrupt is disabled, includes: Obtain the fault type of the target hardware of the storage device, the fault type includes correctable errors and uncorrectable errors, and set default fault thresholds for correctable errors and uncorrectable errors of the target hardware respectively; Monitor whether the target hardware has generated a hardware error; In response to a hardware error occurring in the target hardware, a hardware interrupt is initiated, the fault information is parsed to obtain the fault type and location of the target hardware, and the fault type and location are encapsulated as fault information and sent to the manager to be recorded in the system event log. In response to the completion of recording the fault information in the system event log, the hardware interrupt is disabled.

3. The hardware interrupt control method according to claim 2, characterized in that, The step of obtaining the fluctuation of the error count in the current polling period relative to the error count in the first polling period, and sequentially determining whether the fluctuation of each polling period within the preset time interval is greater than or equal to the first threshold includes: Errors within the current polling cycle are classified into correctable errors and uncorrectable errors. Record the first correctable error count and the first uncorrectable error count of the target hardware within the first polling cycle; Record the current correctable error count and the current uncorrectable error count of the target hardware in the next query cycle; The difference between the current correctable error count and the first correctable error count is used as the fluctuation of correctable errors in the current polling period, and it is determined whether the fluctuation of correctable errors is greater than or equal to the first threshold. The difference between the current uncorrectable error count and the initial uncorrectable error count is used as the fluctuation of uncorrectable errors in the current polling period, and it is determined whether the fluctuation of uncorrectable errors is greater than or equal to the first threshold.

4. The hardware interrupt control method according to claim 3, characterized in that, The response that the fluctuation amount in any polling cycle within the preset time interval is greater than or equal to a first threshold, stops the polling task, clears the timer, keeps the preset time interval unchanged, and adjusts the current fault threshold according to the hardware error count includes: If the fluctuation of correctable or uncorrectable errors in any polling cycle within the preset time interval is greater than or equal to a first threshold, the polling task is stopped, the timer corresponding to the correctable or uncorrectable error is cleared, and the preset time interval of the timer corresponding to the correctable or uncorrectable error remains unchanged. When the current correctable error count is greater than or equal to the second threshold, the current fault threshold of the correctable error is increased. When the current uncorrectable error count is greater than or equal to the second threshold, the current fault threshold of the uncorrectable error is increased. When the current correctable error count is less than the second threshold, the current fault threshold of the correctable error remains unchanged; When the current uncorrectable error count is less than the second threshold, the current fault threshold of the uncorrectable error remains unchanged.

5. The hardware interrupt control method according to claim 4, characterized in that, Increasing the current fault threshold for the correctable error or increasing the current fault threshold for the uncorrectable error includes: The fault threshold for the correctable or uncorrectable error is set to 10. x x is a positive integer; When setting the default fault threshold, the value of x is zero; When the current fault threshold for the correctable or uncorrectable error is increased, the adjusted fault threshold is 10. x +1 .

6. The hardware interrupt control method according to claim 3, characterized in that, The response that the fluctuation amount of each polling cycle within the preset time interval is less than the first threshold, stops the polling task, clears the timer, keeps the current fault threshold unchanged, and adjusts the preset time interval according to the hardware error count includes: If the fluctuation of correctable or uncorrectable errors in each polling cycle within the preset time period is less than the first threshold, then the polling task is stopped, the timer corresponding to the correctable or uncorrectable error is cleared, and the current fault threshold corresponding to the correctable or uncorrectable error remains unchanged. In response to the current correctable error count being greater than or equal to the second threshold, the preset timing duration of the timer corresponding to the correctable error is increased; When the current uncorrectable error count is greater than or equal to the second threshold, the preset timing duration of the timer corresponding to the uncorrectable error is increased; When the current correctable error count is less than or equal to the second threshold, the preset timing duration of the timer corresponding to the correctable error remains unchanged; When the current uncorrectable error count is less than or equal to the second threshold, the preset timing duration of the timer corresponding to the uncorrectable error remains unchanged.

7. The hardware interrupt control method according to claim 6, characterized in that, Increasing the preset timing duration of the timer corresponding to the correctable error or increasing the preset timing duration of the timer corresponding to the uncorrectable error includes: The preset timing duration for the timer corresponding to the correctable or uncorrectable error is set to 2. y y is a positive integer; When setting the initial value of the preset time duration, the value of y is one; When the preset timing duration is increased, the adjusted preset timing duration is 2. y+1 .

8. The hardware interrupt control method according to claim 1, characterized in that, The method further includes: Obtain the hardware type of the storage device, wherein the hardware type of the storage device includes processor, memory, and pluggable devices; The storage performance of the storage device is obtained, and the performance level of the storage device is divided into idle, typical, and busy based on the storage performance. Obtain the fault type of the target hardware when a hardware interrupt is triggered; Based on the hardware type and current performance level of the storage device, adjust the preset timing duration of the timer or the current fault threshold corresponding to each fault type.

9. The hardware interrupt control method according to claim 1, characterized in that, The response to re-determine whether to trigger a hardware interrupt after the current fault threshold or preset timeout duration adjustment is completed includes: When adjusting the current fault threshold, it is detected whether the target hardware is executing a hardware interrupt. If so, a new fault threshold is configured after disabling the hardware interrupt; otherwise, a new fault threshold is configured directly. When adjusting the preset timing duration, it is detected whether the timer is running. If so, the timer is cleared and a new preset timing duration is configured. Otherwise, a new preset timing duration is configured directly. In response to the completion of configuring a new fault threshold or a preset timeout period, a new timer is started to re-detect the new hardware error count generated by the target hardware of the storage device; Determine whether the new hardware error count is greater than the new fault threshold; if so, trigger a hardware interrupt.

10. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the hardware interrupt control method as described in any one of claims 1 to 9 when executing the computer program.

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