Silicon-based homojunction infrared detector and preparation method and application thereof

Abstract

The invention belongs to the technical field of semiconductor materials, and particularly relates to a silicon-based homojunction infrared detector and a preparation method and application thereof. The silicon-based homojunction infrared detector comprises a highly-doped silicon substrate and a table top arranged at the center of the highly-doped silicon substrate, the table top comprises a barrier layer and an absorption layer which are stacked in sequence, the barrier layer is in direct contact with the highly-doped silicon substrate, the edge of the absorption layer is embedded into a negative electrode contact layer, a negative electrode is arranged on the surface of the negative electrode contact layer, and the surface of the negative electrode contact layer is provided with a positive electrode. A positive electrode is arranged on the surface of the highly doped silicon substrate; the barrier layer is made of intrinsic silicon, the absorption layer is made of silicon doped with sulfur ions, and the negative electrode contact layer 4 is made of silicon doped with phosphorus ions and sulfur ions. The silicon-doped sulfur is used as an absorption layer, and high-purity silicon is used as a barrier layer to suppress dark current, so that high-performance detection of short-wave infrared is realized. According to the invention, deep-energy-level element doping is introduced into a silicon material, and a mesa type device structure of a coupling blocking impurity band is adopted, so that room-temperature working is realized, and the response speed is high.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of semiconductor materials, and particularly relates to a silicon-based homojunction infrared detector and a preparation method and application thereof. BACKGROUND

[0002] With the development of technology, the integration technology of silicon is also more and more mature, which can enable silicon-based devices to be applied to the field of infrared detection. Benefiting from the advantages of mature material growth and process technology, CMOS system compatibility and easy photoelectric integration, silicon-based infrared detectors have currently played an important role in the fields of laser radar, optical communication and data interconnection. However, due to the 1.12eV band gap of intrinsic silicon material, it is difficult for the traditional silicon-based infrared detector to realize infrared detection above 1.1um, which restricts the further application and development thereof. At present, the artificial impurity energy level can be constructed in the forbidden band through deep level doping, and the wavelength expansion of the silicon-based infrared detector can be realized by using impurity transition, however, the above deep level doping detector still faces problems such as large dark current, low quantum efficiency and slow response speed, and is difficult to be practically applied. SUMMARY

[0003] Therefore, the application provides a silicon-based homojunction infrared detector and a preparation method and application thereof. The silicon-based homojunction infrared detector provided by the application has small dark current, high quantum efficiency and fast response speed, and the application range is expanded.

[0004] In order to solve the above technical problems, the application provides a silicon-based homojunction infrared detector, which comprises a high-doped silicon substrate 1 and a mesa arranged at the center position of the high-doped silicon substrate 1. The mesa comprises a blocking layer 2 and an absorbing layer 3 which are stacked in sequence. The blocking layer 2 is in direct contact with the high-doped silicon substrate 1. The edge of the absorbing layer 3 is embedded into a negative electrode contact layer 4. A negative electrode 6 is arranged on the surface of the negative electrode contact layer 4. A positive electrode 7 is arranged on the surface of the high-doped silicon substrate 1.

[0005] The material of the blocking layer 2 is intrinsic silicon, the material of the absorbing layer 3 is silicon doped with sulfur ions, and the material of the negative electrode contact layer 4 is silicon doped with phosphorus ions and sulfur ions.

[0006] Preferably, the thickness of the blocking layer 2 is 3.8-4.2um.

[0007] Preferably, the doping concentration of sulfur ions in the absorbing layer 3 is 1x10 15 -3x10 17 cm -3 The thickness of the absorbing layer 3 is 0.8-1.2um.

[0008] Preferably, the doping concentration of phosphorus ions in the negative electrode contact layer 4 is (0.5-1.5)x10 19cm -3 The doping concentration of the sulphur ion in the negative electrode contact layer 4 is 1*10 15 ~ 3*10 17 cm -3 The thickness of the negative electrode contact layer 4 is 180~220nm.

[0009] Preferably, the negative electrode 6 and the positive electrode 7 are titanium-aluminum composite metal films respectively, the thickness of the titanium metal film in the titanium-aluminum composite metal film is 15~25nm, and the thickness of the aluminum metal film in the titanium-aluminum composite metal film is 180~220nm.

[0010] When the titanium-aluminum composite metal film is used as the negative electrode, the titanium alloy metal film directly contacts the surface of the electrode contact layer 4.

[0011] When the titanium-aluminum composite metal film is used as the positive electrode, the titanium alloy metal film directly contacts the surface of the high-doped silicon substrate 1.

[0012] The application further provides a preparation method of the silicon-based homojunction infrared detector.

[0013] The intrinsic silicon layer is formed on the surface of the high-doped silicon substrate 1 by using a chemical vapor deposition epitaxy method.

[0014] The sulfur element is injected to the upper surface of the intrinsic silicon layer to form the absorption layer 3.

[0015] The product after the absorption layer 3 is formed is subjected to first photoetching to form a mesa.

[0016] The phosphorus element is injected to the upper surface of the edge of the absorption layer 3 to form the negative electrode contact layer 4.

[0017] The positive electrode and the negative electrode are formed on the surface of the high-doped silicon substrate 1 and the surface of the negative electrode contact layer 4 respectively, and then annealing treatment is performed to obtain the silicon-based homojunction infrared detector.

[0018] Preferably, after the phosphorus element is injected, the product after the phosphorus element is injected is subjected to annealing treatment, the temperature of the annealing treatment is 900~1000℃, and the holding time of the annealing treatment is 28~32s.

[0019] Preferably, the method of forming the positive electrode and the negative electrode comprises magnetic control sputtering.

[0020] Preferably, after the positive electrode and the negative electrode are formed, the product after the positive electrode and the negative electrode are formed is subjected to annealing treatment, the temperature of the annealing treatment is 430~470℃, and the holding time of the annealing treatment is 4.8~5.2min.

[0021] The application further provides application of the silicon-based homojunction infrared detector in the field of spectral imaging, intelligent driving and high-speed information transmission of optical communication.

[0022] The application provides a silicon-based homojunction infrared detector, which comprises a high-doped silicon substrate 1 and a mesa arranged at a central position of the high-doped silicon substrate 1, wherein the mesa comprises a blocking layer 2 and an absorbing layer 3 which are stacked in sequence, the blocking layer 2 is directly in contact with the high-doped silicon substrate 1, the edge of the absorbing layer 3 is embedded into a negative electrode contact layer 4, a negative electrode 6 is arranged on the surface of the negative electrode contact layer 4, and a positive electrode 7 is arranged on the surface of the high-doped silicon substrate 1; the material of the blocking layer 2 is intrinsic silicon, the absorbing layer 3 is silicon doped with sulfur ions, and the material of the negative electrode contact layer 4 is silicon doped with phosphorus ions and sulfur ions. The silicon-based homojunction infrared detector provided by the application introduces a high-purity intrinsic silicon blocking layer on a high-doped absorbing layer, thereby forming a blocking impurity band structure; the device structure of the blocking impurity band is introduced into a deep energy level doping detector, the dark current of the silicon-based homojunction infrared detector is significantly reduced by inhibiting the hopping conductance effect of the blocking impurity band structure; meanwhile, the response rate (102-107.3 mA / W) and quantum efficiency (9.8%-10.3%) of the detector are improved by utilizing the impurity multiplication gain effect of the blocking impurity band structure device. The silicon-based homojunction infrared detector provided by the application has a mesa structure, which can effectively shorten the transport distance of photo-generated carriers, avoid the recombination of carriers at the interface and improve the response speed of the detector, wherein the rising time of the device at 1310 nm is 46-55 mu s, and the falling time is 135-136 mu s. BRIEF DESCRIPTION OF DRAWINGS

[0023] Figure 1 A structure schematic diagram of the silicon-based homojunction infrared detector provided by the application is shown in the figure.

[0024] Figure 2 A structure schematic diagram of the silicon-based homojunction infrared detector provided by the application is shown in the figure.

[0025] Figures 1-2 1 is a high-doped silicon substrate, 2 is a blocking layer, 3 is an absorbing layer, 4 is a negative electrode contact layer, 5 is a dielectric layer, 6 is a negative electrode, and 7 is a positive electrode.

[0026] Figure 3 A concentration distribution diagram of sulfur elements in the absorbing layer of the silicon-based homojunction infrared detector of Example 1 is shown in the figure.

[0027] Figure 4 A dark current test result of the silicon-based homojunction infrared detector prepared by Example 1 is shown in the figure.

[0028] Figure 5The broadband spectral response result of the silicon-based homojunction infrared detector prepared in Example 1 is shown in the following table:

[0029] Figure 6 The responsivity test result of the silicon-based homojunction infrared detector prepared in Example 1 is shown in the following table:

[0030] Figure 7 The quantum efficiency test result of the silicon-based homojunction infrared detector prepared in Example 1 is shown in the following table:

[0031] Figure 8 The response time test result of the silicon-based homojunction infrared detector prepared in Example 1 is shown in the following table. DETAILED DESCRIPTION

[0032] The present application provides a silicon-based homojunction infrared detector, which comprises a high-doped silicon substrate 1 and a mesa arranged at the center of the high-doped silicon substrate 1, wherein the mesa comprises a blocking layer 2 and an absorbing layer 3 which are stacked in sequence, the blocking layer 2 is directly in contact with the high-doped silicon substrate 1, the edge of the absorbing layer 3 is embedded into a negative electrode contact layer 4, a negative electrode 6 is arranged on the surface of the negative electrode contact layer 4, and a positive electrode 7 is arranged on the surface of the high-doped silicon substrate 1.

[0033] As a specific embodiment of the present application, the high-doped silicon substrate 1 can be silicon doped with As, P or Sb, and the doping concentration can be 3×10 19 cm -3 As a specific embodiment of the present application, the center line of the mesa is coincident with the center line of the high-doped silicon substrate 1, and the diameter of the mesa is smaller than that of the substrate, and the present application does not have special limitation on the difference between the diameter of the mesa and the diameter of the substrate.

[0034] In the present application, the material of the blocking layer 2 is intrinsic silicon, and the thickness of the blocking layer 2 can be 3.8-4.2 μm, and can be specifically 4 μm. The use of intrinsic silicon as the blocking layer can inhibit the dark current.

[0035] In the present application, the material of the absorbing layer 3 is silicon doped with sulfur ions, and the doping concentration of the sulfur ions in the absorbing layer 3 can be 1×10 15 -3×10 17 cm -3 The thickness of the absorbing layer 3 can be 0.8-1.2 μm, and can also be 1-1.1 μm. In the present application, the sulfur element has a deep impurity energy level, and can absorb incident photons of 1310 nm and 1550 nm, so as to be collected by the two electrodes.

[0036] In the present application, the material of the negative electrode contact layer 4 is silicon doped with phosphorus ions and sulfur ions, and the doping concentration of the phosphorus ions in the negative electrode contact layer 4 can be (0.5-1.5)×1019 cm -3 , 0.5*10 19 cm -3 , 0.8*10 19 cm -3 , 1*10 19 cm -3 , 1.3*10 19 cm -3 or 1.5*10 19 cm -3 ; the doping concentration of the sulfur ions in the negative electrode contact layer 4 can be 1*10 15 ~3*10 17 cm -3 ; the thickness of the negative electrode contact layer 4 can be 180~220nm, and can be specifically 200nm.

[0037] As a specific embodiment of the present application, the negative electrode 6 and the positive electrode 7 can be titanium-aluminum composite metal thin films respectively, the thickness of the titanium metal thin film in the titanium-aluminum composite metal thin film can be 15~25nm, and can be specifically 15nm, 18nm, 20nm, 23nm or 25nm; the thickness of the aluminum metal thin film in the titanium-aluminum composite metal thin film can be 180~220nm, and can be specifically 180nm, 190nm, 200nm, 210nm or 220nm.

[0038] As a specific embodiment of the present application, when the titanium-aluminum composite metal thin film is used as the negative electrode, the titanium alloy metal thin film directly contacts the surface of the electrode contact layer 4; when the titanium-aluminum composite metal thin film is used as the positive electrode, the titanium alloy metal thin film directly contacts the surface of the high-doped silicon substrate 1.

[0039] In the present application, the positive electrode 7 forms ohmic contact with the high-doped silicon substrate 1, and the negative electrode contact layer 4 forms ohmic contact with the negative electrode 6.

[0040] Figure 1 The structure schematic diagram of the silicon-based homojunction infrared detector provided by the present application is shown in the figure, wherein 1 is a high-doped silicon substrate, 2 is a barrier layer, 3 is an absorption layer, 4 is a negative electrode contact layer, 6 is a negative electrode, and 7 is a positive electrode.

[0041] The present application uses doped silicon with sulfur as an absorption layer, uses the electron transition of the impurity level of sulfur element to the conduction band to realize the absorption of short-wave infrared radiation; uses intrinsic silicon as a barrier layer to inhibit the hopping conductance of the impurity band, reduce the dark current of the device, and realize high-performance detection of short-wave infrared radiation; meanwhile, the silicon-based homojunction infrared detector provided by the present application is in a mesa structure, which improves the carrier transport efficiency and the corresponding speed of the detector.

[0042] In order to facilitate the protection of the device mesa, inhibit the silicon interface state, and improve the photo-generated carrier transport efficiency during the use of the silicon-based homojunction infrared detector provided by the present application, a dielectric layer 5 can be arranged on the sidewall of the mesa, and a negative electrode is arranged on the surface of the dielectric layer 5. The material of the dielectric layer 5 can be silicon oxide, and the thickness of the dielectric layer 5 can be 280-320 nm, which can be specifically 280 nm, 285 nm, 290 nm, 295 nm, 300 nm, 305 nm, 310 nm, 315 nm, or 320 nm. The negative electrode arranged on the surface of the dielectric layer 5 directly contacts the negative electrode arranged on the surface of the negative electrode contact layer 4. The present application does not have special requirements for the size and specific position of the dielectric layer 5.

[0043] Figure 2 The structure of the silicon-based homojunction infrared detector with a dielectric layer is shown in the figure, wherein 1 is a high-doped silicon substrate, 2 is a barrier layer, 3 is an absorption layer, 4 is a negative electrode contact layer, 5 is a dielectric layer, 6 is a negative electrode, and 7 is a positive electrode.

[0044] The present application also provides a preparation method of the silicon-based homojunction infrared detector described in the above technical solution, which includes the following steps:

[0045] An intrinsic silicon layer is formed on the surface of the high-doped silicon substrate 1 by using a chemical vapor deposition epitaxy method.

[0046] Sulfur element is injected to the upper surface of the absorption layer 3 to form the absorption layer 3.

[0047] The product after the formation of the absorption layer 3 is subjected to first photolithography to form a mesa.

[0048] Phosphorus element is injected to the upper surface of the edge of the absorption layer 3 to form a negative electrode contact layer 4.

[0049] After the formation of the positive electrode and the negative electrode on the surface of the high-doped silicon substrate 1 and the surface of the negative electrode contact layer 4, respectively, annealing treatment is performed to obtain the silicon-based homojunction infrared detector.

[0050] The present application uses a chemical vapor deposition epitaxy method to form an intrinsic silicon layer on the surface of a high-doped silicon substrate 1. The present application does not have special requirements for the condition parameters of the chemical vapor deposition epitaxy method, and a conventional method in the field can be used.

[0051] After the intrinsic silicon layer is formed, the application injects sulfur element to the upper surface side of the intrinsic silicon layer to form an absorption layer 3. As a specific embodiment of the application, the method of injecting sulfur element can be multi-step ion injection, and the application does not have special limitation on the method of multi-step ion injection, and the conventional method in the art can be used.

[0052] After the absorption layer 3 is formed, the application performs first photoetching on the product after the absorption layer 3 is formed to form a mesa. As a specific embodiment of the application, the product after the absorption layer 3 is formed can be washed and dried before the first photoetching; the washing can be performed under ultrasonic condition, and the application does not have special limitation on the power of the ultrasonic; the washing can include trichloroethylene washing for 4-5 min, acetone washing for 4-5 min, isopropyl alcohol washing for 4-5 min and deionized water washing for 2-3 min in sequence. As a specific embodiment of the application, the temperature of the drying can be 60-70℃, and can also be 65-68℃; the time of the drying can be 13-17 min, and can also be 14-15 min. The application can remove the pollutants such as dust adsorbed on the surface of the product through washing.

[0053] The product after drying can be placed under a microscope for microscopic examination to observe whether it is clean and whether there is a crack.

[0054] The application does not have special requirement on the first photoetching, and as long as the mesa required can be formed; as a specific embodiment of the application, the first photoetching can include the following steps: spin coating positive photoresist AZ1518 on the surface of the sulfur-doped silicon absorption layer 3 with a thickness of 4μm, baking at 100℃ for 60s, exposure dose 319mJ / cm 2 , developing for 80s, deionized water washing, and nitrogen blowing; using SF6 and C4F8 two kinds of gas deep reactive ion etching to form a mesa structure: using acetone to remove photoresist, ultrasonic cleaning for 10 min, isopropyl alcohol ultrasonic cleaning for 10 min, deionized water washing, and nitrogen blowing; using argon plasma photoresist removing process (power 200W, time 180s) to further remove the photoresist bottom film remaining after exposure and development.

[0055] After the mesa is formed, the application injects phosphorus element to the upper surface side of the edge of the absorption layer 3 to form a negative electrode contact layer 4. As a specific embodiment of the application, before the phosphorus element is injected, the following can also be included: performing second photoetching on the surface of the absorption layer 3 to determine the range of the phosphorus element injection; after the phosphorus element is injected, the following can also be included: removing photoresist treatment on the product after the phosphorus element is injected. As a specific embodiment of the application, the second photoetching can be specifically as follows: spin coating positive photoresist AZ1518 on the surface of the sulfur-doped silicon absorption layer 3 with a thickness of 4μm, baking at 100℃ for 60s, exposure dose 319mJ / cm 2, developing 80s, deionized water rinsing, and nitrogen blowing dry. As a specific embodiment of the present application, the de-gluing treatment can be specifically as follows: de-gluing with acetone, ultrasonic cleaning for 10 min, isopropanol ultrasonic cleaning for 10 min, deionized water rinsing, and nitrogen blowing dry.

[0056] As a specific embodiment of the present application, the implantation energy of the phosphorus element implantation can be 50 keV, and the implantation dose can be 8 x 10 14 cm -2 , and the implantation angle can be 7°.

[0057] As a specific embodiment of the present application, the product after the de-gluing treatment can be subjected to annealing treatment, the temperature of the annealing treatment can be 900-1000℃, and can also be 950-980℃; the holding time of the annealing treatment can be 28-32 s, and can also be 29-30 s; the annealing treatment can be rapid thermal annealing; the present application can activate the implanted ions (activate the doped phosphorus ions and sulfur ions) and repair the lattice damage after the annealing treatment.

[0058] As a specific embodiment of the present application, when the sidewall of the mesa is provided with a dielectric layer 5, the dielectric layer can be provided according to the following method taking silicon oxide as an example: depositing silicon oxide on the mesa sidewall by plasma enhanced chemical vapor deposition, sequentially performing third photoetching, reactive ion etching, and de-gluing to expose the positive and negative electrode contact regions. The present application does not have special limitations on the third photoetching, reactive ion etching, and de-gluing, and the conventional methods in the art can be used.

[0059] After forming the negative electrode contact layer 4, the present application forms a positive electrode and a negative electrode on the surface of the high-doped silicon substrate 1 and the surface of the negative electrode contact layer 4, respectively, and then performs annealing treatment to obtain the silicon-based homojunction infrared detector. As a specific embodiment of the present application, the method for forming the positive electrode and the negative electrode can include magnetron sputtering; the present application does not have special limitations on the magnetron sputtering, and the conventional methods in the art can be used. As a specific embodiment of the present application, the magnetron sputtering can further include: performing fourth photoetching on the product after forming the negative electrode contact layer 4 to determine the position range of the positive electrode and the negative electrode; and the magnetron sputtering can further include: peeling the product after magnetron sputtering. As a specific embodiment of the present application, the fourth photoetching can be specifically as follows: spin coating positive glue ARP-5350 on the surface of the sample, the thickness is 2 μm, baking at 105℃ for 240 s, exposure dose is 60 mJ / cm 2, developing 200s, deionized water flushing, nitrogen blowing dry, to define positive and negative electrode area. As a specific embodiment of the present application, the stripping can be specifically: using acetone stripping, 80 DEG C water bath 30min, ultrasonic cleaning 5min, isopropanol ultrasonic cleaning 5min, 2.38% concentration of tetramethylammonium hydroxide solution immersion 30s, deionized water flushing, nitrogen blowing dry;If using acetone solution can not completely strip the metal to form patterned electrode, can select N-methyl pyrrolidone (NMP) solution at a temperature above 150 DEG C stripping.

[0060] As a specific embodiment of the present application, after forming the positive electrode and the negative electrode, the product after forming the positive electrode and the negative electrode can further include: annealing treatment, the annealing treatment temperature can be 430-470 DEG C, and can also be 450-460 DEG C;The holding time of the annealing treatment can be 4.8-5.2min, and can also be 4.9-5min. The present application can make the metal alloying after annealing treatment, and form a good ohmic contact.

[0061] The present application realizes the uniform and effective absorption region distribution of the peak doping sulfur concentration within 500nm based on the doping method of multi-step ion implantation Figure 3 , breaks the problems of traditional deep energy level doping, such as shallow depth and weak infrared signal absorption, and improves the photoelectric conversion efficiency of silicon-based homojunction infrared detector;The absorption layer includes a peak doping part and a low doping sulfur part, and the thickness of the peak doping part is 500nm.

[0062] The silicon-based homojunction infrared detector provided by the present application is sequentially high-doped silicon substrate, barrier layer, doped sulfur absorption layer and negative electrode contact layer from bottom to top;The negative electrode contact layer is located on the upper edge of the mesa-shaped absorption layer, and the annular negative electrode is located on the surface of the negative electrode contact layer. The present application utilizes epitaxial method to grow high-doped silicon substrate and intrinsic barrier layer, then utilizes ion implantation method to form a doped sulfur absorption layer on the wafer surface, then utilizes deep silicon etching method to define the mesa structure of the unit device, exposes the high-doped substrate, and then forms a doped phosphorus and sulfur annular negative electrode contact layer through ion implantation. Plasma-enhanced chemical vapor deposition is used for surface passivation and electrical isolation (forming a dielectric layer), photolithography and dry etching expose the electrode contact area in contact with the metal electrode, and finally, through the method of magnetron sputtering, the metal electrode of titanium and aluminum is formed, and the device preparation is completed. The present application utilizes silicon sulfur doping as a short-wave infrared absorption layer, and high-purity silicon as a barrier layer to suppress dark current, and realizes high-performance detection of short-wave infrared. The present application has the characteristics of introducing deep energy level elements doping in silicon material, coupling the mesa device structure of barrier impurity band, and providing a silicon-based infrared detector with room temperature operation and fast response speed.

[0063] The application further provides application of the silicon-based homojunction infrared detector in spectral imaging, intelligent driving and high-speed information transmission of optical communication.

[0064] In order to further illustrate the application, the technical solutions provided by the application are described in detail below in combination with examples, but they should not be understood as limiting the protection scope of the application.

[0065] Example 1

[0066] A 5-micrometer-thick intrinsic silicon layer is epitaxially grown on a high-doped silicon substrate 1 (a four-inch wafer doped with P elements, 500 micrometers in thickness, and 3*10 19 cm -3 -3 in doped concentration) by a chemical vapor deposition epitaxy method, wherein the intrinsic silicon layer with a thickness of 4 micrometers from the upper surface of the high-doped silicon substrate 1 is a barrier layer 2;

[0067] A silicon sulfur-doped absorption layer 3 is doped with sulfur in the intrinsic silicon layer 1 micrometers from the upper surface of the intrinsic silicon layer by a multi-step ion implantation method, and the sulfur ion doped concentration is 1*10 17 cm -3 -3, and the thickness of the absorption layer 3 is 1 micrometer;

[0068] Ultrasonic cleaning: the product after forming the absorption layer 3 is sequentially subjected to ultrasonic washing as follows: trichloroethylene rinsing for 5 minutes, acetone rinsing for 5 minutes, isopropyl alcohol rinsing for 5 minutes, and deionized water cleaning for 3 minutes, and then the product after washing is placed in a 65-degree oven for baking for 15 minutes, and after drying, it is placed under a microscope for observation of whether it is clean and free of cracks, and if it is clean and free of cracks, it is subjected to the following photoetching;

[0069] First photoetching: positive photoresist AZ1518 is spin-coated on the surface of the silicon sulfur-doped absorption layer 3, with a thickness of 4 micrometers, and then baked at a temperature of 100 degrees for 60 seconds, exposed at an exposure dose of 319 mJ / cm 2 , developed for 80 seconds, washed with deionized water, and dried with nitrogen, so as to define a cylindrical mesa device area;(the size and position of the mesa are determined, the mesa is a cylinder, the diameter of the cylinder is 100 micrometers, the center line of the mesa coincides with the center line of the high-doped silicon substrate, and the photoresist protects the required mesa, which is removed by plasma in the subsequent step)

[0070] Deep reactive ion etching to form a mesa structure: SF6 and C4F8 are used to form a mesa structure with a height of 5 micrometers, and the range of a single device is defined;

[0071] Photoresist removal: acetone is used for photoresist removal, ultrasonic cleaning is performed for 10 minutes, isopropyl alcohol ultrasonic cleaning is performed for 10 minutes, deionized water is used for washing, and nitrogen is used for drying;

[0072] Plasma stripping: argon plasma stripping process was used, power 200W, time 180s, to further remove the residual photoresist bottom film after exposure and development;

[0073] Second lithography: positive photoresist AZ1518 was spin-coated on the surface of the sulfur-doped silicon absorption layer 3, thickness 4μm, baked at 100℃ for 60s, exposure dose 319mJ / cm 2 , developed for 80s, rinsed with deionized water, and dried with nitrogen, to define the range of phosphorus ion implantation for the annular negative electrode contact area (thickness 200nm, annular width 20μm) on the mesa;

[0074] Ion implantation to form phosphorus and sulfur-doped silicon: ion implantation process was used to implant phosphorus ions into the annular negative electrode contact area on the mesa (phosphorus ion doping concentration 1×10 19 cm -3 ), implantation energy 50keV, implantation dose 8×10 14 cm -2 , implantation angle 7°;

[0075] Stripping: acetone was used for stripping, ultrasonic cleaning for 10min, isopropanol ultrasonic cleaning for 10min, rinsing with deionized water, and drying with nitrogen;

[0076] Rapid thermal annealing: rapid thermal annealing process was used in a nitrogen atmosphere, temperature 950℃, annealing temperature holding time 30s, to activate the implanted ions (activate the doped phosphorus ions and sulfur ions), repair lattice damage, and form the negative electrode contact layer 4;

[0077] Deposition of silicon oxide passivation layer: plasma-enhanced chemical vapor deposition process was used to deposit a silicon oxide mask on the sample surface, with a deposition thickness of 300nm;

[0078] Third lithography: positive photoresist AZ1518 was spin-coated on the sample surface, thickness 2μm, baked at 100℃ for 60s, exposure dose 319mJ / cm 2 , developed for 80s, rinsed with deionized water, and dried with nitrogen, to define the positive and negative electrode etching windows;

[0079] Reactive ion etching: reactive ion etching process was used to etch the silicon oxide passivation layer, with an etching depth of 300nm, to expose the positive and negative electrode contact areas;

[0080] Stripping: acetone was used for stripping, ultrasonic cleaning for 10min, isopropanol ultrasonic cleaning for 10min, rinsing with deionized water, and drying with nitrogen;

[0081] Plasma stripping: argon plasma stripping process was used, power 200W, time 180s, to further remove the residual photoresist bottom film after exposure and development;

[0082] Fourth lithography: spin-coating positive photoresist ARP-5350 on the sample surface, thickness 2 μm, baking at 105 °C for 240 s, exposure dose 60 mJ / cm 2 , developing for 200 s, rinsing with deionized water, and drying with nitrogen to define the positive and negative electrode regions;

[0083] Magnetron sputtering of positive and negative electrodes: using magnetron sputtering to grow the electrodes, including sequentially evaporating titanium and aluminum metal films from bottom to top, with evaporation thicknesses of 20 nm and 200 nm, respectively, to obtain the positive and negative electrodes;

[0084] Peeling: peeling with acetone, 80 °C water bath for 30 min, ultrasonic cleaning for 5 min, isopropyl alcohol ultrasonic cleaning for 5 min, 2.38% tetramethylammonium hydroxide solution immersion for 30 s, deionized water rinsing, and drying with nitrogen;

[0085] Annealing of positive and negative electrodes: annealing at 450 °C in a nitrogen atmosphere for 5 min to form a good ohmic contact of the electrodes, to obtain a silicon-based homojunction infrared detector.

[0086] The detector prepared in Example 1 was subjected to secondary ion mass spectroscopy (SIMS) detection, and the results are listed in Table 1. Figure 3 The figure shows the concentration distribution of sulfur elements in the absorption layer of the silicon-based homojunction infrared detector of Example 1 from the surface. SIMS is a high-sensitivity technique for analyzing the chemical composition of the surface of a material. It bombards the sample surface with a high-energy ion beam, releases secondary ions, and then uses a mass spectrometer to detect the mass-charge ratio of these ions to determine the elemental and isotopic composition of the material. This method uses atomic ions (such as O2 + or Cs + ) or molecular ion (such as O2 - ) beam to bombard the sample surface. Bombardment causes surface material atoms or molecules to be sputtered, some of which are charged (i.e., secondary ions). The released secondary ions are collected and introduced into the mass spectrometry system, and according to the mass-charge ratio (m / z) of the secondary ions, the mass spectrometer generates a mass spectrum showing the distribution and concentration of elements on the sample surface. Using this method, the concentration of different doping elements in silicon material as a function of depth can be accurately characterized, with a detection limit of 10 14 cm -3 or less.

[0087] Table 1 Concentration distribution of sulfur elements from the surface

[0088] Depth (nm) Doping concentration (cm -3 )]]> Depth (nm) Doping concentration (cm -3 )]]> 49.8173 2.69368E17 549.947 2.25694E17 101.608 3.02838E17 601.609 1.23863E17 150.493 2.69572E17 650.372 6.34605E16 199.362 2.72021E17 699.131 3.5709E16 251.13 3.19573E17 750.714 1.75483E16 300.014 3.67127E17 799.42 1.34673E16 351.748 3.92436E17 851.027 7.14173E15 400.596 4.21826E17 899.786 6.73363E15 449.429 3.89578E17 951.423 5.10123E15 501.13 3.15696E17 1000.18 2.44859E15

[0089] From Table 1 and Figure 3 It can be seen that the sulfur element injected into the absorber layer has a relatively uniform distribution in terms of peak concentration within 500 nm, and the concentration is maintained at 10. 15 ~10 17 cm -3 The 500-1000 nm depth region is the sulfur tailing from the implantation process, and is also part of the absorption region.

[0090] The silicon-based homojunction infrared detector prepared in Example 1 was subjected to dark current detection using a semiconductor parameter analyzer 4200. The current output across the detector was tested under dark conditions, and the results are as follows. Figure 4 As shown; by Figure 4 It can be seen that the dark current level is 8.9μA under a bias voltage of -1V.

[0091] The spectral response of the silicon-based homojunction infrared detector prepared in Example 1 was detected using a continuously tunable laser in the visible to near-infrared range. The detector response spectrum was obtained with a fixed incident light power, as shown below. Figure 5 As shown. This test was conducted by changing the incident wavelength to obtain the photocurrent of the detector at different wavelengths, while ensuring that the incident light source power and the external bias voltage of the detector were consistent. Figure 5 It can be seen that by utilizing the intrinsic transitions of silicon materials and the extrinsic transitions of introducing impurity energy levels, the silicon-based homojunction infrared detector provided by this invention can achieve a broadband spectral response from 450 to 2000 nm at room temperature (25°C).

[0092] The responsivity of the silicon-based homojunction infrared detector prepared in Example 1 was measured at a fixed wavelength of 1310 nm. Under 15 μW optical power illumination, the detector responsivity was 107.3 mA / W. Figure 6 As shown.

[0093] The quantum efficiency of the silicon-based homojunction infrared detector prepared in Example 1 was measured at a fixed wavelength of 1310 nm. Under irradiation with 15 μW optical power, the detector's quantum efficiency was 10.2%. Figure 7 As shown.

[0094] The response time of the silicon-based homojunction infrared detector prepared in Example 1 was measured using an oscilloscope, a preamplifier, and a laser. The laser provided the incident light source, the preamplifier provided the device's operating bias voltage, and the oscilloscope displayed the device's response time curve. Figure 8The test is to evaluate the fast response ability of the detector to the signal by placing the detector under the infrared radiation signal, measuring the time interval from receiving the signal to generating the electrical signal. A light source is needed to emit the signal during the test, and a high-speed data acquisition device is used for measurement and recording to obtain accurate response time data.

[0095] By Figure 8 It can be seen that the structure of the present application effectively shortens the transport distance of photo-generated carriers, avoids carrier recombination at the interface, and improves the response speed of the detector. The rise time of the device at 1310 nm is 46 μs, and the fall time is 135 μs.

[0096] Although the above embodiment has made a detailed description of the present application, it is only a part of the embodiments of the present application, not all the embodiments, and other embodiments can be obtained according to the present embodiment without creativity, which belongs to the protection scope of the present application.

Claims

1. A silicon-based homojunction infrared detector, characterized in that, The device includes a highly doped silicon substrate (1) and a mesa disposed at the center of the highly doped silicon substrate (1). The mesa includes a barrier layer (2) and an absorption layer (3) stacked sequentially. The barrier layer (2) is in direct contact with the highly doped silicon substrate (1). The edge of the absorption layer (3) is embedded with a negative electrode contact layer (4). A negative electrode (6) is disposed on the surface of the negative electrode contact layer (4). A positive electrode (7) is disposed on the surface of the highly doped silicon substrate (1). The barrier layer (2) is made of intrinsic silicon, the absorber layer (3) is made of silicon doped with sulfur ions, and the negative electrode contact layer (4) is made of silicon doped with phosphorus ions and sulfur ions.

2. The silicon-based homojunction infrared detector according to claim 1, characterized in that, The thickness of the barrier layer (2) is 3.8 to 4.2 μm.

3. The silicon-based homojunction infrared detector according to claim 1, characterized in that, The sulfur ion doping concentration in the absorption layer (3) is 1×10⁻⁶. 15 ~3×10 17 cm -3 The thickness of the absorption layer (3) is 0.8 to 1.2 μm.

4. The silicon-based homojunction infrared detector according to claim 1, characterized in that, The phosphorus ion doping concentration in the negative electrode contact layer (4) is (0.5~1.5)×10 19 cm -3 The sulfur ion doping concentration in the negative electrode contact layer (4) is 1×10⁻⁶. 15 ~3×10 17 cm -3 The thickness of the negative electrode contact layer (4) is 180-220 nm.

5. The silicon-based homojunction infrared detector according to claim 1, characterized in that, The negative electrode (6) and the positive electrode (7) are titanium-aluminum composite metal films, respectively. The thickness of the titanium metal film in the titanium-aluminum composite metal film is 15-25 nm, and the thickness of the aluminum metal film in the titanium-aluminum composite metal film is 180-220 nm. When the titanium-aluminum composite metal film is used as the negative electrode, the titanium alloy metal film is in direct contact with the surface of the electrode contact layer (4); When the titanium-aluminum composite metal film is used as the positive electrode, the titanium alloy metal film is in direct contact with the surface of the highly doped silicon substrate (1).

6. The method for fabricating the silicon-based homojunction infrared detector according to any one of claims 1 to 5, characterized in that, Includes the following steps: An intrinsic silicon layer was formed on the surface of a highly doped silicon substrate (1) by chemical vapor deposition epitaxy. Sulfur is injected into one side of the upper surface of the intrinsic silicon layer to form an absorption layer (3); The product after the absorption layer (3) is formed is subjected to a first photolithography to form a mesa; Phosphorus element is injected into one side of the upper surface of the edge of the absorption layer (3) to form a negative electrode contact layer (4); After forming a positive electrode and a negative electrode on the surface of a highly doped silicon substrate (1) and a negative electrode contact layer (4) respectively, the silicon-based homojunction infrared detector is obtained by annealing.

7. The preparation method according to claim 6, characterized in that, The process of injecting phosphorus element further includes: annealing the phosphorus-injected product at a temperature of 900-1000℃ for a holding time of 28-32 seconds.

8. The preparation method according to claim 6, characterized in that, Methods for forming positive and negative electrodes include magnetron sputtering.

9. The preparation method according to claim 8, characterized in that, After forming the positive and negative electrodes, the process further includes annealing the product after forming the positive and negative electrodes, wherein the annealing temperature is 430-470°C and the annealing holding time is 4.8-5.2 min.

10. The application of the silicon-based homojunction infrared detector according to any one of claims 1 to 5 or the silicon-based homojunction infrared detector prepared by the preparation method according to any one of claims 6 to 9 in the fields of spectral imaging, intelligent driving, and high-speed information transmission in optical communication.

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