Low-power-consumption write-in high-thermal-stability-factor memory device and preparation method thereof

Abstract

The invention provides a low-power-consumption write-in high-thermal-stability-factor memory device and a preparation method thereof. The device comprises a substrate, a spin / orbital flow generation layer, a ferromagnetic function layer, a SiO2 layer, an electrode plate and a regulation and control layer which are sequentially arranged from bottom to top, the spin / orbital flow generation layer is made of a two-dimensional transition metal chalcogenide material TaIrTe4, the ferromagnetic functional layer is made of a two-dimensional ferromagnetic material Fe < 3 + x > GaTe2, x is equal to 0-2, and the regulation and control layer is made of a two-dimensional ferroelectric material CuVP2S6; electric fields are applied to left and right ends of the regulation layer. The vertical magnetocrystalline anisotropy of the ferromagnetic functional layer is changed by regulating and controlling the ferroelectric material CuVP2S6 through an external electric field, and the high-current writing process of the device is reduced, so that the effects of reducing the power consumption and improving the thermal stability are achieved, and the durability of the device is improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor devices, and in particular to a low-power memory device with a high thermal stability factor and a method for its fabrication. Background Technology

[0002] The application of spin-orbit moment (SOT) and orbital torque (OT) in magnetic tunnel junctions (MTJs) has had a significant impact on the development of magnetoelectronic devices, including magnetoresistive random access memory (MRAM), radio frequency sensors, and microwave generators. Most MTJs rely on repeated current tunneling or high current density writing, placing high demands on material durability. The emergence of two-dimensional (2D) van der Waals materials has provided more fabrication possibilities for MTJs, especially 2D materials with high spin polarization, which hold promise for next-generation nanoscale devices. Current methods require repeated current writing and reading, resulting in high energy consumption and significant heat generation, which can affect adjacent structures. Overcoming size and accuracy limitations is challenging, requiring extremely high material durability. The impact on other devices is difficult to avoid, each write operation causes significant material wear, and repeatability is insufficient, leading to decreased storage performance or errors. Summary of the Invention

[0003] In view of this, the present invention aims to provide a low-power memory device with a high thermal stability factor to solve the above problems.

[0004] To achieve the above objectives, the technical solution of the present invention is implemented as follows: A low-power memory device with high thermal stability factor includes, from bottom to top, a substrate, a spin / orbit flow generation layer, a ferromagnetic functional layer, a SiO2 layer, an electrode sheet, and a control layer; the spin / orbit flow generation layer is made of a two-dimensional transition metal chalcogenide material TaIrTe4, and the ferromagnetic functional layer is made of a two-dimensional ferromagnetic material Fe. 3+x GaTe2, x=0-2, the control layer is made of two-dimensional ferroelectric material CuVP2S6, the electrode sheets are strip-shaped and there are several of them, and multiple electrode sheets are radially distributed on the upper surface of SiO2 layer; an electric field with a field strength of 0.1-10kV / cm is applied at the left and right ends of the control layer.

[0005] Fe 3+xGaTe2's Curie temperature (Tc) and perpendicular magnetic anisotropy (PMA) can be adjusted by controlling the amount of Fe (x). Especially when x > 0, excess Fe atoms occupy interstitial sites in the crystal lattice or replace some Ga atoms, leading to localized distortions in the crystal structure (such as slight expansion of the lattice constant). However, the overall stability of the layered framework is maintained, resulting in a more stable oxide layer (Fe-O bonds) on the material surface. This improves the material's storage stability in air and the long-term operational reliability of devices. By introducing excess Fe atoms, the Curie temperature, perpendicular magnetic anisotropy, and stability are significantly improved without disrupting the layered two-dimensional structure, making it particularly suitable for the high-temperature stability and high controllability requirements of spintronic devices.

[0006] Spin / orbit flow generation layer (TaIrTe4), ferromagnetic functional layer (Fe) 3+x Both GaTe2 and the control layer (CuVP2S6) are two-dimensional materials with higher lattice matching and lower interface defect density, which reduces spin scattering and charge loss and significantly improves magnetization reversal efficiency.

[0007] Furthermore, the substrate is a SiO2 / Si substrate with a thickness of 0.2-5 mm.

[0008] Furthermore, the thickness of the spin / orbit flow generation layer is 5-20 nm.

[0009] Furthermore, the thickness of the ferromagnetic functional layer is 8-20 nm.

[0010] Furthermore, the thickness of the SiO2 layer is 0.1-5 nm.

[0011] The SiO2 layer thickness is limited to 0.1-5 nm, which avoids direct charge crosstalk between the ferromagnetic functional layer and the control layer, while ensuring that the high potential energy of CuVP2S6 can efficiently penetrate into Fe. 3+x GaTe2 layer.

[0012] Furthermore, the addition of a SiO2 layer reduces the switching current density, thus lowering power consumption; it also improves durability and stability, as the CuVP2S6 will return to its initial state after a period of time after writing, and Fe... 3+x The coercivity of GaTe2 returns to its initial state, and its durability and stability increase.

[0013] Furthermore, the thickness of the control layer is 200-500 nm. If the control layer is too thin, control cannot be achieved; if it is too thick, transfer is not conducive.

[0014] Furthermore, the electrode sheet is made of Ti / Pt with a thickness of 5 / 15 nm.

[0015] The electrode sheet is placed between the SiO2 layer and the control layer, and the left and right ends are connected by an electric field, which makes it easier to control the ion migration direction of the CuVP2S6 layer along the plane and makes the electric field effect more uniform.

[0016] Furthermore, the substrate, spin / orbit flow generation layer, and ferromagnetic functional layer have the same size, while the size of the SiO2 layer is larger than that of the ferromagnetic functional layer, causing the outer periphery of the SiO2 layer to extend beyond the ferromagnetic functional layer; the length of the control layer is greater than that of the ferromagnetic functional layer, and the left end of the control layer is aligned with the left end of the ferromagnetic functional layer, while the right end of the control layer extends beyond the SiO2 layer.

[0017] The substrate, spin / orbit flow generation layer, and ferromagnetic functional layer are all the same size and perfectly aligned in the vertical direction. This ensures that the spin-orbit moment generated by the spin / orbit flow generation layer can be transferred vertically and efficiently to the ferromagnetic functional layer, reducing spin scattering caused by edge misalignment. At the same time, uniform size can reduce interlayer interface stress and avoid interlayer delamination caused by uneven stress at high temperatures.

[0018] The SiO2 layer is larger than the ferromagnetic layer, so that the electrode sheet only contacts the SiO2 layer (insulation) and the control layer (CuVP2S6), which completely avoids the problem of conductor voltage control CuVP2S6 caused by direct contact between the electrode and the conductive ferromagnetic functional layer and spin / orbit flow generation layer below.

[0019] The left end of the control layer is aligned with the ferromagnetic functional layer to ensure that its polarization electric field can accurately act on the core region of the ferromagnetic layer; the right end extends out of the SiO2 layer, which provides a contact point for the electrode at the right end of the control layer, so that the electric field path of the left and right end electrodes is completely confined to the inside of the control layer (avoiding the electric field from diffusing to the SiO2 layer or the layer below), significantly improving the electric field utilization rate.

[0020] The present invention also provides a method for fabricating the above-described low-power memory device with high thermal stability factor, the method comprising the following steps: 1. Clean the substrate and dry it; 2. Sequentially fabricate a spin / orbit flow generation layer, a ferromagnetic functional layer, and a SiO2 layer on the substrate; III. Electrode sheets were fabricated on the surface of the SiO2 layer by combining photolithography and magnetron sputtering processes; Fourth, a control layer is then prepared on top of the electrode sheet.

[0021] Furthermore, the method for preparing the spin / orbit flow generation layer, the ferromagnetic functional layer, and the control layer is any one of magnetron sputtering, molecular beam epitaxy, pulsed laser deposition, physical vapor deposition, chemical vapor deposition, and mechanical exfoliation; The SiO2 layer was prepared using magnetron deposition.

[0022] Compared to existing technologies, the low-power memory device with a high thermal stability factor described in this invention has the following advantages: The low-power, high-thermal-stability-factor memory device described in this invention significantly increases the fault tolerance and provides better protection for two-dimensional materials compared to the fabrication process of traditional magnetic tunnel junctions. This invention modulates the intrinsic electric field of CuVP₂S₆ by controlling its potential with an electric field, thereby controlling the Fe... 3+x Electromagnetic coupling of GaTe2 alters the overall device's Hall signal, current density, coercivity, and other signals. Compared to traditional SOT devices, this invention reduces write current, while also decreasing power consumption and heat generation, providing better protection for the device and significantly improving its durability. Two-dimensional magnetic material Fe 3+x GaTe2 has a high Curie temperature and exhibits good perpendicular magnetic anisotropy at room temperature, which can significantly reduce device size and improve integration density. The fabrication environment of the invention requires mechanical stripping under a protective gas to prevent oxidation. The fabrication process is relatively simple, allows for flexible use of thickness, and the perpendicular magnetic structure has little impact on adjacent components, resulting in better yield. Attached Figure Description

[0023] The accompanying drawings, which form part of this invention, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an undue limitation of the invention. In the drawings: Figure 1 This is a schematic diagram of the structure of the low-power memory device with high thermal stability factor described in an embodiment of the present invention; Figure 2 This is a top-view optical image of the low-power memory device with high thermal stability factor described in an embodiment of the present invention; the purple bars represent electrode sheets. Figure 3 This is a front view of the low-power memory device with high thermal stability factor according to an embodiment of the present invention. Figure 4 The anomalous Hall effect diagram is shown for the storage device prepared in Embodiment 1 of the present invention. Figure 5 This is a magnetization reversal diagram of the storage device prepared in Embodiment 1 of the present invention; Figure 6 This is an anomalous Hall effect diagram of the memory device prepared in Comparative Example 2 of the present invention; Figure 7 The image shows the anomalous Hall effect of the memory device prepared in Comparative Example 3 of this invention. Figure 8 The image shows the anomalous Hall effect of the memory device prepared in Comparative Example 4 of this invention. Figure 9This is an anomalous Hall effect diagram of the memory device prepared in Comparative Example 5 of the present invention.

[0024] Explanation of reference numerals in the attached figures: 1. Substrate; 2. Spin / orbit flow generation layer; 3. Ferromagnetic functional layer; 4. SiO2 layer; 5. Control layer; 6. Electrode sheet. Detailed Implementation

[0025] It should be noted that, unless otherwise specified, the embodiments and features described in the present invention can be combined with each other.

[0026] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0027] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art will understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0028] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0029] Example 1 A low-power memory device with high thermal stability factor includes, from bottom to top, a substrate 1, a spin / orbit flow generation layer 2, a ferromagnetic functional layer 3, a SiO2 layer 4, an electrode sheet 6, and a control layer 5; the substrate 1 is a SiO2 / Si substrate with a thickness of 1 mm; the spin / orbit flow generation layer 2 is made of a two-dimensional transition metal chalcogenide material TaIrTe4 with a thickness of 5 nm; the ferromagnetic functional layer 3 is made of a two-dimensional ferromagnetic material Fe. 3+x GaTe2, x=0, thickness 9nm; SiO2 layer 4 thickness 1nm; control layer 5 material is two-dimensional ferroelectric material CuVP2S6, thickness 200nm; electric field is applied at the left and right ends of control layer 5, field strength is 0.17kV / cm; electrode sheet 6 is Ti / Pt, thickness 5 / 15nm, electrode sheet is strip-shaped and there are several of them, multiple electrode sheets are radially distributed on the upper surface of SiO2 layer.

[0030] The fabrication method of the above-mentioned device is as follows: S1: Cleaning the SiO2 / Si substrate The substrate was ultrasonicated in acetone, ethanol, and deionized water for 10 minutes in sequence, and then dried with a nitrogen gas gun.

[0031] S2: Preparation of two-dimensional transition metal chalcogenide material TaIrTe4 layer Solid material TaIrTe4 is directly exfoliated onto the surface of polydimethylsiloxane (PDMS) to form a TaIrTe4 / PDMS composite; the TaIrTe4 in the obtained TaIrTe4 / PDMS composite is brought into contact with the substrate, so that TaIrTe4 is detached from PDMS and spread flat on the substrate surface to form a TaIrTe4 layer.

[0032] S3: Preparation of two-dimensional ferromagnetic material Fe 3+x GaTe2 layer Similar to S2, solid material Fe 3+x GaTe2 was directly exfoliated onto the PDMS surface to form Fe. 3+x GaTe2 / PDMS composite; Fe in the resulting Fe3GaTe2 / PDMS composite 3+x GaTe2 and TaIrTe4 layers are in contact, allowing Fe 3+x GaTe2 decomposes from PDMS to form Fe 3+x GaTe2 layer.

[0033] S4: The structure obtained in S3 is rapidly placed into magnetron-deposited SiO2 to form a SiO2 layer.

[0034] S5: Preparation of electrode sheets By combining photolithography and magnetron sputtering processes, electrode patterns are used for exposure and development, and Ti / Pt electrodes with a thickness of 5 / 15 nm are obtained by magnetron sputtering at room temperature.

[0035] S6: Fabrication of a two-dimensional ferroelectric material CuVP2S6 layer Similar to S2, CuVP2S6 was exfoliated using PDMS via mechanical stripping to form a CuVP2S6 / PDMS composite, and a CuVP2S6 layer was formed on top of the electrode sheet.

[0036] Finally, the complete magnetic TaIrTe4 / Fe was obtained. 3+x GaTe2 / SiO2 / CuVP2S6 devices.

[0037] Structure as Figure 1 Figure 3 As shown, Figure 2 This is a top-down optical image. The purple bars represent electrode plates, I represents current, V represents detection voltage, and E represents applied electric field.

[0038] Figure 4 The image shows the anomalous Hall effect of the memory device prepared in Example 1. When a negative voltage is applied (blue), its coercivity is about 950 Oe, and its stability is higher. When a positive voltage is applied (red), its coercivity is about 400 Oe, and its coercivity is reduced by about 58%.

[0039] Figure 5 This is a magnetization reversal diagram of the memory device prepared in Example 1; the blue lines have higher coercivity and higher reversal current density, resulting in higher stability, while the red lines have lower coercivity and lower reversal current density, thus further reducing power consumption.

[0040] This demonstrates that the CuVP2S6 in this memory modulates Fe through potential. 3+x The coercivity of GaTe2, thereby modulating Fe 3+ x The switching current density of GaTe2 is high, and the effect is good.

[0041] Example 2 A low-power memory device with high thermal stability factor includes, from bottom to top, a substrate 1, a spin / orbit flow generation layer 2, a ferromagnetic functional layer 3, a SiO2 layer 4, an electrode sheet 6, and a control layer 5; the substrate 1 is a SiO2 / Si substrate with a thickness of 3 mm; the spin / orbit flow generation layer 2 is made of a two-dimensional transition metal chalcogenide material TaIrTe4 with a thickness of 10 nm; the ferromagnetic functional layer 3 is made of a two-dimensional ferromagnetic material Fe. 3+xGaTe2, x=1, thickness is 11nm; SiO2 layer 4 thickness is 2nm; control layer 5 material is two-dimensional ferroelectric material CuVP2S6, thickness is 300nm; electric field is applied at the left and right ends of control layer 5, field strength is 0.2kV / cm; electrode sheet 6 is Ti / Pt, thickness is 5 / 15nm, electrode sheet is strip-shaped and there are several of them, multiple electrode sheets are radially distributed on the upper surface of SiO2 layer.

[0042] The fabrication method of this device is as described in Example 1.

[0043] The anomalous Hall effect and magnetization reversal of the device fabricated in this embodiment are similar to those in Example 1. Figure 4 and Figure 5 Approximately, when a negative voltage is applied, the coercivity is higher, the switching current density is greater, and the stability is higher. When a positive voltage is applied, the coercivity is smaller, the switching current density is smaller, and thus the power consumption is further reduced.

[0044] Example 3 A low-power memory device with high thermal stability factor includes, from bottom to top, a substrate 1, a spin / orbit flow generation layer 2, a ferromagnetic functional layer 3, a SiO2 layer 4, an electrode sheet 6, and a control layer 5; the substrate 1 is a SiO2 / Si substrate with a thickness of 5 mm; the spin / orbit flow generation layer 2 is made of a two-dimensional transition metal chalcogenide material TaIrTe4 with a thickness of 18 nm; the ferromagnetic functional layer 3 is made of a two-dimensional ferromagnetic material Fe. 3+x GaTe2, x=1.8, thickness 20nm; SiO2 layer 4 thickness 4nm; control layer 5 material is two-dimensional ferroelectric material CuVP2S6, thickness 500nm; electric field is applied at the left and right ends of control layer 5, field strength is 0.3kV / cm; electrode sheet 6 is Ti / Pt, thickness 5 / 15nm, electrode sheet is strip-shaped and there are several of them, multiple electrode sheets are radially distributed on the upper surface of SiO2 layer.

[0045] The fabrication method of this device is as described in Example 1.

[0046] The anomalous Hall effect and magnetization reversal of the device fabricated in this embodiment are similar to those in Example 1. Figure 4 and Figure 5 Approximately, when a negative voltage is applied, the coercivity is higher, the switching current density is greater, and the stability is higher. When a positive voltage is applied, the coercivity is smaller, the switching current density is smaller, and thus the power consumption is further reduced.

[0047] Comparative Example 1: No SiO2 layer The difference from Example 1 is that the SiO2 layer is missing; otherwise, it is the same as Example 1.

[0048] The device obtained from this comparison is unstable and easily burns out.

[0049] Comparative Example 2: Thickness of SiO2 layer The difference from Example 1 is that the thickness of the SiO2 layer is 10 nm, otherwise it is the same as Example 1.

[0050] The anomalous Hall effect of the memory device fabricated in this comparative example is as follows: Figure 6 As shown, the coercivity in the curves with applied positive and negative voltages remains essentially unchanged, indicating that excessive thickness of the SiO2 layer will cause its regulation to fail.

[0051] Comparative Example 3: Thickness of the control layer CuVP2S6 The difference from Example 1 is that the thickness of the control layer CuVP2S6 is 80nm, while the rest is the same as in Example 1.

[0052] The anomalous Hall effect of the memory device fabricated in this comparative example is as follows: Figure 7 As shown, when the thickness of CuVP2S6 decreases, the effect on Fe... 3+x The coercivity and saturation magnetoresistance in the anomalous Hall resistor of GaTe2 layer remain essentially unchanged, making it unsuitable for regulation.

[0053] Comparative Example 4: Ferromagnetic Functional Layer Fe 3+x GaTe2 thickness The difference from Embodiment 1 above is that the ferromagnetic functional layer Fe 3+x The GaTe2 thickness is 5 nm, and other parameters are the same as in Example 1.

[0054] The anomalous Hall effect of the memory device fabricated in this comparative example is as follows: Figure 8 As shown, at this comparative thickness, Fe 3+ x The vertical magnetocrystalline anisotropy of GaTe2 deteriorates, the coercivity is almost gone, the remanent magnetoresistance is almost zero, the anti-interference ability is weakened, which is not conducive to information storage.

[0055] Comparative Example 5: Ferromagnetic Functional Layer Fe 3+x GaTe2 thickness The difference from Embodiment 1 above is that the ferromagnetic functional layer Fe 3+x The GaTe2 thickness is 25 nm, and other parameters are the same as in Example 1.

[0056] The anomalous Hall effect of the memory device fabricated in this comparative example is as follows: Figure 9 As shown, at this comparative thickness, Fe 3+ x GaTe2 has enhanced coercivity, which has increased to approximately 2000 Oe, and improved anti-interference capabilities. However, its switching requires a larger current, making it unsuitable for low-power storage.

[0057] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A low-power memory device with a high thermal stability factor, characterized in that: The structure comprises, from bottom to top, a substrate, a spin / orbit flow generation layer, a ferromagnetic functional layer, a SiO2 layer, an electrode sheet, and a control layer. The spin / orbit flow generation layer is made of a two-dimensional transition metal chalcogenide material, TaIrTe4, and the ferromagnetic functional layer is made of a two-dimensional ferromagnetic material, Fe. 3+ x GaTe2, x=0-2, the control layer is made of two-dimensional ferroelectric material CuVP2S6, the electrode sheets are strip-shaped and there are several of them, and multiple electrode sheets are radially distributed on the upper surface of SiO2 layer; an electric field with a field strength of 0.1-10kV / cm is applied at the left and right ends of the control layer.

2. The low-power, high thermal stability memory device according to claim 1, characterized in that: The substrate is a SiO2 / Si substrate with a thickness of 0.2-5 mm.

3. The low-power, high thermal stability memory device according to claim 1, characterized in that: The thickness of the spin / orbit flow generation layer is 5-20 nm.

4. The low-power, high thermal stability factor memory device according to claim 1, characterized in that: The thickness of the ferromagnetic functional layer is 8-20 nm.

5. The low-power, high thermal stability memory device according to claim 1, characterized in that: The thickness of the SiO2 layer is 0.1-5 nm.

6. The low-power, high thermal stability factor memory device according to claim 1, characterized in that: The thickness of the control layer is 200-500nm.

7. The low-power, high thermal stability factor memory device according to claim 1, characterized in that: The electrode sheet is made of Ti / Pt and has a thickness of 5 / 15 nm.

8. The low-power, high thermal stability factor memory device according to claim 1, characterized in that: The substrate, spin / orbit flow generation layer, and ferromagnetic functional layer have the same size, while the size of the SiO2 layer is larger than that of the ferromagnetic functional layer, causing the outer periphery of the SiO2 layer to extend beyond the ferromagnetic functional layer. The length of the control layer is greater than the length of the ferromagnetic functional layer, and the left end of the control layer is aligned with the left end of the ferromagnetic functional layer, while the right end of the control layer extends beyond the SiO2 layer.

9. A method for fabricating a low-power memory device with a high thermal stability factor as described in any one of claims 1-8, characterized in that: The method includes the following steps:

1. Clean the substrate and dry it; 2. Sequentially fabricate a spin / orbit flow generation layer, a ferromagnetic functional layer, and a SiO2 layer on the substrate; III. Electrode sheets were fabricated on the surface of the SiO2 layer by combining photolithography and magnetron sputtering processes; Fourth, a control layer is then prepared on top of the electrode sheet.

10. The method for fabricating a low-power memory device with a high thermal stability factor according to claim 9, characterized in that: The method for preparing the spin / orbit flow generation layer, ferromagnetic functional layer, and control layer is any one of magnetron sputtering, molecular beam epitaxy, pulsed laser deposition, physical vapor deposition, chemical vapor deposition, and mechanical exfoliation. The SiO2 layer was prepared using magnetron deposition.

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