Data storage method and device compatible with various Demura IPs

Abstract

The invention discloses a data storage method and device compatible with various Demura IPs, and solves the compatibility problem caused when a liquid crystal panel is used in cooperation with different types of image control chips in the prior art. The method comprises the following steps: acquiring original Demura data of a liquid crystal panel; generating a corresponding preset calculation function according to the bit width rules and data structure definitions of at least two different Demura IP formats; generating a corresponding Demura IP format coding group through bit operation; storing the different Demura IP format coding groups in an independent physical address area pre-allocated in a data storage device; according to the method, various different Demura IPs can be compatible, the SOC of the different Demura IPs can read the debugging data in the corresponding format from the corresponding addresses, and the product compatibility is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of liquid crystal display devices, and in particular to a data storage method and device compatible with multiple Demura IPs. BACKGROUND

[0002] During the display process of a liquid crystal display screen, a local brightness or color non-uniformity phenomenon often occurs, which is commonly referred to as "Mura" in the industry. This non-uniformity phenomenon has various manifestations, which can include bright spots, dark spots, color spots, or local contrast differences, etc., and seriously affects the display effect of the screen and the visual experience of the user. In order to solve this problem, the Demura (De-Mura) technology is usually introduced into the image control chip of the liquid crystal panel to effectively eliminate or reduce the Mura phenomenon, thereby improving the uniformity of the display effect and the visual quality.

[0003] However, the Demura technical solutions used by different manufacturers' image control chips have significant differences, such as the Demura IPs designed by N Company, H Company, etc. These differences not only exist in the processing algorithm of the Demura data, but also involve the storage format and method of the data. For example, some image control chips may require a large amount of storage space to store Demura data, while others may use a more compact data format. Due to the differences in the storage method and processing mechanism of Demura data of different image control chips, the liquid crystal panel often faces compatibility problems when used with different types of image control chips.

[0004] In order to address this challenge, the industry needs a Demura technical solution that can be compatible with different image control chips to ensure the stability and consistency of the display effect of the liquid crystal panel. In addition, in the case of limited storage space, it is essential to use an efficient data storage solution. Traditional storage methods may not be able to meet the storage needs as the amount of Demura data increases, therefore, how to efficiently manage and store Demura data without increasing additional storage costs has become a problem to be solved. SUMMARY

[0005] The present application provides a data storage method and device compatible with multiple Demura IPs, which solves the compatibility problem of the liquid crystal panel when used with different types of image control chips in the prior art, and realizes compatibility with multiple different Demura IPs. Different Demura IP SOCs can read debug data in corresponding formats from corresponding addresses, improving product compatibility.

[0006] In a first aspect, the present application provides a data storage method compatible with multiple Demura IPs, the method comprising: obtaining original Demura data of a liquid crystal panel, wherein the original Demura data comprises pixel-level compensation parameters; generating corresponding pre-design calculation functions according to bit width rules and data structure definitions of at least two different Demura IP formats; respectively inputting the original Demura data into each of the pre-design calculation functions, and generating corresponding Demura IP format encoding groups through bit operation; storing different Demura IP format encoding groups into pre-allocated independent physical address areas of a data storage device; wherein the physical address areas of different format encoding groups do not overlap with each other.

[0007] With reference to the first aspect, in a possible implementation manner, the obtaining of the original Demura data of the liquid crystal panel comprises: performing full-screen scanning on the liquid crystal panel through a high-precision industrial imaging device, collecting pixel-level luminance and chrominance data, and obtaining a pixel-level luminance matrix and a pixel-level color matrix; generating a Mura distribution map according to the pixel-level luminance matrix and the pixel-level color matrix; calculating compensation parameters to generate original Demura data according to the Mura distribution map.

[0008] With reference to the first aspect, in a possible implementation manner, the generating of the corresponding Demura IP format encoding group through bit operation comprises: performing a bit shift operation on the original Demura data according to a bit width requirement of a target Demura IP format, to obtain shifted Demura data; filtering non-valid bits in the shifted Demura data according to a bit mask defined by the target Demura IP format, to obtain valid Demura data; performing an or operation on the valid Demura data and a native identifier of the target Demura IP format, to generate a standard encoding unit; serializing the standard encoding unit according to a storage structure of the target Demura IP format, to obtain a Demura IP format encoding group.

[0009] With reference to the first aspect, in a possible implementation manner, the performing of the or operation on the valid Demura data and the native identifier of the target Demura IP format, to generate a standard encoding unit, comprises: calculating a difference ΔW between a bit width of the target Demura IP format and a bit width of the original Demura data; generate a composite identifier with a bit width corresponding to the difference value based on the high 2-bit characteristic value generated according to the Gamma curve; perform or operation on the composite identifier and the valid Demura data to generate a reorganized data unit; generate a standard encoding unit based on the reorganized data unit.

[0010] In a possible implementation manner of the first aspect, the generating a composite identifier with a bit width corresponding to the difference value based on the high 2-bit characteristic value generated according to the Gamma curve comprises: writing a Gamma curve type identifier in the highest 2 bits of the composite identifier; when the difference value is greater than or equal to 3, writing a vendor identification code in the subsequent 1 bit of the composite identifier; writing a version serial number in the remaining max(0, ΔW-3) bits; and the composite identifier bit field allocation follows a fixed priority: Gamma identifier > vendor identification > version number.

[0011] In a possible implementation manner of the first aspect, the storing the different Demura IP format encoding groups into the pre-allocated independent physical address area of the data storage device comprises: creating a format-address mapping table and determining that the address allocation satisfies a hard condition; in response to a new Demura data request, creating a new entry in the format-address mapping table, storing the different Demura IP format encoding groups into the pre-allocated independent physical address area of the data storage device according to a storage order optimized according to the access frequency of the target Demura data format.

[0012] In a possible implementation manner of the first aspect, before storing the different Demura IP format encoding groups into the pre-allocated independent physical address area of the data storage device, the method further comprises: calculating a real-time check value of the Demura IP format encoding group; when the real-time check value matches a reference check value of the original Demura data, storing the different Demura IP format encoding groups into the pre-allocated independent physical address area of the data storage device; and when the real-time check value does not match the reference check value, regenerating the corresponding Demura IP format encoding group through bit operation.

[0013] Secondly, the application provides a data storage device compatible with multiple Demura IPs, which comprises: a data acquisition module configured to acquire original Demura data of a liquid crystal panel, wherein the original Demura data comprises pixel-level compensation parameters; a function generation module configured to generate corresponding pre-designed calculation functions according to bit width rules and data structure definitions of at least two different Demura IP formats; a parallel calculation module configured to respectively input the original Demura data into each of the pre-designed calculation functions and generate corresponding Demura IP format encoding groups through bit operation; a storage control module configured to store different Demura IP format encoding groups in pre-allocated independent physical address areas of a data storage device; wherein the physical address areas of different format encoding groups do not overlap with each other.

[0014] With reference to the second aspect, in a possible implementation manner, the parallel calculation module comprises: a bit width alignment unit configured to perform a bit shift operation on the original Demura data according to bit width requirements of a target Demura IP format to obtain shifted Demura data; an effective bit extraction unit configured to filter non-effective bits in the shifted Demura data according to a bit mask defined by the target Demura IP format to obtain effective Demura data; a logical or operation unit configured to perform or operation on the effective Demura data and an inherent identifier of the target Demura IP format to generate a standard encoding unit; a data splicing unit configured to serialize the standard encoding unit according to a storage structure of the target Demura IP format to obtain a Demura IP format encoding group.

[0015] The one or more technical solutions provided in the present application have at least the following technical effects or advantages: The present application ensures the highest accuracy of the starting point of processing by obtaining original pixel-level Demura data. The pre-designed calculation functions generated according to multiple Demura IP formats provide strong compatibility, support different chip / panel standards, high efficiency, and avoid run-time parsing and accuracy by pre-preparation, strictly follow bit width and structure; the original data is input into these functions and encoding groups are generated through bit operation, which realizes efficient conversion, accurate precision control and resource saving. Finally, the encoding groups of different formats are stored in pre-allocated independent areas with non-overlapping physical addresses, which provides key data isolation and security, realizes efficient access and simplifies storage management, supports safe storage of multiple panel configuration data in the same storage device. The overall process ensures data source fidelity, efficient and compatible processing, accurate conversion, and optimized resources, and guarantees the safety, reliability and stability of storage with physical isolation as the core. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1A compatible multiple Demura IP data storage method step flow chart provided by the embodiment of the present application is provided. Figure 2 A compatible multiple Demura IP data storage device schematic diagram provided by the embodiment of the present application is provided. DETAILED DESCRIPTION

[0017] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the protection scope of the present application.

[0018] In a first aspect, the present application provides a compatible multiple Demura IP data storage method, referring to Figure 1 The method comprises the following steps S101 to S104.

[0019] S101, obtaining original Demura data of a liquid crystal panel, wherein the original Demura data comprises pixel-level compensation parameters; Specifically, in step S101, the original Demura data of the liquid crystal panel is obtained, comprising the following steps S1011 to S1013.

[0020] S1011, performing full-screen scanning on the liquid crystal panel by a high-precision industrial imaging device, collecting pixel-level brightness and chrominance data, and obtaining a pixel-level brightness matrix and a pixel-level color matrix; S1012, generating a Mura distribution map according to the pixel-level brightness matrix and the pixel-level color matrix; S1013, calculating compensation parameters to generate the original Demura data according to the Mura distribution map.

[0021] Illustratively, when the production line performs Demura process on the liquid crystal display panel for the first time, the liquid crystal panel needs to be full-screen scanned to obtain the brightness and chrominance data of each pixel or partition, generate a detailed Mura distribution map, and calculate the corresponding compensation parameters and the original Demura data accordingly.

[0022] Demura is a key technology in the field of liquid crystal display panel manufacturing, mainly used to correct the uneven brightness and color of the screen caused by production process or material characteristics (i.e. Mura phenomenon). In the production process of liquid crystal display (LCD) and organic light emitting diode (OLED) panels, due to uneven backlight distribution, differences in organic material deposition, or fluctuations in driving circuit parameters, etc., local bright spots, dark spots or color deviation defects may occur on the panel. Demura technology uses high-precision optical detection equipment to scan the entire screen of the panel, obtains the brightness and chrominance data of each pixel or partition, generates a detailed Mura distribution map, and calculates the corresponding compensation parameters accordingly. Through writing to the driving chip of the panel, the voltage or current of each pixel is adjusted in real time, thereby eliminating display unevenness.

[0023] S102, according to the bit width rules and data structure definitions of at least two different Demura IP formats, corresponding pre-design calculation functions are generated; For example, according to the requirements of different Demura IP formats, the original Demura IP data needs to be converted into different data storage formats for storage. In the generation process, bit operations are usually used to achieve this, including but not limited to shift, masking, or operation, etc. Bit operation operations, the implementation algorithm and sequence are not fixed, and the specific Demura IP format is used as the standard.

[0024] Taking the conversion of 12-bit data into 2-byte data storage format as an example, the pre-design calculation function first aligns the data bit width through shifting, then extracts the valid bits through masking operation, and finally uses or operation to splice and store.

[0025] Specifically, for some specific Demura IP formats, after bit width padding, the padding position is stored with specific version information for marking, which facilitates the identification and query of Demura version information. The version information includes but is not limited to GM curve information.

[0026] S103, respectively input the original Demura data into each pre-design calculation function, and generate corresponding Demura IP format code groups through bit operation; Specifically, in step S103, the corresponding Demura IP format code group is generated through bit operation, including the following steps S1031 to S1034.

[0027] S1031, according to the bit width requirement of the target Demura IP format, performing bit shift operation on the original Demura data to obtain the shifted Demura data; S1032, filtering the non-valid bits in the shifted Demura data according to the bit mask defined by the target Demura IP format, to obtain valid Demura data; S1033, performing an OR operation between the valid Demura data and the inherent identifier of the target Demura IP format, to generate a standard encoding unit; Here, the OR operation between the valid Demura data and the inherent identifier of the target Demura IP format to generate a standard encoding unit includes: (1) calculating the difference AW between the bit width of the target Demura IP format and the bit width of the original Demura data; (2) generating a high-2-bit feature value based on the Gamma curve, to generate a composite identifier with the bit width corresponding to the difference; Here, the generation of a high-2-bit feature value based on the Gamma curve to generate a composite identifier with the bit width corresponding to the difference includes: (2.1) writing the Gamma curve type identifier in the highest 2 bits of the composite identifier; (2.2) when the difference is greater than or equal to 3, writing the vendor identifier code in the subsequent 1 bit of the composite identifier; (2.3) writing the version serial number in the remaining max(0, AW-3) bits; and the composite identifier bit field allocation follows a fixed priority: Gamma identifier > vendor identifier > version number.

[0028] (3) performing an OR operation between the composite identifier and the valid Demura data, to generate a reorganized data unit; (4) generating a standard encoding unit based on the reorganized data unit.

[0029] S1034, serializing the standard encoding unit according to the storage structure of the target Demura IP format, to obtain a Demura IP format encoding group.

[0030] For example, the Demura data is converted into a specific format according to the requirements of different image control chips. Each image control chip has different format requirements for the structure and storage method of the Demura data IP. Therefore, when performing the Demura operation on the production line of the liquid crystal panel, the Demura station will burn these format data into the storage device on the circuit board of the liquid crystal panel, and different format data will be written into the corresponding storage area of the storage module, ensuring that the data storage of each chip does not interfere or overlap with each other. Through this area-isolated storage method, data will not overlap or affect each other, ensuring the stability and reliability of the system when reading.

[0031] In the embodiment of the present application, when the production line performs Demura process on the liquid crystal display panel for the first time, the liquid crystal panel needs to be full-screen scanned to obtain the luminance and chrominance data of each pixel or sub-area, generate a detailed Mura distribution map, and calculate the corresponding compensation parameters and original Demura data according to the Mura distribution map. The first Demura IP code group is obtained by converting the original Demura data and the corresponding first pre-designed calculation function. In the embodiment, the pre-designed calculation function is a bit operation. In the embodiment, the original Demura data is substituted into the first pre-designed calculation function to obtain the corresponding multiple code data, i.e., the first Demura IP format code group, and then the original Demura data is converted into the corresponding second Demura IP code according to the second pre-designed calculation function of the second format to combine the second Demura IP format code group.

[0032] Before step S104, further comprising: (1) calculating the real-time check value of the Demura IP format code group; (2) when the real-time check value matches the reference check value of the original Demura data, storing the different Demura IP format code groups into the pre-allocated independent physical address area of the data storage device; when the real-time check value does not match the reference check value of the original Demura data, regenerating the corresponding Demura IP format code group by bit operation.

[0033] S104, storing the different Demura IP format code groups into the pre-allocated independent physical address area of the data storage device; wherein the physical address areas of the different format code groups do not overlap with each other.

[0034] Specifically, in step S104, storing the different Demura IP format code groups into the pre-allocated independent physical address area of the data storage device comprises the following steps S1041 to S1043.

[0035] S1041, creating a format-address mapping table and determining that the address allocation satisfies the hard condition; S1042, in response to a new Demura data request, creating a new entry in the format-address mapping table, S1042, storing the different Demura IP format code groups into the pre-allocated independent physical address area of the data storage device according to the access frequency of the target Demura data format to optimize the storage order.

[0036] For example, the first Demura IP format encoding group is written into the first storage address of the storage device, and the obtained second Demura IP format encoding group is written into the second address of the storage device. The second format here can also be a third format or multiple formats, so as to obtain multiple Demura IP encoding groups in different formats and store them into different addresses of the data storage device. Thus, the display panel can be compatible with multiple different Demura IPs, and different Demura IP SOCs can read the debugging data in the corresponding format from the corresponding address, thereby improving product compatibility.

[0037] The first Demura IP format encoding group is stored at 1.5 bytes per data, and the second Demura IP format encoding group is stored at 2 bytes per data. For example, the first Demura IP format is stored at 1.5 bytes, but the Demura IP format required by different influence control chips can be different, such as 2 bytes, 3 bytes, etc. Therefore, in order to meet the needs of customers, the 1.5 byte storage of the first Demura IP format needs to be converted into the second Demura IP format encoding or the third Demura IP format encoding for 2 byte storage or 3 byte storage for use by the image control chip. Of course, the present embodiment is not limited thereto.

[0038] In a specific embodiment provided by the present application, in the application of a liquid crystal display panel, customers need to use an image control chip to read the corresponding Demura IP format encoding group. The chip reads the pre-designed calculation function from the specified address of the storage chip according to the setting of the Demura IP, converts and extracts the corresponding Demura IP code group through inverse operation, and converts it into a specific data binary of the image control chip. Then, the image control chip displays compensation according to the converted Demura data, thereby optimizing the display adaptability of the liquid crystal panel.

[0039] In the process of writing the code in the storage chip into the image control chip, the system performs a data verification function to ensure the accuracy of data transmission. The specific implementation process is as follows: the storage chip uses a specific verification algorithm (such as CRC32 or Checksum) to calculate the data block to be transmitted, and generates a corresponding verification code. The image control chip uses the same verification algorithm to calculate the received data in real time after receiving the data. The system compares the original verification code generated by the storage chip with the verification code calculated by the image control chip to accurately determine whether any error or loss occurs in the data transmission process. When the two verification codes are completely matched, it is confirmed that the data has been completely and accurately transmitted to the image control chip.

[0040] It should be noted that the present scheme can adopt various check algorithms and implementation manners, and the above examples are only one of the feasible implementation manners.

[0041] In a second aspect, the present application provides a data storage device compatible with multiple Demura IPs, referring to Figure 2 The device comprises a data acquisition module, a function generation module, a parallel computing module and a storage control module.

[0042] The data acquisition module is configured to acquire original Demura data of a liquid crystal panel, wherein the original Demura data comprises pixel-level compensation parameters. The function generation module is configured to generate corresponding pre-designed calculation functions according to bit width rules and data structure definitions of at least two different Demura IP formats. The parallel computing module is configured to input the original Demura data into each pre-designed calculation function respectively, and generate corresponding Demura IP format encoding groups through bit operation. Here, the parallel computing module comprises a bit width alignment unit, an effective bit extraction unit, a logical or operation unit, a data splicing unit and a storage control module.

[0043] The bit width alignment unit performs a bit shift operation on the original Demura data according to the bit width requirement of the target Demura IP format to obtain shifted Demura data; the effective bit extraction unit filters the non-effective bits in the shifted Demura data according to the bit mask defined by the target Demura IP format to obtain effective Demura data; the logical or operation unit performs or operation on the effective Demura data and the inherent identifier of the target Demura IP format to generate a standard encoding unit; and the data splicing unit serializes the standard encoding unit according to the storage structure of the target Demura IP format to obtain the Demura IP format encoding group.

[0044] The storage control module is configured to store the different Demura IP format encoding groups into the pre-allocated independent physical address regions of the data storage device; wherein the physical address regions of the different format encoding groups do not overlap with each other.

[0045] The various embodiments in this specification are described in a progressive manner, and the same or similar parts among the various embodiments can be referred to each other, and each embodiment focuses on the difference from other embodiments. The whole or part of the present application can be used in a variety of general or special computer system environments or configurations. For example: personal computers, server computers, handheld devices or portable devices, tablet devices, mobile communication terminals, multi-processor systems, microprocessor-based systems, programmable electronic devices, network PCs, minicomputers, mainframe computers, distributed computing environments including any of the above systems or devices, and the like.

[0046] The above examples are only used to illustrate the technical solutions of the present application, and are not limited to the present application; although the present application has been described in detail with reference to the foregoing examples, those skilled in the art should understand that the technical solutions recorded in the foregoing examples can still be modified, or part or all of the technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the present application.

Claims

1. A data storage method compatible with multiple Demura IPs, characterized by, The method comprises the following steps: Obtaining original Demura data of a liquid crystal panel, wherein the original Demura data comprises pixel-level compensation parameters; According to bit width rules and data structure definitions of at least two different Demura IP formats, corresponding pre-design calculation functions are generated; The original Demura data is respectively input into each pre-design calculation function, and corresponding Demura IP format encoding groups are generated through bit operation; Different Demura IP format encoding groups are stored in a pre-allocated independent physical address area of a data storage device; wherein the physical address areas of different format encoding groups do not overlap with each other.

2. The data storage method compatible with multiple Demura IPs according to claim 1, wherein, The method for obtaining original Demura data of a liquid crystal panel comprises the following steps: Full-screen scanning of the liquid crystal panel is performed by using a high-precision industrial imaging device to collect pixel-level brightness and chrominance data, thereby obtaining a pixel-level brightness matrix and a pixel-level color matrix; A Mura distribution map is generated according to the pixel-level brightness matrix and the pixel-level color matrix; Original Demura data is generated by calculating compensation parameters according to the Mura distribution map.

3. The data storage method compatible with multiple Demura IPs according to claim 1, wherein, The method for generating corresponding Demura IP format encoding groups through bit operation comprises the following steps: According to the bit width requirement of the target Demura IP format, a bit shift operation is performed on the original Demura data to obtain shifted Demura data; According to the bit mask defined by the target Demura IP format, non-valid bits in the shifted Demura data are filtered to obtain valid Demura data; The valid Demura data is subjected to OR operation with the inherent identifier of the target Demura IP format to generate a standard encoding unit; According to the storage structure of the target Demura IP format, the standard encoding unit is serialized to obtain a Demura IP format encoding group.

4. The data storage method compatible with multiple Demura IPs according to claim 3, wherein, The method for generating a standard encoding unit by performing OR operation between the valid Demura data and the inherent identifier of the target Demura IP format comprises the following steps: The difference ΔW between the bit width of the target Demura IP format and the bit width of the original Demura data is calculated; A high-2-bit feature value is generated based on a Gamma curve to generate a composite identifier corresponding to the bit width of the difference value; The composite identifier is subjected to OR operation with the valid Demura data to generate a reorganized data unit; The standard encoding unit is generated based on the reorganized data unit.

5. The data storage method compatible with multiple Demura IPs according to claim 4, wherein, The method for generating a high-2-bit feature value based on a Gamma curve to generate a composite identifier corresponding to the bit width of the difference value comprises the following steps: The highest 2 bits of the composite identifier are written with a Gamma curve type identifier; When the difference value is greater than or equal to 3, the subsequent 1 bit of the composite identifier is written with a manufacturer identification code; The remaining max(0, ΔW-3) bits are written with a version serial number; and the composite identifier bit field allocation follows a fixed priority: Gamma identifier > manufacturer identification > version number.

6. The data storage method compatible with multiple Demura IPs according to claim 1, wherein, The method for storing different Demura IP format encoding groups in a pre-allocated independent physical address area of a data storage device comprises the following steps: Creating a format-address mapping table and determining that the address allocation meets the hard condition; In response to a new Demura data request, creating a new entry in the format-address mapping table, Optimizing the storage order according to the access frequency of the target Demura data format, and storing different Demura IP format encoding groups into the pre-allocated independent physical address area of the data storage device.

7. The data storage method compatible with multiple Demura IPs according to claim 1, wherein, Before storing different Demura IP format encoding groups into the pre-allocated independent physical address area of the data storage device, further comprising: Calculating the real-time check value of the Demura IP format encoding group; When the real-time check value matches the reference check value of the original Demura data, store different Demura IP format encoding groups into the pre-allocated independent physical address area of the data storage device; If they do not match, regenerate the corresponding Demura IP format encoding group through bit operation.

8. A data storage device compatible with multiple Demura IPs, characterized by, Comprise: A data acquisition module for acquiring original Demura data of a liquid crystal panel, wherein the original Demura data includes pixel-level compensation parameters; A function generation module for generating corresponding pre-design calculation functions according to the bit width rules and data structure definitions of at least two different Demura IP formats; A parallel computing module for inputting the original Demura data into each pre-design calculation function respectively and generating corresponding Demura IP format encoding groups through bit operation; A storage control module for storing different Demura IP format encoding groups into the pre-allocated independent physical address area of the data storage device; wherein the physical address areas of different format encoding groups do not overlap.

9. The data storage device compatible with multiple Demura IPs of claim 8, wherein, The parallel computing module comprises: A bit width alignment unit for performing a bit shift operation on the original Demura data according to the bit width requirement of the target Demura IP format to obtain shifted Demura data; An effective bit extraction unit for filtering non-effective bits in the shifted Demura data according to the bit mask defined by the target Demura IP format to obtain effective Demura data; A logical or operation unit for performing or operation on the effective Demura data and the inherent identifier of the target Demura IP format to generate a standard encoding unit; A data splicing unit for serializing the standard encoding unit according to the storage structure of the target Demura IP format to obtain a Demura IP format encoding group.

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