Organic light emitting display device

Abstract

An organic light emitting display device includes a substrate, a pixel, a pixel defining layer, a first insulating layer, a second insulating layer, a first line, and a second line. The pixels are arranged on the substrate in a first direction and a second direction intersecting each other, and include organic light emitting diodes (OLEDs). The OLED includes a pixel electrode. The pixel defining layer covers an edge of the pixel electrode and defines a light emitting area via an opening partially exposing the pixel electrode. The first insulating layer and the second insulating layer are between the pixel electrode and the substrate. The first line extends in the second direction between the first insulating layer and the substrate. The second line is between the second insulating layer and the first insulating layer. The second line contacts the first line through the through hole. Each through hole is provided for every two pixels arranged in the second direction.

Description

[0001] This application is a divisional patent application of the patent application with application number 202010228752.9, filed on March 27, 2020, and with the title "Organic Light Emitting Display Apparatus". TECHNICAL FIELD

[0002] One or more exemplary embodiments relate generally to an organic light emitting display apparatus. BACKGROUND

[0003] An organic light emitting display apparatus generally includes two electrodes and an organic light emitting layer between the two electrodes. In a conventional organic light emitting display apparatus, electrons injected through a cathode (e.g., one electrode or a first electrode) and holes injected through an anode (e.g., the other electrode or a second electrode) combine in the organic light emitting layer to form an exciton. The exciton emits light while releasing energy.

[0004] An organic light emitting display apparatus can include a plurality of pixels each including an organic light emitting diode (OLED) including a cathode, an anode, and an organic light emitting layer therein, and each pixel can further include a plurality of transistors and a capacitor for driving the OLED. The plurality of transistors can include a switching transistor and a driving transistor. Such an organic light emitting display apparatus can have a relatively fast response speed and can be driven with relatively low power consumption. However, it is noted that as resolution increases, the OLED, the plurality of transistors driving the OLED, the capacitor, and a wiring transmitting a signal can overlap each other, and thus various problems can occur.

[0005] The above information disclosed in this section is only for the background of the inventive concept, and thus the above information can contain information that does not constitute the prior art. SUMMARY

[0006] One or more exemplary embodiments provide an organic light emitting display apparatus capable of reducing an asymmetric color shift effect and ensuring excellent visibility while also reducing a change in characteristics of a pixel.

[0007] Additional aspects will be set forth in the detailed description to follow, and in part will be apparent from the description, or can be learned by practice of the inventive concept.

[0008] According to some example embodiments, an organic light emitting display apparatus includes a substrate, pixels, a pixel defining layer, a first via layer, a second via layer, a first line, and a second line. The pixels are arranged on the substrate in a first direction and a second direction intersecting the first direction. The pixels include organic light emitting diodes. The organic light emitting diodes include pixel electrodes. The pixel defining layer covers edges of the pixel electrodes. The pixel defining layer defines light emitting areas via openings partially exposing the pixel electrodes. The first via layer and the second via layer are interposed between the pixel electrodes and the substrate. The first line extends in the second direction between the first via layer and the substrate. The second line is interposed between the second via layer and the first via layer. The second line extends at least partially around the light emitting areas. The second line contacts the first line through vias. Each of the vias is provided for every two of the pixels arranged in the second direction.

[0009] According to some example embodiments, the second line has a mesh structure including openings corresponding to the light emitting areas of the pixels.

[0010] According to some example embodiments, the first line and the second line deliver driving voltages to the pixels.

[0011] According to some example embodiments, the pixels include first pixels, second pixels, and third pixels,

[0012] According to some example embodiments, the first pixels, the second pixels, and the third pixels are configured to emit light of different colors from each other; an area of a light emitting area in each of the third pixels is smaller than an area of a light emitting area in each of the first pixels and an area of a light emitting area in each of the second pixels; and the vias are arranged such that the light emitting areas of the first pixels and the light emitting areas of the second pixels are closer to the vias than the light emitting areas of the third pixels.

[0013] According to some example embodiments, the pixels include first green pixels and second green pixels alternately arranged in the first direction; and the vias are arranged such that the first green pixels are closer to the vias than the second green pixels.

[0014] According to some example embodiments, the vias do not overlap the light emitting areas of the pixels.

[0015] According to some example embodiments, the pixels are arranged in a PenTile matrix structure.

[0016] According to some example embodiments, the first line overlaps the light emitting areas of some of the pixels.

[0017] According to some example embodiments, the second line at least partially overlaps with some of the pixel electrodes.

[0018] According to some example embodiments, each of the pixels further includes a thin film transistor; the organic light emitting display apparatus further includes a connection electrode in the same layer as the second line, the connection electrode connecting a pixel electrode among the pixel electrodes to a thin film transistor among the thin film transistors; an end of an emission area of a first pixel among the pixels overlaps with the connection electrode; and an opposite end of the emission area of the first pixel overlaps with an extension extending from the second line.

[0019] According to some example embodiments, an overlapping area between the connection electrode and the emission area of the first pixel is equal to an overlapping area between the extension and the emission area of the first pixel.

[0020] According to some example embodiments, the organic light emitting display apparatus further includes a node electrode in the same layer as the first line, and a shielding portion extending from the second line, wherein the shielding portion completely overlaps with the node electrode.

[0021] According to some example embodiments, the node electrode overlaps with the emission area of some of the pixels; and the shielding portion corresponds to a central portion of the emission area of some of the pixels.

[0022] According to some example embodiments, an organic light emitting display apparatus includes a substrate, pixels, a pixel defining layer, a first via layer, a second via layer, a first line, and a second line. The pixels are arranged on the substrate in a first direction and a second direction intersecting the first direction. The pixels include organic light emitting diodes. The organic light emitting diodes include pixel electrodes. The pixel defining layer covers edges of the pixel electrodes. The pixel defining layer defines emission areas via openings that partially expose the pixel electrodes. The first via layer and the second via layer are interposed between the pixel electrodes and the substrate. The first line extends in the second direction between the first via layer and the substrate. The second line is interposed between the second via layer and the first via layer. The second line extends at least partially around the emission areas. The second line contacts the first line through a via. The pixels include a first pixel, a second pixel, and a third pixel, each of the first pixel, the second pixel, and the third pixel being configured to emit light of a different color. The via is arranged such that an emission area of the first pixel and an emission area of the second pixel are closer to the via than an emission area of the third pixel.

[0023] According to some example embodiments, the light emitting area of the third pixel is greater than the light emitting area of the first pixel and the light emitting area of the second pixel.

[0024] According to some example embodiments, the pixels are arranged in a PenTile matrix structure.

[0025] According to some example embodiments, the second pixel is a green pixel including first and second green pixels arranged alternately with each other; and the via is disposed such that the first green pixel is closer to the via than the second green pixel.

[0026] According to some example embodiments, the first line overlaps some of the light emitting areas.

[0027] According to some example embodiments, the organic light emitting display apparatus further includes a connection electrode, on the same layer as the second line, connected to some of the pixel electrodes via a contact hole, wherein: an end of the light emitting area of the first pixel overlaps the connection electrode; and an opposite end of the light emitting area of the first pixel overlaps an extension from the second line.

[0028] According to some example embodiments, the organic light emitting display apparatus further includes a node electrode, on the same layer as the first line, and a shielding portion extending from the second line, wherein the shielding portion completely overlaps the node electrode.

[0029] The foregoing general description and the following detailed description are exemplary and explanatory only and are intended to provide further explanation of the claimed subject matter. BRIEF DESCRIPTION OF DRAWINGS

[0030] The accompanying drawings are included to provide a further understanding of the present inventive concept and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the present inventive concept and together with the description serve to explain the principles of the present inventive concept. In the drawings:

[0031] Figure 1 is a plan view of a display apparatus according to some example embodiments;

[0032] Figure 2A and Figure 2B is an equivalent circuit diagram of a pixel in a display apparatus according to various example embodiments;

[0033] Figure 3 is a schematic view illustrating light emitting areas of a plurality of pixels in an organic light emitting display apparatus according to some example embodiments;

[0034] Figure 4 is a layout showing a relationship between a light emitting area of a plurality of pixels and a wiring according to some exemplary embodiments;

[0035] Figure 5 is a cross-sectional view taken along a cross-sectional line I-I' in Figure 4 according to some exemplary embodiments;

[0036] Figure 6 is a cross-sectional view according to a comparative example for comparison with at least one exemplary embodiment;

[0037] Figure 7A is a layout of an organic light emitting display apparatus according to some exemplary embodiments;

[0038] Figure 7B is a layout of a pixel electrode other than Figure 7A according to some exemplary embodiments;

[0039] Figure 7C is a cross-sectional view taken along a cross-sectional line II-II' in Figure 7A according to some exemplary embodiments; and

[0040] Figure 8 is a layout of an organic light emitting display apparatus according to some exemplary embodiments. DETAILED DESCRIPTION

[0041] In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of various exemplary embodiments. As used herein, "embodiment" and "exemplary embodiment" are used interchangeably and are non-limiting examples of employing one or more inventive concepts disclosed herein. It will be apparent, however, that various exemplary embodiments can be practiced without these specific details or with one or more equivalent arrangements. In other instances, well-known structures and devices are shown in block diagram form in order to avoid unnecessarily obscuring the various exemplary embodiments. Furthermore, various exemplary embodiments can be different, but need not be mutually exclusive. For example, specific shapes, configurations, and features of an exemplary embodiment can be used or implemented in another exemplary embodiment without departing from the inventive concepts.

[0042] Unless otherwise indicated, the exemplary embodiments shown are to be understood as exemplary features providing examples of different details of some exemplary embodiments. Thus, unless otherwise indicated, features, components, modules, layers, films, panels, areas, aspects, etc. (hereinafter individually or collectively referred to as "elements") of various examples can be additionally combined, separated, interchanged, and / or rearranged without departing from the inventive concepts.

[0043] Generally, cross-hatching and / or shading are used in the drawings to establish boundaries of adjacent elements. As such, unless specified, the presence of cross-hatching or shading is not a requirement for particular material, material properties, dimensions, ratios, etc. In addition, some of the drawings can have exaggerated dimensions and / or proportions to illustrate certain features better. Thus, the dimensions and / or proportions of some of the elements in the drawings are not necessarily to scale with respect to each other. When an example embodiment can be implemented differently, a specific process sequence can be performed in a different order than described. For example, two sequentially described processes can be executed substantially concurrently or in reverse order, depending upon the embodiments. Additionally, like reference numerals are used to denote like elements throughout the figures.

[0044] When an element such as a layer, region, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements can also be present. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements present. Other words used to describe the relationship between elements should be interpreted in a like fashion (e.g., "between" versus "directly between," "adjacent" versus "directly adjacent," "on" versus "directly on," "electrically connected" versus "directly electrically connected," "formed on" versus "directly formed on," etc.). In addition, the term "connected" can refer to physical or electrical and / or fluid connection. Additionally, first, second, and third directional axes are not limited to three axes of a Cartesian coordinate system, and can be interpreted in a broader sense. For example, the first, second, and third directional axes can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. For the purposes of the present disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted to include only X, only Y, only Z, or any combination of any two or more of X, Y, and Z, such as XYZ, XYY, YZ, and ZZ, for example. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0045] Although the terms "first," "second," etc. can be used herein to describe various elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. Thus, a first element discussed below could be termed a second element without departing from the teachings of the present disclosure.

[0046] For purposes of description herein, the terms "below," "under," "beneath," "lower," "above," "upper," "over," and "on" are used to describe the relative positioning of one element to another as illustrated in the figures. Unless specifically stated herein, these terms are not intended to imply a fixed or absolute position in three-dimensional space. Spatially relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture in addition to the orientations depicted in the figures. For example, if a device is turned over in the figures, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the example term "below" can encompass both an orientation of above and below. For purposes herein, the term "above" can encompass both an orientation of above and below. Moreover, the device can be otherwise oriented (e.g., rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

[0047] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Furthermore, to the extent that the terms "including," "includes," "having," "has," "with," and / or "contains" are used in the detailed description and / or claims, such terms are intended to be inclusive (i.e., in a manner that says that a stated feature, integer, step, operation, element, component, and / or group thereof is present) and not mutually exclusive (one

[0048] Various exemplary embodiments are described herein with reference to cross-sectional, top-down, and / or perspective views of schematic illustrations of idealized exemplary embodiments and / or intermediate structures that are intended to provide a description of the exemplary embodiments used herein. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances, are to be expected. Thus, exemplary embodiments disclosed herein should not be construed as limited to the particular shapes of regions as illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, a region illustrated or described as a rectangle will generally have rounded or curved features as a result of manufacturing processes, and the like. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region of a device and are not intended to limit the scope of the exemplary embodiments.

[0049] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terms, such as "include," "includes," "including," "has," "have," "having," or the like, are used inclusively and in the non-singular sense of "comprise(s)," "comprising," "comprises," or "comprised of." Unless specifically stated otherwise, as apparent from the following discussions, it is appreciated that throughout the present disclosure, discussions utilizing terms such as "processing," "computing," "calculating," "determining," "displaying," or the like, can refer to actions or processes of a machine that manipulates or transforms data represented as physical electronic or magnetic quantities within memories, registers, or other information storage devices. Unless specifically stated otherwise, as apparent from the following discussions, it is appreciated that throughout the present disclosure, the terms "processing" and "computing," "calculating," "determining," or the like, can refer to actions or processes of a machine that manipulates or transforms data represented as physical electronic or magnetic quantities within memories, registers, or other information storage devices. Note, too, that while the present disclosure can be described in the context of a single device, the activities can also be carried out in the context of other devices and systems.

[0050] As is conventional in the art, some of the example embodiments are described and illustrated in the attached drawings in terms of functional blocks, units and / or modules. Those skilled in the art will appreciate that these blocks, units and / or modules are implemented by physical (e.g., hardware) circuitry, such as logic circuitry, discrete components, microprocessors, hardwired circuitry, storage elements and wiring connections, which are all examples of electronic (or optical) circuitry that can be formed using semiconductor- based manufacturing techniques or other manufacturing techniques. In the case of microprocessor or other similar hardware, the blocks, units and / or modules can be programmed and controlled by software (e.g., microcode) to perform various functions discussed herein and can be driven by firmware and / or software. It will also be appreciated that each of the blocks, units and / or modules can be implemented individually or in combination with one another as appropriate, and can be implemented as a combination of dedicated hardware to perform some functions and a processor (e.g., one or more programmed microprocessors and associated circuitry) to perform other functions. In addition, each of the blocks, units and / or modules of some of the example embodiments can be physically separated into two or more distinct blocks, units and / or modules, without departing from the scope of the present inventive concept. Moreover, the blocks, units and / or modules of some of the example embodiments can be physically combined into more complex blocks, units and / or modules, without departing from the scope of the present inventive concept.

[0051] Various example embodiments will be described in detail below with reference to the attached drawings.

[0052] Figure 1 is a plan view of a display apparatus according to some example embodiments.

[0053] Referring to Figure 1 An organic light emitting display apparatus includes a display area DA for implementing (e.g., displaying) an image and a peripheral area PA as a non-display area located (e.g., surrounding) outside the display area DA. A plurality of pixels PX is arranged in the display area DA to provide an image, e.g., a predetermined image.

[0054] Each pixel PX can emit light of at least one color such as, for example, red, green, blue, and / or white, and can include, for example, an organic light emitting diode (OLED). In addition, each pixel PX can further include devices such as a thin film transistor (TFT), a capacitor, etc. In the present specification, a pixel PX can denote a sub-pixel that emits one of red, green, blue, and white light as previously described.

[0055] The peripheral area PA does not provide an image, although not shown, but can include a scan driver, a data driver, etc. for providing electrical signals to the pixels PX of the display area DA, and a power supply line for providing power such as a driving voltage and a common voltage. In addition, the peripheral area PA can include a terminal portion to which a printed circuit board, etc. can be connected.

[0056] Figure 2A and Figure 2B is an equivalent circuit diagram of a pixel in a display apparatus according to various exemplary embodiments.

[0057] Referring to Figure 2A , each pixel PX can include a pixel circuit PC connected to a scan line SL and a data line DL, and an organic light emitting diode OLED connected to the pixel circuit PC.

[0058] The pixel circuit PC includes a driving TFT T1, a switching TFT T2, and a storage capacitor Cst. The switching TFT T2 is connected to the scan line SL and the data line DL, and transfers a data signal Dm input through the data line DL to the driving TFT T1 according to a scan signal Sn input through the scan line SL.

[0059] The storage capacitor Cst is connected to the switching TFT T2 and a driving voltage line PL, and stores a voltage corresponding to a difference between a voltage transferred from the switching TFT T2 and a first power voltage ELVDD (or a driving voltage) supplied to the driving voltage line PL.

[0060] The driving TFT T1 is connected to the driving voltage line PL and the storage capacitor Cst, and can control a driving current flowing from the driving voltage line PL to the organic light emitting diode OLED in response to a voltage value stored in the storage capacitor Cst. The organic light emitting diode OLED can be connected between the driving TFT T1 and a second power voltage ELVSS (or a common voltage). The organic light emitting diode OLED can emit light having a predetermined brightness according to the driving current.

[0061] Figure 2AAn example in which the pixel circuit PC includes two thin film transistors and one storage capacitor is shown, but one or more exemplary embodiments are not limited thereto. The pixel circuit PC can be variously modified. For example, the pixel circuit PC can include three or more thin film transistors and / or two or more storage capacitors. For example, as shown in Figure 2B FIG. 7, the pixel circuit PC can include seven thin film transistors and one storage capacitor.

[0062] Referring to Figure 2B each pixel PX includes a pixel circuit PC and an organic light emitting diode OLED connected to the pixel circuit PC. The pixel circuit PC can include a plurality of thin film transistors and a storage capacitor. The thin film transistors and the storage capacitor can be connected to signal lines SL, SL-1, EL and DL, an initialization voltage line VL, and a driving voltage line PL.

[0063] In Figure 2B each pixel PX is connected to the signal lines SL, SL-1, EL and DL, the initialization voltage line VL, and the driving voltage line PL, but one or more exemplary embodiments are not limited thereto. As another exemplary embodiment, at least one of the signal lines SL, SL-1, EL and DL, the initialization voltage line VL, and the driving voltage line PL can be shared by at least one adjacent pixel PX.

[0064] The plurality of thin film transistors can include a driving TFT T1, a switching TFT T2, a compensation TFT T3, a first initialization TFT T4, an operation control TFT T5, an emission control TFT T6, and a second initialization TFT T7.

[0065] The signal lines include a scan line SL that transmits a scan signal Sn, a previous scan line SL-1 that transmits a previous scan signal Sn-1 to the first initialization TFT T4 and the second initialization TFT T7, an emission control line EL that transmits an emission control signal En to the operation control TFT T5 and the emission control TFT T6, and a data line DL that intersects the scan line SL and transmits a data signal Dm. The driving voltage line PL transmits a driving voltage ELVDD to the driving TFT T1, and the initialization voltage line VL transmits an initialization voltage Vint for initializing the driving TFT T1 and a pixel electrode of the organic light emitting diode OLED.

[0066] The driving gate electrode GE1 of the driving TFT T1 is connected to the first electrode Cst1 of the storage capacitor Cst, the driving source electrode S1 of the driving TFT T1 is connected to the driving voltage line PL via the operation control TFT T5, and the driving drain electrode D1 of the driving TFT T1 is electrically connected to the pixel electrode of the organic light emitting diode OLED via the emission control TFT T6. The driving TFT T1 receives the data signal Dm according to the switching operation of the switching TFT T2 to drive the driving current I OLED to the organic light emitting diode OLED.

[0067] The switching gate electrode GE2 of the switching TFT T2 is connected to the scan line SL, the switching source electrode S2 of the switching TFT T2 is connected to the data line DL, and the switching drain electrode D2 of the switching TFT T2 is connected to the driving source electrode S1 of the driving TFT T1 while being connected to the driving voltage line PL via the operation control TFT T5. The switching TFT T2 is turned on according to the scan signal Sn received through the scan line SL, and performs the switching operation of transmitting the data signal Dm transmitted through the data line DL to the driving source electrode S1 of the driving TFT T1.

[0068] The compensation gate electrode G3 of the compensation TFT T3 is connected to the scan line SL, the compensation source electrode S3 of the compensation TFT T3 is connected to the driving drain electrode D1 of the driving TFT T1 while being connected to one electrode (for example, the pixel electrode) of the organic light emitting diode OLED via the emission control TFT T6, and the compensation drain electrode D3 of the compensation TFT T3 is connected to the first electrode Cst1 of the storage capacitor Cst, the first initialization drain electrode D4 of the first initialization TFT T4, and the driving gate electrode GE1 of the driving TFT T1. The compensation TFT T3 is turned on according to the scan signal Sn received through the scan line SL to electrically connect the driving gate electrode GE1 and the driving drain electrode D1 of the driving TFT T1 to each other and to diode- connect the driving TFT T1.

[0069] The first initialization gate electrode G4 of the first initialization TFT T4 is connected to the previous scan line SL-1. The first initialization source electrode S4 of the first initialization TFT T4 is connected to the second initialization drain electrode D7 and the initialization voltage line VL of the second initialization TFT T7. The first initialization drain electrode D4 of the first initialization TFT T4 is connected to the first electrode Cst1 of the storage capacitor Cst, the compensation drain electrode D3 of the compensation TFT T3, and the driving gate electrode GE1 of the driving TFT T1. The first initialization TFT T4 is turned on according to the previous scan signal Sn-1 transmitted through the previous scan line SL-1 to transmit the initialization voltage Vint to the driving gate electrode GE1 of the driving TFT T1 and perform an initialization operation to initialize the voltage at the driving gate electrode GE1 of the driving TFT T1.

[0070] The operation control gate electrode G5 of the operation control TFT T5 is connected to the emission control line EL, the operation control source electrode S5 of the operation control TFT T5 is connected to the driving voltage line PL, and the operation control drain electrode D5 of the operation control TFT T5 is connected to the driving source electrode S1 of the driving TFT T1 and the switching drain electrode D2 of the switching TFT T2.

[0071] The emission control gate electrode G6 of the emission control TFT T6 is connected to the emission control line EL, the emission control source electrode S6 of the emission control TFT T6 is connected to the driving drain electrode D1 of the driving TFT T1 and the compensation source electrode S3 of the compensation TFT T3, and the emission control drain electrode D6 of the emission control TFT T6 is electrically connected to the second initialization source electrode S7 of the second initialization TFT T7 and an electrode (e.g., pixel electrode) of the organic light-emitting diode OLED.

[0072] The operation control TFT T5 and the emission control TFT T6 are simultaneously turned on according to the emission control signal En transmitted through the emission control line EL, so as to transmit the driving voltage ELVDD to the organic light-emitting diode OLED and enable the driving current I. OLED It flows within an organic light-emitting diode (OLED).

[0073] The second initialization gate electrode G7 of the second initialization TFT T7 is connected to the previous scan line SL-1, the second initialization source electrode S7 of the second initialization TFT T7 is connected to the emission control drain electrode D6 of the emission control TFT T6 and one electrode (e.g., a pixel electrode) of the organic light emitting diode OLED, and the second initialization drain electrode D7 of the second initialization TFT T7 is connected to the first initialization source electrode S4 of the first initialization TFT T4 and the initialization voltage line VL. The second initialization TFT T7 is turned on according to the previous scan signal Sn-1 transmitted through the previous scan line SL-1 to initialize the organic light emitting diode OLED.

[0074] Figure 2B A case in which the first initialization TFT T4 and the second initialization TFT T7 are connected to the previous scan line SL-1 is illustrated, but one or more exemplary embodiments are not limited thereto. As another exemplary embodiment, the first initialization TFT T4 can be connected to the previous scan line SL-1 to operate according to the previous scan signal Sn-1, and the second initialization TFT T7 can be connected to a separate signal line (e.g., a next scan line) to operate according to a signal transmitted to the separate signal line.

[0075] The second electrode Cst2 of the storage capacitor Cst is connected to the driving voltage line PL, and the opposite electrode (e.g., a cathode) of the organic light emitting diode OLED is connected to the common voltage ELVSS. Thus, the organic light emitting diode OLED emits light by receiving the driving current I OLED from the driving TFT T1 to display an image.

[0076] In Figure 2B , the compensation TFT T3 and the first initialization TFT T4 have a dual gate electrode structure, but the compensation TFT T3 and the first initialization TFT T4 can each have one gate electrode.

[0077] Figure 3 FIG. 1B is a schematic view illustrating light emitting regions of a plurality of pixels in an organic light emitting display apparatus according to some exemplary embodiments. For example, Figure 3 FIG. 1C is a schematic view illustrating light emitting regions of a plurality of pixels R, G, and B in an organic light emitting display apparatus. In some exemplary embodiments, the red pixel R, the green pixel G, and the blue pixel B indicate light emitting regions of each pixel PX, respectively, and the light emitting regions can be defined by openings of a pixel defining layer (or openings in the pixel defining layer), which will become more apparent below.

[0078] Referring to Figure 3On the first row 1N, red pixels R and blue pixels B are alternately arranged along a first direction, and green pixels G can be arranged at predetermined intervals along the first direction in a second row 2N adjacent to the first row 1N. Likewise, red pixels R and blue pixels B are alternately arranged in a third row 3N, and green pixels G can be arranged at predetermined intervals in a fourth row 4N adjacent to the third row 3N. The aforementioned arrangement of pixels PX can be repeatedly performed for a predetermined row set in advance.

[0079] The green pixels G of the second row 2N can be interleaved with the red pixels R and the blue pixels B of the first row 1N. Accordingly, the red pixels R and the blue pixels B are alternately arranged along a second direction in a first column 1M, and the green pixels G can be arranged at predetermined intervals along the second direction in a second column 2M. The aforementioned arrangement of pixels PX can be repeatedly performed for a predetermined column set in advance. Here, the blue pixels B and the red pixels R can each have an area greater than that of the green pixels G. In addition, the area of the blue pixels B can be greater than that of the red pixels R and that of the green pixels G.

[0080] According to some exemplary embodiments, in the vertices of a virtual square VS having the green pixel G as a center, the red pixels R are arranged at first and third vertices facing each other, and the blue pixels B can be arranged at the remaining second and fourth vertices, e.g., at the second and fourth vertices of the virtual square VS. Here, the virtual square VS can be variously modified, e.g., to a rectangle, a rhombus, a square, etc.

[0081] The arrangement of pixels PX according to various exemplary embodiments is not limited thereto. For example, instead of the green pixels G, the blue pixels B can be arranged at the center of the virtual square VS in Equation 1, and in the vertices of the virtual square VS, the red pixels R can be arranged at first and third vertices facing each other, and the green pixels G can be arranged at the remaining second and fourth vertices. Figure 3

[0082] The above pixel arrangement structure is referred to as a PenTile matrix structure, and a rendering operation for presenting colors by sharing adjacent pixels PX is applied to achieve high resolution using a small number of pixels PX.

[0083] The pixel arrangement structure according to various exemplary embodiments is not limited to the PenTile matrix structure. For example, one or more exemplary embodiments can be applied to a stripe arrangement, a mosaic arrangement, and / or a delta arrangement structure. In addition, one or more exemplary embodiments can be applied to a pixel arrangement structure further including white pixels emitting white light. ​

[0084] In some example embodiments, the pixels PX can be divided into first to third pixels. In some example embodiments, the first to third pixels can correspond to red pixels R, green pixels G, and blue pixels B, respectively.

[0085] Figure 4 is a layout illustrating a relationship between light emitting regions of a plurality of pixels and wirings according to some example embodiments. Figure 5 is a cross-sectional view taken along a cross-sectional line I-I' in Figure 4 . Figure 6 is a cross-sectional view according to a comparative example for comparison with at least one example embodiment.

[0086] Referring to Figure 4 , an organic light emitting display apparatus includes a plurality of pixels PX, and the plurality of pixels PX can be connected to various wirings or lines.

[0087] The plurality of pixels PX can include a plurality of red pixels R, a plurality of green pixels G, and a plurality of blue pixels B. As described above, the plurality of pixels PX can be arranged in a PenTile matrix structure.

[0088] In Figure 4 , among the various wirings, a plurality of first lines PL1 overlapping with light emitting regions OP1, OP2, and OP3 of the plurality of pixels PX and second lines PL2 arranged to be arched at least partially around the light emitting regions OP1, OP2, and OP3 are illustrated. In some example embodiments, the light emitting regions OP1, OP2, and OP3 can be defined as openings in a pixel defining layer which will be described later.

[0089] Each of the first lines PL1 extends in the second direction and can be connected to the plurality of pixels PX arranged in a column. For example, the first line PL1 extending along the first column 1M can be connected to the blue pixels B and the red pixels R arranged alternately. The first line PL1 extending along the second column 2M can be connected to the green pixels G1 and G2. On a plane, the first line PL1 can overlap with the light emitting regions OP1, OP2, and OP3 of the pixels PX. The first line PL1 can deliver a driving voltage ELVDD (see Figure 2A and Figure 2B ) to the plurality of pixels PX. The first line PL1 can be arranged at a predetermined interval in the first direction.

[0090] The second line PL2 can be arranged in a different layer from the first line PL1 and can be arranged to be arched at least partially around the light emitting regions OPl, OP2, and OP3 of the plurality of pixels PX. The second line PL2 can have a mesh structure. The second line PL2 can include openings at least partially exposing the light emitting regions OPl, OP2, and OP3. Also, it can be understood that the second line PL2 includes a boundary pattern corresponding to edges of the light emitting regions OPl, OP2, and OP3 and a connection pattern for connecting the boundary pattern. Here, the boundary pattern and the connection pattern of the second line PL2 can be integrally provided. The second line PL2 can not overlap the light emitting regions OPl, OP2, and OP3 in most part, but can partially overlap the light emitting regions OPl, OP2, and OP3. For example, in the case where the blue pixel B has the largest light emitting region OP3, an end portion of the light emitting region OP3 can partially overlap the second line PL2.

[0091] The second line PL2 can contact the first line PL1 via the plurality of vias VH. Since the second line PL2 contacts the first line PL1, the second line PL2 can provide a voltage identical to that of the first line PL1. For example, the first line PL1 and the second line PL2 can transmit a driving voltage ELVDD. Since the second line PL2 has a mesh structure, the driving voltage ELVDD can be uniformly supplied over the entire display area DA (see FIG. 1). Figure 1 ).

[0092] Since the plurality of vias VH overlap the first line PL1, the plurality of vias VH can be arranged in the second direction along the first line PL1.

[0093] In some exemplary embodiments, the plurality of vias VH arranged in the second direction can be arranged such that one via VH is arranged for every two pixels PX arranged in the second direction. For example, every via VH arranged along the first column 1M is arranged for every blue pixel B and every red pixel R (e.g., every two pixels PX). The vias VH located in the second column 2M are respectively provided for every two green pixels Gl and G2.

[0094] Viewed from another angle, the green pixels G (e.g., the first green pixel Gl and the second green pixel G2) are alternately arranged in the first direction, two vias VH are arranged adjacent to the first green pixel Gl, and no via is arranged adjacent to the second green pixel G2. For example, the via VH can be provided closer to the first green pixel Gl than to the second green pixel G2 between two adjacent first green pixels Gl and second green pixels G2. In some exemplary embodiments, two vias VH can be arranged adjacent to the first green pixel Gl.

[0095] The first green pixel G1 and the second green pixel G2 can be alternately arranged in the second direction, and the via hole VH can also be arranged adjacent to the first green pixel G1 in the second direction.

[0096] In some exemplary embodiments, the light emitting area OP3 of the blue pixel B is larger than the light emitting area OP1 of the red pixel R and the light emitting area OP2 of the green pixel G. From this perspective, the via hole VH is arranged closer to the green pixel G or the red pixel R having a smaller light emitting area than the light emitting area of the blue pixel B. For example, the via hole VH between the blue pixel B and the green pixel G is arranged adjacent to the green pixel G having a smaller light emitting area than the light emitting area of the blue pixel B, so that the distance d2 is smaller than the distance d1. In addition, the second via hole VH2 between the blue pixel B and the red pixel R is arranged adjacent to the red pixel R, so that the distance d4 is smaller than the distance d3.

[0097] In some exemplary embodiments, in order to reduce the asymmetric color shift according to the side viewing angle, the above arrangement of the via hole VH can be introduced. For example, because the light emitting areas OP1, OP2, and OP3 and the via hole VH are arranged not to overlap each other, the influence of the via hole VH can be reduced.

[0098] Hereinafter, a stacked structure of an organic light emitting display apparatus according to some exemplary embodiments will be described, and the influence of the via hole VH will also be described. Figure 5 A stacked structure of an organic light emitting display apparatus according to some exemplary embodiments will be described, and the influence of the via hole VH will also be described.

[0099] The substrate 110 can include, for example, glass or a polymer resin. The polymer resin can include at least one of polyether sulfone (PES), polyacrylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyarylate, polyimide (PI), polycarbonate (PC), cellulose acetate propionate (CAP), and the like. The substrate 110 including the polymer resin can be flexible, rollable, and / or bendable. The substrate 110 can have a multi-layer structure including a layer including the polymer resin and an inorganic layer (not shown).

[0100] A buffer layer 111 is located on the base 110 to reduce or block penetration of impurities, moisture, and / or external air from the lower portion of the base 110 and to provide a flat surface on the base 110. The buffer layer 111 can include an inorganic material such as an oxide material or a nitride material, an organic material, or an inorganic-organic composite material, and can have a single-layer or multi-layer structure including an inorganic material and an organic material. A barrier layer (not shown) for preventing penetration of external air can be further provided between the base 110 and the buffer layer 111. In some exemplary embodiments, the buffer layer 111 can include silicon oxide (SiO2) or silicon nitride (SiN x ), but exemplary embodiments are not limited thereto.

[0101] At least one thin film transistor TFT for each of the pixels R, G, and B can be located on the buffer layer 111. Figure 5 The thin film transistor TFT can be one of thin film transistors TFT included in Figure 2A or Figure 2B the pixel circuit PC. The thin film transistor TFT can include a semiconductor layer Act, a gate electrode GE, a source electrode SE, and a drain electrode DE. The source electrode SE and the drain electrode DE can be omitted if necessary. In addition, the source electrode SE or the drain electrode DE can be connected to a data line that transmits a data signal. The gate electrode GE can be connected to a scan line that transmits a scan signal.

[0102] The semiconductor layer Act is located on the buffer layer 111 and can include polysilicon. In some exemplary embodiments, the semiconductor layer Act can include amorphous silicon. In some exemplary embodiments, the semiconductor layer Act can include an oxide of at least one selected from the group consisting of indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), and zinc (Zn). The semiconductor layer Act can include a channel region and source and drain regions having a higher carrier concentration located on opposite sides of the channel region. The source and drain regions can be doped with impurities.

[0103] The first gate insulating layer 112 can cover the semiconductor layer Act. The first gate insulating layer 112 can include an inorganic insulating material, for example, at least one of silicon oxide (SiO2), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and zinc oxide (ZnO2). The first gate insulating layer 112 can have a single-layer or multi-layer structure including an inorganic insulating material.

[0104] A gate electrode GE is located on the first gate insulating layer 112 to overlap the semiconductor layer Act. The gate electrode GE can include at least one of molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and can have a single layer or a multi-layer structure. As an example, the gate electrode GE can include a single layer including Mo.

[0105] A second gate insulating layer 113 can cover the gate electrode GE. The second gate insulating layer 113 can include an inorganic insulating material, such as at least one of silicon oxide (SiO2), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and zinc oxide (ZnO2). The second gate insulating layer 113 can have a single layer or a multi-layer structure including an inorganic insulating material.

[0106] An upper electrode Cst2 of the storage capacitor Cst can be located on the second gate insulating layer 113. The upper electrode Cst2 can overlap the gate electrode GE therebelow. Here, the gate electrode GE and the upper electrode Cst2, which overlap each other with the second gate insulating layer 113 therebetween, can constitute the storage capacitor Cst. As such, the gate electrode GE can serve as a lower electrode Cst1 of the storage capacitor Cst. From this perspective, the storage capacitor Cst can overlap the thin film transistor TFT. However, one or more exemplary embodiments are not limited thereto. For example, the storage capacitor Cst can not overlap the thin film transistor TFT.

[0107] The upper electrode Cst2 can include at least one of aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu) in a single layer or a multi-layer structure.

[0108] An interlayer insulating layer 115 can cover the upper electrode Cst2. The interlayer insulating layer 115 can include an insulating material, such as at least one of silicon oxide (SiO2), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and zinc oxide (ZnO2). The interlayer insulating layer 115 can have a single layer or a multi-layer structure including an inorganic insulating material.

[0109] The source electrode SE and the drain electrode DE can be located on the interlayer insulating layer 115. The source electrode SE and the drain electrode DE can include a conductive material including at least one of Mo, Al, Cu, Ti, or the like, and can have a single layer or a multi-layer structure including the above-described material. For example, the source electrode SE and the drain electrode DE can each have a multi-layer structure including Ti / Al / Ti.

[0110] The first line PL1 can be disposed on the interlayer insulating layer 115. For example, the first line PL1 can include the same material as that of the source electrode SE and the drain electrode DE, and can be located on the same layer as the source electrode SE and the drain electrode DE. The first line PL1 can include a conductive material including at least one of molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), or the like, and can have a single layer or a multi-layer structure. The first line PL1 transmits a driving voltage ELVDD, and for each of the blue pixels B and the green pixels G, the first line PL1 can be disposed. The first line PL1 can overlap with light emitting openings (i.e., light emitting areas) OP2 and OP3 of the pixel defining layer 119, which are light emitting areas of the pixels G and B. Because the first via layer 117 and the second via layer 118 are located between the first line PL1 and the pixel electrodes 221G and 221B, even when the first line PL1 overlaps with the light emitting area OP3 of the blue pixel B and the light emitting area OP1 of the red pixel R, the first line PL1 does not affect the light emitting area OP3 of the blue pixel B and the light emitting area OP1 of the red pixel R.

[0111] The first via layer 117 can cover the source electrode SE, the drain electrode DE, and the first line PL1. The first via layer 117 can have a flat upper surface so that the second line PL2 to be disposed thereon can be planarized.

[0112] The first via layer 117 can include a single layer or a multi-layer structure including at least one of an organic material and an inorganic material. The first via layer 117 can include at least one of a general-purpose polymer (e.g., benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), poly(methyl methacrylate) (PMMA), or polystyrene (PS)), a polymer derivative having a phenol group, an acrylic polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluorinated polymer, a p-xylene polymer, a vinyl alcohol polymer, and a blend thereof. The first via layer 117 can include an inorganic insulating material, for example, at least one of silicon oxide (SiO2), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and zinc oxide (ZnO2).

[0113] The second line PL2 is disposed on the first via layer 117. The second line PL2 can contact the first line PL1 via a via VH that penetrates the first via layer 117. The via VH between the blue pixel B and the green pixel G can be disposed more adjacent to the green pixel G such that the distance dl is greater than the distance d2.

[0114] The second line PL2 can include at least one of aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu) in a single layer or a multi-layer structure.

[0115] The second via layer 118 can cover the second line PL2. The second via layer 118 can include at least one of an organic material and an inorganic material in a single layer or a multi-layer structure. The second via layer 118 can include at least one of a general-purpose polymer (e.g., benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), poly(methyl methacrylate) (PMMA), or polystyrene (PS)), a polymer derivative having a phenolic group, an acrylic polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluorinated polymer, a p-xylene polymer, a vinyl alcohol polymer, and a blend thereof. The second via layer 118 can include an inorganic insulating material, such as at least one of silicon oxide (SiO2), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and zinc oxide (ZnO2).

[0116] The pixel electrodes 221B and 221G are disposed on the second via layer 118. The pixel electrodes 221B and 221G can include a conductive oxide, such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide, or aluminum zinc oxide (AZO). In some example embodiments, the pixel electrodes 221B and 221G can include a reflective layer including at least one of silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), and chromium (Cr), and a compound thereof. In some example embodiments, the pixel electrodes 221B and 221G can further include a layer including ITO, IZO, ZnO, or In2O3 positioned on and / or under the reflective layer. In some example embodiments, the pixel electrodes 221B and 221G can include a stacked structure, such as a stacked structure including ITO / Ag / ITO.

[0117] The pixel definition layer 119 can cover a boundary of each of the pixel electrodes 221B and 221G. The pixel definition layer 119 includes light emission openings OP2 and OP3 corresponding to the pixels G and B, respectively. For example, the light emission openings OP2 and OP3 can at least partially expose the pixel electrodes 221B and 221G to define light emission areas of the pixels G and B. That is, the light emission openings OP2 and OP3 can be referred to as a light emission area OP2 of the green pixel G and a light emission area OP3 of the blue pixel B.

[0118] The pixel definition layer 119 increases a distance between an edge of each of the pixel electrodes 221B and 221G and the opposite electrode 223 on the pixel electrodes 221B and 221G to prevent an arc from being generated at the edge of the pixel electrodes 221B and 221G. The pixel definition layer 119 can include an organic insulating material, such as at least one of polyimide, polyamide, acrylic, BCB, HMDSO, and phenol resin, and can be obtained by a spin coating method or the like.

[0119] The intermediate layers 222B and 222G each including an organic light emitting layer are disposed on the pixel electrodes 221B and 221G exposed by the light emission openings OP2 and OP3 in the pixel definition layer 119. The intermediate layers 222G and 222B can each include a low molecular weight organic material or a polymer material. When the intermediate layers 222B and 222G include a low molecular weight material, the intermediate layers 222B and 222G can include a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL) in a single layer or a multi-layer structure. Examples of the low molecular weight material can include copper phthalocyanine (CuPc), N,N'-di(naphthalen-1-yl)-N,N'-diphenyl-benzidine (NPB), and tris-8-hydroxyquinoline aluminum (Alq3). The above layers can be manufactured by a vacuum deposition method.

[0120] When the intermediate layers 222G and 222B include a polymer material, the intermediate layers 222G and 222B can include an HTL and an EML. Here, the HTL can include poly(3,4-ethylenedioxythiophene) (PEDOT), and the EML can include a poly(p-phenylene vinylene) (PPV)-based or a polyfluorene-based polymer material. The intermediate layers 222G and 222B can be disposed using a screen printing method, an inkjet printing method, a laser-induced thermal imaging (LITI) method, or the like.

[0121] However, the intermediate layers 222G and 222B are not limited to the above-described exemplary embodiments, but can have various structures. In addition, the intermediate layers 222G and 222B can include a layer integrally provided on all of the plurality of pixel electrodes 221G and 221B, or can include a layer patterned to correspond to each of the plurality of pixel electrodes 221G and 221B.

[0122] The counter electrode 223 is disposed on the intermediate layers 222G and 222B. The counter electrode 223 can include a conductive material having a low work function. For example, the counter electrode 223 can include a (semi-)transparent layer including at least one of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, lithium (Li), and calcium (Ca), and an alloy thereof. In some exemplary embodiments, the counter electrode 223 can further include a layer including ITO, IZO, ZnO, or In2O3 on the (semi-)transparent layer including at least one of the above-described materials.

[0123] The counter electrode 223 can be integrally provided on all of the plurality of organic light emitting diodes OLED(G) and OLED(B) to correspond to the plurality of pixel electrodes 221G and 221B.

[0124] Although not shown in the drawings, a capping layer can be provided on the counter electrode 223 to improve light extraction efficiency while protecting the counter electrode 223. The capping layer can include, for example, lithium fluoride (LiF). In some exemplary embodiments, the capping layer can include an inorganic insulating material such as silicon nitride and / or an organic insulating material. In some exemplary embodiments, the capping layer can be omitted.

[0125] In addition, the organic light emitting display apparatus according to some exemplary embodiments can further include an encapsulation member for protecting the plurality of organic light emitting diodes OLED.

[0126] The encapsulation member can include a thin film encapsulation layer including at least one inorganic encapsulation layer and at least one organic encapsulation layer. Here, the inorganic encapsulation layer can include one or more inorganic insulating materials such as at least one of aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride. The organic encapsulation layer can include a polymer-based material. The polymer-based material can include at least one of an acrylic resin, an epoxy resin, polyimide, polyethylene, etc. The thin film encapsulation layer can have a structure in which a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer are stacked.

[0127] Optionally, a sealing substrate bonded to the substrate 110 via a sealant or a frit can be used as the encapsulation member.

[0128] Components such as input sensing members for sensing touch input, anti-reflection members including polarizers and retarders, color filters, black matrices, and / or transparent windows, etc. can be further arranged on the encapsulation member.

[0129] In some example embodiments, the via VH is arranged not to overlap with the light emitting openings OP2 and OP3 of the pixel defining layer 119. Because the via VH is provided, a curve can be formed vertically in the upper surface of the second via layer 118 according to the shape of the via VH and the second line PL2 arranged in the via VH as depicted in the region R1 of Figure 5 However, because the via VH does not overlap with the light emitting regions OP1, OP2 and OP3, the via VH does not affect the light emitting regions OP1, OP2 and OP3.

[0130] When the first line PL1 and the second line PL2 passing through the blue pixel B contact each other via another via VH' as shown in Figure 6 Because the light emitting region OP3 of the blue pixel B is larger than the light emitting region OP2 of the green pixel G, the another via VH' can be arranged to overlap with the third opening OP3 (i.e. the light emitting region of the blue pixel B) for example. Thus, a curve can be formed in the upper surface of the second via layer 118 (e.g. the region R2 in Figure 6 ) and the curve can affect the pixel electrode 221B and / or the intermediate layer 222B of the blue pixel B and the counter electrode 223.

[0131] The curve or step formed in the light emitting region OP3 can cause diffuse reflection and / or two-side asymmetric reflection of light generated from the intermediate layer 222B, thus, color visibility can change according to the left or right viewing angle. In this way, the color shift can be asymmetric between the left and right views.

[0132] To reduce the above effects, in various example embodiments, the via VH connecting the first line PL1 and the second line PL2 is arranged not to overlap with the light emitting region of the pixel PX. For example, each via VH arranged in the second direction is arranged for every two pixels. Alternatively, the via VH can be arranged adjacent to the pixel having a smaller light emitting region instead of the pixel having a larger light emitting region. Alternatively, the via VH can be arranged closer to the first green pixel G1 between the first green pixel G1 and the second green pixel G2 arranged alternately along one direction.

[0133] Figure 7A is a layout of an organic light emitting display apparatus according to some example embodiments. Figure 7B is a layout of a pixel electrode according to some example embodiments except Figure 7A . Figure 7C is a layout of a pixel along aFigure 7A a cross-sectional view taken along the cross-sectional line II-II' in FIG. 1B. Figures 7A-7C Figure 4 Figures 7A-7C Like reference numerals refer to like elements throughout the specification and the detailed description, and a detailed description thereof will be omitted.

[0134] Referring to Figure 7C , the organic light emitting display apparatus according to some example embodiments can further include a connection electrode CM on the first via layer 117.

[0135] The connection electrode CM can connect the organic light emitting diode OLED to the thin film transistor TFT. For example, the connection electrode CM can connect the pixel electrodes 221B and 221G of the organic light emitting diode OLED to the source electrode SE or the drain electrode DE of the thin film transistor TFT. Referring to Figure 7B , the connection electrode CM can be connected to the source electrode or the drain electrode of the thin film transistor TFT via a first contact hole CNT1 that penetrates the first via layer 117, and the pixel electrode 221G can be connected to the connection electrode CM via a second contact hole CNT2 that penetrates the second via layer 118.

[0136] The connection electrode CM is arranged in the same layer as the second line PL2, and can include the same material as the material of the second line PL2. For example, the connection electrode CM can include at least one of aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu) in a single layer or a multi-layer structure.

[0137] In a plan view, the connection electrode CM can partially overlap the light emitting openings OP2 and OP3 (e.g., light emitting areas) of the pixel defining layer 119. In some example embodiments, based on a center point CP in each of the light emitting openings OP2 and OP3, an extension EP extending from the second line PL2 is arranged to be opposite to the connection electrode CM. A distance from the center point CP to the extension EP can be substantially the same as a distance from the center point CP to the connection electrode CM. In addition, an overlapping area between the extension EP and the light emitting openings OP2 and OP3 can be equal to an overlapping area between the connection electrode CM and the light emitting openings OP2 and OP3.

[0138] ​​When the extension part EP is not provided, an asymmetric curve or step can be formed on the bottom surface of the light emission openings OP2 and OP3 due to the connection electrode CM disposed on the first via hole layer 117. Accordingly, regarding side visibility, an asymmetric color shift can occur. However, according to various exemplary embodiments, because the extension part EP opposite to the connection electrode CM is provided based on the center point CP, an asymmetric color shift of side visibility can be reduced.

[0139] In addition, as shown in Figure 8 , an edge of each of the pixel electrodes 221R, 221G, and 221B according to various exemplary embodiments can partially overlap the second line PL2. However, because the overlapping edges of the pixel electrodes 221R, 221G, and 221B are not light emission areas, even when the pixel electrodes 221R, 221G, and 221B partially overlap the second line PL2, the optical properties of the light emission areas are not affected.

[0140] Figure 8 is a layout of an organic light emitting display apparatus according to some exemplary embodiments. In Figure 4 , the same reference numerals are used to refer to the same components as those in Figure 8 , and detailed descriptions thereof are mainly omitted.

[0141] Referring to Figure 2A , the organic light emitting display apparatus can further include a node electrode BM and a shield part SP overlapping the node electrode BM.

[0142] The node electrode BM can be located in the same layer as the first line PL1 to be spaced apart from the first line PL1. The node electrode BM can include the same material as that of the first line PL1. For example, the node electrode BM can include at least one of aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu) in a single layer or a multi-layer structure.

[0143] The node electrode BM can be a bridge electrode for connecting thin film transistors of the pixel circuit PC (see Figure 2B and ​ ). The node electrode BM can overlap the center point CP of the light emission opening OP3. The node electrode BM can transmit a signal, and due to the signal, crosstalk can occur between adjacent thin film transistors or between adjacent pixel circuits PC. However, according to various exemplary embodiments, the shield part SP extending from the second line PL2 is provided to overlap the node electrode BM in order to reduce the occurrence of crosstalk due to the signal.

[0144] There can be a plurality of shield portions SP. Some shield portions SP overlap with the light emission opening OP3, and some other shield portions SP can not overlap with the light emission openings OP2 and OP3.

[0145] The shield portion SP overlapping with the light emission opening OP3 can overlap with the node electrode BM, and can correspond to the center point CP of the light emission opening OP3. The above-described arrangement is provided in consideration of asymmetric color shift and cross talk. In various exemplary embodiments, the shield portion SP extending from the second line PL2 is arranged at the center point CP of the light emission opening OP3, and thus, the color shift effect can be displayed equally at the left and right sides.

[0146] According to one or more exemplary embodiments, it is possible to reduce asymmetric color shift of an organic light emitting display apparatus while maintaining consistent characteristics of a pixel, and it is possible to obtain consistency of right side wide area display (WAD) and left side WAD. However, the scope of the present disclosure is not limited to the above-described effects.

[0147] While certain example embodiments and implementations have been described herein, other embodiments and modifications will be apparent from this description. Accordingly, the inventive concept is not limited to such embodiments, but rather the scope of the present disclosure and various modifications and equivalent arrangements are intended to be covered.

Claims

1. An organic light emitting display apparatus, wherein, The organic light emitting display apparatus includes: a substrate; pixels arranged on the substrate in a first direction and a second direction intersecting the first direction, the pixels including organic light emitting diodes including pixel electrodes; a pixel defining layer covering edges of the pixel electrodes, the pixel defining layer defining light emitting areas via openings partially exposing the pixel electrodes; first and second insulating layers between the pixel electrodes and the substrate; first lines extending in the second direction between the first insulating layer and the substrate; second lines between the second insulating layer and the first insulating layer, wherein: the second lines contact the first lines through vias; and each of the plurality of vias is provided for every two pixels arranged in the second direction among the pixels.

2. The organic light emitting display apparatus of claim 1, wherein, The second lines have a mesh structure including openings corresponding to the light emitting areas of the pixels.

3. The organic light emitting display apparatus of claim 1, wherein, The first lines at least partially overlap the light emitting areas, and the second lines are arranged to at least partially bypass the light emitting areas. 4.The organic light emitting display apparatus of claim 1, wherein: the pixels include first, second, and third pixels, the first, second, and third pixels are configured to emit light of different colors from each other; an area of a light emitting area in each of the third pixels is greater than an area of a light emitting area in each of the first pixels and an area of a light emitting area in each of the second pixels; and the vias are arranged such that the light emitting areas of the first pixels and the light emitting areas of the second pixels are closer to the vias than the light emitting areas of the third pixels. 5.The organic light emitting display apparatus of claim 1, wherein: the pixels include first and second green pixels alternately arranged in the first direction; and the vias are arranged such that the first green pixels are closer to the vias than the second green pixels.

6. The organic light emitting display apparatus according to claim 1, wherein, The vias do not overlap the light emitting areas of the pixels.

7. The organic light emitting display apparatus according to claim 1, wherein, The pixels are arranged in a PenTile matrix structure.

8. The organic light emitting display apparatus according to claim 1, wherein, The first lines overlap the light emitting areas of some of the pixels.

9. The organic light emitting display apparatus according to claim 1, wherein, The second lines at least partially overlap some of the pixel electrodes. 10.The organic light emitting display apparatus of claim 1, wherein: each of the pixels further includes a thin film transistor; the organic light emitting display apparatus further includes a connection electrode in the same layer as the second lines, the connection electrode connecting a pixel electrode among the pixel electrodes to a thin film transistor among the thin film transistors; an end portion of a light emitting area of a first pixel among the pixels overlaps the connection electrode; and an opposite end portion of the light emitting area of the first pixel overlaps an extension extending from the second lines.

11. The organic light emitting display apparatus of claim 10, wherein, An overlapping area between the connection electrode and the light emitting area of the first pixel is equal to an overlapping area between the extension and the light emitting area of the first pixel.

12. The organic light emitting display apparatus according to claim 1, wherein, the organic light emitting display apparatus further includes: a node electrode in the same layer as the first line; and a shielding portion extending from the second line, wherein the shielding portion completely overlaps the node electrode. 13.The organic light emitting display apparatus of claim 12, wherein: the node electrode overlaps the light emitting area of some of the plurality of pixels; and the shielding portion corresponds to a central portion of the light emitting area of some of the plurality of pixels.

14. An organic light emitting display apparatus, wherein, The organic light emitting display apparatus comprises: a substrate; pixels arranged on the substrate in a first direction and a second direction intersecting the first direction, the pixels including organic light emitting diodes including pixel electrodes; a pixel defining layer covering edges of the pixel electrodes, the pixel defining layer defining light emitting areas via openings partially exposing the pixel electrodes; first and second insulating layers between the pixel electrodes and the substrate; a first line extending in the second direction between the first insulating layer and the substrate; and a second line between the second insulating layer and the first insulating layer, the second line extending at least partially around the light emitting areas, wherein: the second line contacts the first line through a via; the pixels include first, second, and third pixels, each of the first, second, and third pixels configured to emit light of a different color; and the via is arranged such that a light emitting area of the first pixel and a light emitting area of the second pixel are closer to the via than a light emitting area of the third pixel, and wherein the light emitting area of the third pixel is larger than the light emitting area of the first pixel and the light emitting area of the second pixel.

15. The organic light emitting display apparatus according to claim 14, wherein, The pixels are arranged in a PenTile matrix structure. 16.The organic light emitting display apparatus of claim 15, wherein: the second pixel is a green pixel, the green pixel including first and second green pixels arranged alternately with each other; and the via is disposed such that the first green pixel is closer to the via than the second green pixel.

17. The organic light emitting display apparatus according to claim 14, wherein, The first line overlaps some of the plurality of light emitting areas.

18. The organic light emitting display apparatus according to claim 14, wherein, The organic light emitting display apparatus further comprises: a connection electrode in the same layer as the second line, the connection electrode connected to some of the plurality of pixel electrodes via a contact hole, wherein: an end portion of the light emitting area of the first pixel overlaps the connection electrode; and an opposite end portion of the light emitting area of the first pixel overlaps an extension extending from the second line.

19. The organic light emitting display apparatus according to claim 14, wherein, The organic light emitting display apparatus further comprises: a node electrode in the same layer as the first line; and a shielding portion extending from the second line, wherein the shielding portion completely overlaps the node electrode.

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