Vertical cavity light emitting element

Abstract

[Problem] The purpose of the present invention is to provide a vertical-cavity light-emitting element having a low threshold current and high luminous efficiency. [Solution] The present invention comprises an n-type semiconductor layer formed on a first mirror, an active layer formed on the n-type semiconductor layer and composed of multiple quantum wells, a last barrier layer formed on the last quantum well of the active layer, an electron blocking layer formed on the last barrier layer, and a second barrier layer formed on the electron blocking layer. The semiconductor device includes an electron blocking layer, a p-type semiconductor layer formed on the electron blocking layer, a dielectric spacer layer formed on the p-type semiconductor layer, and a second mirror formed on the spacer layer. A count of an antinode of a standing wave emitted from the active layer included in the electron blocking layer and the p-type semiconductor layer is 1, and a count of a node is 0 or 1. Counts of nodes and antinodes of standing waves included in the last barrier layer are each 1 or more.

Description

TECHNICAL FIELD

[0001] The present application relates to a vertical cavity light emitting element, and particularly to a vertical cavity light emitting element having a multi-quantum well active layer. BACKGROUND

[0002] Conventionally, a vertical cavity light emitting element such as a vertical cavity surface emitting laser (VCSEL) is known, which has a structure that allows light to resonate vertically to a substrate surface and emit light in a direction perpendicular to the substrate surface.

[0003] In the vertical cavity light emitting element, a multi-quantum well (MQW) structure is generally employed in an active layer to achieve a high-efficiency light emitting characteristic with a low threshold current.

[0004] For example, Patent Literature 1 discloses an end surface light emitting nitride semiconductor laser element having a structure that improves internal quantum efficiency by reducing the concentration of electrons and holes of a p-side light guide layer between a last quantum well layer and an electron blocking layer.

[0005] Patent Literature 2 discloses a surface light emitting semiconductor laser including first to fourth semiconductor multilayer film mirrors, in which the Al content or impurity concentration of the semiconductor multilayer film mirrors is adjusted to promote lateral carrier diffusion at low temperature.

[0006] Patent Literature 3 discloses a vertical cavity surface emitting laser aiming at promoting supply of current to an active region and reducing a threshold current. The vertical cavity surface emitting laser has an insulating layer having an opening, a light-transmissive electrode covering the opening, and a mirror made of a dielectric material provided on the opening via the light-transmissive electrode, and an electrically conductive material is provided between the insulating layer and the mirror.

[0007] PRIOR ART DOCUMENTS

[0008] PATENT LITERATURE

[0009] Patent Literature 1: Japanese Patent Application Laid-Open No. 2014-131019

[0010] Patent Literature 2: Japanese Patent Application Laid-Open No. 2009-194102

[0011] Patent Literature 3: Japanese Patent Application Laid-Open No. 2011-29607 SUMMARY

[0012] PROBLEMS TO BE SOLVED BY THE INVENTION

[0013] In the conventional vertical cavity light emitting element, further reduction of the threshold current and improvement of the light emitting efficiency have been a problem.

[0014] The inventors of the present application have acquired knowledge that improvement of the unevenness of holes and electrons in a multiple quantum well active layer results in significant improvement of element characteristics. The present application is accomplished based on the recognition, and aims to provide a vertical cavity light emitting element having a low threshold current and high light emitting efficiency.

[0015] Solution to the problem

[0016] A vertical cavity light emitting element according to one embodiment of the present application includes a first mirror, an n-type semiconductor layer, an active layer, a last barrier layer, an electron blocking layer, a p-type semiconductor layer, a dielectric spacer layer, and a second mirror. The n-type semiconductor layer is formed on the first mirror. The active layer is made of a plurality of quantum wells formed on the n-type semiconductor layer. The last barrier layer is formed on a last quantum well of the active layer. The electron blocking layer is made of AlGaN formed on the last barrier layer. The p-type semiconductor layer is formed on the electron blocking layer. The dielectric spacer layer is formed on the p-type semiconductor layer. The second mirror is formed on the spacer layer. The count of the antinodes and the count of the nodes of the standing wave emitted by the active layer contained in the electron blocking layer and the p-type semiconductor layer are respectively 0 or 1, and the active layer and the last barrier layer satisfy

[0017] [Equation 1]

[0018]

[0019] wherein,

[0020] where H fb and H qw are the layer thicknesses of the last barrier layer and the active layer, respectively, n fb is the refractive index of the last barrier layer, and n qw is the equivalent refractive index of the active layer, and satisfies Y ≥ 0.13X + 12.7, where X is the layer thickness of the last barrier layer in nm, and Y is the average Al content of the electron blocking layer in percent.

[0021] A vertical cavity light emitting element according to another embodiment of the present application includes a first mirror, a first n-type semiconductor layer, an active layer, a last barrier layer, an electron blocking layer, a p-type semiconductor layer, a tunnel junction layer, a second n-type semiconductor layer, and a second mirror. The first n-type semiconductor layer is formed on the first mirror. The active layer is made of a plurality of quantum wells formed on the first n-type semiconductor layer. The last barrier layer is formed on a last quantum well of the active layer. The electron blocking layer is made of AlGaN formed on the last barrier layer. The p-type semiconductor layer is formed on the electron blocking layer. The tunnel junction layer as a current confinement layer is formed on the p-type semiconductor layer. The second n-type semiconductor layer is formed by burying the tunnel junction layer. The second mirror is formed on the second n-type semiconductor layer. A count of an antinode and a count of a node of a standing wave emitted from the active layer included in the electron blocking layer and the p-type semiconductor layer are respectively 0 or 1, and the active layer and the last barrier layer satisfy

[0022] [Equation 2]

[0023]

[0024] wherein,

[0025] wherein H fb and H qw are layer thicknesses of the last barrier layer and the active layer, respectively, n fb is a refractive index of the last barrier layer, and n qw is an equivalent refractive index of the active layer, and satisfies Y ≥ 0.13X + 12.7, where X is a layer thickness of the last barrier layer in nm, and Y is an average Al content of the electron blocking layer in %. BRIEF DESCRIPTION OF DRAWINGS

[0026] Figure 1 is a cross-sectional view schematically showing a structure of a vertical cavity surface emitting laser 10 of a first embodiment of the present application.

[0027] Figure 2 is a graph schematically showing a band structure of a conduction band of the vertical cavity surface emitting laser 10.

[0028] Figure 3 is a graph schematically showing a standing wave SW in a semiconductor layer from the active layer 15 to the dielectric DBR 25 in the vertical cavity surface emitting laser 10 of Example 1 (Ex. 1).

[0029] Figure 4 is a graph schematically showing a standing wave SW in a semiconductor layer from an active layer to a dielectric DBR in the vertical cavity surface emitting laser of Comparative Example 1 (Cmp. 1).

[0030] Figure 5is a table showing layer thicknesses of the semiconductor layers, the number N of nodes ND, and the number N of antinodes AN of the vertical cavity surface emitting laser 10 of Examples 1 to 3 (Ex. 1 to Ex. 3) and Comparative Examples 1, 2 (Cmp. 1, Cmp. 2). ND is a table showing layer thicknesses of the semiconductor layers, the number N of nodes ND, and the number N of antinodes AN of the vertical cavity surface emitting laser 10 of Examples 1 to 3 (Ex. 1 to Ex. 3) and Comparative Examples 1, 2 (Cmp. 1, Cmp. 2). AN

[0031] Figure 6A is a graph showing a light output with respect to an injection current of the vertical cavity surface emitting laser 10 of Example 1 (Ex. 1).

[0032] Figure 6B is a graph showing a voltage with respect to an injection current of the vertical cavity surface emitting laser 10 of Example 1 (Ex. 1).

[0033] Figure 6C is a graph showing a differential impedance with respect to an injection current of the vertical cavity surface emitting laser 10 of Example 1 (Ex. 1).

[0034] Figure 7A is a graph showing a light output with respect to an injection current of the vertical cavity surface emitting laser (Cmp. 1) of Comparative Example 1.

[0035] Figure 7B is a graph showing a voltage with respect to an injection current of the vertical cavity surface emitting laser (Cmp. 1) of Comparative Example 1.

[0036] Figure 7C is a graph showing a differential impedance with respect to an injection current of the vertical cavity surface emitting laser (Cmp. 1) of Comparative Example 1.

[0037] Figure 8A is a graph showing a calculation result of an electron concentration distribution of each well layer at the time of laser oscillation of the vertical cavity surface emitting laser 10 of Example 1.

[0038] Figure 8B is a graph showing a calculation result of an electron concentration distribution of each well layer at the time of laser oscillation of the vertical cavity surface emitting laser of Comparative Example 1.

[0039] Figure 9 is a graph schematically showing a standing wave SW in the semiconductor layers from the active layer 15 to the dielectric DBR 25 in the vertical cavity surface emitting laser 10 of Example 2.

[0040] Figure 10A is a graph showing a calculation result of an electron concentration distribution of each well layer at the time of laser oscillation of the vertical cavity surface emitting laser 10 of Example 2.

[0041] Figure 10B is a graph showing a calculation result of an electron concentration distribution of each well layer at the time of laser oscillation of the vertical cavity surface emitting laser of Comparative Example 2. ​

[0042] Figure 11 FIG. 6 is a graph showing the calculated results of the electron concentration distribution of each well layer at the time of laser oscillation of the surface-emitting laser 10 of Example 3.

[0043] Figure 12 FIG. 1 is a cross-sectional view schematically showing the structure of a vertical cavity surface-emitting laser 10 of a first embodiment of the present application. In the present embodiment, the vertical cavity surface-emitting laser 10 is a nitride surface-emitting laser composed of gallium nitride-based (GaN-based) semiconductor layers.

[0044] Figure 13 FIG. 8 is a graph showing the change in electron concentration of a p-type semiconductor layer of the vertical cavity surface-emitting laser of the present application. DETAILED DESCRIPTION

[0045] Hereinafter, preferred embodiments of the present application will be described, but these embodiments can be appropriately changed and combined. In the following description and drawings, the same reference numerals are used to describe substantially the same or equivalent parts.

[0046] [First Embodiment]

[0047] Figure 1 FIG. 1 is a cross-sectional view schematically showing the structure of a vertical cavity surface-emitting laser 10 of a first embodiment of the present application. In the present embodiment, the vertical cavity surface-emitting laser 10 is a nitride surface-emitting laser composed of gallium nitride-based (GaN-based) semiconductor layers.

[0048] The vertical cavity surface-emitting laser 10 is formed by crystal growth of a semiconductor distributed Bragg reflector (DBR) 12, an n-type semiconductor layer 13, an active layer 15 made of a plurality of quantum wells, a final barrier layer 16, an electron blocking layer (EBL) 17, and a p-type semiconductor layer 18 in this order on a substrate 11.

[0049] The substrate 11 is a GaN substrate which is a c-plane GaN substrate tilted by 0.5° in the m-plane direction and 0±0.1° in the a-plane direction from the c-plane.

[0050] Crystal growth of the semiconductor layers is performed using a metal organic chemical vapor deposition (MOVPE) method. On the substrate 11, a base GaN layer 11B having a layer thickness of about 1 μm is grown, and a semiconductor DBR 12 as a distributed Bragg reflector is formed on the base GaN layer 11B.

[0051] The semiconductor DBR 12 (first mirror) is formed by laminating 42 an n-type GaN film and an AlInN film. Each semiconductor film of the semiconductor DBR 12 has a film thickness of λ / 4n of the emission wavelength λ of the active layer 15, and n is the refractive index of each semiconductor film.

[0052] An n-type semiconductor layer 13 (layer thickness: 350 nm) as an n-type GaN layer doped with silicon (Si) was grown on the semiconductor DBR 12.

[0053] A barrier layer (barrier layer) 15B and a quantum well layer (well layer) 15W were alternately formed on the n-type semiconductor layer 13, and an active layer 15 having four quantum well layers 15W was formed. The barrier layer 15B was composed of GaInN (layer thickness: 3 nm), and the well layer 15W was composed of GaN (layer thickness: 4 nm). The composition and layer thickness of the barrier layer 15B and the well layer 15W can be appropriately selected depending on the desired emission wavelength, emission characteristics, and the like.

[0054] On the last well layer 15WL as the last layer of the active layer 15, undoped GaN was grown as a last barrier layer (LB) 16 with a layer thickness of 120 nm.

[0055] Next, an electron blocking layer (EBL) 17 made of Mg (magnesium-doped AlGaN (Al content: 0.30)) with a layer thickness of 10 nm was grown. Subsequently, a p-GaN layer was grown on the electron blocking layer 17 (p-AlGaN) to 83 nm as a p-type semiconductor layer 18.

[0056] The outer peripheral portion of the wafer grown as described above was etched to the inside of the n-type semiconductor layer 13, and a mesa structure having a cylindrical shape was formed.

[0057] The outer peripheral portion of the p-type semiconductor layer 18 as the uppermost semiconductor layer of the mesa structure was etched by dry etching to a depth of about 20 nm to form a recess, and the p-type semiconductor layer 18 having a cylindrical mesa protrusion portion was formed.

[0058] In the recess of the p-type semiconductor layer 18 formed by etching, an insulating film (SiO2) 21 for lateral current and optical confinement was deposited with a thickness of 20 nm. Thereby, the recess of the p-type semiconductor layer 18 was flattened, a current confinement structure was formed, and a current injection region having a cylindrical shape (central axis: CX) was formed.

[0059] Next, an indium tin oxide (ITO) film with a thickness of 20 nm was formed as a transparent conductive film 22 on the p-type semiconductor layer 18 and the insulating film 21.

[0060] Subsequently, a dielectric (Nb2O5) with a thickness of 38 nm was formed as a spacer layer 24. The spacer layer 24 serves as a phase adjustment layer.

[0061] Further, a dielectric DBR 25 (second mirror) was formed on the spacer layer 24. The dielectric DBR 25 was composed of 10.5 pairs of SiO2 (11 layers) and Nb2O5 (10 layers). The dielectric DBR 25 is preferably formed coaxially with the cylindrical mesa of the p-type semiconductor layer 18.

[0062] Next, an n-electrode 27 is formed on the recessed portion of the outer peripheral portion of the n-type semiconductor layer 13, and a p-electrode 28 is formed on the transparent conductive film 22. In addition, the back surface of the substrate 11 is polished to form an AR (anti-reflective) coating 29 composed of two layers of Nb2O5 / SiO2. As described above, the formation of the vertical cavity surface emitting laser 10 is completed.

[0063] The composition and layer thickness of the above-described last barrier layer (LB) 16 are merely examples. That is, although the last barrier layer 16 is described as a GaN layer, a nitride semiconductor layer of other composition such as InGaN, AlGaN, InAlGaN, or the like can also be used. In addition, although the last barrier layer 16 is described as an undoped layer, a dopant diffused from the electron blocking layer 17 or the p-type semiconductor layer 18 can also be mixed.

[0064] Further, the composition and layer thickness of the electron blocking layer 17 are merely examples. The electron blocking layer 17 can have a layer thickness of, for example, 3 nm to 30 nm, and the Al content can be adjusted in a range of 10% to 70%.

[0065] In addition, the electron blocking layer 17 is described as a p-type semiconductor layer (p-AlGaN), but can also be a p-type semiconductor layer grown as an i layer and mixed with a dopant diffused from the p-type semiconductor layer 18.

[0066] In addition, the case where the active layer 15 has four quantum well layers 15W is described as an example, but as long as it has a plurality of quantum well layers.

[0067] Further, the p-type semiconductor layer 18 can be composed of a plurality of semiconductor layers including layers having different compositions and / or doping concentrations from each other and an undoped layer. Likewise, the n-type semiconductor layer 13 can also be composed of a plurality of semiconductor layers.

[0068] The case where the dielectric DBR 25 is made of a SiO2 film and a Nb2O5 film has been shown as an example, but it can be composed of dielectric films having different refractive indexes from each other by other combinations. In addition, it can also be composed of a semiconductor DBR composed of semiconductor films having different refractive indexes from each other.

[0069] Figure 2 is a diagram schematically showing the energy band structure of the conduction band of the vertical cavity surface emitting laser 10. The energy band structure from the active layer 15 to the p-type semiconductor layer 18 is shown.

[0070] The active layer 15 is composed of four well layers 15W of QW1 to QW4 and barrier layers 15B provided therebetween. The quantum well layer QW4 adjacent to the last barrier layer (LB) 16 is a last well layer 15WL.

[0071] The last barrier layer 16 has a layer thickness t1, the electron blocking layer 17 has a layer thickness t2, and the p-type semiconductor layer 18 has a layer thickness t3.

[0072] [Conditions for high-efficiency vertical cavity light emitting element]

[0073] The inventors of the present application have acquired knowledge about conditions that a high-efficiency vertical cavity light emitting element having low internal loss should satisfy.

[0074] That is, first, a first interface between a high reflector such as a distributed Bragg reflector (DBR) or a diffraction grating and the inside of a resonator is defined as phase "0" (reference).

[0075] Using the refractive index n of each layer inside the resonator i and the layer thickness t i and the light emission wavelength λ, the total phase information of a standing wave inside the resonator is represented by the following equation (1).

[0076] [Equation 3]

[0077]

[0078] By substituting the thickness t from the interface with another layer on the resonator side to a predetermined position inside the layer i , the resultant information of the standing wave at the predetermined position is considered.

[0079] The first condition is that the number N of antinodes AN and the number N of nodes ND of the standing wave SW included in the p-type semiconductor layer 18 as a p region and the electron blocking layer 17 are respectively 0 or 1 (N = 0 or N = 1). AN ND (N = 0 or N = 1). AN AN (N = 0 or N = 1). ND ND (N = 0 or N = 1).

[0080] Note that the following equation (2) is preferably satisfied, where H ITO , H GaN , and H EB are the layer thicknesses of the transparent conductive film 22 (ITO), the p-type semiconductor layer 18, and the electron blocking layer 17, respectively, n ITO , n GaN , and n EB are the refractive indexes of the transparent conductive film 22 (ITO), the p-type semiconductor layer 18, and the electron blocking layer 17, respectively, and λ is the wavelength.

[0081] [Equation 4]

[0082]

[0083] ​​​Further, the second condition is that the number of nodes ND and antinodes AN of the standing wave SW included in the final barrier layer 16 is one or more (N ND ≥ 1 and N AN ≥ 1).

[0084] The number of nodes ND and antinodes AN of the standing wave SW included in the final barrier layer 16 ND , N AN may be determined by calculating each total phase in the p region and the final barrier layer 16 using the above-described equation (1) and determining the number of points at which the phase in the p region and the final barrier layer 16 is equal to kπ (k = 1, 2,...) and the number of points at which the phase is equal to (2l - 1)π / 2 (l = 1, 2,...).

[0085] Equation (1) = k / 2 (k = 1, 2,...) indicates the position at which the standing wave forms an antinode AN, and equation (1) = (2l - 1) / 4 (l = 1, 2,...) indicates the position at which the standing wave forms a node ND. That is, the number of antinodes AN and the number of nodes ND in the p-type semiconductor layer 18, the electron blocking layer 17, and the final barrier layer 16 are determined by counting the number of positions that become the above-described antinodes AN and the number of positions that become the nodes ND included in the stacking range of the respective layers. ND and N AN are determined by counting the number of positions that become the above-described antinodes AN and the number of positions that become the nodes ND included in the stacking range of the respective layers.

[0086] Further, the following equation (3) is preferably satisfied, H fb and H qw are the layer thicknesses of the final barrier layer 16 and the active layer 15. Here, n fb is the refractive index of the final barrier layer 16, and n qw is the equivalent refractive index of the active layer 15.

[0087] [Equation 5]

[0088]

[0089] wherein

[0090] Further, (i) the layer thickness of the final barrier layer 16 is preferably λ / 4 or more. That is, the following equation (4) is preferably satisfied.

[0091] [Equation 6]

[0092]

[0093] Further, (ii) preferably, the number of nodes ND included in the final barrier layer 16 is two or more (N ND ≥ 2), and preferably, the number of antinodes AN included in the final barrier layer 16 is one or more (N AN ≥ 1). In the case where (i) and (ii) are satisfied, the following equation (5) is further preferably satisfied.

[0094] [Equation 7]

[0095]

[0096] In addition, the layer thickness of the active layer 15 is preferably λ / 8 or less, i.e., preferably satisfies the following equation (6). In this case, the light confinement loss of the active layer 15 can be reduced.

[0097] [Equation 8]

[0098]

[0099] The configuration described above enhances the electric field strength of light from the p-type semiconductor layer 18 to the electron blocking layer 17. In addition, the presence of the antinode AN having a high light electric field strength in the last barrier layer 16 and the presence of at least one node ND in the last barrier layer 16 are sufficient to excite the active layer 15 to obtain a large optical gain.

[0100] In addition, when the internal light intensity is enhanced by the semiconductor DBR 12 and the dielectric DBR 25 as high reflection mirrors, electrons and holes in the last barrier layer 16 are excited by the internal light, and the holes accumulated at the interface between the electron blocking layer 17 and the p-type semiconductor layer 18 are extracted to the active layer 15, resulting in the injection of holes into the active layer 15 in a switching manner.

[0101] Thereby, the uniformity of each carrier (electron and hole) in the plurality of well layers 15W of the active layer 15 can be improved, thereby realizing a highly efficient surface-emitting laser.

[0102] [Consideration of the mechanism of performance improvement]

[0103] The configuration described above enhances the uniformity of each carrier (electron and hole) in the well layer 15W of the active layer 15, thereby realizing a highly efficient surface-emitting laser. The mechanism by which the performance (such as efficiency) can thus be improved is considered.

[0104] To address the carrier non-uniformity of the multiple quantum wells, the mechanism of performance improvement is considered to be related to the injection of holes in a switching manner. Such a surface-emitting laser is designed to align the antinode of the standing wave at the center of the active layer (multiple quantum wells). That is, by disposing the active layer at a position where the electric field of light is large, the interaction between light and electron-hole recombination is increased.

[0105] Therefore, the last barrier layer 16 adjacent to the active layer 15 is in a direction in which the electric field strength of light decreases. However, by providing the last barrier layer 16 in which the antinode of the standing wave different from the active layer is positioned or in which the vicinity including the antinode is included as described above, it is presumed that the light intensity of this layer significantly rises around the threshold value and generates carriers (electrons and holes) that immediately show the effect of holes on the p-type semiconductor layer 18 side of the electron blocking layer 17. When the electric field gradient in the p region is high, this situation occurs more easily.

[0106] This effect is considered to be caused by an increase in the concentration of holes accumulated on the p-type semiconductor layer 18 side and an increase in the electric field gradient within the electron blocking layer 17. The switching of the hole absorption is considered to improve the uniformity of the carrier distribution in the multiple quantum well and reduce the internal loss. Therefore, in some cases, characteristics that are not seen in the characteristics of a common surface-emission laser (VCSEL), such as the differential impedance and the local minimum of the driving current around the threshold value (dR / dI = 0, dV / dI = 0) due to laser oscillation, can be obtained. Therefore, the position of the antinode in the last barrier layer 16, the thinning of the p layer (the electron blocking layer 17 and the p-type semiconductor layer 18), and the light intensity of the optical gain in which there is strong vertical optical feedback and a high-reflectivity mirror are important factors. 2 V / dI 2 = 0). Therefore, the position of the antinode in the last barrier layer 16, the thinning of the p layer (the electron blocking layer 17 and the p-type semiconductor layer 18), and the light intensity of the optical gain in which there is strong vertical optical feedback and a high-reflectivity mirror are important factors.

[0107] [Example 1]

[0108] Figure 3 is a diagram schematically showing a standing wave SW of the electric field strength of light emitted from the active layer 15 in the semiconductor layers from the active layer 15 to the dielectric DBR 25 in the vertical cavity surface-emission laser 10 of Example 1 (Ex. 1) of the present embodiment.

[0109] In Example 1 (Ex. 1), one node ND and one antinode AN of the standing wave SW exist in the last barrier layer 16. That is, N ND = 1 and N AN = 1, where N ND is the number of nodes ND and N AN is the number of antinodes AN. As Figure 3 shown, the standing wave SW has the antinode AN located at the interface A with the high-reflectivity mirror of the dielectric DBR 25.

[0110] In addition, one node ND and one antinode AN of the standing wave SW exist in the electron blocking layer (EBL) 17 and the p-type semiconductor layer (p-GaN) 18 that serve as the p region (N ND = 1 and N AN = 1). Furthermore, one node ND of the standing wave SW preferably exists in the transparent conductive film (ITO) 22 (N ND = 1).

[0111] The configuration as described above enhances the electric field intensity from the p-type semiconductor layer 18 to the electron blocking layer 17. In addition, the presence of the antinode in the last barrier layer 16 having a high optical electric field intensity and the presence of at least one node in the last barrier layer 16 are sufficient to excite the active layer 15 to obtain a large optical gain.

[0112] In addition, when the internal light intensity is enhanced by the semiconductor DBR 12 and the dielectric DBR 25 as high reflection mirrors, the electrons and holes in the last barrier layer 16 are excited by the internal light, and the holes accumulated at the interface between the electron blocking layer 17 and the p-type semiconductor layer 18 are extracted to the active layer 15, resulting in the holes being injected into the active layer 15 in a switching manner.

[0113] Thereby, the uniformity of the carriers (electrons and holes) in the four well layers 15W (QW1 to QW4) can be improved, thereby realizing a high-efficiency surface-emitting laser.

[0114] [Comparative Example 1]

[0115] Figure 4 is a graph schematically showing the standing wave SW of the electric field intensity of light from the active layer 15 to the semiconductor layer in the dielectric DBR 25 in the vertical cavity surface-emitting laser of Comparative Example 1 (Cmp. 1). Figure 5 is a table showing the layer thickness, the number N of nodes ND, and the number N of antinodes AN of the semiconductor layers of the vertical cavity surface-emitting lasers 10 of Examples 1 to 3 (Ex. 1 to Ex. 3) and Comparative Examples 1 and 2 (Cmp. 1, Cmp. 2). ND AN

[0116] The vertical cavity surface-emitting laser of Comparative Example 1 (Cmp. 1) is significantly different from the vertical cavity surface-emitting laser 10 of Example 1 (Ex. 1) in that the last barrier layer (LB) 16 has a layer thickness of 10 nm. That is, in the vertical cavity surface-emitting laser of Comparative Example 1, neither the node ND nor the antinode AN of the standing wave SW is present in the last barrier layer 16 (N ND = 0, N AN = 0). Comparative Example 1 has a common structure with Example 1 except for the difference in the film thickness described in Figure 5

[0117] Figure 6A Figure 6B Figure 6C are graphs showing the measurement results of the vertical cavity surface-emitting laser 10 of Example 1 (Ex. 1), and respectively show the characteristics of the light output, the voltage, and the differential impedance with respect to the injection current. Figure 7A ,​​​​​Figure 7B and Figure 7C is a graph showing measurement results of the vertical cavity surface emitting laser of Comparative Example 1 (Cmp. 1), indicating characteristics of light output, voltage, and differential impedance with respect to injection current, respectively.

[0118] As Figure 6A indicated, the laser oscillation characteristics at a low threshold current were confirmed in the vertical cavity surface emitting laser 10 of Example 1 (Ex. 1). In addition, as shown in Table 1 below, the slope efficiency and external differential quantum efficiency were improved compared to the vertical cavity surface emitting laser of Comparative Example 1 (Cmp. 1).

[0119] [Table 1]

[0120] [Table 1]

[0121]

[0122] As shown in Table 1 below, in Comparative Example 1, the slope efficiency and external differential quantum efficiency were lower than in Example 1. The analysis results revealed that the internal loss of the laser of Comparative Example 1 was higher than that of Example 1. The internal loss of the laser of Comparative Example 1 was the same value as that reported in the past. Furthermore, the I-V characteristics of Comparative Example 1 exhibited the same behavior as the I-V characteristics described in the prior art literature. In the prior art, no local minimum or negative impedance of the differential impedance near the threshold current was observed.

[0123] Specifically, as Figure 6B and Figure 6C indicated, in the vertical cavity surface emitting laser 10 of the present embodiment, there are devices in which a voltage fluctuation is observed near the threshold current. It was found that the differential impedance sharply decreases near the threshold current, and in some cases, the differential impedance and the driving current have a local minimum (dR / dI = 0, d 2 V / dI 2 = 0, R: impedance, I: current). Furthermore, if it is stronger, the differential impedance can enter the negative region.

[0124] Such characteristics were not observed in conventional surface emitting lasers. In the vertical cavity surface emitting laser 10 of the present embodiment, it is considered that, in a state in which the thickness of the p-region (electron blocking layer 17 and p-type semiconductor layer 18) is thin and a large electric field is applied to the p-region layer, the holes accumulated at the interface of the electron blocking layer 17 and the p-type semiconductor layer 18 (p-GaN) are induced by the electrons and holes generated in the last barrier layer 16 and all flow into the active layer 15. This promotes the uniformity of the carrier concentration between the multiple quantum wells, allows the internal loss, the external differential quantum efficiency, and the slope efficiency to be improved, and enables the local minimum of the differential impedance and the threshold current to be reduced.

[0125] More specifically, the reduction in internal loss is considered to be due to the uniformization of the carrier density distribution of each well layer 15W. Figure 8A and Figure 8B The calculation results of the carrier density (electron concentration) distribution of each well layer 15W at the time of laser oscillation of the surface-emitting laser of Example 1 and Comparative Example 1 are shown.

[0126] Figure 8A and Figure 8B The electron concentration is shown normalized by defining the electron concentration of the well layer (QW2) having the lowest carrier density as 1. It can be seen that the non-uniformity is 3 times or more in Comparative Example 1, whereas the non-uniformity is reduced to about 2 times in Example 1. This non-uniformity causes optical loss in the well layer (QW2) having the lowest carrier density, and thus the internal loss is considered to increase.

[0127] In the existing surface-emitting laser, the hole is difficult to move due to the presence of a hole having a large effective mass and a piezoelectric field, resulting in non-uniformity of the hole and the electron in the plurality of quantum well layers, and thus the external differential quantum efficiency is considered to be low, and the differential resistance before laser oscillation is high.

[0128] In Comparative Example 1, one node ND and one antinode AN (N ND = 1, N AN = 1) exist in the p region (electron blocking layer 17 and p-type semiconductor layer 18), and thus the first condition is satisfied. However, neither the node ND nor the antinode AN (N ND = 0, N AN = 0) exists in the final barrier layer 16, and thus the second condition is not satisfied. It is important to satisfy both the first condition and the second condition.

[0129] In the vertical cavity surface-emitting laser 10 of the present embodiment, by the above effect, the effect of reducing the internal loss is obtained, and the differential resistance is reduced near the threshold current. In addition, the differential resistance and the driving current have a local minimum value (dR / dI = 0, d 2 V / dI 2 = 0) near the threshold current in some cases.

[0130] According to the Fermi-Dirac distribution function, the emission spectrum and the gain spectrum before laser oscillation can be widely distributed even on the high-energy side. It is preferable to have a gain peak and an emission peak on the higher-energy (shorter-wavelength) side than the oscillation wavelength. In addition, it is preferable to have a thick well layer thickness of, for example, 4 nm or more so that a second energy level (quantum energy level in the conduction band) is formed in the quantum well.

[0131] By observing the spectrum before oscillation and confirming that the light intensity or energy on the short wavelength side is larger than the oscillation wavelength, it can be confirmed whether the light emission peak is on the high energy side. Furthermore, by utilizing this hole injection effect, light excitation is performed while maintaining a fixed current before laser oscillation, thereby promoting the occurrence of a light switching phenomenon or causing self-pulsation operation of a surface-emitting laser.

[0132] When utilizing the light switching phenomenon, a current slightly lower than the threshold current is supplied from a power source (not shown) connected to the vertical cavity surface emitting laser 10, and thereby the vertical cavity surface emitting laser 10 is irradiated with light from the outside. A light source other than the vertical cavity surface emitting laser 10 can be used to emit light from the outside.

[0133] [Example 2]

[0134] In Example 1 (Ex. 1), it has been described that one node ND and one antinode AN of the standing wave SW exist in the last barrier layer 16 (N ND = 1, N AN = 1), and one node ND and one antinode AN exist in the p region (electron blocking layer 17 and p-type semiconductor layer 18) (N ND = 1, N AN = 1).

[0135] Referring to Figure 9 The structure of the vertical cavity surface emitting laser 10 of Example 2 (Ex. 2) will be described. Figure 9 is a graph schematically showing the standing wave SW of the electric field intensity of light in the semiconductor layers from the active layer 15 to the dielectric DBR 25 in the vertical cavity surface emitting laser 10 of Example 2.

[0136] As Figure 5 shown, in Example 2, the layer thickness of the last barrier layer 16 is 70 nm, which is thinner than 120 nm in Example 1. In addition, the layer thickness of the p region (the total layer thickness of the electron blocking layer 17 and the p-type semiconductor layer 18) is 65 nm (20 + 45 nm), which is thinner than 93 nm (10 + 83 nm) in Example 1.

[0137] The Al content of the electron blocking layer 17 is set to 0.15. Except for the above points, Example 2 is similar to Example 1.

[0138] In the vertical cavity surface emitting laser 10 of Example 2, one node ND and one antinode AN exist in the last barrier layer 16 (N ND = 1, N AN = 1). In the p region (electron blocking layer 17 and p-type semiconductor layer 18), one antinode AN exists, and no node ND exists (N AN = 1, N ND = 0).

[0139] [Comparative Example 2]

[0140] The significant difference between the vertical-cavity surface-emitting laser of Comparative Example 2 (Cmp. 2) and the vertical-cavity surface-emitting lasers 10 of Example 1 (p-region layer thickness: 93 nm) and Example 2 (p-region layer thickness: 65 nm) is that the p-region layer thickness (the total layer thickness of the electron blocking layer 17 and the p-type semiconductor layer 18) is 397 nm (10 + 387 nm). Apart from the points mentioned above, Comparative Example 2 is the same as Example 1.

[0141] like Figure 5 As shown, in the vertical-cavity surface-emitting laser of Comparative Example 2, one node ND and two antinodes AN of the standing wave SW exist in the final barrier layer 16 (N ND =1, N AN =2). Furthermore, four nodes ND and four antinodes AN exist in the p-region (electron blocking layer 17 and p-type semiconductor layer 18). ND =4, N AN =4).

[0142] In other words, the second condition (the number of nodes ND and antinodes AN contained in the last barrier layer 16) is satisfied, but the first condition (the number of nodes ND and antinodes AN contained in the electron blocking layer 17 and the p-type semiconductor layer 18) is not satisfied.

[0143] Figure 10A and Figure 10B The calculated results of the carrier density (electron concentration) distribution of each well layer at 15W during laser oscillation of the surface-emitting lasers of Example 2 and Comparative Example 2 are presented respectively.

[0144] Figure 10A and Figure 10B The electron concentration is shown by defining the electron concentration of the lowest carrier density well layer (QW2) as 1. It can be seen that in Comparative Example 2, the inhomogeneity is more than 3.5 times, while in Example 2, the inhomogeneity is reduced to about 2 times.

[0145] This inhomogeneity causes optical loss in the well layer (QW2) with the lowest carrier density, thus it is believed that the internal loss is increased.

[0146] As can be seen from the above, satisfying only the conditions of the final barrier layer (the second condition) is not enough to obtain an efficient surface-emitting laser.

[0147] Furthermore, the carrier uniformity in Example 2 is slightly higher than that in Example 1, in the electron blocking layer 17 and the p-type semiconductor layer 18, N ND =0 and N AN =1 to N ND =1 and NAN = 1 more preferably.

[0148] [Example 3]

[0149] As Figure 5 shown in Example 3 (Ex. 3), the layer thickness of the last barrier layer 16 was 220 nm, which was thicker than 120 nm in Example 1. In addition, the layer thickness of the p region (the total layer thickness of the electron blocking layer 17 and the p-type semiconductor layer 18) was 101 nm (20 + 81 nm), which was thicker than 93 nm (10 + 83 nm) in Example 1. The Al content of the electron blocking layer 17 was set to 0.15. Except for the above points, Example 3 was similar to Example 1.

[0150] In Example 3, there were two nodes ND and two antinodes AN (N ND = 2, N AN = 2) in the last barrier layer 16, reflecting the fact that the last barrier layer 16 was thicker. In addition, there was one node ND and one antinode AN (N ND = 1, N AN = 1) in the p region (the electron blocking layer 17 and the p-type semiconductor layer 18).

[0151] Figure 11 The calculation results of the carrier density (electron concentration) distribution of each well layer 15W at the time of laser oscillation of the surface-emitting laser 10 of Example 3 are shown.

[0152] It was confirmed that the uniformity was significantly improved compared to Comparative Example 1 and Comparative Example 2. In addition, Example 3 was slightly improved compared to Example 1, and it was found that even a structure in which the number of antinodes AN and nodes ND in the last barrier layer was increased, that is, a structure in which N ND and / or N AN was 2 or more, could achieve the target high-efficiency surface-emitting laser.

[0153] Therefore, in the case where the number of antinodes AN and nodes ND in the last barrier layer was insufficient (Comparative Example 1), or in the case where the number of antinodes AN and nodes ND in the p region was excessive (Comparative Example 2), there was no effect. However, when the above first condition and second condition were satisfied, the switching of the hole injection occurred, and the reduction in the efficiency of the surface-emitting laser due to the carrier non-uniformity between the respective well layers of the quantum well active layer could be eliminated, thereby providing a high-efficiency surface-emitting laser.

[0154] [Second Embodiment]

[0155] Figure 12 is a cross-sectional view schematically showing the structure of a vertical cavity surface-emitting laser 50 of the second embodiment of the present application. The vertical cavity surface-emitting laser 50 of the present embodiment has a tunnel junction as a current confinement structure.

[0156] The vertical cavity surface emitting laser 50 is a nitride surface emitting laser having the same configuration as that of the vertical cavity surface emitting laser 10 according to the first embodiment of Example 1.

[0157] That is, the vertical cavity surface emitting laser 50 is formed by sequentially growing a semiconductor DBR 12, an n-type semiconductor layer 13, an active layer 15 made of a plurality of quantum wells, a final barrier layer 16, an electron blocking layer (EBL) 17, and a p-type semiconductor layer 18 on a substrate 11. In addition, the composition, layer thickness, impurity concentration, and the like of each semiconductor layer are the same as those of the vertical cavity surface emitting laser 10.

[0158] In the vertical cavity surface emitting laser 50 of the second embodiment, after the p-type semiconductor layer 18 is grown, the growth is switched from the p-type semiconductor layer 18 to an n-type semiconductor layer 32 (2nd n-type semiconductor layer) made of n-GaN having a high impurity concentration. + - the p-type semiconductor layer 31A made of GaN and the n-type semiconductor layer 31B made of n-GaN having a high impurity concentration. + - the n-type semiconductor layer 31B made of n-GaN.

[0159] Next, the tunnel junction layer 31 and the p-type semiconductor layer 18 are etched into a cylindrical shape reaching the inside of the p-type semiconductor layer 18 from the upper surface of the tunnel junction layer 31, and a mesa structure of a cylindrical shape is formed.

[0160] For example, the layer thickness of the tunnel junction layer 31 is 20 nm, and the diameter of the cylindrical mesa structure is 4 μm (central axis CX). In addition, in order to form the mesa structure, dry etching is used, and for example, the tunnel junction layer 31 and the p-type semiconductor layer 18 are etched by a depth of 25 nm.

[0161] Then, the n-type semiconductor layer 32 (2nd n-type semiconductor layer) made of n-GaN is grown again using the MOVPE device, and the tunnel junction layer 31 is embedded.

[0162] Next, a semiconductor DBR 35 (2nd DBR) made of n-AlInN and n-GaN is formed. The semiconductor DBR 35 is made of, for example, 46 pairs of n-AlInN / GaN.

[0163] Next, the outer peripheral portion of the wafer is etched to reach the inside of the n-type semiconductor layer 13, and a surface emitting laser of a cylindrical mesa structure coaxial with the central axis CX of the tunnel junction layer 31 is formed.

[0164] Next, an n-electrode 27 is formed on the surface of the outer peripheral portion of the n-type semiconductor layer 13. In a plan view (when viewed from a direction perpendicular to the semiconductor DBR 35), a p-electrode 36 having a circular opening larger than the diameter of the tunnel junction layer 31 and coaxial with the central axis CX is formed on the semiconductor DBR 35.

[0165] Further, the back surface of the substrate 11 is polished to form an AR (Anti-Reflective) coating 29 composed of two layers of Nb2O5 / SiO2. As described above, the formation of the vertical cavity surface emitting laser 50 is completed.

[0166] Although the tunnel junction layer 31 is composed of a p + -GaN layer and an n + -GaN layer, other component semiconductor layers such as GaInN can also be used. The p + -GaN layer can use Mg as an impurity (dopant), for example. In addition, the doping concentration of Mg is preferably 4 x 10 19 cm 3 or higher, and the n + -GaN layer or the n + -GaInN layer is preferably 1 x 10 18 cm 3 or higher.

[0167] [Correspondence with the First Embodiment]

[0168] The first condition and the second condition in the vertical cavity surface emitting laser 50 of the second embodiment can be considered similarly to the case of the first embodiment.

[0169] Specifically, in the vertical cavity surface emitting laser 50 according to the second embodiment, the interface between the semiconductor DBR 35 and the n-type semiconductor layer 32 corresponds to the phase reference (0). The node of the standing wave is located at this reference.

[0170] The n-type semiconductor layer 32 (second n-type semiconductor layer) corresponds to the spacer layer 24 in the first embodiment. More specifically, a portion of the n-type semiconductor layer 32 between the tunnel junction layer 31 and the semiconductor DBR 35 corresponds to the spacer layer 24 in the first embodiment.

[0171] Further, the tunnel junction layer 31 corresponds to the transparent conductive film (ITO) 22 in the first embodiment, and preferably one node ND (N ND = 1) of the standing wave SW exists in the tunnel junction layer 31.

[0172] The conditions (the first condition) for the number of nodes ND and the number of antinodes AN of the standing wave SW included in the electron blocking layer 17 and the p-type semiconductor layer 18 as the p-region and the conditions (the second condition) for the number of nodes ND and the number of antinodes AN included in the last barrier layer 16 are the same as those in the first embodiment.

[0173] In the above-described embodiments, the number of antinodes and nodes of the standing wave contained in the p-type semiconductor layer 18 and the electron-blocking layer 17, and the layer thickness of each layer based on the number of nodes and antinodes of the standing wave contained in the last barrier layer 16 are described.

[0174] Based on the conditions that have been described, the thickness tl of the last barrier layer 16 must be at least a certain thickness. However, the inventors of the present application found that if the thickness of the last barrier layer 16 is simply enlarged while maintaining the Al content of the electron-blocking layer 17, a potential drop occurs in the last barrier layer 16, the effectiveness of the last barrier layer 16 and the electron-blocking layer 17 as a barrier layer decreases, and the efficiency of injecting electrons into the active layer 15 decreases.

[0175] In order to maintain the function of the last barrier layer 16 and the electron-blocking layer 17 as a barrier layer, it is preferable that the Al content of the electron-blocking layer 17 be set to a higher value as the thickness of the last barrier layer 16 is greater.

[0176] Figure 13 A graph showing the change in the electron concentration of the p-type semiconductor layer 18 caused by the potential drop due to the increase in the thickness of the last barrier layer 16 is shown. In the graph of FIG. 8, Figure 13 the horizontal axis is the thickness of the last barrier layer 16, and the vertical axis is the electron concentration of the p-type semiconductor layer 18. In addition, the graph shows the case where the Al content of the electron-blocking layer 17 is fixed at 13%. In addition, Figure 13 the numbers such as "1.0E+11" and the like on the vertical axis of the p-type semiconductor layer electron concentration in FIG. 8 mean "1.0 x 1011 11 " and the like.

[0177] As indicated in the graph, the electron concentration of the p-type semiconductor layer 18 is 1.0 x 1011 11 when the thickness of the last barrier layer 16 is 40 nm, 6.7 x 1011 13 when the thickness of the last barrier layer 16 is 130 nm, and 1.28 x 1011 14 The graph can also illustrate the effect of the potential drop due to the thickening of the last barrier layer 16.

[0178] The inventors of the present application found that in order to reduce the electron concentration of the p-type semiconductor layer 18 to the value 1.0 x 1011 11 when the thickness of the last barrier layer 16 is 40 nm, and 30% when the thickness of the last barrier layer 16 is 130 nm.

[0179] Thus, in order to maintain the barrier effects of the final barrier layer 16 and the electron blocking layer 17 while increasing the thickness of the final barrier layer 16, in the case where the layer thickness of the final barrier layer 16 is 40 nm or more, it is preferable to satisfy the relationship Y > 0.13X + 12.7, where X is the film thickness t1 of the final barrier layer 16, and Y is the average Al content % of the electron blocking layer 17. Hereinafter, satisfaction of the relationship Y > 0.13X + 12.7 means satisfaction of the relationship 1.

[0180] Meanwhile, when the Al content of the electron blocking layer 17 is increased, cracks are easily generated in the electron blocking layer 17. In correspondence therewith, in order to avoid cracks while maintaining the Al content of the electron blocking layer 17 to maintain the electron injection efficiency, it is known that it is effective to configure the electron blocking layer 17 so as to increase the Al content on the active layer 15 side and decrease the Al content on the p-type semiconductor layer 18 side.

[0181] Specifically, for example, the electron blocking layer 17 is configured by two layers having different Al contents: a first layer adjacent to the final barrier layer 16, i.e., on the active layer 15 side; and a second layer having a smaller Al content than the first layer, adjacent to the p-type semiconductor layer 18, i.e., on the p-type semiconductor layer 18 side.

[0182] Further, it was found that when the electron blocking layer 17 is configured by two layers having different Al contents, the Al contents are preferably set so as to satisfy Y1 > Y2 and Y1 > 0.13X + 17.5, where X is the film thickness t1 of the final barrier layer 16, Y1 is the average Al content % of the first layer on the active layer 15 side of the electron blocking layer 17, and Y2 > 0.13X + 5.5, where Y2 is the average Al content % of the second layer on the p-type semiconductor layer 18 side of the electron blocking layer 17. Hereinafter, satisfaction of the relationships Y1 > 0.13X + 17.5 and Y2 > 0.13X + 5.5 means satisfaction of the relationship 2.

[0183] [Table 2]

[0184] [Table 2]

[0185]

[0186] Table 2 is a table showing the film thickness of the final barrier layer 16, the average Al content of the electron blocking layer 17, and the electron injection efficiency for Sample 1 of the vertical cavity surface emitting laser 10 satisfying the above relationship 1, Sample 2, Sample 3, and Comparative Examples 1 to 3 satisfying the relationships 1, 2. Sample 1, Sample 2, Sample 3, and Comparative Examples 1 to 3 have commonalities other than the layer thickness of the final barrier layer 16 and the structure of the electron blocking layer 17. In addition, the layer thickness of the electron blocking layer 17 of Sample 1, Sample 2, Sample 3, and Comparative Examples 1 to 3 is 10 nm.

[0187] In Sample 1, the layer thickness of the last barrier layer 16 was 130 nm, and the average Al content of the electron blocking layer 17 was 30% satisfying the relationship 1. In Sample 2, the layer thickness of the last barrier layer 16 was 130 nm. The average Al content of the electron blocking layer 17 satisfied the relationship 1, the average Al content of the first layer and the average Al content of the second layer of the electron blocking layer 17 were 35% and 23%, respectively, satisfying the relationship 2. In Sample 3, the film thickness of the last barrier layer 16 was 40 nm. The average Al content of the electron blocking layer 17 satisfied the relationship 1, and the average Al content of the first layer and the average Al content of the second layer of the electron blocking layer 17 were 23% and 11%, respectively, satisfying the relationship 2.

[0188] In Comparative Examples 1 to 3, the Al content of the electron blocking layer was 15%, and the layer thickness of the last barrier layer was 130 nm, 40 nm, and 10 nm, respectively. As described above and shown in Table 2, it was found that the injection efficiency decreased as the layer thickness of the last barrier layer became thicker. On the other hand, it was confirmed that the injection efficiency of Sample 1 was significantly improved compared to Comparative Example 1 when the last barrier layer was 130 nm, and became the same as that of Comparative Example 3 having a thinner last barrier layer 16 with a layer thickness of 10 nm.

[0189] As described above, increasing the Al content of the electron blocking layer 17 easily causes a crack. In order to avoid this, in Sample 2 and Sample 3, a first layer having a high Al content was formed on the active layer 15 side of the electron blocking layer 17, and a layer having a low Al content was formed on the p-type semiconductor layer 18 side of the electron blocking layer 17. The average Al content of the entire electron blocking layer 17 of Sample 2 was 30%, which was the same as that of Sample 1.

[0190] In Sample 2 and Sample 3, the obtained injection efficiency was better than that of Sample 1, and the electron blocking layer 17 was composed of two layers, so the effect of improving the injection efficiency did not change. On the contrary, it was found that the injection efficiency was higher than in the case where the Al content of the electron blocking layer 17 was uniform.

[0191] From the results of Sample 2, it was found that in the case where the layer thickness of the last barrier layer was 130 nm, as long as the Al content of the first layer of the electron blocking layer 17 was 35% or more and the Al content of the second layer was 23% or more, a good injection efficiency could be obtained. From the results of Sample 3, it was found that in the case where the layer thickness of the last barrier layer was 40 nm, as long as the Al content of the first layer of the electron blocking layer 17 was 23% or more and the Al content of the second layer was 11% or more, a good injection efficiency could be obtained.

[0192] The above-described preferred relationship 2 of the set value of the Al content, i.e., the relationship in which the electron injection efficiency is favorably maintained when Y1 > Y2, Y1 > 0.13X + 17.5, and Y2 > 0.13X + 5.5, is derived from the layer thickness of the final barrier layer, the Al contents of the first layer and the second layer of the electron blocking layer 17 in the samples 2 and 3 in which the injection efficiency is favorable.

[0193] As described above, it is found that by setting the Al content Y% of the electron blocking layer 17 to satisfy the relationship Y > 0.13X + 12.7, where X is the thickness (in nm) of the final barrier layer 16 and X is thicker than 40 nm, the vertical cavity surface emitting laser 10 can be constructed while maintaining the efficiency of injecting electrons into the active layer 15.

[0194] Further, it is found that the vertical cavity surface emitting laser 10 can be constructed by forming the electron blocking layer 17 of two layers having different Al contents, setting the Al content Y1% of the first layer close to the active layer 15 to Y1 > 0.13X + 17.5, where X is the thickness (in nm) of the final barrier layer 16, and setting the Al content Y2% of the second layer to Y2 > 0.13X + 5.5, while maintaining the efficiency of injecting electrons into the active layer 15 and avoiding cracks in the electron blocking layer 17.

[0195] The higher the Al content of the electron blocking layer 17 and the thicker the layer thickness of the electron blocking layer 17, the more likely it is that cracks will occur in the electron blocking layer 17. In addition, although it also depends on the growth temperature of the electron blocking layer, the width and speed of the temperature rise and fall after crystal growth, and the like, and thus cannot be said without any doubt, the inventors of the present application have found that, for example, by setting the product of the Al content (%) of the electron blocking layer 17 and the layer thickness (nm) of the electron blocking layer 17 to 500%nm or less, the occurrence of cracks can be reduced to a practical level. That is, the inventors of the present application have found that, by setting the Al content of the electron blocking layer 17 in % to Y and the thickness of the electron blocking layer 17 in nm to Z, it is preferable to satisfy the relationship Y x Z < 500.

[0196] As described above, according to the present application, it is possible to provide a vertical cavity surface emitting element having a low threshold current and a high light emission efficiency.

[0197] Although the vertical cavity surface emitting element using a nitride semiconductor has been described in the above-described embodiments, the present application can also be applied to a vertical cavity surface emitting element using other crystalline semiconductors.

[0198] In addition, as the mirror constituting the resonator, a semiconductor DBR or a dielectric DBR is exemplified, but the mirror is not limited thereto. For example, a single-layer mirror or a diffraction grating can be used.

[0199] The vertical cavity light emitting element of the present application is described by way of example with the case of being manufactured using the MOVPE method, but can also be manufactured by other known crystal growth methods such as the molecular beam epitaxy (MBE) method.

[0200] Description of reference numerals

[0201] 10 Vertical cavity surface emitting laser

[0202] 11 Substrate

[0203] 12 DBR (mirror)

[0204] 13 n-type semiconductor layer

[0205] 15 Active layer

[0206] 15B Barrier layer (barrier layer)

[0207] 15W Quantum well layer (well layer)

[0208] 16 Last barrier layer (LB)

[0209] 17 Electron barrier layer

[0210] 18 p-type semiconductor layer

[0211] 21 Insulating film

[0212] 22 Transparent conductive film

[0213] 24 Spacer layer

[0214] 25 DBR (mirror)

[0215] 31 Tunnel junction layer

[0216] 31A p-type semiconductor layer having a high impurity concentration

[0217] 31B n-type semiconductor layer having a high impurity concentration

[0218] 32 n-type semiconductor layer (second n-type semiconductor layer)

[0219] 35 Semiconductor DBR

Claims

1. A vertical cavity light emitting element comprising: a first mirror; an n-type semiconductor layer formed on the first mirror; an active layer made of a plurality of quantum wells formed on the n-type semiconductor layer; a last barrier layer formed on a last quantum well of the active layer; an electron blocking layer made of AlGaN formed on the last barrier layer; a p-type semiconductor layer formed on the electron blocking layer; a dielectric spacer layer formed on the p-type semiconductor layer; and a second mirror formed on the spacer layer, wherein a count of nodes and a count of antinodes of a standing wave emitted by the active layer contained in the electron blocking layer and the p-type semiconductor layer are respectively 0 or 1, the active layer and the last barrier layer satisfy [Formula 1] wherein, 2. The vertical cavity light emitting element according to claim 1, wherein where H fb and H qw are the layer thicknesses of the last barrier layer and the active layer, respectively, n fb is the refractive index of the last barrier layer, and n qw is the equivalent refractive index of the active layer, and satisfies Y > 0.13X + 12.7, where X is the layer thickness of the last barrier layer in nm and Y is the average Al content of the electron blocking layer in percent. the electron blocking layer includes a first AlGaN layer provided on the active layer side and a second AlGaN layer provided on the p-type semiconductor layer side, an Al content Y1% of the first AlGaN layer is larger than an Al content Y2% of the second AlGaN layer, and Y1≥ 0.13X + 17.5 and Y2≥ 0.13X + 5.5 are satisfied.

3. The vertical cavity light emitting element according to claim 1, wherein ZY≤ 500 is satisfied, where Z is a film thickness of the electron blocking layer in nm.

4. The vertical cavity light emitting element according to claim 1, wherein a count of nodes and a count of antinodes of the standing wave contained in the last barrier layer are respectively 1 or more.

5. The vertical cavity light emitting element according to claim 1 or 2, comprising: a transparent conductive film provided between the p-type semiconductor layer and the dielectric spacer layer, wherein the transparent conductive film is provided so that a node of the standing wave exists in the transparent conductive film.

6. The vertical cavity light emitting element according to claim 1, wherein a layer thickness of the last barrier layer is λ / 4 or more, the λ being a wavelength in a medium.

7. The vertical cavity light emitting element according to claim 1, wherein a count of nodes contained in the last barrier layer is 2 or more, and a count of antinodes contained in the last barrier layer is 1 or more.

8. The vertical cavity light emitting element according to claim 1, wherein a layer thickness of the active layer is λ / 8 or less, λ being a wavelength in a medium.

9. The vertical cavity light emitting element according to claim 1, wherein the vertical cavity light emitting element has a local minimum of a differential impedance caused by laser oscillation near a threshold current.

10. The vertical cavity light emitting element according to claim 1, wherein the first mirror is a semiconductor distributed Bragg reflector DBR, and the second mirror is a dielectric DBR.

11. A vertical cavity light emitting element comprising: a first mirror; a first n-type semiconductor layer formed on the first mirror; an active layer made of a plurality of quantum wells formed on the first n-type semiconductor layer; a last barrier layer formed on a last quantum well of the active layer; an electron blocking layer made of AlGaN formed on the last barrier layer; and a p-type semiconductor layer formed on the electron blocking layer. an electron blocking layer made of AlGaN formed on the last barrier layer; a p-type semiconductor layer formed on the electron blocking layer; a tunnel junction layer as a current restriction layer formed on the p-type semiconductor layer; a second n-type semiconductor layer formed by embedding the tunnel junction layer; and a second mirror formed on the second n-type semiconductor layer, wherein the count of the nodes and the count of the antinodes of the standing wave emitted by the active layer included in the electron blocking layer and the p-type semiconductor layer are respectively 0 or 1, the active layer and the last barrier layer satisfy [Equation 2] wherein, where H fb and H qw are the layer thicknesses of the last barrier layer and the active layer, respectively, n fb is the refractive index of the last barrier layer, and n qw is the equivalent refractive index of the active layer, and satisfies Y ≥ 0.13X + 12.7, where X is the layer thickness of the last barrier layer in nm and Y is the average Al content of the electron blocking layer in percent.

12. The vertical cavity light emitting element according to claim 11, wherein the electron blocking layer includes a first AlGaN layer disposed on the active layer side and a second AlGaN layer disposed on the p-type semiconductor layer side, the Al content Y1% of the first AlGaN layer is greater than the Al content Y2% of the second AlGaN layer, and Y1 ≥ 0.13X + 17.5 and Y2 ≥ 0.13X + 5.5 are satisfied.

13. The vertical cavity light emitting element according to claim 11, wherein ZY ≤ 500 is satisfied, where Z is the film thickness of the electron blocking layer in nm.

14. The vertical cavity light emitting element according to claim 11, wherein the count of the nodes and the count of the antinodes of the standing wave included in the last barrier layer are respectively 1 or more.

15. The vertical cavity light emitting element according to claim 11, wherein the tunnel junction layer is disposed so that the node of the standing wave exists in the tunnel junction layer.

16. The vertical cavity light emitting element according to claim 11, wherein the layer thickness of the last barrier layer is λ / 4 or more, λ being the wavelength in a medium.

17. The vertical cavity light emitting element according to claim 11, wherein the count of the nodes included in the last barrier layer is 2 or more, and the count of the antinodes included in the last barrier layer is 1 or more.

18. The vertical cavity light emitting element according to claim 11, wherein the layer thickness of the active layer is λ / 8 or less, λ being the wavelength in a medium.

19. The vertical cavity light emitting element according to claim 11, wherein the vertical cavity light emitting element has a local minimum of the differential impedance caused by laser oscillation near the threshold current.

20. The vertical cavity light emitting element according to claim 11, wherein the first mirror and the second mirror are semiconductor DBRs.

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