Methods, systems, and apparatus for depositing composite films

Abstract

Methods, systems, and apparatus for depositing a composite film including a support substrate, depositing a first metal electrode via a first non-atomic layer deposition (non-ALD) process, depositing a first metal liner via a first cyclic ALD process, depositing a dielectric layer including a first crystal structure via a second cyclic ALD process, and depositing a second metal liner via a second cyclic ALD process. And a dielectric layer in physical contact with the first metal liner layer and in electrical communication with at least the first metal electrode, inducing a first in-plane tensile stress in the dielectric layer at a first interface between the first metal liner and the dielectric layer, and converting the first crystal structure to a second crystal structure in response to the first in-plane tensile stress.

Description

Technical Field

[0001] This disclosure generally relates to methods, systems, and apparatuses suitable for forming one or more layers on the surface of a substrate, and to structures including one or more layers. More specifically, this disclosure relates to methods, systems, and apparatuses for forming layers of semiconductor devices including metal-insulator-metal (MIM) and metal-ferroelectric-metal (MFM) devices. Background Technology

[0002] In semiconductor manufacturing, the ongoing trend toward device miniaturization is driven by the need for enhanced performance, reduced power consumption, and greater integration density. This miniaturization presents certain challenges in the production of metal-insulator-metal (MIM) and metal-ferroelectric-metal (MFM) devices utilizing high-k dielectric or ferroelectric materials. These materials are chosen because of their superior electrical properties, such as high capacitance and non-volatility, which are essential for device functionality. However, as the industry moves toward nodes smaller than 10nm, the implementation of these materials becomes increasingly complex.

[0003] A significant hurdle is developing materials with sufficiently high k or ferroelectric properties. The reduction in dielectric thickness required for device scaling complicates maintaining these properties within low thermal budget constraints, a critical consideration in many practical applications. Furthermore, conventional methods for enhancing the quality of high-k or ferroelectric materials may be unsuitable for large-scale production due to their time-intensive nature, complexity, intricacy, and cost, making them impractical for widespread manufacturing. Therefore, there is an urgent need for innovative manufacturing technologies that can mass-produce advanced semiconductor devices while maintaining high-quality electrical performance, meeting stringent thermal budgets, and remaining cost-effective for high-volume production. Summary of the Invention

[0004] This summary is provided to present the chosen concepts in a simplified form. These concepts are further described in detail in the following exemplary embodiments of this disclosure. This summary is not intended to identify key or essential features of the claimed subject matter, nor is it intended to limit the scope of the claimed subject matter.

[0005] In one aspect, this document discloses a method, system, and apparatus for depositing a composite film, including a supporting substrate, depositing a first metal electrode via a first non-atomic layer deposition (non-ALD) process, depositing a first metal liner via a first cycle ALD process, and depositing a dielectric layer via a second cycle ALD process, the dielectric layer being configured to be electrically connected to the first metal electrode and physically in contact with the first metal liner, wherein the dielectric layer may include a first crystalline form, inducing a first in-plane tensile stress in the dielectric layer at a first interface between the first metal liner and the dielectric layer, and converting the first crystalline form into a second crystalline form in response to the first in-plane tensile stress.

[0006] In some examples, the dielectric layer may be a high-k material or a ferroelectric material. In various examples, the deposition of the first metal liner may be performed at a temperature ranging from 150°C to 600°C. In certain examples, the first metal liner may be deposited on the surface of the dielectric layer. In some examples, the first crystalline form may be in a first non-centrosymmetric state, and the second crystalline form may be in a second non-centrosymmetric state.

[0007] In some embodiments, the second noncentrosymmetric state may include a greater noncentrosymmetry than the first noncentrosymmetric state. In examples of the disclosed technology, at least a portion of the first crystalline form may be in an amorphous phase, and the second crystalline form may be in an orthorhombic or tetragonal phase or a combination thereof. In some embodiments, the first crystalline form may contain a first percentage of orthorhombic phase, and the second crystalline form may contain a second percentage of orthorhombic phase, wherein the second percentage may be greater than the first percentage. In certain embodiments, converting the first crystalline form to the second crystalline form may further include heating the dielectric layer to a temperature in the range of 150°C to 700°C. In various embodiments, the method may further include exposing the substrate to one or more transformation processes, including at least one of rapid thermal annealing, annealing, plasma treatment, or exposure to ozone or a combination thereof. In some embodiments, converting the first crystalline form to the second crystalline form may further include exposing the substrate to a transformation process, including at least one of: rapid thermal annealing (RTA), annealing, plasma exposure, ozone exposure, oxidant exposure, nitriding agent exposure, reducing agent exposure, or inert gas exposure or a combination thereof. In some examples, converting the first crystalline form to the second crystalline form increases the dielectric constant of the dielectric layer by 10% to 100%. In examples of the disclosed technology, converting the first crystalline form to the second crystalline form increases the ferroelectricity of the dielectric layer. In various examples, the non-ALD process may include chemical vapor deposition (CVD) or physical vapor deposition (PVD) processes. In some examples, the tensile stress induced by the first metal liner may be greater than the tensile stress induced by the first metal electrode.

[0008] In certain examples, the first cyclic ALD process may include: a) contacting the substrate with a first gaseous precursor, b) contacting the substrate with a second gaseous precursor, c) purging the chamber, and repeating one or more of a), b), or c), or combinations thereof in any order until a first metal liner having a first predetermined thickness can be deposited on the substrate. In some examples, the first gaseous precursor may include at least one of titanium tetrachloride (TiCl4), titanium tetraiodide (TiI4), titanium tetrabromide (TiBr3), tantalum pentachloride (TaCl5), or combinations thereof. In various embodiments, the second gaseous precursor may include at least one of ammonia (NH3), hydrazine (N2H4), hydrazine derivatives, alkyl hydrazines, tert-butylhydrazine (C4H9N2H3), methylhydrazine (CH3NHNH2), dimethylhydrazine ((CH3)2N2H2), phenylhydrazine, tert-butylamine, isobutylamine, tert-amylamine, N2 plasma, N2 / H2 plasma, NH3 plasma, nitrogen excitation material, nitrogen ions, nitrogen radicals, or combinations thereof. In some examples, the first metal liner may comprise titanium nitride (TiN) or tantalum nitride (TaN). In examples of the disclosed technology, the first cyclic ALD method may further comprise: d) contacting the substrate with an oxygen reactant, and repeating one or more of operations a), b), c), or d) or combinations thereof in any order until a first metal liner having a first predetermined thickness can be deposited on the substrate. In some examples, the first metal liner may comprise titanium oxynitride. In some examples, the first metal electrode may comprise a top metal electrode, and the first metal liner may comprise a top metal liner comprising a metal nitride, wherein depositing the first metal liner may further comprise setting the top metal liner into physical contact with the top metal electrode, and depositing a second metal electrode via a second non-atomic layer deposition (non-ALD) process, wherein the second metal electrode may comprise a bottom metal electrode in physical contact with a dielectric layer. In a particular example, the thicknesses of the bottom metal electrode and the top metal electrode are each less than 50 nanometers (nm), and the thickness of the top metal liner may be less than... In various examples, the first metal electrode may include a bottom metal electrode, and the first metal liner may include a bottom metal liner, wherein depositing the first metal liner may further include configuring the bottom metal liner to physically contact the bottom metal electrode. In various examples, it further includes depositing a second metal electrode via a second non-atomic layer deposition (non-ALD) process, wherein the second metal electrode may include a top metal electrode in physical contact with a dielectric layer. In some examples, the thicknesses of the bottom metal electrode and the top metal electrode are less than 50 nanometers (nm), and the thickness of the bottom metal liner may be less than...

[0009] In examples of the disclosed technology, the second cyclic ALD method may include: e) contacting the substrate with a third gas-phase precursor, f) contacting the substrate with a fourth gas-phase precursor, g) contacting the substrate with an oxygen reactant, h) purging the reaction chamber, and repeating one or more operations e), f), g), or h) or any combination thereof in any order until a dielectric layer of predetermined thickness can be deposited on the substrate. In various examples, the third gas-phase precursor may include at least one of the following: tetrakis(dimethylamino)hafnium, tetrakis(diethylamino)hafnium, tetrakis(ethylmethylamino)hafnium, HfCl4, HfBr4 and HfI4, tetrakis(dimethylamino)zirconium (TDMAZ), tetrakis(dimethylamino)titanium (TDMAT), tetratert-butoxide hafnium (Hf(OC(CH3)3)4), tetraethylmethylaminosilane (Si(N(CH3)-(C2H5))4), trimethylaluminum (TM) A) tris(N,N'-diisopropylacetamido)yttrium(III)(Y(DPfAMD)3), Ge(NMe2)4, Ge(OnBu)4, tris(N,N'-diisopropylacetamido)cerium(III)(Ce(DPfAMD)3), tris(N,N'-diisopropylacetamido)yttrium(III)(Y(DPfAMD)3), tantalum pentachloride (TaCl5), scandium chloride (ScCl3), bismuth chloride (BiCl3), or combinations thereof. In some examples, the fourth gas-phase precursor may include at least one of tetra(dimethylamino)zirconium, tetra(diethylamino)zirconium, tetra-ethylmethylaminosilane (Si(N(CH3)-(C2H5))4), or tetra(ethylmethylamino)zirconium, or any combination thereof. In various examples, the oxygen reactant may be one or more of H2O, H2O2, O2, O3, N2O, NO, NO2, or oxygen plasma. In some examples, the dielectric layer may include a dielectric material comprising at least one of the following: hafnium oxide (HfO2), hafnium zirconium oxide (HZO), zirconium oxide (ZrO2), titanium oxide (TiOx), hafnium silicate (HfSiOx), aluminum oxide (Al2O3), lanthanum oxide (La2O3), germanium oxide (GeOx), cerium oxide (CeOx), yttrium oxide (YxOy), tantalum oxide (TaxOy), scandium oxide (ScxOy), bismuth oxide (BixOy), and one or more or combinations thereof doped with yttrium oxide. In various examples, the method may further include: depositing a second metal liner via a third-cycle ALD process, wherein the second metal liner may include a top metal liner in physical contact with the dielectric layer; inducing a second in-plane tensile stress in the dielectric layer at a second interface between the top metal liner and the dielectric layer; and depositing a second metal electrode via a non-atomic layer deposition (non-ALD) process, wherein the second metal electrode may include a top metal electrode in physical contact with the top metal liner.

[0010] In examples of the disclosed technology, the third-cycle ALD method may include: i) contacting the substrate with a fifth gas-phase precursor, j) contacting the substrate with a sixth gas-phase precursor, k) purging the reaction chamber, and repeating one or more operations i), j), or k), or any combination thereof in any order, until a second metal liner having a third predetermined thickness can be deposited on the dielectric layer. In specific examples, the fifth gas-phase precursor may include at least one of titanium tetrachloride (TiCl4), titanium tetraiodide (TiI4), titanium tetrabromide (TiBr3), tantalum pentachloride (TaCl5), or combinations thereof. In various examples, the sixth gas-phase precursor may include at least one of ammonia (NH3), hydrazine (N2H4), hydrazine derivatives, alkyl hydrazines, tert-butylhydrazine (C4H9N2H3), methylhydrazine (CH3NHNH2), dimethylhydrazine ((CH3)2N2H2), phenylhydrazine, tert-butylamine, isobutylamine, tert-pentylamine, N2 plasma, N2 / H2 plasma, NH3 plasma, nitrogen excitation material, nitrogen ions, nitrogen radicals, or any combination thereof. In some examples, the second metal liner may comprise titanium nitride (TiN) or tantalum nitride (TaN). In examples of the disclosed technology, the third cycle of the ALD process may further comprise: l) contacting the substrate with an oxygen reactant, and repeating one or more operations i), j), k), or l) or combinations thereof in any order until a second metal liner having a third predetermined thickness can be deposited on the dielectric layer. In a particular example, the second metal liner may comprise titanium oxynitride (TiON). In some examples, the thicknesses of the bottom metal electrode and the top metal electrode are less than 50 nanometers (nm), and the thicknesses of the top metal liner and the bottom metal liner are less than...

[0011] In various examples, the composite film forms at least one of the following: a metal-insulator-metal (MIM) structure, a metal-ferroelectric-metal (MFM) structure, a ferroelectric random access memory (FeRAM) structure, a ferroelectric field-effect transistor (FeFET) structure, a dynamic random access memory (DRAM) structure, a resistive random access memory (ReRAM) structure, or an embedded dynamic random access memory (eDRAM) structure, or a combination thereof.

[0012] For the purpose of summarizing the advantages of the invention and its implementation relative to prior art, certain objects and advantages of the invention have been described above. It should be understood, of course, that not all of these objects or advantages may be achieved according to any particular example of the invention. Therefore, for example, those skilled in the art will recognize that the invention may be implemented or performed in a manner that achieves or optimizes one or more advantages as taught or suggested herein, without necessarily achieving other objects or advantages as may be taught or suggested herein.

[0013] All these examples are intended to fall within the scope of the invention disclosed herein. These and other examples will become apparent to those skilled in the art from the following detailed description of certain examples with reference to the accompanying drawings, and the invention is not limited to any particular example disclosed. Attached Figure Description

[0014] Although this specification concludes with claims that are particularly pointed out and clearly claimed as examples of the invention, the advantages of the examples of this disclosure can be more readily determined from the description of certain examples when read in conjunction with the accompanying drawings, wherein:

[0015] Figure 1 A schematic diagram of an example reactor system according to this technology is shown.

[0016] Figure 2 A schematic diagram of a reactor system with multiple reaction chambers, according to an example of this technology, is shown.

[0017] Figures 3A to 3C An example structure based on this technology is shown.

[0018] Figure 4A An example process for depositing a composite membrane according to this technology is shown.

[0019] Figure 4B An example loop ALD process according to this technique is shown.

[0020] Figure 4C An example loop ALD process according to this technique is shown.

[0021] Figure 4D An example loop ALD process according to this technique is shown.

[0022] Figure 4E An example non-ALD deposition process according to this technique is shown.

[0023] It should be understood that the elements in the accompanying drawings are shown for simplicity and clarity and are not necessarily drawn to scale. For example, the dimensions of some elements in the drawings may be exaggerated relative to other elements to help improve the understanding of the embodiments illustrated in this disclosure. Detailed Implementation

[0024] Detailed descriptions of the various examples herein are provided with reference to the accompanying drawings, which illustrate exemplary examples by way of illustration. While these exemplary examples have been described in sufficient detail to enable those skilled in the art to practice this disclosure, it should be understood that other examples may be implemented and logical, chemical, and / or mechanical changes may be made without departing from the spirit and scope of this disclosure. Therefore, the detailed description herein is given for illustrative purposes only and not for limiting purposes. For example, the steps described in any method or process description may be performed in any combination and / or order, and are not limited to the combinations and / or orders presented. Furthermore, one or more steps from one of the disclosed methods or processes may be combined with one or more steps from another of the disclosed methods or processes in any suitable combination and / or order. In addition, any function or step may be outsourced to or performed by one or more third parties. Furthermore, any reference to the singular includes plural examples, and any reference to more than one component may include singular examples.

[0025] Although certain examples are disclosed below, those skilled in the art will understand that this disclosure extends beyond the specific examples and / or uses disclosed herein, as well as their obvious modifications and equivalents. Therefore, it is intended that the scope of this disclosure should not be limited to the specific examples described herein.

[0026] The illustrations presented herein are not intended to be actual views of any particular material, device, structure, or equipment, but are merely representations used to illustrate examples of this disclosure.

[0027] As used herein, the term "substrate" can refer to any one or more underlying materials on which devices, circuits, or films / layers can be formed or disposed. A substrate may comprise a bulk material, such as silicon (e.g., single-crystal silicon), other group IV materials (e.g., germanium), or other semiconductor materials (e.g., group II-VI or III-V semiconductor materials), and may comprise one or more layers overlying or underlying the bulk material. Furthermore, a substrate may include various features, such as recesses, protrusions, etc., formed within or on at least a portion of the layers of the substrate. For example, a substrate may comprise a bulk semiconductor material and an insulating or dielectric material layer covering at least a portion of the bulk semiconductor material.

[0028] As used herein, the term "atomic layer deposition" (ALD) can refer to a vapor deposition process in which deposition cycles, preferably multiple consecutive cycles, are performed in a processing chamber. Typically, during each cycle, a precursor is chemisorbed onto the deposition surface (e.g., a substrate surface or a previously deposited lower layer surface, such as material from a previous ALD cycle), forming a monolayer or sub-monolayer that is not readily reactive with further precursors (i.e., a self-limiting reaction). Subsequently, if desired, a reactant (e.g., another precursor or reactive gas) can be introduced into the processing chamber to convert the chemisorbed precursor into the desired material on the deposition surface. Typically, this reactant is capable of further reacting with the precursor. Furthermore, a purging step can be utilized during each cycle to remove excess precursor from the processing chamber and / or excess reactant and / or reaction byproducts after the conversion of the chemisorbed precursor. Furthermore, as used herein, the term “atomic layer deposition” is also intended to include processes specified by related terms such as “chemical vapor deposition,” “atomic layer epitaxy” (ALE), molecular beam epitaxy (MBE), gas source MBE or organometallic MBE, and chemical beam epitaxy when performed with alternating pulses of precursor composition, reactive gas, and purge gas (e.g., inert carrier gas).

[0029] As used herein, the term “chemical vapor deposition” can refer to any process in which a substrate is exposed to one or more volatile precursors that react and / or decompose on the substrate surface to produce the desired deposition.

[0030] As used herein, the term “cyclic deposition” can refer to the sequential introduction of one or more precursors and / or reactants into a reaction chamber to deposit a film on a substrate, and includes deposition techniques such as atomic layer deposition and cyclic chemical vapor deposition.

[0031] As used herein, the terms “layer,” “film,” and / or “thin film” can refer to any continuous or discontinuous structure and material deposited by the methods disclosed herein. For example, a “layer,” “film,” and / or “thin film” can include 2D materials, nanorods, nanotubes, or nanoparticles, or even partial or complete molecular layers, partial or complete atomic layers, or atomic and / or molecular clusters. A “layer,” “film,” and / or “thin film” can include a material or layer with pinholes, but still at least partially continuous.

[0032] Numerous example materials are given throughout the examples in this disclosure. It should be noted that the chemical formulas given for each example material should not be interpreted as limiting, and the non-limiting example materials given should not be limited by the given example stoichiometry.

[0033] Furthermore, in this disclosure, any two numbers of a variable may constitute a working range of the variable, and any range indicated may include or exclude endpoints. Additionally, any value of the indicated variable (whether or not it is indicated by “about”) may refer to an exact value or an approximate value and include equivalent values, and may refer to an average, median, representative value, multi-value, etc. Furthermore, in this disclosure, the terms “comprising,” “consisting of,” and “having” may, in some examples, independently mean “generally or broadly comprising,” “containing,” “essentially composed of,” or “consisting of.” The meaning of any definition in this disclosure does not necessarily exclude the common and conventional meanings in some examples.

[0034] As mentioned above, given the industrial drive toward miniaturization, the mass production of semiconductor devices made of materials with sufficiently high k or ferroelectric properties presents significant challenges.

[0035] This paper discloses methods, systems, and apparatus for depositing composite films that are compatible with various semiconductor devices (e.g., MIM and MFM devices) with high-k or ferroelectric properties and reduce their size for mass production applications.

[0036] Figure 1 This is an abstract schematic diagram illustrating an example reactor system 150. Reactor system 150 may include one or more reaction chambers 104, 105, and 107, each housing a base 106 to hold a substrate 130 during processing, and a spray head 108 (including a fluid distribution system) to distribute one or more reactants onto the surface of substrate 130. Reactor system 150 may include a direct plasma source 175 incorporated within any of chambers 104, 105, or 107 and / or a remote plasma source 170 coupled to any of chambers 104, 105, or 107. Multiple deposition and / or etching processes may be performed in a single reaction chamber 104 and / or various processes may be performed in individual reaction chambers 104, 105, and / or 107. Furthermore, any method or portion thereof disclosed herein may be performed in a single reactor system 150 or in multiple reactor systems configured for a particular process or portion thereof.

[0037] For simplicity, the precursor and / or reactant source and the carrier gas / purge gas source are shown as being coupled to a single reaction chamber 104; however, it should be understood that the reactant source and carrier gas / purge gas for a single process may be coupled to the corresponding reaction chamber for those specific processes.

[0038] In the example, reactant (or co-reactant) source containers 110, 112, 113, 114, 140, 142, 144, 164 and / or carrier gas or purge gas source container 154 can be fluidly connected to reaction chamber 104 via corresponding lines 116, 118, 119, 120, 141, 143, 145, 168 and 160 and corresponding valves or controllers 122, 123, 125, 126, 146, 147, 148, 166 and 158.

[0039] In this example, precursor and / or reactant gases may be contained in the aforementioned containers and may be applied to substrate 130 in the reaction chamber during processing. For example, a first gaseous precursor 121 may be contained in container 113, a second gaseous precursor 124 and a third gaseous precursor 115 may be contained in container 110, a fourth gaseous precursor 117 may be contained in container 112, an oxygen source 132 may be contained in container 114, a fifth gaseous precursor 134 may be contained in container 142, a sixth gaseous precursor 133 may be contained in container 144, a seventh gaseous precursor 162 may be contained in container 164, purge gas and / or carrier gas may be contained in container 156, and / or other materials from the respective source containers may be applied to substrate 130 in reaction chamber 104.

[0040] In some examples, the first gas phase precursor 121 and the fifth gas phase precursor 134 may be the same precursor and may be contained in the same container (e.g., both the first gas phase precursor 121 and the fifth gas phase precursor 134 may be contained in container 113 or container 142). In some examples, the second gas phase precursor 124 and the sixth gas phase precursor 133 may be the same precursor and may be contained in the same container (e.g., both the second gas phase precursor 124 and the sixth gas phase precursor 133 may be contained in container 114 or container 144).

[0041] In this example, the carrier gas or purge gas 156 from the gas source container 154 may be an inert gas and may flow to and through the reaction chamber (e.g., reaction chamber 104) to remove any excess reactants or other undesirable materials from the reaction chamber 104. System 150 may also include a vacuum source (e.g., vacuum source 128) fluidly coupled to the reaction chamber, which may be configured to expel reactants, purge gas, or other materials from the reaction chamber. The carrier gas or purge gas 156 may include argon, helium, neon, krypton, nitrogen, and / or xenon, or combinations thereof.

[0042] In the example, controller 152 may be configured to perform various functions and / or steps as described herein. Controller 152 may include one or more microprocessors, memory elements, and / or switching elements to perform various functions. Although shown as a single unit, controller 152 may alternatively include multiple devices. For example, controller 152 may be used to control gas flow (e.g., by monitoring flow rate and controlling valves 122, 123, 125, 126, 146, 147, 148, 158, and / or 166), motors, spray heads 108, remote plasma source 170, heaters, cooling devices, and / or vacuum source 158 to perform various processes (e.g., in corresponding...). Figure 4A , 4B Processes 400, 405, 407, 409 and / or 411 are shown in 4C, 4D and / or 4E. Furthermore, when the system includes two or more reaction chambers, as described in more detail below, the two or more reaction chambers may be coupled to the same / shared controller.

[0043] As used herein, a “composite membrane” refers to a membrane composed of layers of different materials that remain fundamentally distinct. These layers can be used for specific purposes and contribute to the overall properties of the membrane. Diffusion can occur between adjacent layers, allowing chemicals or substances to move across the interface and be incorporated into the adjacent membrane. This diffusion can be intentional or unintentional.

[0044] In the example, system 150 can be configured to perform a series of deposition processes including non-atomic layer deposition (non-ALD) and atomic layer deposition (ALD) cyclic deposition subcycles to fabricate multilayer or composite films on substrate 130. In some examples, the non-atomic layer deposition process can be performed outside of system 150.

[0045] The composite film can be formed from a bottom conductive electrode, a bottom metal liner in contact with the bottom conductive electrode, a dielectric layer in contact with the bottom metal liner, a top metal liner opposite the bottom metal liner and in contact with the dielectric layer, and a top conductive electrode in contact with the top metal liner. In some embodiments, the composite film may have a bottom conductive electrode and a top conductive electrode, or only a top metal liner or a bottom metal liner (see...). Figures 3A-3C ).

[0046] The process begins with depositing a bottom metal electrode onto the substrate using a non-atomic layer deposition (non-ALD) technique. Given a bottom metal electrode thickness (e.g., 5-30 nm), atomic layer deposition (ALD) can take a considerable amount of time compared to the thickness of other layers, such as the liner and dielectric layer (approximately 5-100 angstroms), which negatively impacts yield compared to other layers in the composite film. To mitigate this negative impact on yield, faster processing methods (such as chemical vapor deposition (CVD) or physical vapor deposition (PVD)) can be used to deposit the bottom metal electrode, reserving high-precision deposition techniques (such as ALD) for thinner liner and dielectric layers.

[0047] In some examples, a bottom metal liner is formed above the electrode using a cyclic ALD process. This allows for precise control over the thickness and composition of the liner material. A dielectric layer can then be deposited using another cyclic ALD process to contact the bottom metal liner, thereby providing in-plane tensile stress at the interface between the bottom metal liner and the dielectric layer. Fabrication of the composite film can continue by depositing a top metal liner via an additional cyclic ALD process that contacts the dielectric layer, thus providing in-plane tensile stress at the interface between the top metal liner and the dielectric layer. Finally, a top metal electrode can be applied to the top metal liner. Similar to the bottom metal electrode, the top metal electrode can also be deposited using faster non-ALD techniques due to its thickness and the fact that high precision is not required.

[0048] This layer deposition method leverages the advantages of both non-ALD and cyclic ALD processes, enabling the fabrication of composite films with customized electrical properties suitable for advanced electronic applications. High-precision ALD is retained for dielectric layers, thin top metal liners, and / or bottom metal liners that can contact the dielectric layer, allowing for the application of in-plane stress at the liner-dielectric interface.

[0049] In the examples, the composite films described herein can be incorporated into or form part of a variety of semiconductor devices, such as metal-insulator-metal (MIM) structures, metal-ferroelectric-metal (MFM) structures, ferroelectric random access memory (FeRAM) structures, ferroelectric field-effect transistor (FeFET) structures, dynamic random access memory (DRAM) structures, resistive random access memory (ReRAM) structures, or embedded dynamic random access memory (eDRAM) structures or combinations thereof.

[0050] In the example, the ALD process used to deposit the aforementioned composite film may be referred to as a “supercycle” and may include multiple sub-cycles. “Cyclic ALD sub-cycle” is interchangeably referred to herein as a “cyclic ALD process”. “Non-ALD sub-cycle” is interchangeably referred to herein as a “non-ALD process”.

[0051] For example, a supercycle may include a subcycle that includes a first non-atomic layer deposition (non-ALD) process, wherein a first metal electrode may be deposited on substrate 130 by a non-ALD process.

[0052] In the example, the supercycle may include another subcycle to deposit a bottom metal liner on the first metal electrode. This bottom metal liner subcycle may include an ALD (Alternating Current Deposition) cycle deposition process, wherein the first vapor precursor 121 and the second vapor precursor 124 may contact the substrate 130 to deposit the bottom metal liner on the substrate 130. In some examples, the bottom metal liner may include a metal nitride, such as titanium nitride or tantalum nitride. In some examples, the bottom metal liner may include a metal oxide nitride, such as titanium oxynitride. In cases where the bottom metal liner includes a metal oxide nitride, the bottom metal liner subcycle may include contacting the substrate 130 with an oxygen source 132 in addition to contacting the first vapor precursor 121 and the second vapor precursor 124.

[0053] In a bottom metal liner sub-cycle, depositing a metal nitride or metal oxide liner layer on substrate 130 may include pulsed a first gaseous precursor 121 from reactant source container 113 to reaction chamber 104 via spray head 108. A second gaseous precursor 124 may be pulsed from reactant source container 114 to reaction chamber 104 via spray head 108, either together with or separately from the first gaseous precursor 121. In cases where the bottom metal liner comprises metal oxide, an oxygen source 132 may be pulsed from source container 140 to reaction chamber 104 via spray head 108, either together with or separately from the first gaseous precursor 121 and / or the second gaseous precursor 124. When the first gaseous precursor 121, the second gaseous precursor 124, and optionally the oxygen source 132 contact substrate 130, a bottom metal liner comprising metal nitride or metal oxide may be formed on substrate 130. In some examples, the bottom metal liner may be formed on the surface of a bottom conductive electrode layer. In some examples, the bottom metal liner is not part of the composite membrane, so the bottom metal liner subcycle is not executed as part of the ALD supercycle.

[0054] Between one or more pulses of the first gaseous precursor 121, the second gaseous precursor 124, and the optional oxygen source 132, the reaction chamber 104 may be purged with purge gas 156 from the vessel 154. The chamber 104 may be purged between one or more deposition sub-cycles. The bottom metal liner deposition sub-cycle (or a portion thereof) may be repeated until the desired thickness of the bottom metal liner is achieved.

[0055] The supercycle may include a subcycle for depositing a dielectric layer, which may include various materials, including but not limited to metal oxides, metal silicates, and / or doped metal oxides or doped metal silicates. In this dielectric layer subcycle, the third gas phase precursor 115, the fourth gas phase precursor 117, and the oxygen source 132 may contact the substrate 130 for depositing the dielectric layer.

[0056] In a dielectric layer sub-cycle, depositing a dielectric layer on substrate 130 may include pulsed a third gaseous precursor 115 from reactant source container 110 to reaction chamber 104 via spray head 108. A fourth gaseous precursor 117 may be pulsed from reactant source container 112 to reaction chamber 104 via spray head 108, either together with or separately from the third gaseous precursor 115. An oxygen source 132 may be pulsed from source container 140 to reaction chamber 104 via spray head 108, either together with or separately from the third gaseous precursor 115 and / or the fourth gaseous precursor 117. When the oxygen source 132, the third gaseous precursor 115, and the fourth gaseous precursor 117 contact substrate 130, a dielectric layer may be formed on substrate 130. In some examples, the dielectric layer may be formed on the surface of a bottom metal liner. In some examples, the dielectric layer may be formed on the surface of a bottom metal electrode. The reaction chamber 104 can be purged with purge gas 156 from container 154 between one or more pulses of oxygen source 132, third gas phase precursor 115, and fourth gas phase precursor 117 and / or between one or more deposition sub-cycles. The first cycle deposition process (or a portion thereof) can be repeated until the desired thickness of the dielectric layer is achieved.

[0057] In some examples, the supercycle may include sub-cycles to deposit a top metal liner. This top metal liner sub-cycle may include an ALD (Alternating Current Deposition) cycle deposition process, wherein a fifth gas phase precursor 134 and a sixth gas phase precursor 133 may contact the substrate 130 to deposit the top metal liner on the substrate 130. In some examples, the top metal liner may include a metal nitride, such as titanium nitride or tantalum nitride. In some examples, the top metal liner may include a metal oxide nitride, such as titanium oxynitride. In cases where the top metal liner includes a metal oxide nitride, the top metal liner sub-cycle may include contacting the substrate 130 with an oxygen source 132 in addition to contacting the fifth gas phase precursor 134 and the sixth gas phase precursor 133.

[0058] In a top metal liner sub-cycle, depositing a metal nitride or metal oxynitride liner layer on substrate 130 may include pulsed a fifth gaseous precursor 134 from reactant source vessel 140 to reaction chamber 104 via spray head 108. A sixth gaseous precursor 133 may be pulsed from reactant source vessel 144 to reaction chamber 104 via spray head 108, either together with or separately from the fifth gaseous precursor 134. In cases where the bottom metal liner comprises metal oxynitride, an oxygen source 132 may be pulsed from source vessel 140 to reaction chamber 104 via spray head 108, either together with or separately from the fifth gaseous precursor 134 and / or the sixth gaseous precursor 133. When the fifth gaseous precursor 134, the sixth gaseous precursor 133, and optionally the oxygen source 132 contact substrate 130, a top metal liner comprising metal nitride or metal oxynitride may be formed on substrate 130. In some examples, the top metal liner may be formed on the surface of a dielectric layer. In some examples, the top metal liner is not part of the composite membrane, so the top metal liner subcycle is not executed as part of the ALD supercycle.

[0059] Between one or more pulses of the fifth gas phase precursor 134, the sixth gas phase precursor 133, and the optional oxygen source 132, the reaction chamber 104 may be purged with purge gas 156 from the vessel 154. The chamber 104 may be purged between one or more deposition sub-cycles. The top metal liner deposition sub-cycle (or portions thereof) may be repeated until the desired thickness of the top metal liner is achieved.

[0060] In some examples, substrate 130 may be exposed to a transformation process. As used herein, “transformation process” refers to exposing the material on substrate 130 to a chemical and / or energy process to shock the material by transforming its crystalline form (e.g., transforming a portion of a material layer having an amorphous solid form into a crystalline orthorhombic or crystalline tetragonal phase, or a combination thereof).

[0061] This transformation process may include exposing the substrate 130 to rapid thermal annealing (RTA), annealing, plasma treatment, ozone treatment, ultraviolet light treatment, oxidant exposure, nitriding agent exposure, reducing agent exposure, inert gas exposure, electric field exposure, or ultraviolet light exposure, or a combination thereof.

[0062] In this example, the transformation process can be performed by exposing the substrate to a seventh gas phase precursor 162, which may include a transformation agent stored in a container 164. This transformation agent may include any of various reactants, inert gases, nitrogen sources, hydrogen sources, oxygen sources, material sources for plasma processing, etc.

[0063] Chamber 104 may be purged with purge gas 156 between any one or more of the above-described transformation process, bottom metal liner sub-circuit, dielectric layer sub-circuit and / or top metal liner sub-circuit.

[0064] In the example, the bottom metal liner, dielectric layer, and / or top metal liner may be deposited in the same chamber (e.g., chamber 104) or in different chambers. Similarly, the transition process may be performed in the same chamber (e.g., chamber 104) or in different chambers. Furthermore, each layer may be deposited individually or in applications other than the composite film described above, and the claimed subject matter is not limited in this respect. For example, the aforementioned layers can be used in device applications other than MIM and MFM devices.

[0065] In some examples, the reactor system (e.g., reactor system 150) may include multiple reaction chambers. For example, in Figure 2 In the reactor system 200 shown, there are multiple reaction chambers 204 (each of which may be Figure 1 Examples of any one of reaction chambers 104, 105, and / or 107 in the reaction chambers 204 may be disposed around and / or coupled to transfer chamber 280, which includes transfer tool 285 for transferring substrates between reaction chambers 204. Substrates may be transferred from load-locking chamber 212 and between reaction chambers 204 (e.g., via transfer chamber 280). For example, substrate 130 may be disposed in different chambers for different steps in a semiconductor manufacturing process. In other words, bottom metal liner deposition sub-cycles, dielectric layer deposition sub-cycles, and / or top metal liner deposition sub-cycles may each be performed in the same or different chambers.

[0066] Figures 3A-3C Various composite membranes manufactured according to examples of this technology are shown.

[0067] Figure 3A Device 300 according to an example of this disclosure is shown. Device 300 may include MIM or MFM devices and / or devices incorporated into other specific device architectures, such as ferroelectric random access memory (FeRAM) structures, ferroelectric field-effect transistor (FeFET) structures, dynamic random access memory (DRAM) structures, resistive random access memory (ReRAM) structures, or embedded dynamic random access memory (eDRAM) structures and / or any of a variety of other devices, and the claimed subject matter is not limited in this respect.

[0068] In the example, device 300 includes a substrate 302, a bottom metal electrode 304, a bottom metal liner 306, a dielectric layer 308, a top metal liner 310, and a top metal electrode 312. In the example, the bottom metal liner 306 includes one or more material layers deposited on the substrate through one or more cyclic ALD processes. In the example, the top metal liner 310 includes one or more material layers deposited on the substrate through one or more cyclic ALD processes.

[0069] In the example, substrate 302 can be or includes any substrate material described above.

[0070] In this example, the bottom metal electrode 304 may be disposed on the surface 322 of the substrate 302. The bottom metal electrode 304 may be deposited by a non-ALD process (such as by CVD or PVD) and may include any of a variety of conductive materials, such as, but not limited to, titanium nitride (TiN), titanium oxynitride (TiOxNy), aluminum (Al), copper (Cu), tungsten (W), cobalt (Co), nickel (Ni), molybdenum (Mo), indium (In), gallium (Ga), ruthenium (Ru), titanium (Ti), tantalum (Ta), vanadium (V), and silicon carbide (SiC). In this example, the thickness T1 may be less than 50 nanometers (nm), or about 1 nm to about 50 nm, or about 2 nm to about 45 nm, or about 3 nm to about 40 nm, or about 4 nm to about 40 nm, or about 5 nm to about 30 nm, or any suitable thickness (in this context, "about" means + / - 5 nm).

[0071] In the example, the bottom metal liner 306 may be disposed on the surface 324 of the bottom metal electrode 304. The bottom metal liner 306 may be deposited by an ALD process according to various examples disclosed herein, such as those concerning... Figure 1 The bottom metal liner sub-loop is described. In the example, the bottom metal liner 306 may include any of a variety of materials, such as, but not limited to, titanium nitride (TiN), titanium oxynitride (TiOxNy), and tantalum nitride (TaN). The bottom metal liner 306 may include the same material as the bottom metal electrode 304. In some examples, the bottom metal liner 306 may include a different material than the bottom metal electrode 304. In the example, the thickness T2 of the bottom metal liner 306 may be less than... or about to approximately or about to approximately or about to approximately or about to approximately or about to approximately Or any suitable thickness (in this context, "about" means) ).

[0072] In this example, dielectric layer 308 may be disposed on surface 326 of bottom metal liner 306. Dielectric layer 308 may be deposited via an ALD process according to various examples disclosed herein, such as those concerning… Figure 1The dielectric layer subcycle is described. Dielectric layer 308 can be a high-k and / or ferroelectric material. In some examples, the dielectric layer can be a metal oxide with a dielectric constant greater than about 7. In some examples, dielectric layer 308 can include one or more of the following: hafnium oxide (HfO2), hafnium zirconium oxide (HZO), zirconium oxide (ZrO2), titanium oxide (TiOx), hafnium silicate (HfSiOx), aluminum oxide (Al2O3), lanthanum oxide (La2O3), germanium oxide (GeOx), cerium oxide (CeOx), yttrium oxide (YxOy), tantalum oxide (TaxOy), scandium oxide (ScxOy), bismuth oxide (BixOy), one or more of the foregoing materials may be doped with yttrium oxide, and / or a mixture / laminate comprising one or more of such layers.

[0073] In the example, the interface 370 between the bottom metal liner 306 and the dielectric layer 308 can experience in-plane tensile stress sufficient to transform the first crystalline form of the dielectric layer 308 into a second crystalline form. This transformation (discussed in more detail below) increases the non-centrosymmetry of the dielectric layer, thereby increasing its dielectric constant and / or ferroelectric properties. In some embodiments, doping the dielectric layer as described above can increase its ability to transform from the first crystalline form to the second crystalline form, and thus improve its non-centrosymmetry. In the example, the thickness T3 of the dielectric layer 308 can be less than... or about to approximately or about to approximately or about to approximately or about to approximately or about to approximately Or any suitable thickness (in this context, "about" means) ).

[0074] In the example, the top metal liner 310 can be deposited on the surface 328 of the dielectric layer 308. The top metal liner 310 can be deposited by an ALD process according to various examples disclosed herein, such as those concerning... Figure 1 The top metal liner sub-circuit is described. In the example, the top metal liner 306 may include any of a variety of materials, such as, but not limited to, titanium nitride (TiN), titanium oxynitride (TiOxNy), and tantalum nitride (TaN).

[0075] In the example, the interface 380 between the top metal liner 310 and the dielectric layer 308 can experience in-plane tensile stress sufficient to transform or convert the first crystalline form of the dielectric layer 308 into a second crystalline form. This transformation (discussed in more detail below) increases the non-centrosymmetry of the dielectric layer, thereby increasing its dielectric constant and / or ferroelectric properties. In some embodiments, doping the dielectric layer as described above can increase its ability to transform from the first crystalline form to the second crystalline form, and thus improve its non-centrosymmetry.

[0076] In the example, the presence of a top metal liner 310 interface 380 and a bottom metal liner 306 interface 370 at the dielectric can combine in-plane tensile stresses and thus increase the tendency of the dielectric layer to transform from a first crystalline form to a second crystalline form. In the example, the thickness T4 of the top metal liner 310 can be less than... or about to approximately or about to approximately or about to approximately or about to approximately or about to approximately Or any suitable thickness (in this context, "about" means) ).

[0077] In the example, the top metal electrode 312 may be disposed on the surface 332 of the top metal liner 310. The top metal electrode 312 may be deposited by a non-ALD process (e.g., by CVD or PVD) and may comprise any of a variety of conductive materials, such as, but not limited to, titanium nitride (TiN), titanium oxynitride (TiOxNy), aluminum (Al), copper (Cu), tungsten (W), cobalt (Co), nickel (Ni), molybdenum (Mo), indium (In), gallium (Ga), ruthenium (Ru), titanium (Ti), tantalum (Ta), vanadium (V), or silicon carbide (SiC), or combinations thereof. In the example, the thickness T5 may be less than 50 nanometers (nm), or about 1 nm to about 50 nm, or about 2 nm to about 45 nm, or about 3 nm to about 40 nm, or about 4 nm to about 40 nm, or about 5 nm to about 30 nm, or any suitable thickness (in this context, "about" means + / - 5 nm).

[0078] Figure 3B Device 320 according to an example of this disclosure is shown. Device 320 may be similar to reference 1. Figure 3AThe described device 300 may include MIM or MFM devices and / or devices incorporated into other specific device architectures, such as ferroelectric random access memory (FeRAM) structures, ferroelectric field-effect transistor (FeFET) structures, dynamic random access memory (DRAM) structures, resistive random access memory (ReRAM) structures, or embedded dynamic random access memory (eDRAM) structures and / or any of various other devices, and the claimed subject matter is not limited in this respect.

[0079] In the example, device 320 includes a substrate 302, a bottom metal electrode 304, a bottom metal liner 306, a dielectric layer 308, and a top metal electrode 312.

[0080] In the example, substrate 302 can be or includes any substrate material described above.

[0081] In this example, the bottom metal electrode 304 may be disposed on the surface 322 of the substrate 302. The bottom metal electrode 304 may be deposited by a non-ALD process (e.g., by CVD or PVD) and may comprise any of a variety of conductive materials, such as, but not limited to, titanium nitride (TiN), titanium oxynitride (TiOxNy), aluminum (Al), copper (Cu), tungsten (W), cobalt (Co), nickel (Ni), molybdenum (Mo), indium (In), gallium (Ga), ruthenium (Ru), titanium (Ti), tantalum (Ta), vanadium (V), and silicon carbide (SiC). In this example, the thickness T1 may be less than 50 nanometers (nm), or about 1 nm to about 50 nm, or about 2 nm to about 45 nm, or about 3 nm to about 40 nm, or about 4 nm to about 40 nm, or about 5 nm to about 30 nm, or any suitable thickness (in this context, "about" means + / - 5 nm).

[0082] In the example, the bottom metal liner 306 may be disposed on the surface 324 of the bottom metal electrode 304. The bottom metal liner 306 may be deposited by an ALD process according to various examples disclosed herein, such as those concerning... Figure 1 The bottom metal liner sub-loop is described. In the example, the bottom metal liner 306 may include any of a variety of materials, such as, but not limited to, titanium nitride (TiN), titanium oxynitride (TiOxNy), and tantalum nitride (TaN). The bottom metal liner 306 may include the same material as the bottom metal electrode 304. In some examples, the bottom metal liner 306 may include a different material than the bottom metal electrode 304. In the example, the thickness T2 of the bottom metal liner 306 may be less than... or about to approximately or about to approximately or about to approximately or about to approximately or about to approximately Or any suitable thickness (in this context, "about" means) ).

[0083] In this example, the dielectric layer 308 may be disposed on the surface 326 of the bottom metal liner 306. The dielectric layer 308 may be deposited via an ALD process according to various examples disclosed herein, such as those concerning… Figure 1 The dielectric layer subcycle is described. Dielectric layer 308 can be a high-k and / or ferroelectric material, for example, a metal oxide having a dielectric constant greater than about 7. In some embodiments, the high-k material has a dielectric constant higher than that of silicon oxide. Exemplary high-k materials include one or more of hafnium oxide (HfO2), hafnium zirconium oxide (HZO), zirconium oxide (ZrO2), titanium oxide (TiOx), hafnium silicate (HfSiOx), aluminum oxide (Al2O3), lanthanum oxide (La2O3), germanium oxide (GeOx), cerium oxide (CeOx), yttrium oxide (YxOy), tantalum oxide (TaxOy), scandium oxide (ScxOy), and bismuth oxide (BixOy), wherein one or more of the aforementioned high-k materials may be doped with yttrium oxide, and / or include mixtures / laminates comprising one or more such layers.

[0084] In the example, the thickness T3 can be less than or about to approximately or about to approximately or about to approximately or about to approximately Or any suitable thickness (in this context, "about" means) ).

[0085] In the example, the interface 370 between the bottom metal liner 306 and the dielectric layer 308 can experience in-plane tensile stress sufficient to transform the first crystalline form of the dielectric layer 308 into a second crystalline form. This transformation (discussed in more detail below) increases the non-centrosymmetry of the dielectric layer, thereby increasing its dielectric constant and / or ferroelectric properties. In some embodiments, doping the dielectric layer as described above can increase its ability to transform from the first crystalline form to the second crystalline form, thereby improving non-centrosymmetry.

[0086] In this example, the top metal electrode 312 may be disposed on the surface 328 of the dielectric layer 308. The top metal electrode 312 may be deposited by a non-ALD process (e.g., by CVD or PVD) and may comprise any of a variety of conductive materials, such as, but not limited to, titanium nitride (TiN), titanium oxynitride (TiOxNy), aluminum (Al), copper (Cu), tungsten (W), cobalt (Co), nickel (Ni), molybdenum (Mo), indium (In), gallium (Ga), ruthenium (Ru), titanium (Ti), tantalum (Ta), vanadium (V), and silicon carbide (SiC). In this example, the thickness T5 may be less than 50 nanometers (nm), or about 1 nm to about 50 nm, or about 2 nm to about 45 nm, or about 3 nm to about 40 nm, or about 4 nm to about 40 nm, or about 5 nm to about 30 nm, or any suitable thickness (in this context, "about" means + / - 5 nm).

[0087] Figure 3C Device 330 is shown as an example according to this disclosure. Device 300 may include MIM or MFM devices and / or devices incorporated into other specific device architectures, such as ferroelectric random access memory (FeRAM) structures, ferroelectric field-effect transistor (FeFET) structures, dynamic random access memory (DRAM) structures, resistive random access memory (ReRAM) structures, or embedded dynamic random access memory (eDRAM) structures and / or any of a variety of other devices, and the claimed subject matter is not limited in this respect.

[0088] In the example, device 300 includes a substrate 302, a bottom metal electrode 304, a dielectric layer 308, a top metal liner 310, and a top metal electrode 312.

[0089] In the example, substrate 302 can be or includes any substrate material described above.

[0090] In this example, the bottom metal electrode 304 may be disposed on the surface 322 of the substrate 302. The bottom metal electrode 304 may be deposited by a non-ALD process (e.g., by CVD or PVD) and may comprise any of a variety of conductive materials, such as, but not limited to, titanium nitride (TiN), titanium oxynitride (TiOxNy), aluminum (Al), copper (Cu), tungsten (W), cobalt (Co), nickel (Ni), molybdenum (Mo), indium (In), gallium (Ga), ruthenium (Ru), titanium (Ti), tantalum (Ta), vanadium (V), and silicon carbide (SiC). In this example, the thickness T1 may be less than 50 nanometers (nm), or about 1 nm to about 50 nm, or about 2 nm to about 45 nm, or about 3 nm to about 40 nm, or about 4 nm to about 40 nm, or about 5 nm to about 30 nm, or any suitable thickness (in this context, "about" means + / - 5 nm).

[0091] In this example, dielectric layer 308 may be disposed on surface 324 of bottom metal electrode 304. Dielectric layer 308 may be deposited via an ALD process according to various examples disclosed herein, such as those concerning… Figure 1 The dielectric layer subcycle is described. Dielectric layer 308 can be a high-k and / or ferroelectric material, for example, a metal oxide having a dielectric constant greater than about 7. In some embodiments, the high-k material has a dielectric constant higher than that of silicon oxide. Exemplary high-k materials include hafnium oxide (HfO2), tantalum oxide (Ta2O5), hafnium zirconium oxide (HZO), zirconium oxide (ZrO2), titanium oxide (TiO2), hafnium silicate (HfSiOx), aluminum oxide (Al2O3), lanthanum oxide (La2O3), and one or more mixtures / laminates comprising one or more of these layers. In the example, the thickness T3 can be less than... or about to approximately or about to approximately or about to approximately or about to approximately Or any suitable thickness (in this context, "about" means) ).

[0092] In the example, the top metal liner 310 can be deposited on the surface 328 of the dielectric layer 308. The top metal liner 310 can be deposited by an ALD process according to various examples disclosed herein, such as those concerning... Figure 1 The top metal liner sub-loop is described. In the example, the top metal liner 306 can include any of a variety of materials, such as, but not limited to, titanium nitride (TiN), titanium oxynitride (TiOxNy), and tantalum nitride (TaN). In the example, the thickness T4 of the top metal liner 310 can be less than... or about to approximately or about to approximately or about to approximately or about to approximately or about to approximately Or any suitable thickness (in this context, "about" means) ).

[0093] In the example, the interface 380 between the top metal liner 310 and the dielectric layer 308 can experience in-plane tensile stress sufficient to transform or convert the first crystalline form of the dielectric layer 308 into a second crystalline form. This transformation (discussed in more detail below) increases the non-centrosymmetry of the dielectric layer, thereby increasing its dielectric constant and / or ferroelectric properties. In some embodiments, doping the dielectric layer as described above can increase its ability to transform from the first crystalline form to the second crystalline form, and thus improve its non-centrosymmetry.

[0094] In the example, the top metal electrode 312 may be disposed on the surface 332 of the top metal liner 310. The top metal electrode 312 may be deposited by a non-ALD process (e.g., by CVD or PVD) and may comprise any of a variety of conductive materials, such as, but not limited to, titanium nitride (TiN), titanium oxynitride (TiOxNy), aluminum (Al), copper (Cu), tungsten (W), cobalt (Co), nickel (Ni), molybdenum (Mo), indium (In), gallium (Ga), ruthenium (Ru), titanium (Ti), tantalum (Ta), vanadium (V), and silicon carbide (SiC). In the example, the thickness T5 may be less than 50 nanometers (nm), or about 1 nm to about 50 nm, or about 2 nm to about 45 nm, or about 3 nm to about 40 nm, or about 4 nm to about 40 nm, or about 5 nm to about 30 nm, or any suitable thickness (in this context, "about" means + / - 5 nm).

[0095] Figure 4A A method for depositing composite films (e.g., device 300, see [link]) is shown. Figure 3A Example procedure 400. Although example procedure 400 depicts a specific sequence of operations, the sequence may be changed without departing from the scope of this disclosure.

[0096] According to some examples, process 400 may begin at operation 402, where a substrate (e.g., substrate 130, see below) may be supported, for example, in a reaction chamber. Figure 1 The chamber can be configured to execute non-ALD procedures. In some examples, procedure 400 can be executed in multiple chambers, such as the first chamber 104 for executing ALD procedures (see [link to example chamber]). Figure 1 ) and the second chamber 105 for performing non-ALD procedures (see Figure 1 In the current example, substrate 130 may initially be supported in chamber 105, where operation 404 can be performed to deposit a first metal electrode via a non-ALD process, and subsequently transferred to chamber 104, where one or more cyclic ALD processes (e.g., cyclic ALD sub-cycles discussed above) can be performed. In other examples, both ALD and non-ALD processes may be performed in the same chamber.

[0097] In the example, process 400 can proceed to operation 404, in which a first metal electrode (top or bottom) can be deposited on substrate 130 via a first non-atomic layer deposition (non-ALD) process.

[0098] In the example, process 400 can proceed to operation 406, where a first metal liner can be deposited (e.g., top metal liner 310 or bottom metal liner 306, see below). Figure 3A , 3B And 3C). Deposition of the first metal liner can be optional, as shown by the dashed line. The deposition of the first metal liner can be performed via a first cycle ALD process 405 (see...). Figure 4B In some examples, the first metal liner may be deposited in physical contact with the already deposited dielectric layer, or it may be deposited before the dielectric layer is deposited.

[0099] In the example, process 400 can proceed to the second cycle deposition process 407 at operation 408 (see [link]). Figure 4C ), in which a dielectric layer (e.g., dielectric layer 308, see ) can be deposited. Figure 3A , 3B (and 3C). The dielectric layer can be deposited to make physical contact with the first metal liner or the second metal liner (see...). Figure 3A and 3B In the example, the dielectric layer may be deposited after a first metal liner layer and / or a second metal liner (see [reference]). Figure 3A and 3C Physical contact.

[0100] In the example, the dielectric layer can be deposited with respect to a first metal electrode or a second metal electrode (e.g., top metal electrode 312 or bottom metal electrode 304, see below). Figure 3A , Figure 3B and Figure 3C Physical and / or electrical contact. In the example, the dielectric layer may be deposited after deposition with a first metal liner electrode and / or a second metal electrode (e.g., top metal liner 310 or bottom metal liner 306, see below). Figure 3A , Figure 3B and Figure 3C Physical and / or electrical contact. In the example, the dielectric layer may comprise a high-k dielectric and / or ferroelectric material. In the example, some portions of the dielectric layer may be amorphous and / or may comprise one or more crystalline features or structures, such as orthorhombic and / or tetragonal structures. The dielectric layer thus deposited may have a first crystalline form, including an amorphous solid, an orthorhombic structure, and / or a tetragonal structure.

[0101] In the example, process 400 can proceed to operation 410, where a second metal liner can be deposited (e.g., top metal liner 310 or bottom metal liner 306, see below). Figure 3A , 3B And 3C). The deposition of the second metal liner can be optional, as shown by the dashed line. It can be performed via a third-cycle ALD process 409 (see Figure 4D The deposition of the second metal liner is performed using a method called . In some examples, the second metal liner may be deposited to make physical contact with the already deposited dielectric layer, or it may be deposited before the dielectric layer is deposited.

[0102] The composite film may include a single metal liner in contact with the dielectric layer (e.g., Figure 3B and 3C Alternatively, it may include two metal liner (e.g., on opposite sides in contact with the dielectric layer) that are in contact with the dielectric layer. Figure 3A For simplicity, the deposition of the first metal liner and / or the second metal liner may each be described herein as optional. However, the composite membrane includes at least one of the first metal liner or the second metal liner or a combination thereof.

[0103] In the example, the first metal liner and / or the second metal liner may be deposited at a temperature within the range of about 150°C to 600°C, or about 200°C to 500°C, or about 250°C to 450°C, or any suitable temperature (in this context, "about" means + / - 50°C).

[0104] In the example, process 400 can proceed to operation 412, where a second metal electrode can be deposited via a non-ALD process. The deposition of the second metal electrode can be performed via a second non-ALD process 411 (see [link to example]). Figure 4E ).

[0105] In the example, process 400 can proceed to operation 414, where a first in-plane tensile stress can be induced in the dielectric layer at a first interface between the first metal liner and the dielectric layer. The first metal electrode or the second metal electrode and / or the first metal liner and the second metal liner can each contribute to the in-plane tensile stress and, depending on the configuration of the composite film, can be physically bonded to the dielectric layer. However, in some embodiments, the tensile stress induced by the first metal liner can be greater than the tensile stress induced by, for example, the first metal electrode and / or the second metal electrode and / or the second metal liner (e.g., where the second metal liner is a bottom metal liner).

[0106] In the example, process 400 can proceed to operation 416, where, in response to a first in-plane tensile stress, the first crystalline form can be transformed into a second crystalline form.

[0107] In some examples, a first crystalline form is in a first noncentrosymmetric state, and a second crystalline form is in a second noncentrosymmetric state. The second noncentrosymmetric state may include a greater noncentrosymmetry than the first noncentrosymmetric state. In the examples, converting a first crystalline form including the first noncentrosymmetric state to a second crystalline form including the second noncentrosymmetric state may increase the dielectric constant of the dielectric layer by about 10%–100%, or about 20%–100%, or about 35%–100%, or about 50%–100%, or about 75%–100%, or any suitable percentage (in this context, “about” means + / - 15%).

[0108] In the example, transforming a first crystalline form, which includes a first non-centrosymmetric state, into a second crystalline form, which includes a second non-centrosymmetric state, can increase the ferroelectricity of the dielectric layer.

[0109] In some examples, the dielectric layer in the first crystalline form may include at least a first portion in the amorphous phase. The first portion of the dielectric layer in the amorphous phase may be transformed into an orthorhombic crystalline phase upon transformation into the second crystalline form.

[0110] In some examples, the dielectric layer in the first crystalline form may include at least a second portion in a tetragonal crystalline phase. The second portion of the dielectric layer in the tetragonal crystalline phase may be transformed into an orthorhombic crystalline phase upon transformation into the second crystalline form.

[0111] In some examples, the first crystalline form contains a first percentage of orthorhombic phase, and the second crystalline form contains a second percentage of orthorhombic phase, wherein the second percentage is greater than the first percentage.

[0112] In a specific example, the operation 416 of converting the first crystalline form to the second crystalline form can be performed alone in response to in-plane tensile stress or in combination with one or more of a variety of other transformation processes. For example, in response to in-plane tensile stress and due to the substrate or constituting devices 300, 320 and 330 (see... Figures 3A-3C Each layer of the composite membrane is exposed to a transformation treatment, and the first crystalline form can be transformed into the second crystalline form.

[0113] In the example, the transformation process may include exposing any layer of the substrate or composite film to one or more of the following: rapid thermal annealing (RTA), annealing, plasma exposure, ozone exposure, oxidant exposure, nitriding agent exposure, reducing agent exposure, inert gas exposure, electric field exposure, or ultraviolet light exposure, or a combination thereof.

[0114] In the examples, the transformation process can impart mechanical, thermal, and / or chemical energy to the dielectric layer or one or both metal liner layers, thereby influencing the first crystalline form of the dielectric layer and facilitating the transformation of the first crystalline form to a second crystalline form induced by in-plane tensile stress. In some embodiments, the transformation process can increase the in-plane tensile strain at the interface between the dielectric layer and the first and / or second metal liner layers.

[0115] In one example, during operation 408, the dielectric layer or one or two metal liner layers (e.g., bottom metal liner 306, dielectric layer 308, and / or top metal liner 310, see [reference]) can be applied. Figure 3A , 3B 3C) Apply a transformation process. The transformation process may include heating the dielectric layer or one or two metal liner layers to a temperature in the range of about 150°C to 700°C, or about 200°C to 650°C, or about 250°C to 600°C, or any suitable temperature range (in this context, "about" means + / - 50°C).

[0116] Figure 4B An example first-cycle ALD process 405 for depositing a first metal liner is shown. The first metal liner can include any of a variety of materials. In this example, the first metal liner can include any material that does not have a major lattice mismatch compared to the dielectric layer. It can be based on having a lattice mismatch with the dielectric layer (e.g., dielectric layer 308, see...). Figure 3A The material used for the first metal liner layer is selected from materials with a similar crystalline phase to the dielectric material used in the dielectric material. Additionally, the first metal liner layer material should have a higher oxide / nitride formation Gibbs free energy compared to the metal oxide / nitride dielectric layer. In examples, the first metal liner layer may include titanium nitride (TiN), tantalum nitride (TaN), and / or titanium oxynitride (TiOxNy).

[0117] In the example, the first cyclic ALD process 405 can begin from operation 418, where the substrate can contact the first vapor precursor 121 (see [link]). Figure 1 In the example, the first gaseous precursor may be a metal-containing precursor and may include at least one of titanium tetrachloride (TiCl4), titanium tetraiodide (TiI4), titanium tetrabromide (TiBr3), tantalum pentachloride (TaCl5), or combinations thereof.

[0118] In the example, the first cycle ALD process 405 can proceed to operation 420, where the substrate can contact the second vapor precursor 124 (see [reference]). Figure 1The second gaseous precursor may be a nitrogen-containing precursor and may include at least one of the following: ammonia (NH3), hydrazine (N2H4), hydrazine derivatives, alkyl hydrazine, tert-butylhydrazine (C4H9N2H3), methylhydrazine (CH3NHNH2), dimethylhydrazine ((CH3)2N2H2), phenylhydrazine, tert-butylamine, isobutylamine, tert-amylamine, N2 plasma, N2 / H2 plasma, NH3 plasma, nitrogen excitation material, nitrogen ions, nitrogen free radicals, or any combination thereof.

[0119] When the first metal liner layer comprises TiOxNy, the first cycle ALD process 405 can proceed to an alternative (indicated by dashed lines) operation 422, in which, in some examples, the substrate may be in contact with an oxygen reactant. In examples, the oxygen reactant may include at least one of the following: water (H2O), hydrogen peroxide (H2O2), oxygen (O2), ozone (O3), nitrous oxide (N2O), nitric oxide (NO), nitrogen dioxide (NO2), or oxygen plasma, or combinations thereof.

[0120] In the example, the first cycle ALD process 405 can proceed to operation 424, in which the reaction chamber can be purged (e.g., by pulsed purge gas 156 into chamber 104, see...). Figure 1 As shown by the dashed line, purging operation 424 can be performed at any time during the first cycle deposition process 405 (e.g., before, after, and / or between operations 418, 420, 422, and / or before or after the first cycle deposition process 405). Excess chemicals and reaction byproducts (if any) can be removed from the reaction chamber by purging. Purging gas (e.g., purging gas 156, see...) Figure 1 Preferably, it is any inert gas, such as, but not limited to, argon (Ar), nitrogen (N2), or helium (He).

[0121] In the example, the first cycle of the ALD process 405 can proceed to operation 426, wherein one or more operations 418, 420, 422 and / or 424, or combinations thereof, can be repeated any number of times in any order until the first metal liner is deposited on the substrate to a first predetermined thickness. In the example, the first predetermined thickness can be less than... or about to approximately or about to approximately or about to approximately or about to approximately or about to approximately Or any suitable thickness (in this context, "about" means) ).

[0122] Figure 4C An example second-cycle ALD process 407 for depositing a dielectric layer is shown. The dielectric layer may include any of the various materials described herein. The second-cycle ALD process 407 may begin at operation 428 by contacting the substrate with the third vapor precursor 115 (see [link to documentation]). Figure 1 In the example, the third gas-phase precursor may include organosilicon compounds or halides, such as, but not limited to, tetra(dimethylamino)hafnium, tetra(diethylamino)hafnium, tetra(ethylmethylamino)hafnium, HfCl4, HfBr4 and HfI4, tetra(dimethylamino)zirconium (TDMAZ), tetra(dimethylamino)titanium (TDMAT), tetratert-butoxide hafnium (Hf(OC(CH3)3)4), tetraethylmethylaminosilane (Si(N(CH3)-(C2H5))4), trimethylaluminum ( TMA), tris(N,N'-diisopropylacetamido)yttrium(III) (Y(DPfAMD)3), Ge(NMe2)4, Ge(OnBu)4, tris(N,N'-diisopropylacetamido)cerium(III) (Ce(DPfAMD)3), tris(N,N'-diisopropylacetamido)yttrium(III) (Y(DPfAMD)3), tantalum pentachloride (TaCl5), scandium chloride (ScCl3), bismuth chloride (BiCl3), etc., or combinations thereof.

[0123] In the example, the second cycle ALD process 407 can proceed to operation 430, where an additional precursor can contact the substrate. For example, if the dielectric layer is a mixed metal oxide or silicide, such as hafnium zirconium oxide or hafnium silicate (HfSiOx), the substrate can contact the fourth vapor-phase precursor 117 (see [link to example]). Figure 1 In the example, the fourth gas-phase precursor may include at least one of tetra(dimethylamino)zirconium, tetra(diethylamino)zirconium, tetra-ethylmethylaminosilane (Si(N(CH3)-(C2H5))4), or tetra(ethylmethylamino)zirconium, or any combination thereof.

[0124] In the example, the second cycle ALD process 407 can be performed to operation 432 by contacting the substrate with oxygen reactant 132 (see [link]). Figure 1 In the example, the oxygen reactant may include one or more of H2O, H2O2, O2, O3, N2O, NO, NO2, or oxygen plasma.

[0125] In the example, the second cycle ALD process 407 can proceed to operation 434, in which the reaction chamber can be purged (e.g., by pulsed purge gas 156 into chamber 104, see...). Figure 1As shown by the dashed line, purging operation 434 can be performed at any time during the second cycle deposition process 407 (e.g., before, after, and / or between operations 428, 430, 432, and / or before or after the second cycle deposition process 407). Excess chemicals and reaction byproducts (if any) can be removed from the reaction chamber by purging. Purging gas (e.g., purging gas 156, see...) Figure 1 Preferably, it is any inert gas, such as, but not limited to, argon (Ar), nitrogen (N2), or helium (He).

[0126] In the example, the second cycle of the ALD process 407 can proceed to operation 436, wherein one or more operations 428, 430, 432 and / or 434, or combinations thereof, can be repeated any number of times in any order until the dielectric layer is deposited on the substrate and reaches a second predetermined thickness. The second predetermined thickness can be less than or about to approximately or about to approximately or about to approximately or about to approximately or about to approximately Or any suitable thickness (“about” in this text means) ).

[0127] Figure 4D An example third-cycle ALD process 409 for depositing a second metal liner is shown. The second metal liner may include any of the various materials described herein, such as, but not limited to, titanium nitride (TiN), tantalum nitride (TaN), and / or titanium oxynitride (TiOxNy).

[0128] In the example, the third cycle ALD process 409 may begin at operation 438, where the substrate may contact the fifth vapor precursor 134 (see [link]). Figure 1 In the example, the fifth gaseous precursor may be a metal-containing precursor and may include at least one of titanium tetrachloride (TiCl4), titanium tetraiodide (TiI4), titanium tetrabromide (TiBr3), tantalum pentachloride (TaCl5), or combinations thereof.

[0129] In the example, the third cycle ALD process 409 can proceed to operation 440, where the substrate can contact the sixth gas phase precursor 133 (see [link]). Figure 1The sixth gas-phase precursor may be a nitrogen-containing precursor and may include at least one of the following: ammonia (NH3), hydrazine (N2H4), hydrazine derivatives, alkyl hydrazine, tert-butylhydrazine (C4H9N2H3), methylhydrazine (CH3NHNH2), dimethylhydrazine ((CH3)2N2H2), phenylhydrazine, tert-butylamine, isobutylamine, tert-amylamine, N2 plasma, N2 / H2 plasma, NH3 plasma, nitrogen excitation material, nitrogen ions, nitrogen free radicals, or any combination thereof.

[0130] In this example, the third liner layer may comprise TiOxNy. In such an example, the third cycle ALD process 409 may proceed to an alternative (indicated by dashed lines) operation 442, wherein in some examples the substrate may be in contact with an oxygen reactant. In this example, the oxygen reactant may comprise at least one of the following: water (H2O), hydrogen peroxide (H2O2), oxygen (O2), ozone (O3), nitrous oxide (N2O), nitric oxide (NO), nitrogen dioxide (NO2), or oxygen plasma, or a combination thereof.

[0131] In the example, the third cycle ALD process 405 can proceed to operation 444, in which the reaction chamber can be purged (e.g., by pulsed purge gas 156 into chamber 104, see...). Figure 1 As shown by the dashed line, purging operation 444 can be performed at any time during the third cycle deposition process 409 (e.g., before, after, and / or between operations 438, 440, and 444, and / or before or after the third cycle deposition process 409). Excess chemicals and reaction byproducts (if any) can be removed from the reaction chamber by purging. Purging gas (e.g., purging gas 156, see...) Figure 1 Preferably, it is any inert gas, such as, but not limited to, argon (Ar), nitrogen (N2), or helium (He).

[0132] In the example, the third cycle ALD process 409 can proceed to operation 446, wherein one or more operations 438, 440, 442 and / or 444, or combinations thereof, can be repeated any number of times in any order until the second metal liner is deposited on the substrate and reaches a third predetermined thickness. In the example, the third predetermined thickness can be less than... or about to approximately or about to approximately or about to approximately or about to approximately or about to approximately Or any suitable thickness (in this context, "about" means) ).

[0133] Now for reference Figure 4E It illustrates the deposition of a second metal electrode (e.g., top metal electrode 312 or bottom metal electrode 304, see [link]). Figure 3A The second non-ALD process 411. In the example, at operation 450, the deposition of the second metal electrode is performed via a second non-atomic layer deposition (non-ALD) process. The second metal electrode may include a top metal electrode or a bottom metal electrode, which may be electrically connected to and / or physically contacted with the dielectric layer. Furthermore, the top or bottom metal electrode layer may be in contact with the first or second metal liner.

[0134] The second metal electrode may have a predetermined thickness. In the example, the thickness may be less than 50 nanometers (nm), or about 1 nm to about 50 nm, or about 2 nm to about 45 nm, or about 3 nm to about 40 nm, or about 4 nm to about 40 nm, or about 5 nm to about 30 nm, or any suitable thickness (in this context, "about" means + / - 5 nm).

[0135] In the example, the first metal electrode includes a bottom metal electrode, and the first metal liner includes a bottom metal liner, wherein depositing the first metal liner further includes configuring the bottom metal liner to physically contact the bottom metal electrode. In the example, the second metal electrode includes a top metal electrode to physically contact the dielectric layer.

[0136] While exemplary examples of this disclosure are illustrated herein, it should be understood that this disclosure is not limited thereto. Various modifications, changes, and enhancements may be made to the systems and methods described herein without departing from the spirit and scope of this disclosure.

[0137] The subject matter of this disclosure includes all novel and non-obvious combinations and sub-combinations of the various systems, components and configurations disclosed herein, as well as any and all equivalents thereof.

Claims

1. A method for depositing a composite film, comprising: Support substrate; The first metal electrode is deposited via a first non-atomic layer deposition (non-ALD) process; The first metallic liner is deposited via a first-cycle ALD process; A dielectric layer is deposited via a second cycle of ALD process, the dielectric layer being configured to be electrically connected to a first metal electrode and physically in contact with a first metal liner, wherein the dielectric layer comprises a first crystalline form; A first in-plane tensile stress is induced in the dielectric layer at the first interface between the first metal liner and the dielectric layer; as well as In response to the tensile stress in the first plane, the first crystalline form is transformed into the second crystalline form.

2. The method according to claim 1, wherein, The dielectric layer is a high-k material or a ferroelectric material.

3. The method according to claim 1, wherein, The deposition of the first metal liner is performed at a temperature ranging from 150°C to 600°C.

4. The method according to claim 3, wherein, The first metal liner is deposited on the surface of the dielectric layer.

5. The method according to claim 1, wherein, The first crystalline form is in a first non-centrosymmetric state, and the second crystalline form is in a second non-centrosymmetric state.

6. The method according to claim 5, wherein, The second non-centrosymmetric state includes a greater degree of non-centrosymmetry than the first non-centrosymmetric state.

7. The method according to claim 5, wherein, At least a portion of the first crystalline form is in an amorphous phase, and the second crystalline form is in an orthorhombic or tetragonal phase or a combination thereof.

8. The method according to claim 5, wherein, The first crystalline form comprises a first percentage of orthorhombic phase, and the second crystalline form comprises a second percentage of orthorhombic phase, wherein the second percentage is greater than the first percentage.

9. The method according to claim 5, wherein, Converting the first crystalline form to the second crystalline form also includes heating the dielectric layer to a temperature in the range of 150°C to 700°C.

10. The method of claim 1, further comprising exposing the substrate to one or more transformation processes, the transformation processes comprising at least one of the following: rapid thermal annealing, annealing, plasma treatment, or exposure to ozone or a combination thereof.

11. The method according to claim 1, wherein, Converting the first crystalline form to the second crystalline form further includes exposing the substrate to a transformation process, the transformation process including at least one of the following: rapid thermal annealing (RTA), annealing, plasma exposure, ozone exposure, oxidant exposure, nitriding agent exposure, reducing agent exposure, or inert gas exposure, or a combination thereof.

12. The method according to claim 5, wherein, Converting the first crystalline form into the second crystalline form increases the dielectric constant of the dielectric layer by 10% to 100%.

13. The method according to claim 5, wherein, Converting the first crystalline form into the second crystalline form increases the ferroelectricity of the dielectric layer.

14. The method according to claim 1, wherein, The non-ALD process includes chemical vapor deposition (CVD) or physical vapor deposition (PVD) processes.

15. The method according to claim 1, wherein, The tensile stress induced by the first metal liner is greater than the tensile stress induced by the first metal electrode.

16. The method according to claim 1, wherein, The first loop ALD process includes: a) Contact the substrate with the first gas phase precursor; b) Contact the substrate with the second gas phase precursor; c) Purge the chamber; and Repeat one or more of operations a), b), or c), or combinations thereof in any order, until a first metal liner having a first predetermined thickness is deposited on the substrate.

17. The method according to claim 16, wherein, The first gaseous precursor includes at least one of the following: titanium tetrachloride (TiCl4), titanium tetraiodide (TiI4), titanium tetrabromide (TiBr3), tantalum pentachloride (TaCl5), or a combination thereof.

18. The method according to claim 17, wherein, The second gaseous precursor includes at least one of the following: ammonia (NH3), hydrazine (N2H4), hydrazine derivatives, alkyl hydrazine, tert-butylhydrazine (C4H9N2H3), methylhydrazine (CH3NHNH2), dimethylhydrazine ((CH3)2N2H2), phenylhydrazine, tert-butylamine, isobutylamine, tert-amylamine, N2 plasma, N2 / H2 plasma, NH3 plasma, nitrogen excitation material, nitrogen ions, nitrogen free radicals, or combinations thereof.

19. The method according to claim 18, wherein, The first metal liner comprises titanium nitride (TiN) or tantalum nitride (TaN).

20. The method according to claim 18, wherein, The first cyclic ALD process also includes: d) Contact the substrate with the oxygen reactants; and Repeat one or more of operations a), b), c), or d) or combinations thereof in any order until a first metal liner having the first predetermined thickness is deposited on the substrate.

21. The method according to claim 20, wherein, The first metal liner comprises titanium oxynitride.

22. The method according to claim 16, wherein, The first metal electrode includes a top metal electrode, and the first metal liner includes a top metal liner comprising a metal nitride, wherein depositing the first metal liner further includes setting the top metal liner to physical contact with the top metal electrode, and depositing a second metal electrode via a second non-atomic layer deposition (non-ALD) process, wherein the second metal electrode includes a bottom metal electrode to physical contact with the dielectric layer.

23. The method according to claim 22, wherein, The thickness of each of the bottom metal electrode and the top metal electrode is less than 50 nanometers (nm), and the thickness of the top metal liner is less than...

24. The method of claim 16, wherein, The first metal electrode includes a bottom metal electrode, and the first metal liner includes a bottom metal liner, wherein depositing the first metal liner further includes setting the bottom metal liner to physical contact with the bottom metal electrode.

25. The method of claim 24, further comprising depositing a second metal electrode via a second non-atom layer deposition (non-ALD) process, wherein, The second metal electrode includes a top metal electrode that is in physical contact with the dielectric layer.

26. The method of claim 25, wherein, The thickness of the bottom metal electrode and the top metal electrode is less than 50 nanometers (nm), and wherein the thickness of the bottom metal liner is less than...

27. The method according to claim 16, wherein, The second loop ALD process includes: e) Contact the substrate with the third gas phase precursor; f) Contact the substrate with the fourth gas phase precursor; g) Bring the substrate into contact with the oxygen reactants; h) Purge the reaction chamber; and Repeat one or more operations e), f), g), or h) or any combination thereof in any order until a dielectric layer of predetermined thickness is deposited on the substrate.

28. The method according to claim 27, wherein, The third gaseous precursor comprises at least one of the following: tetra(dimethylamino)hafnium, tetra(diethylamino)hafnium, tetra(ethylmethylamino)hafnium, HfCl4, HfBr4 and HfI4, tetra(dimethylamino)zirconium (TDMAZ), tetra(dimethylamino)titanium (TDMAT), tetratert-butoxide hafnium (Hf(OC(CH3)3)4), tetraethylmethylaminosilane (Si(N(CH3)-(C2H5))4), trimethylaluminum (TMA), and trimethylaminosilane (TDMA). (N,N'-diisopropylacetamido)yttrium(III)(Y(DPfAMD)3), Ge(NMe2)4, Ge(OnBu)4, tris(N,N'-diisopropylacetamido)cerium(III)(Ce(DPfAMD)3), tris(N,N'-diisopropylacetamido)yttrium(III)(Y(DPfAMD)3), tantalum pentachloride (TaCl5), scandium chloride (ScCl3), bismuth chloride (BiCl3), or combinations thereof.

29. The method according to claim 27, wherein, The fourth gaseous precursor includes at least one of the following: tetra(dimethylamino)zirconium, tetra(diethylamino)zirconium, tetra-ethylmethylaminosilane (Si(N(CH3)-(C2H5))4) or tetra(ethylmethylamino)zirconium or any combination thereof.

30. The method according to claim 27, wherein, The oxygen reactant is one or more of H2O, H2O2, O2, O3, N2O, NO, NO2, or oxygen plasma.

31. The method according to claim 27, wherein, The dielectric layer includes a dielectric material, which includes at least one of the following: hafnium oxide (HfO2), hafnium zirconium oxide (HZO), zirconium oxide (ZrO2), titanium oxide (TiOx), hafnium silicate (HfSiOx), aluminum oxide (Al2O3), lanthanum oxide (La2O3), germanium oxide (GeOx), cerium oxide (CeOx), yttrium oxide (YxOy), tantalum oxide (TaxOy), scandium oxide (ScxOy), bismuth oxide (BixOy), and one or more or combinations thereof of yttrium-doped dielectric materials.

32. The method of claim 27, further comprising: A second metal liner is deposited via a third cycle of ALD process, wherein the second metal liner includes a top metal liner that is in physical contact with the dielectric layer; In the dielectric layer at the second interface between the top metal liner and the dielectric layer, a second in-plane tensile stress is induced; A second metal electrode is deposited via a non-atomic layer deposition (non-ALD) process, wherein the second metal electrode includes a top metal electrode in physical contact with a top metal liner.

33. The method according to claim 32, wherein, The third cycle ALD process includes: i) Contact the substrate with the fifth gas phase precursor; j) Contact the substrate with the sixth gas phase precursor; k) Purge the reaction chamber; and Repeat one or more operations i), j), or k), or any combination thereof in any order, until a second metal liner with a third predetermined thickness is deposited on the dielectric layer.

34. The method according to claim 33, wherein, The fifth gaseous precursor includes at least one of titanium tetrachloride (TiCl4), titanium tetraiodide (TiI4), titanium tetrabromide (TiBr3), tantalum pentachloride (TaCl5), or a combination thereof.

35. The method according to claim 33, wherein, The sixth gaseous precursor includes at least one of the following: ammonia (NH3), hydrazine (N2H4), hydrazine derivatives, alkyl hydrazine, tert-butylhydrazine (C4H9N2H3), methylhydrazine (CH3NHNH2), dimethylhydrazine ((CH3)2N2H2), phenylhydrazine, tert-butylamine, isobutylamine, tert-amylamine, N2 plasma, N2 / H2 plasma, NH3 plasma, nitrogen excitation material, nitrogen ions, nitrogen free radicals, or any combination thereof.

36. The method according to claim 33, wherein, The second metal liner comprises titanium nitride (TiN) or tantalum nitride (TaN).

37. The method according to claim 33, wherein, The third cycle ALD process also includes: l) bringing the substrate into contact with the oxygen reactant; and Repeat one or more operations i), j), k), or l), or combinations thereof in any order, until a second metal liner having the third predetermined thickness is deposited on the dielectric layer.

38. The method according to claim 37, wherein, The second metal liner comprises titanium oxynitride (TiON).

39. The method according to claim 33, wherein, The thickness of the bottom metal electrode and the top metal electrode is less than 50 nanometers (nm), and wherein the thickness of the top metal liner and the bottom metal liner is less than...

40. The method according to claim 1, wherein, The composite film forms at least one of the following: a metal-insulator-metal (MIM) structure, a metal-ferroelectric-metal (MFM) structure, a ferroelectric random access memory (FeRAM) structure, a ferroelectric field-effect transistor (FeFET) structure, a dynamic random access memory (DRAM) structure, a resistive random access memory (ReRAM) structure, or an embedded dynamic random access memory (eDRAM) structure, or a combination thereof.

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