Memory pool device fusing extended network and management method
By integrating the super network card chip with the intelligent computing cluster to expand the network, the problem of the lack of a unified architecture in memory expansion solutions is solved, realizing high-bandwidth and low-latency memory sharing, improving data transmission efficiency and memory utilization, and meeting the high-efficiency operation requirements of the MoE model.
Patent Information
- Application Number
- CN202511059552.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-30
- Publication Date
- 2025-11-11
AI Technical Summary
In existing computer systems, the lack of a unified architecture for memory expansion schemes and distributed caching leads to high hardware resource consumption for XPU/GPU, and traditional Scale Out networks are unable to meet the high bandwidth and low latency requirements of the MoE model.
It adopts a super network card chip to connect with the intelligent computing cluster and provides shared memory services. Through remote direct memory access protocol and proprietary protocol, it realizes the integration of horizontal and vertical network expansion. Combined with FPGA and XPU expansion unit, it optimizes data transmission path and provides high bandwidth and low latency memory sharing.
It improves data transmission efficiency and memory utilization, reduces latency, and enables flexible scheduling and sharing of memory resources, thus meeting the high-efficiency operation requirements of the MoE model.