Data processing device and method, chip, electronic equipment and storage medium

Abstract

The invention discloses a data processing device and method, a chip, electronic equipment and a storage medium, and the device comprises a caching module which is used for caching data; the cache monitoring module is used for determining the highest priority of the data in the cache module; determining a preset data consumption speed of the cache module according to the data variation in the cache module within the first preset duration; determining an adjustment value of a second data volume threshold value of the cache module according to a first duration when the data volume in the cache module is greater than the first data volume threshold value; when the data volume in the cache module is in a first state greater than a second data volume threshold and the continuous duration is less than a first duration threshold, outputting the highest priority; otherwise, outputting the highest priority, the preset data consumption speed and the adjustment value; and the arbitration module is used for executing data processing according to the output result. Therefore, the flexibility and the stability of data processing of the buffer area of the network-on-chip can be improved, and the processing efficiency of upstream and downstream data is improved.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and in particular to a data processing device, method, chip, electronic device and storage medium. Background Technology

[0002] In on-chip network systems, due to the dynamic nature of data traffic, the load on each path is constantly changing. Buffers, as temporary storage units for data transmission, have a crucial impact on the performance of on-chip network paths when used appropriately. Improper buffer management can lead to wasted storage resources, congestion, and consequently, increased data transmission latency and decreased throughput.

[0003] In related technologies, monitoring the buffer usage in on-chip network paths and optimizing path control based on the monitoring results can effectively improve the overall performance of on-chip network systems and meet the demands of modern chips for high-speed and efficient data transmission. However, using fixed priority control methods may lead to a large number of low-priority data packets being redirected to other congested areas, causing high-priority transactions on other paths to be blocked, increasing latency, and reducing bandwidth available to high-bandwidth demand paths. Facing the dynamic characteristics of traffic, frequent interventions in control measures can easily occur, resulting in insufficient cache utilization and wasted local cache resources.

[0004] Currently, there is no good way to improve the data processing method of the on-chip network buffer to enhance the processing efficiency of upstream and downstream data. Summary of the Invention

[0005] This application proposes a data processing apparatus, method, chip, electronic device, and computer storage medium that can improve the flexibility and stability of data processing in the buffer of an on-chip network, thereby improving the processing efficiency of upstream and downstream data.

[0006] To achieve the above objectives, the technical solution of this application is implemented as follows: This application provides a data processing apparatus, which includes: a cache module, a cache monitoring module, and an arbitration module, wherein... The caching module is used to cache data; The cache monitoring module is used to determine the highest priority of data for different events in the cache module, wherein the highest priority is the priority of data processing; The cache monitoring module is further configured to determine the preset data consumption rate of the cache module based on the amount of data change within a first preset duration in the cache module, wherein the first preset duration is the total duration of multiple clock cycles prior to the current moment. The cache monitoring module is further configured to determine an adjustment value of the second data volume threshold of the cache module based on a first duration during which the data volume in the cache module is greater than the first data volume threshold, wherein the first data volume threshold is equal to the initial second data volume threshold, and the initial second data volume threshold is half of the total data storage volume of the cache module. The cache monitoring module is further configured to output the highest priority as the result when the amount of data in the cache module is in a first state that is greater than a second data amount threshold and the continuous duration of the first state is less than a first duration threshold, wherein the first duration threshold is less than the first preset duration. The cache monitoring module is further configured to output the highest priority, the preset data consumption rate, and the adjustment value as results when the amount of data in the cache module is in a first state that is greater than the second data amount threshold and the continuous duration of the first state is greater than the first duration threshold. The arbitration module is used to perform data processing based on the output result.

[0007] This application provides a data processing method, which is implemented based on the data processing apparatus described in this application. The method includes: Data is cached using the caching module; Determine the highest priority of data for different events in the cache module; Based on the amount of data change within a first preset time period in the cache module, the preset data consumption rate of the cache module is determined, wherein the first preset time period is the total duration of multiple clock cycles prior to the current moment. Based on the first duration during which the amount of data in the cache module is greater than the first data amount threshold, an adjustment value for the second data amount threshold of the cache module is determined, wherein the first data amount threshold is equal to the initial second data amount threshold, and the initial second data amount threshold is half of the total data storage amount of the cache module; When the amount of data in the cache module is in a first state that is greater than the second data amount threshold, and the continuous duration of the first state is less than the first duration threshold, the highest priority is used as the output result, wherein the first duration threshold is less than the first preset duration. When the amount of data in the cache module is in a first state that is greater than the second data amount threshold, and the continuous duration of the first state is greater than the first duration threshold, the highest priority, the preset data consumption rate, and the adjustment value are used as the output results. Perform data processing based on the output results.

[0008] In some embodiments, this application also provides a chip, the chip including: a data processing apparatus as described in the embodiments of this application.

[0009] In some embodiments, this application also provides an electronic device, the electronic device including a processor, wherein the processor includes: a data processing device as described in the embodiments of this application; Alternatively, a memory may be used to store computer-executable instructions or computer programs; a processor may be used to execute the computer-executable instructions or computer programs stored in the memory to implement the data processing method described in the embodiments of this application.

[0010] In some embodiments, this application also provides a computer-readable storage medium storing computer-executable instructions or a computer program, which, when executed by a processor, implements the data processing method described in this application.

[0011] The embodiments of this application have the following beneficial effects: The cache monitoring module monitors different parameters of the cache module and generates corresponding parameters for adjusting the cache module based on the monitored parameters. These parameters include, but are not limited to, adjustments to the highest data processing priority, preset data consumption rate, and data volume threshold. Simultaneously, the cache monitoring module also determines whether the data volume in the cache module is in a first state greater than a second data volume threshold. This first state indicates whether the cache module is in a state of excessive resource storage for an extended period. Based on whether the duration of the first state exceeds a preset duration threshold, it determines whether to apply the adjustments to the highest data processing priority, preset data consumption rate, and data volume threshold to data processing to alleviate data congestion upstream and downstream of the cache module. The highest priority is output downstream in every case, ensuring that optimizing local congestion does not disrupt the global priority strategy. The adjustment of the preset data consumption rate and data volume threshold is not dependent on instantaneous values ​​but is based on the continuous duration of the first state, filtering out brief fluctuations and avoiding misjudgments. It can improve the data processing efficiency of upstream and downstream of the cache module, while controlling the amount of data in the cache module appropriately, avoiding situations such as cache module overflow, upstream data blockage, or lack of data to be processed downstream of the cache module, thereby improving the adaptability of the on-chip network. Attached Figure Description

[0012] Figure 1 This is a schematic diagram of the structure of the data processing apparatus provided in the embodiments of this application. Figure 1 ; Figure 2 This is a schematic diagram of the structure of the data processing apparatus provided in the embodiments of this application. Figure 2 ; Figure 3 This is a schematic diagram of the structure of the data processing apparatus provided in the embodiments of this application. Figure 3 ; Figure 4 This is a flowchart illustrating the data processing method provided in the embodiments of this application.

[0013] It should be noted that the terms "first" and "second" mentioned above are only used to distinguish between different options and do not represent the degree of superiority or inferiority of the options or their priority in the implementation process. Detailed Implementation

[0014] In order to gain a more detailed understanding of the features and technical content of the embodiments of this application, the implementation of the embodiments of this application will be described in detail below with reference to the accompanying drawings. The accompanying drawings are for reference and illustration only and are not intended to limit the embodiments of this application.

[0015] Unless otherwise defined, all technical and scientific terms used in the embodiments of this application have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the embodiments of this application is for the purpose of describing the embodiments of this application only and is not intended to limit this application.

[0016] In the following description, references are made to “some embodiments,” which describe a subset of all possible embodiments. However, it is understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0017] It should also be noted that the terms "first," "second," and "third" used in the embodiments of this application are only used to distinguish similar objects and do not represent a specific order of objects. It is understood that "first," "second," and "third" can be interchanged in a specific order or sequence where permissible, so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein. In the embodiments of this application, the terms "module" or "unit" refer to a computer program or part of a computer program with a predetermined function, which works together with other related parts to achieve a predetermined goal, and can be implemented wholly or partially using software, hardware (such as processing circuitry or memory), or a combination thereof. Similarly, a processor (or multiple processors or memory) can be used to implement one or more modules or units. Furthermore, each module or unit can be part of a larger module or unit that includes the functionality of that module or unit.

[0018] It should be noted that the data collection and processing in this application should strictly comply with the requirements of relevant laws and regulations, obtain the informed consent or separate consent of the personal information subject, and carry out subsequent data use and processing within the scope of laws and regulations and the authorization of the personal information subject.

[0019] To facilitate understanding of the technical solutions of the embodiments of this application, the relevant terms and technologies of the embodiments of this application are described below. The following related technologies are optional solutions and can be combined with the technical solutions of the embodiments of this application in any way, and they all fall within the protection scope of the embodiments of this application.

[0020] 1) Multiprocessor system: A multiprocessor system is a parallel computing system consisting of multiple processors interconnected through shared memory or distributed memory. Combining very large-scale integrated circuit (VLSI) technology with parallel processing technology, it can improve system throughput and operational reliability, and achieve high-performance computing through parallel processing. The traditional narrow definition specifically refers to an architecture that uses multiple central processing units (CPUs) to execute user programs in parallel to improve system throughput or perform redundant operations.

[0021] 2) Network-on-chip (NOC): This is a novel communication method for System-on-a-Chip (SoC). As a key component of multi-core technology, it achieves concurrent communication through distributed routing nodes and time-division multiplexing links, replacing the traditional bus architecture to solve scalability and performance bottlenecks. Its architecture is divided into Electronic Network-on-Chip (ENoC) based on electronic technology and Optical Network-on-Chip (ONoC) based on optical technology, employing a globally asynchronous and locally synchronous clock mechanism to reduce power consumption. NOC offers higher bandwidth than bus architectures, lower dynamic power consumption, and supports scenarios such as multi-core processors and artificial intelligence (AI) accelerators.

[0022] 3) Multi-Processor System on Chip (MPSOC): A combination of System on Chip (SoC) and multi-processor system, referring to a system that integrates multiple processor cores on a single chip.

[0023] 4) Buffer: The on-chip network buffer is a storage area used for temporary storage of network data exchange. Its main function is to balance the differences in data transmission rates between different devices and reduce the risk of congestion.

[0024] 5) Flow control units (flits): These are the basic packet structures used for data transmission in an on-chip network. When a message is injected into the on-chip network, the message is segmented into data packets (referred to as packets), and then into fixed-length flow control units (flits). For example, a 128-byte buffer line sent from the sharer to the requester will be sent as a single message. If the maximum packet size is greater than 128 bytes, the entire message will be encoded into a single packet. This packet will include a head flit containing the destination address, body flits, and a tail flit indicating the end of the packet. Flits can be further subdivided into physical units (phits), corresponding to the physical channel width.

[0025] 6) Channels: The channels of a network on a chip (NoC) mainly consist of communication links and routers.

[0026] 7) Depth: In this embodiment of the application, the depth of the buffer refers to its storage capacity, including the maximum amount of data that can be stored and the amount of data currently stored. The unit of the maximum amount of data that can be stored can be bits, and the amount of data currently stored can be expressed in bits, or as a percentage of the ratio of the bit value of the current amount of data stored to the bit value of the maximum amount of data stored.

[0027] 8) Clock cycle: The clock cycle of a chip is the smallest unit of time for the central processing unit (CPU) to perform operations. It refers to the complete cycle of the clock signal and is determined by the reciprocal of the clock frequency.

[0028] In related technologies, in on-chip network systems, due to the dynamic nature of data traffic, the load on each path is constantly changing. Traditional fixed-priority path scheduling methods are difficult to adapt to this dynamic change, easily leading to high-priority paths occupying resources for extended periods, while low-priority paths do not receive sufficient resource allocation even under light loads, thus reducing overall system efficiency. Buffers, as temporary storage units for data transmission, have a crucial impact on the performance of on-chip network paths when used properly. Inappropriate buffer management can lead to wasted storage resources, concentrated congestion, and consequently, increased latency and decreased throughput for high-priority data transmission. Therefore, monitoring buffer usage in on-chip network paths and optimizing path management based on the monitoring results can effectively improve the overall performance of the on-chip network system and meet the demands of modern chips for high-speed, efficient data transmission. However, in related technologies, fixed-priority control methods for buffers may cause a large number of low-priority data packets to be redirected to other congested areas, blocking high-priority transactions on other paths, increasing latency, and reducing bandwidth available to high-bandwidth demand paths. The dynamic nature of traffic can also lead to frequent interventions, insufficient cache utilization, and wasted local cache resources.

[0029] Based on this, embodiments of this application provide a data processing device, a data processing method, a chip, an electronic device, and a computer storage medium. These monitor different parameters of a cache module to determine if the amount of data in the cache module is in a first state greater than a second data volume threshold. The first state indicates whether the cache module is in a state of excessive resource storage for an extended period. Based on whether the duration of the first state exceeds a preset duration threshold, it is determined whether to apply adjustments to the highest priority of data processing, the preset data consumption rate, and the data volume threshold to data processing to alleviate data congestion upstream and downstream of the cache module. Adjusting the cache module based on continuous parameters can filter out short-term fluctuations and avoid misjudgments. Controlling the amount of data in the cache module appropriately prevents cache module overflow, upstream data congestion, or a lack of data to be processed downstream, thus improving the adaptability of the on-chip network.

[0030] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0031] Figure 1 This is a schematic diagram of the structure of the data processing apparatus provided in the embodiments of this application. Figure 1 The data processing device 100 includes: a cache module 102, a cache monitoring module 101, and an arbitration module 103.

[0032] The caching module 102 is used to cache data.

[0033] The cache monitoring module 101 is used to determine the highest priority of data for different events in the cache module, wherein the highest priority is the priority of data processing.

[0034] For example, different types of events have different preset priorities. In practical applications, the preset priorities of different events can be set according to requirements. The priorities of different events in the caching module can be updated according to the data volume of different events, and the highest priority data is determined based on the updated priorities.

[0035] In some embodiments, the cache monitoring module is further configured to determine the highest priority of data for different events in the cache module by: counting the number of data for different events stored in the cache module; determining a priority adjustment value for different events based on the number of each event, wherein the priority adjustment value is positively correlated with the number of events; adding the priority adjustment value to the preset priority of the corresponding event to obtain the actual priority of each event, and selecting the highest priority among the actual priorities.

[0036] For example: Given events A, B, and C, with preset priorities of 3 for event A, 4 for event B, and 5 for event C (higher values ​​indicate higher priority), and a cache module storing 3 copies of event A's data, 1 copy of event B's data, and 0 copies of event C's data, adjusting the priority of event A's data to 6 (3+3) and event B's data to 5 (4+1) will result in event A having the highest priority, and the output will show event A's data with a priority of 6.

[0037] The cache monitoring module 101 is also used to determine the preset data consumption rate of the cache module based on the amount of data change within a first preset time period in the cache module.

[0038] For example, the first preset duration is the total duration of multiple clock cycles prior to the current moment. For instance, 8 clock cycles. The data change rate can be used to measure the probability of sudden data changes within the first preset duration in the cache module. If there is a possibility of a sudden increase or decrease in data within the cache module, it is necessary to adjust the data consumption rate in the cache module to avoid data overflow. The preset data consumption rate can be represented by data volume / time, for example, 2 kilobits per second.

[0039] In some embodiments, the cache monitoring module is further configured to acquire the first data volume of multiple first moments in the cache module within the first preset time period before the current moment, wherein there is an interval of at least one clock cycle between adjacent first moments; when the current data volume at the current moment is greater than a third data volume threshold, the difference between the current data volume and the smallest first data volume is taken as the data change amount; when the data change amount is greater than the data change amount threshold, a preset data consumption rate is determined according to the preset mapping relationship between the third data volume threshold and the consumption rate.

[0040] For example, the data change threshold is less than the difference between the third data volume threshold and the first data volume threshold. For instance, the third data volume threshold is set to 80% of the total cached data volume (32KB), which is 24KB. The difference between the third data volume threshold and the first data volume threshold (16KB) is 8KB, and the data change threshold can be 4KB. When the current data volume at the current moment is greater than the third data volume threshold, it indicates that the current data volume is large. If a surge in data volume occurs, the cache module may overflow, triggering the operation of predicting the data change volume. The preset mapping relationship between the data change threshold, or the third data volume threshold, and the consumption rate can be set according to the actual application scenario. For example, if the third data volume threshold is 80% of the total cached data volume of the cache module, then the preset data consumption rate is V0, where V0 is in kilobits per second (KB / s). If the data volume threshold is 90% of the total cached data volume of the cache module, then the preset data consumption rate is V1. V1 is greater than V0. Assuming the total cache space of the cache module is 32KB, the preset data consumption rate can be 0.5KB per clock cycle. The length of the clock cycle is set according to the needs of the actual application scenario. The clock cycle of the chip is the smallest time unit for the central processing unit (CPU) to perform operations. It refers to the complete cycle of the clock signal and is determined by the reciprocal of the clock frequency.

[0041] In some embodiments, the cache monitoring module further includes a plurality of counters, wherein one of the counters is used to store a first data amount at the first moment; when the number of stored first data amounts is equal to the number of counters, the first data amount stored by the target counter is overwritten by the latest acquired first data amount, wherein, among the plurality of counters, the target counter is the earliest counter corresponding to the first moment of the stored first data amount.

[0042] For example: There are counters 1 to N, where N is a positive integer. The first data quantity obtained is stored in the corresponding counter in the order of counter 1 to counter N. When all of counters 1 to counter N have stored a first data quantity, the first data quantity obtained at the first moment is stored in counter 1 and overwrites the first data quantity already stored in counter 1.

[0043] The cache monitoring module 101 is further configured to determine an adjustment value for the second data volume threshold of the cache module based on a first duration during which the data volume in the cache module is greater than the first data volume threshold.

[0044] For example, the first data volume threshold is equal to the initial second data volume threshold, which is half of the total data storage volume of the cache module. For instance, if the total data storage volume of the cache module is 32KB, then the initial second data volume threshold is 16KB, and the first data volume threshold is also 16KB.

[0045] The state with a data volume greater than the first data volume threshold is taken as the second state. The first duration of the second state within the preset duration before the current time is counted, and the adjustment value of the second data volume threshold of the cache module is determined based on whether the first duration exceeds the threshold.

[0046] In some embodiments, the cache monitoring module is further configured to determine an adjustment value for a second data volume threshold of the cache module based on a first duration during which the data volume in the cache module is greater than a first data volume threshold: obtaining the first data volume of the cache module within a second preset duration before the current time; determining the first duration of a second state within the second preset duration, wherein the second state is a state where the first data volume is greater than the first data volume threshold; when the first duration is greater than a third duration threshold, using a first preset value as the adjustment value; when the first duration is less than the third duration threshold, using a second preset value as the adjustment value, wherein the second preset value is less than the first preset value.

[0047] For example, based on the needs of the caching module, a base value and a dynamic adjustment value are preset. When the first duration is greater than the third duration threshold, the sum of the base value and the dynamic adjustment value is used as the first preset value. The dynamic adjustment value can be 1 (in KB). When the first duration is less than the third duration threshold, the difference between the base value and the dynamic adjustment value is used as the second preset value. Continuing with the example above, when the adjustment value equals 1 as the output result, based on adjusting to the second data volume threshold, 16KB is added to 1KB, resulting in an updated second data volume threshold of 17KB.

[0048] In some embodiments, the cache monitoring module is further configured to determine the first duration of the second state in which the first data volume is greater than a first data volume threshold by: taking the second time as the start time in response to the first data volume being less than the first data volume threshold before the second time and the first data volume being greater than the first data volume threshold after the second time; taking the third time as the end time in response to the first data volume being greater than the first data volume threshold before the third time and the first data volume being less than the first data volume threshold after the third time, wherein the third time is located after the second time; taking the duration between the start time and the end time as the statistical duration of the second state; and adding up each of the statistical durations corresponding to the second preset duration to obtain the first duration.

[0049] The cache monitoring module 101 is further configured to use the highest priority as the output result when the amount of data in the cache module is in a first state that is greater than a second data amount threshold and the continuous duration of the first state is less than a first duration threshold.

[0050] For example, the first duration threshold is less than the first preset duration. For instance, the first duration threshold is 4 clock cycles, and the first preset duration is 8 clock cycles. The cache monitoring module is equipped with a data selector. When the amount of data in the cache module is in a first state greater than a second data amount threshold, and the continuous duration of the first state is less than the first duration threshold, the data selector outputs a selection value of 1, indicating that the highest priority is used as the output result.

[0051] The cache monitoring module 101 is further configured to output the highest priority, the preset data consumption rate, and the adjustment value when the amount of data in the cache module is in a first state that is greater than the second data amount threshold, and the continuous duration of the first state is greater than the first duration threshold.

[0052] For example, the cache monitoring module is equipped with a data selector. When the amount of data in the cache module is in a first state that is greater than a second data amount threshold, and the continuous duration of the first state is greater than a first duration threshold, the data selector outputs a selection value of 0, indicating that the highest priority, the preset data consumption rate, and the adjustment value are used as the output results.

[0053] The arbitration module 103 is used to perform data processing based on the output result.

[0054] For example, when the output result is of the highest priority, the arbitration module outputs the highest priority data to the downstream data processing unit. The data processing unit processes the highest priority data first, thus alleviating the storage pressure on the cache module. When the output result is the highest priority, the preset data consumption rate, and the adjustment value, the arbitration module outputs the highest priority, the preset data consumption rate, and the adjustment value to the downstream data processing unit. The data processing unit processes the highest priority data first, thus alleviating the storage pressure on the cache module; the data processing unit increases the data processing speed according to the preset data consumption rate and increases the data volume threshold of the cache module according to the adjustment value.

[0055] In some embodiments, when there are multiple cache modules, the arbitration module is further configured to determine a target cache module based on the output results corresponding to the different cache modules, wherein the data stored in the target cache module is output to the downstream data processing unit.

[0056] For example, when the output result is a priority, the arbitration module outputs the highest priority data from multiple cache modules to the downstream data processing unit. This ensures that the downstream data processing unit processes the data with the highest priority first. For instance, if the highest priority flow control units (the basic packet structure for data transmission) among multiple cache modules are Flow Control Unit A, Flow Control Unit B, and Flow Control Unit C, and these cache modules belong to different channels but share a single downstream processing unit, the unit will select the highest priority flow control unit (Flow Control Unit A, Flow Control Unit B, or Flow Control Unit C) for processing. This setting ensures global priority in multi-channel, multi-cache module scenarios, prioritizing the processing of the globally highest priority data.

[0057] In some embodiments, the cache monitoring module is further configured to determine a first priority of the data to be stored in the cache module when the amount of cached data in the cache module is equal to the total amount of cached data in the cache module; and to output the second priority as a result when the first priority is greater than the second priority of the data already stored in the cache module.

[0058] For example, when the data depth in the cache module reaches 100%, data accumulates upstream of the cache module. Therefore, it should be considered whether to output the upstream data (the data to be stored in the cache module) directly to the downstream without passing through the cache module. The first priority of the data to be stored in the cache module and the second priority of the already stored data are compared, and the higher priority is output to the arbitration module. This allows the arbitration module to control the downstream circuit to process the corresponding data first based on the highest priority. The above process can be represented as max(value4, value5), where max() is a function to select the maximum value, value4 is the second priority of the already stored data, and value5 is the first priority of the data to be stored in the cache module.

[0059] In some embodiments, this application also provides a data processing method, which is implemented based on the data processing apparatus provided in this application. Figure 4 This is a flowchart illustrating the data processing method provided in the embodiments of this application.

[0060] In step 401, the data is cached by the caching module.

[0061] In step 402, the highest priority of data for different events in the cache module is determined.

[0062] In some embodiments, step 402 can be implemented by: counting the number of different event data stored in the cache module; determining the priority adjustment value of different events based on the number of each event, wherein the priority adjustment value is positively correlated with the number of events; adding the priority adjustment value to the preset priority of the corresponding event to obtain the actual priority of each event, and selecting the highest priority among the actual priorities.

[0063] In step 403, the preset data consumption rate of the cache module is determined based on the amount of data change within the first preset time period in the cache module.

[0064] In some embodiments, the first preset duration is the total duration of multiple clock cycles prior to the current moment. Step 403 can be implemented as follows: First data amounts at multiple first moments within the first preset duration prior to the current moment are obtained from the cache module, wherein adjacent first moments are spaced apart by clock cycles; when the current data amount at the current moment is greater than a third data amount threshold, the difference between the current data amount and the smallest first data amount is used as the data change amount, wherein the third data amount threshold is greater than both the first data amount threshold and the second data amount threshold; when the data change amount is greater than the data change amount threshold, a preset data consumption rate is determined based on a preset mapping relationship between the third data amount threshold and the consumption rate. Multiple counters are set, wherein one counter stores one first data amount at a first moment; when the number of stored first data amounts equals the number of counters, the first data amount stored in the target counter is overwritten by the most recently obtained first data amount, wherein among the multiple counters, the target counter is the earliest counter corresponding to the first moment of the stored first data amount.

[0065] In step 404, the adjustment value of the second data volume threshold of the cache module is determined based on the first duration during which the amount of data in the cache module is greater than the first data volume threshold.

[0066] In some embodiments, the first data volume threshold is equal to the initial second data volume threshold, which is half of the total data storage volume of the cache module. Step 404 can be implemented as follows: obtaining the first data volume of the cache module within the second preset duration before the current time; determining the first duration for which the first data volume is in a second state greater than the first data volume threshold, where the second state is the state where the first data volume is greater than the first data volume threshold; when the first duration is greater than a third duration threshold, using a first preset value as the adjustment value; when the first duration is less than the third duration threshold, using a second preset value as the adjustment value, wherein the second preset value is less than the first preset value.

[0067] In some embodiments, determining the first duration of the second state where the first data volume is greater than a first data volume threshold can be achieved by: taking the second time as the start time in response to the first data volume being less than the first data volume threshold before the second time and the first data volume being greater than the first data volume threshold after the second time; taking the third time as the end time in response to the first data volume being greater than the first data volume threshold before the third time and the first data volume being less than the first data volume threshold after the third time, wherein the third time is located after the second time; taking the duration between the start time and the end time as the statistical duration of the second state; and adding up each of the statistical durations corresponding to the second preset duration to obtain the first duration.

[0068] In step 405, when the amount of data in the cache module is in a first state that is greater than the second data amount threshold, and the continuous duration of the first state is less than the first duration threshold, the highest priority is used as the output result.

[0069] In step 406, when the amount of data in the cache module is in a first state that is greater than the second data amount threshold, and the continuous duration of the first state is greater than the first duration threshold, the highest priority, the preset data consumption rate, and the adjustment value are used as the output results.

[0070] In step 407, data processing is performed based on the output results.

[0071] In some embodiments, step 407 can be implemented in the following way: when there are multiple cache modules, a target cache module is determined according to the output results corresponding to the different cache modules, wherein the data stored in the target cache module is output to the downstream data processing unit.

[0072] In some embodiments, the following processing is also performed: when the amount of cached data in the cache module is equal to the total amount of cached data in the cache module, a first priority of the data to be stored in the cache module is determined; in response to the first priority being greater than the second priority of the data already stored in the cache module, the second priority is used as the output result.

[0073] In this embodiment, the cache monitoring module monitors different parameters of the cache module and generates corresponding parameters for adjusting the cache module based on the monitored parameters. These parameters include, but are not limited to, the highest priority of data processing, the preset data consumption rate, and the adjustment value of the data volume threshold. Simultaneously, the cache monitoring module determines that the data volume in the cache module is in a first state greater than a second data volume threshold. The first state indicates whether the cache module is in a state of high resource storage for an extended period. Based on whether the duration of the first state exceeds a preset duration threshold, it is determined whether to apply the adjustment values ​​of the highest priority of data processing, the preset data consumption rate, and the data volume threshold to data processing to alleviate data congestion upstream and downstream of the cache module. The highest priority is output downstream in every case, ensuring that the global priority strategy is not disrupted when optimizing local congestion. Whether to adjust the preset data consumption rate and the data volume threshold is not dependent on instantaneous values ​​but is determined based on the continuous duration of the first state, filtering out brief fluctuations and avoiding misjudgments. It can improve the data processing efficiency of upstream and downstream of the cache module, while controlling the amount of data in the cache module appropriately, avoiding situations such as cache module overflow, upstream data blockage, or lack of data to be processed downstream of the cache module, thereby improving the adaptability of the on-chip network.

[0074] The following will describe an exemplary application of the data processing apparatus of this application in a practical application scenario.

[0075] In on-chip network systems, due to the dynamic nature of data traffic, the load on each path is constantly changing. Traditional fixed-priority path scheduling methods are difficult to adapt to this dynamic change, easily leading to high-priority paths occupying resources for extended periods, while low-priority paths do not receive sufficient resource allocation even under light loads, thus reducing overall system efficiency. Buffers, as temporary storage units for data transmission, have a crucial impact on the performance of on-chip network paths when used appropriately. Related technologies use monitoring buffer usage depth to improve path priority, setting multiple high thresholds TH0 and TH1 and multiple low thresholds TL0 and TL1, with preset priorities Q0 and Q1. When the depth does not exceed TH0, the original priority v0 is used as the priority for downstream arbitration; when the depth exceeds TH0, v0+Q0 is used for arbitration; when the depth exceeds TH1, v0+Q1 is used; when the depth is less than TL1, v0+Q0 is used; and when the depth is less than TL0, the original priority v0 is used. The related technologies have the following problems: (1) They only consider local congestion and do not consider global priority schemes. The fixed priority control methods of related technologies may cause a large number of low-priority data packets to be output to other congested areas, resulting in the blocking of high-priority transactions in other channels, increased latency, and a decrease in the bandwidth allocated to high-bandwidth demand channels. For example, the transactions in channel A are all low-priority, and the transactions in channel B are all high-priority. Channel A and channel B share the downstream processing unit. Channel A and channel B have their own buffers. When a large number of low-priority transactions are cached in channel A, the control methods of related technologies will determine the priority of processing data in channel A based on the amount of data. This may cause a large number of transactions in channel A to be transmitted downstream, resulting in high-priority transactions in channel B being blocked by low-priority transactions in channel A for a long time. (2) They only judge whether to control based on parameters that represent the instantaneous state. Using the "instantaneous depth" of the buffer as the only judgment standard may misjudge "temporary congestion" as "continuous congestion". In the face of the dynamic characteristics of traffic, it is easy to have frequent control intervention, insufficient use of buffer, and waste of local buffer resources. When the buffer briefly exceeds the threshold due to a sudden surge in traffic, priority adjustment will be triggered. However, such fluctuations may recover on their own in a short time, and the adjustment at this time wastes computing resources and does not play the corresponding role. For example, when the threshold is set to 50%, the buffer depth may fluctuate frequently around 50% (such as 49%→51%→48%), resulting in repeated priority adjustments, frequent priority switching of hardware logic, and increased circuit power consumption; frequent triggering of priority upgrades may also cause downstream resources to be temporarily occupied, affecting the normal scheduling of other paths. (3) Lack of adaptive adjustment means, unable to adapt to complex multi-task scenarios.Over-regulation during mild congestion wastes high-priority resources, such as prioritizing low-load paths and crowding out critical business bandwidth; insufficient regulation during severe congestion fails to effectively alleviate bottlenecks; for example, continuous exceedance of thresholds with fixed regulation intensity eventually leads to buffer overflow.

[0076] This application provides a data processing device to address the aforementioned problems in related technologies. It optimizes on-chip network path data processing based on cache region parameters, considering a global Quality of Service (QoS) priority scheme. When optimizing local congestion, it does not disrupt the global priority strategy. It does not rely on instantaneous values ​​but judges based on data from n consecutive periods and preset conditions. A time threshold is added to the data volume threshold, and adjustments are only performed when the buffer is consistently at a high level. This filters out short-term fluctuations and avoids misjudgments. For multi-tasking scenarios, corresponding adaptive adjustment methods are set. When congestion occurs, the device judges whether the current control intensity is sufficient based on past conditions and set adjustment expectations. For multi-tasking scenarios, the hardware adaptive adjustment control scheme requires no software intervention. It additionally monitors and adjusts for sudden increases or decreases in data volume, handling both regular and sudden transaction scenarios effectively.

[0077] The data processing apparatus provided in the embodiments of this application will be explained and described below with reference to the accompanying drawings. Figure 2 , Figure 2 This is a schematic diagram of the structure of the data processing apparatus provided in the embodiments of this application. Figure 2 The data processing device 200 includes a cache module 201, a cache monitoring module 202, and an arbitration module 203. Upstream refers to other modules that input data to the data processing device, while downstream refers to computing units that perform further processing on the output data of the data processing device. Upstream data is transmitted downstream. When the flow control unit flitB of channel B and the flow control unit flitC of channel C arrive at the input of the arbitration module at the same time, a priority judgment is performed. If flow control unit flitC is authorized, it is passed downstream, and flow control unit flitA is written to the cache module, incrementing the cache module depth by 1. Based on predefined expectations, the cache monitoring module 202 decides whether to increase the priority of flow control unit flitB in the next arbitration.

[0078] refer to Figure 3 , Figure 3 This is a schematic diagram of the structure of the data processing apparatus provided in the embodiments of this application. Figure 3 ; Figure 3 The cache monitoring module 300 in the middle is Figure 2One implementation of the cache monitoring module 202 in the system. The cache monitoring module 300 includes: a configurable register module 301, a priority statistics comparison module 302, a burst monitoring comparison module 303, a depth statistics comparison module 304, a summation module 306, a depth monitoring comparison module 305, a selection module 307, and a maximum value module 308.

[0079] In some embodiments, the configurable register module 301 provides a configurable input port to publish configuration schemes to various sub-modules in the cache monitoring module 300. That is, the configurable register module 301 assigns different configuration conditions to the depth statistics comparison module, the burst monitoring comparison module, and the depth statistics comparison module, respectively. The pre-configured conditions in the configurable register module 301 are input through the configuration input interface and can be set according to requirements in practical applications. Assuming the buffer depth is 32, continue referring to... Figure 2 Configure the following settings: Configuration 0: Depth threshold TH0 = 16 (the second data volume threshold mentioned above), Time tolerance = 4 (the first duration threshold mentioned above); Configuration 1: Depth = 24 (the third data volume threshold mentioned above), Time window = 8 (the first preset duration mentioned above), Burst intensity value = 4 (the data volume change threshold mentioned above); Configuration 2: Depth = 16 (the first data volume threshold mentioned above), Time window = 32 (the second preset duration mentioned above), Control result threshold = 16 (i.e., 50%).

[0080] In some embodiments, the priority statistics and comparison module 302 is used to count the priorities of cached transactions in the buffer and record the number of cached transactions for each priority. The preset priorities are adjusted based on the number of events stored in the cache module. For example, when transaction A is written to the buffer, the priority counter for transaction A is incremented by 1; when transaction B is read from the buffer, the priority counter for transaction B is decremented by 1. The highest priority of all transactions in the buffer can be inferred from the priority counter values. The inferred highest priority is used as the output (value0) of the priority statistics and comparison module 302, and the output value of the priority statistics and comparison module 302 is input to the selection module 307 or the summation module 306.

[0081] For example, eight priority levels are pre-designed. Besides the QoS status carried by the transaction itself, an urgency sideband channel is also set up. When backpressure occurs downstream, such as when the arbitration module fails to obtain authorization, the cache monitoring module adjusts and predicts based on buffer usage and transmits the result downstream through the urgency channel. The arbitration module determines the highest priority using the formula max(transaction priority, urgency value) and participates in the next arbitration based on the highest priority. For example, the priority statistics and comparison module continuously monitors the priorities of transactions in the buffer. When a transaction enters the buffer, input1 increments the corresponding counter value by 1. There are seven counters, corresponding to priorities 1, 2...7 (no statistics are needed when priority = 0). Based on the non-zero values ​​of each counter, the highest priority among the cached transactions is selected and used as the output value (value0) of this module.

[0082] In this embodiment, the highest priority of cached transactions in the statistical buffer is used as a benchmark for additional adjustments. The priority statistics and comparison module counts and outputs the highest priority of transactions in the buffer, ensuring that when backpressure occurs downstream, adjustments are made based on the priority of cached transactions, without affecting the global priority strategy. At different times, the priority of transactions in the same buffer may differ; corresponding adjustments are performed to effectively avoid disrupting the global QoS strategy.

[0083] In some embodiments, the burst monitoring and comparison module 303 is used to monitor traffic bursts in the cache module and output a preset data consumption rate to avoid data overflow in the cache module. When a traffic burst is detected in the path, the preset data consumption rate is output to the downstream to ensure that the burst scenario does not exceed the tolerance limit of traffic change (the tolerance limit of traffic change depends on the sensitivity of the upstream to back pressure). This can be implemented as follows: based on the total depth of the cache module, the preset number of counters is set to cnt_n. The depth value of cnt_n cycles is monitored by sliding, and the depth value is recorded once in each cycle. The depth values ​​from 0 to cnt_n are recorded sequentially in counters cnt_0, cnt_1 to cnt_n. At cnt_n+1, the depth value (the first data volume mentioned above) is recorded in cnt0, that is, the value at time 0 is overwritten. The depth values ​​of the most recent cnt_n cycles are continuously recorded by sliding window. Configure the data volume threshold as TH0; when the current cache depth is equal to D0, select the minimum value from counters cnt_0, cnt_1, and cnt_n (the minimum first data volume mentioned above), assuming the minimum value is D1, calculate the burst strength = (D0-D1); compare it with the data volume threshold TH0. For example, within 10 clock cycles, D0-D1=8, and the set threshold is 5, then it is determined that the burst strength is greater than the tolerance limit of the flow change. The burst monitoring comparison module outputs a preset data consumption rate v0 (pre-configured through registers). The burst monitoring module can set multiple waterline thresholds for burst comparison according to the depth, for example: 80% depth waterline outputs v0, 90% waterline outputs v1.

[0084] For example, continuing with the configuration above, when the cache module's depth usage reaches 24, if the minimum depth of the previous 8 cycles is less than or equal to 20 (i.e., the difference from 24 is 4), the burst monitoring and comparison module outputs a preset data consumption rate (to control the downstream depth consumption to 0.5KB / cycle in a short period of time), further increasing the priority of channel B in arbitration. During mild regulation, burst traffic may cause the buffer's free space to be exhausted in a short time, resulting in back pressure on the upstream. The output of the burst monitoring and comparison module can prevent the above situation from occurring.

[0085] In some embodiments, the depth statistics comparison module 304 is used to output a tolerance control value, which is used to adjust the threshold for triggering adjustment measures against the cache module. The depth statistics comparison module is configured with an observation depth of TH1, a monitoring time window of T0, a tolerance threshold of V0 (the third duration threshold mentioned above), and a basic output value of A1. The cache usage is monitored every T0 time period, obtaining the total duration V1 (the first duration mentioned above) of depth usage exceeding TH1 within the T0 time period. Depth usage exceeding TH1 is also known as the second state mentioned above. The monitoring result V1 is compared with the duration tolerance threshold V0. If the comparison result is V1 greater than V0, the tolerance control value is incremented by 1, initially resulting in a tolerance control value of 0. If the comparison result is V1 less than V0 and the tolerance control value is not 0, the tolerance control value is decremented by 1, with the minimum tolerance control value being 0. The output value (value2) of the depth statistics comparison module 304 is the sum of the basic output value A1 and the tolerance control value.

[0086] For example, based on the configuration above, when the proportion of channels with a depth exceeding 16 is greater than or equal to 50% over 32 cycles, the cache depth statistics comparison module is triggered, further increasing the priority of channel B in arbitration. This setting is based on bandwidth requirements and a preset latency limit. When the proportion of channels with a depth exceeding 16 is greater than 50%, it indicates that the channel is continuously under high load, and the previous control measures were insufficient; therefore, increased control measures are needed to obtain more bandwidth for this channel.

[0087] In this embodiment, the monitoring results from the previous time period and the set tolerance are used to dynamically evaluate whether the original control intensity can achieve the design expectation. A simple monitoring logic plus a tolerance comparison mechanism enables dynamic adaptive control of pathway behavior with relatively small logic resources.

[0088] In some embodiments, a cache depth high threshold TH2 is set for the depth monitoring comparison module 305, and a preset time limit of N cycles is set. When the cache usage depth is greater than TH2 for N consecutive cycles, the sum of the values ​​from the three modules mentioned above is selected to be output. When the cache usage depth is less than TH2 for N consecutive cycles, the output value of the priority statistics comparison module (highest priority) is selected to be output.

[0089] For example, based on the configuration above, let's continue with an example: When the depth usage is greater than or equal to the data volume threshold of 16 for four consecutive cycles (preset duration threshold), the cache monitoring module triggers the control condition and starts to increase the priority of channel B participating in arbitration; that is, when it is determined that the depth usage continuously reaches 16, the downstream priority needs to be increased to effectively alleviate congestion. When the buffer depth does not reach 16 for four consecutive cycles, the depth monitoring comparison module 305 determines that the current congestion is not serious, outputs select value=0, and the cache monitoring module 300 selects the highest priority value (value0) among the cached transactions, which is the output value of the priority statistics comparison module 302; when the buffer depth reaches 16 for four consecutive cycles, the depth monitoring comparison module 305 determines that the current congestion is serious, outputs select value=1, and the selection module 307 outputs value3, which is the output of the summation module 306.

[0090] The judgment in this embodiment does not depend on the state at a single moment, but is based on the state over N consecutive periods. This has the advantage of smoother intervention when dealing with dynamic traffic, avoiding frequent interventions, and fully utilizing cache space. The control method in this embodiment is based on the priority of existing transactions in the buffer, which better matches the priority strategy of the entire system and will not affect the overall system's priority strategy due to local adjustments. For example, the priority strategy of the entire system is: 0-2 is low priority, 3-5 is medium priority, and 6-7 is high priority. At a certain moment, three channels are competing. Channel A has a highest priority of 2 for cached transactions, channel B has a priority of 3, and channel C has a priority of 6. When the cache usage depth of channel A exceeds the set tolerance threshold, its channel QoS is adjusted to 3 to participate in the competition. At this time, the highest priority transaction in channel C (6) still enjoys absolute bandwidth allocation rights, while channel A, after adjustment, can share the remaining bandwidth allocation with channel B. If a transaction with a priority of 4 appears in channel B, the above adjustment still ensures that the transaction with a priority of 4 in channel B is more likely to obtain arbitration than that in channel A.

[0091] In some embodiments, when the cache module's cache size reaches 100%, the upstream circuit inputs value5 to the maximum value module 308. The maximum value module 308 compares value4 output by the selection module 307 with value5 input by the upstream circuit and takes the larger of the two as the output result (urgency out). When there is no value5 input by the upstream circuit, the maximum value module 308 outputs value4 output by the selection module 307. For example, if the cache module's depth utilization reaches 100%, i.e., back pressure occurs upstream, the upstream's high-priority information is input to the maximum value module through the urgency_in interface. The maximum value module compares the upstream's high-priority information with the output value of the selection module (value4 can be value0 or value3), expressed as the formula max(value5, value4). The above processing can take into account the back pressure of potentially higher-priority transactions upstream, and also consider the control output of the cache module, thus improving data processing efficiency.

[0092] In this embodiment, without relying on instantaneous states, a preset time interval can be used to determine whether the buffer depth exceeds a threshold due to continuous pressure rather than temporary fluctuations, effectively avoiding frequent priority adjustments. Essentially, a data flow anti-jitter mechanism is added to the priority adjustment process, making it more suitable for handling fluctuating data traffic scenarios. This embodiment evaluates the rationality of existing methods based on statistical results from the previous time period, adaptively and dynamically adjusting the intervention intensity, making it more suitable for the complex dynamic traffic of multi-path systems. It fully utilizes the buffer depth, preventing a single adjustment scheme from spreading congestion to other units in the on-chip network. Based on the burst characteristics of path traffic and the upstream's tolerance to backpressure, timely and proactive strengthening of control intensity allows for real-time adjustment of priorities according to the rate of change of buffer depth in each path, adapting to dynamic changes in data traffic and improving the system's ability to cope with dynamic traffic loads.

[0093] In another embodiment of this application, a chip is provided, which may include: the data processing device as described in any of the foregoing embodiments, or the data processing method as described in any of the foregoing embodiments.

[0094] In another embodiment of this application, an electronic device is provided, which includes a processor, wherein the processor includes: a data processing device as described in any of the foregoing embodiments, or a data processing method as described in any of the foregoing embodiments.

[0095] In summary, the above embodiments have provided a detailed explanation of the specific implementation of the aforementioned embodiments. It can be seen that through the technical solutions of the aforementioned embodiments, the cache monitoring module monitors different parameters of the cache module and generates corresponding parameters for adjusting the cache module based on the monitored parameters. These parameters include, but are not limited to, the highest priority of data processing, the preset data consumption rate, and the adjustment values ​​of the data volume threshold. Simultaneously, the cache monitoring module is also used to determine whether the data volume in the cache module is in a first state greater than a second data volume threshold. The first state can characterize whether the cache module is in a state of high resource storage for a long period. Based on whether the duration of the first state is greater than a preset duration threshold, it is determined whether to apply the adjustment values ​​of the highest priority of data processing, the preset data consumption rate, and the data volume threshold to data processing to alleviate data congestion upstream and downstream of the cache module. The highest priority is output downstream in every case, ensuring that the global priority strategy is not disrupted when optimizing local congestion. Whether to adjust the preset data consumption rate and the data volume threshold is not dependent on instantaneous values ​​but is determined based on the continuous duration of the first state, which can filter out short-term fluctuations and avoid misjudgments. It can improve the data processing efficiency of upstream and downstream of the cache module, while controlling the amount of data in the cache module appropriately, avoiding situations such as cache module overflow, upstream data blockage, or lack of data to be processed downstream of the cache module, thereby improving the adaptability of the on-chip network.

[0096] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed in this application can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0097] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the above-described apparatus and unit can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0098] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0099] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0100] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. If the functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium.

[0101] It should be noted that, in this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0102] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0103] The methods disclosed in the several method embodiments provided in this application can be arbitrarily combined without conflict to obtain new method embodiments.

[0104] The features disclosed in the several product embodiments provided in this application can be arbitrarily combined without conflict to obtain new product embodiments.

[0105] The features disclosed in the several method or device embodiments provided in this application can be arbitrarily combined without conflict to obtain new method or device embodiments.

[0106] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application.

Claims

1. A data processing apparatus, characterized in that, The device includes: a cache module, a cache monitoring module, and an arbitration module, wherein, The caching module is used to cache data; The cache monitoring module is used to determine the highest priority of data for different events in the cache module, wherein the highest priority is the priority of data processing; The cache monitoring module is further configured to determine the preset data consumption rate of the cache module based on the amount of data change within a first preset duration in the cache module, wherein the first preset duration is the total duration of multiple clock cycles prior to the current moment. The cache monitoring module is further configured to determine an adjustment value of the second data volume threshold of the cache module based on a first duration during which the data volume in the cache module is greater than the first data volume threshold, wherein the first data volume threshold is equal to the initial second data volume threshold, and the initial second data volume threshold is half of the total data storage volume of the cache module. The cache monitoring module is further configured to output the highest priority as the result when the amount of data in the cache module is in a first state that is greater than a second data amount threshold and the continuous duration of the first state is less than a first duration threshold, wherein the first duration threshold is less than the first preset duration. The cache monitoring module is further configured to output the highest priority, the preset data consumption rate, and the adjustment value as results when the amount of data in the cache module is in a first state that is greater than the second data amount threshold and the continuous duration of the first state is greater than the first duration threshold. The arbitration module is used to perform data processing based on the output result.

2. The apparatus according to claim 1, characterized in that, The cache monitoring module is also used to count the number of different events stored in the cache module; The priority adjustment value for each event is determined based on the number of each event, wherein the priority adjustment value is positively correlated with the number of events; The priority adjustment value is added to the preset priority of the corresponding event to obtain the actual priority of each event, and the highest priority among the actual priorities is selected.

3. The apparatus according to claim 1, characterized in that, The cache monitoring module is also used to obtain the first data volume of multiple first moments in the cache module within the first preset time period before the current moment, wherein there is at least one clock cycle between adjacent first moments. When the current data volume at the current moment is greater than the third data volume threshold, the difference between the current data volume and the minimum first data volume is taken as the data change amount, wherein the third data volume threshold is greater than the first data volume threshold and the second data volume threshold. When the amount of data change is greater than the data change threshold, a preset data consumption rate is determined according to the preset mapping relationship between the third data amount threshold and the consumption rate, wherein the data change threshold is less than the difference between the third data amount threshold and the first data amount threshold.

4. The apparatus according to claim 3, characterized in that, The cache monitoring module also includes multiple counters, one of which is used to store a first amount of data at the first moment; When the number of stored first data is equal to the number of counters, the first data stored in the target counter is overwritten with the latest acquired first data, wherein, among the plurality of counters, the target counter is the earliest counter corresponding to the first moment of the stored first data.

5. The apparatus according to claim 1, characterized in that, The cache monitoring module is further configured to obtain the first data volume of the cache module within a second preset time period before the current time, wherein the second preset time period is longer than the first preset time period; Determine the first duration of the second state within the second preset duration, wherein the second state is the state in which the first data volume is greater than the first data volume threshold; When the first duration is greater than the third duration threshold, the first preset value is used as the adjustment value; When the first duration is less than the third duration threshold, the second preset value is used as the adjustment value, wherein the second preset value is less than the first preset value.

6. The apparatus according to claim 5, characterized in that, The cache monitoring module is further configured to take the second time as the start time in response to the first data volume being less than the first data volume threshold before the second time and the first data volume being greater than the first data volume threshold after the second time. In response to the first data volume being greater than the first data volume threshold before the third time point and the first data volume being less than the first data volume threshold after the third time point, the third time point is taken as the termination time, wherein the third time point is located after the second time point; The duration between the start time and the end time is taken as the statistical duration of the second state; The first duration is obtained by summing the statistical durations corresponding to each of the second preset durations.

7. The apparatus according to any one of claims 1 to 6, characterized in that, When there are multiple cache modules, the arbitration module is further used to determine the target cache module based on the output results corresponding to the different cache modules, wherein the data stored in the target cache module is output to the downstream data processing unit.

8. The apparatus according to any one of claims 1 to 6, characterized in that, The cache monitoring module is also used to determine the first priority of data to be stored in the cache module when the amount of cached data in the cache module is equal to the total amount of cached data in the cache module; In response to the first priority being greater than the second priority of the data already stored in the cache module, the second priority is used as the output result.

9. A data processing method, characterized in that, The data processing method is implemented based on the data processing apparatus according to any one of claims 1 to 8, and the method includes: Data is cached using the caching module; Determine the highest priority of data for different events in the cache module; Based on the amount of data change within a first preset time period in the cache module, the preset data consumption rate of the cache module is determined, wherein the first preset time period is the total duration of multiple clock cycles prior to the current moment. Based on the first duration during which the amount of data in the cache module is greater than the first data amount threshold, an adjustment value for the second data amount threshold of the cache module is determined, wherein the first data amount threshold is equal to the initial second data amount threshold, and the initial second data amount threshold is half of the total data storage amount of the cache module; When the amount of data in the cache module is in a first state that is greater than the second data amount threshold, and the continuous duration of the first state is less than the first duration threshold, the highest priority is used as the output result, wherein the first duration threshold is less than the first preset duration. When the amount of data in the cache module is in a first state that is greater than the second data amount threshold, and the continuous duration of the first state is greater than the first duration threshold, the highest priority, the preset data consumption rate, and the adjustment value are used as the output results. Perform data processing based on the output results.

10. A chip, characterized in that, The chip includes: a data processing device as described in any one of claims 1 to 8.

11. An electronic device, characterized in that, The electronic device includes a processor, wherein the processor includes: a data processing device as described in any one of claims 1 to 8; Alternatively, a memory may be used to store computer-executable instructions or computer programs; a processor may be used to implement the data processing method of claim 9 when executing the computer-executable instructions or computer programs stored in the memory.

12. A computer-readable storage medium storing computer-executable instructions or a computer program, characterized in that, When the computer-executable instructions or computer program are executed by a processor, the data processing method of claim 9 is implemented.

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