Power semiconductor device and method for manufacturing power semiconductor device

Abstract

The purpose of the present invention is to provide a technique capable of improving the mechanical strength of a wiring conductor by means of a sealing member. The power semiconductor device is provided with: a plurality of wiring wires that connect at least one of the semiconductor elements, the metal circuit patterns, and the semiconductor elements and the metal circuit patterns, and that are provided along each other; and a first sealing member that seals the semiconductor element at a height lower than the maximum height of the wiring wires above the semiconductor element, covers the upper portions of the plurality of wiring wires in a shape formed along the shape of the upper portions, and fills between adjacent wiring wires.

Description

Technical Field

[0001] This disclosure relates to a power semiconductor device and a method for manufacturing a power semiconductor device. Background Technology

[0002] Various techniques have been proposed for power semiconductor devices in which semiconductor elements with connected wiring are sealed inside the housing with silicone resin. For example, in the technique of Patent Document 1, a technique is proposed that uses silicone resin to cover the loop portion of the wiring by temporarily raising the upper surface of the silicone resin disposed inside the housing under depressurization.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2011-044628

[0004] However, in existing technologies, the loop portion of the wiring conductor is only covered by a thin sealing component such as silicone resin. Therefore, the mechanical strength of the wiring conductor covered by the sealing component is relatively weak, leading to problems such as wire breakage. Summary of the Invention

[0005] Therefore, this disclosure is made in view of the aforementioned problems, and its object is to provide a technique that can improve the mechanical strength of wiring conductors by utilizing sealing components.

[0006] The power semiconductor device disclosed herein includes: a metal circuit pattern; a semiconductor element mounted on the metal circuit pattern; a plurality of wiring conductors connecting at least one of the semiconductor elements to each other, the metal circuit patterns to each other, and the semiconductor elements to the metal circuit patterns, and disposed along each other; a housing surrounding the semiconductor element when viewed from above; and a first sealing member sealing the semiconductor element at a height lower than the maximum height of the wiring conductors on the semiconductor element, and covering the upper portion of the wiring conductors in a shape formed along the upper portion of the plurality of wiring conductors, and filling the spaces between adjacent wiring conductors.

[0007] According to this disclosure, the first sealing member 7 covers the upper portion of the plurality of wiring conductors in a shape formed along the upper portion of the conductors and fills the spaces between adjacent wiring conductors. This structure improves the mechanical strength of the wiring conductors covered by the sealing member. Attached Figure Description

[0008] Figure 1 This is a cross-sectional view showing the structure of the power semiconductor device according to Embodiment 1.

[0009] Figure 2 This is a top view showing the structure of the power semiconductor device according to Embodiment 1.

[0010] Figure 3 This is a flowchart illustrating a first manufacturing method of the power semiconductor device according to Embodiment 1.

[0011] Figure 4 It is a schematic cross-sectional view representing an intermediate product of the first manufacturing method.

[0012] Figure 5 It is a schematic cross-sectional view representing an intermediate product of the first manufacturing method.

[0013] Figure 6 It is a schematic cross-sectional view representing an intermediate product of the first manufacturing method.

[0014] Figure 7 It is a schematic cross-sectional view representing an intermediate product of the first manufacturing method.

[0015] Figure 8 This is a flowchart illustrating a second manufacturing method for the power semiconductor device according to Embodiment 1.

[0016] Figure 9 It is a schematic cross-sectional view representing an intermediate product of the second manufacturing method.

[0017] Figure 10 It is a schematic cross-sectional view representing an intermediate product of the second manufacturing method.

[0018] Figure 11 It is a schematic cross-sectional view representing an intermediate product of the second manufacturing method.

[0019] Figure 12 This is a cross-sectional view showing the structure of the power semiconductor device according to Embodiment 2.

[0020] Figure 13 This is a cross-sectional view showing the structure of the power semiconductor device according to Embodiment 3.

[0021] Figure 14 This is a top view showing the structure of the power semiconductor device according to Embodiment 3.

[0022] Figure 15 This is a cross-sectional view showing the structure of the power semiconductor device according to Embodiment 4.

[0023] Figure 16 This is a top view showing the structure of the power semiconductor device involved in Embodiment 4.

[0024] Figure 17 This is a cross-sectional view showing the structure of the power semiconductor device according to Embodiment 5.

[0025] Figure 18This is a perspective view showing the structure of the power semiconductor device involved in Embodiment 5.

[0026] Figure 19 This is a perspective view showing the structure of the power semiconductor device involved in Embodiment 5.

[0027] Figure 20 This is a perspective view showing the structure of the power semiconductor device involved in Embodiment 5.

[0028] Figure 21 This is a cross-sectional view showing the structure of the power semiconductor device according to Embodiment 6.

[0029] Explanation of reference numerals in the attached figures

[0030] 1b…metal circuit pattern; 2…semiconductor element; 4…wiring wire; 4b…part; 5…housing; 7…first sealing component; 11…second sealing component; 17…sealing component; 18…cover; 18a…through hole; 18b…protrusion; 21…structure; 71…sealing substance. Detailed Implementation

[0031] The embodiments will now be described with reference to the accompanying drawings. The features described in the following embodiments are illustrative, and not all features are essential. Furthermore, in the following description, the same or similar reference numerals are used to denote the same constituent elements in multiple embodiments; the description mainly focuses on the different constituent elements. Additionally, in the following description, specific positions and directions such as "upper," "lower," "left," "right," "outer," or "inner" do not necessarily correspond to the actual positions and directions in the implementation.

[0032] <Implementation Method 1>

[0033] Figure 1 and Figure 2 These are cross-sectional and top views showing the structure of the power semiconductor device according to Embodiment 1. The power semiconductor device according to Embodiment 1 includes a circuit board 1 serving as a base plate, a semiconductor element 2, a bonding member 3, wiring wires 4, a housing 5, an external output terminal 6, and a first sealing member 7.

[0034] The circuit board 1 includes an insulating layer 1a, a metal circuit pattern 1b, and a metal plate 1c. The metal circuit pattern 1b is provided on the upper surface of the insulating layer 1a, and the metal plate 1c is provided on the lower surface of the insulating layer 1a. The circuit board 1 according to this embodiment 1 may be, for example, a DBC (Direct Bonded Copper) substrate or an IMB (Insulated Metal Baseplate). The metal circuit pattern 1b may also be a lead frame of a transfer mold structure. Alternatively, it may be a full transfer mold structure without the insulating layer 1a and the metal plate 1c.

[0035] Semiconductor element 2 includes, for example, at least one of MOSFET (Metal Oxide Semiconductor Field Effect Transistor), IGBT (Insulated Gate Bipolar Transistor), RC-IGBT (Reverse Conducting IGBT), SBD (Schottky Barrier Diode), and PND (PN junction diode). In this specification, for example, "at least one of A, B, C, ..., Z" means any one of all combinations obtained by selecting more than one from the group of A, B, C, ..., Z.

[0036] The semiconductor element 2 can be made of conventional silicon (Si), or it can be a wide-bandgap semiconductor such as silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), or diamond. When the semiconductor element 2 is made of a wide-bandgap semiconductor, stable operation at high temperatures and high voltages, as well as high-speed switching, can be achieved.

[0037] Semiconductor element 2 is mounted on metal circuit pattern 1b. The number of semiconductor elements 2 mounted on metal circuit pattern 1b may be one or more. Semiconductor element 2 transmits and receives electrical signals with an external device (not shown) via at least one of metal circuit pattern 1b, wiring wire 4, and external output terminal 6.

[0038] The bonding component 3 electrically and mechanically connects the semiconductor element 2 to the metal circuit pattern 1b. The bonding component 3 is, for example, solder, sintering material, or conductive adhesive.

[0039] Multiple wiring wires 4 connect at least one of the following: semiconductor elements 2 to each other, metal circuit patterns 1b to each other, and semiconductor elements 2 to metal circuit patterns 1b. In this embodiment 1, the multiple wiring wires 4 not only connect these to each other, but also connect the external output terminal 6 to the metal circuit pattern 1b.

[0040] The wiring conductor 4 is connected to the lead of the semiconductor element 2 or other connecting object in such a way as having a looped upper portion. Figure 2 In the diagram, the junction 4a of the wiring conductor 4, which serves as the part for lead connection, is shown in a generally circular shape. For example... Figure 2 As shown, multiple wiring conductors 4 are arranged along each other. That is, the multiple wiring conductors 4 are arranged to be parallel or substantially parallel to each other. The material of the wiring conductors 4 is, for example, copper or aluminum, but is not limited to these.

[0041] The housing 5 is insulating and is fixed to the outer periphery of the insulating layer 1a, surrounding the semiconductor element 2 when viewed from above. In this embodiment 1, an opening is provided at the top of the housing 5, but the opening of the housing 5 is not necessary in this embodiment 1.

[0042] The external output terminal 6 is integrated with the housing 5, and a portion of the external output terminal 6 is located on the outside of the housing 5.

[0043] The first sealing component 7 is an insulating thermosetting resin containing 10-50% by weight of resin and 90-50% by weight of filler. The first sealing component 7 is surrounded by the housing 5 and seals the semiconductor element 2 at a height lower than the maximum height of the wiring conductor 4 above the semiconductor element 2.

[0044] The first sealing component 7 involved in this embodiment 1 includes sealing portions 7a, 7b, and 7c. For example... Figure 1 As shown, the sealing portion 7a covers the upper portion in a shape formed along the upper part of the plurality of wiring conductors 4. Figure 2 As shown, the sealing portion 7b fills the space between adjacent wiring conductors 4. (As indicated...) Figure 1 As shown, the sealing portion 7c is filled in the portion 4b whose height reaches the maximum value in the wiring conductor 4, between the semiconductor element 2 or the metal circuit pattern 1b.

[0045] Furthermore, in this embodiment 1, the first sealing member 7 is formed in a shape that covers the entire upper portion of the plurality of wiring conductors 4, but this is not a limitation. Additionally, in this embodiment 1, the linear expansion coefficient of the first sealing member 7 is less than or equal to the linear expansion coefficient of the wiring conductors 4, but this is not a limitation. Furthermore, in this embodiment 1, the elastic modulus of the first sealing member 7 is less than or equal to the elastic modulus of the wiring conductors 4 when deformed by 0.2%, but this is not a limitation.

[0046] Furthermore, in this embodiment 1, a filler with a specific gravity of 2 or more is added to the first sealing member 7, but it is not limited to this. Additionally, in this embodiment 1, the material of the filler is, for example, at least one of BN (boron nitride), AlN (aluminum nitride), and Al2O3 (aluminum oxide), but it is not limited to this.

[0047] <First Manufacturing Method>

[0048] Figure 3 This is a flowchart illustrating the first manufacturing method of the power semiconductor device according to Embodiment 1. Figures 4-7 It is a schematic cross-sectional view of an intermediate product obtained during the first manufacturing process.

[0049] First, in step S1, as Figure 4 As shown, a structure 21 is prepared, comprising a metal circuit pattern 1b, a semiconductor element 2, multiple wiring wires 4, and a housing 5.

[0050] In step S2, as Figure 4 As shown, a sealing material 71, serving as the first sealing member 7, is placed inside the housing 5. Figure 4 The image shows the state in which liquid sealing material 71 is injected into the inside of the housing 5 from the injection nozzle 13 of the injection device, but it is not limited to this. For example, a sealing material of granular form (not shown) may also be placed inside the housing 5.

[0051] In step S3, the sealing material 71 is heated to a first temperature (low temperature) under reduced pressure. Thus, as... Figure 5 and Figure 6 As shown, the air bubble 14 within the sealing material 71 expands, causing the upper surface of the sealing material 71 to rise above the wiring conductor 4. Subsequently, the air bubble 14 is removed from the sealing material 71, causing the upper surface of the sealing material 71 to descend. However, due to the surface tension of the sealing material 71, a portion of the sealing material 71 remains in the portions serving as sealing parts 7a, 7b, and 7c.

[0052] In step S4, as Figure 7As shown, the sealing material 71, which has been heated to a first temperature, is heated to a second temperature (high temperature) higher than the first temperature. As a result, the sealing material 71 is thermally cured to become the first sealing component 7.

[0053] <Second Manufacturing Method>

[0054] Figure 8 This is a flowchart illustrating the second manufacturing method of the power semiconductor device according to Embodiment 1. Figures 9-11 It is a schematic cross-sectional view of an intermediate product obtained during the second manufacturing process.

[0055] First, in step S11, similarly to step S1 above, as follows: Figure 9 As shown, a structure 21 is prepared, comprising a metal circuit pattern 1b, a semiconductor element 2, multiple wiring wires 4, and a housing 5.

[0056] In step S12, as Figure 9 As shown, on the upper side of the housing 5, i.e. the upper side of the wiring conductor 4, one or more sheet-shaped sealing materials 71 serving as the first sealing member 7 are placed.

[0057] In step S13, the sheet-shaped sealing material 71 is heated at a first temperature (low temperature) under reduced pressure. Thus, as... Figure 10 As shown, the sheet-shaped sealing material 71 is liquefied, causing the upper surface of the sealing material 71 to descend. However, due to the surface tension of the sealing material 71, a portion of the sealing material 71 remains in the portions serving as sealing parts 7a, 7b, and 7c. Preferably, air bubbles are not incorporated into the sealing material 71 during this process, but even if air bubbles are incorporated into the sealing material 71, the air bubbles are removed from the sealing material 71 in the same manner as in the first manufacturing method.

[0058] In step S14, as Figure 11 As shown, the sealing material 71, which has been heated to a first temperature, is heated to a second temperature (high temperature) higher than the first temperature. As a result, the sealing material 71 is thermally cured to become the first sealing component 7.

[0059] <Summary of Implementation Method 1>

[0060] According to the power semiconductor device of Embodiment 1 described above, the first sealing member 7 covers the upper portion of the plurality of wiring conductors 4 in a shape formed along the upper portion of the conductors 4 and fills the spaces between adjacent wiring conductors 4. With this structure, the mechanical strength of the wiring conductors 4 in the direction in which the adjacent wiring conductors 4 are arranged can be improved by the first sealing member 7 filling the spaces between adjacent wiring conductors 4, thus suppressing wire breakage.

[0061] Furthermore, as described in Embodiment 1, the first sealing member 7 may also be filled between the portion 4b in the wiring conductor 4 where the height reaches its maximum value and the semiconductor element 2 or the metal circuit pattern 1b. With this structure, the entire loop portion of the wiring conductor 4 is bound by the first sealing member 7, thereby further improving the mechanical strength of the wiring conductor 4.

[0062] However, to improve the filling properties of the seal, it is necessary to heat the seal to reduce its viscosity, but the viscosity is still high at this point. Therefore, especially when the seal is thick, the seal solidifies in a state where air bubbles are trapped inside, resulting in a decrease in insulation withstand voltage.

[0063] Therefore, the first sealing member 7 preferably seals the semiconductor element 2 at a height lower than the maximum height of the wiring conductors 4 above the semiconductor element 2, and preferably the thickness of the first sealing member 7 is so thin that it covers the entire upper part of the plurality of wiring conductors 4 in a shape formed along the entire upper part of the wiring conductors 4. With such a structure, the removal of air bubbles before the first sealing member 7 is cured can be improved, the filling performance of the first sealing member 7 is enhanced, and thus the insulation withstand voltage between parts with different applied voltages (hereinafter referred to as "between different potentials") can be improved. In addition, since the filling amount of the first sealing member 7 can be reduced, the power semiconductor device can be made lighter, and the scattering of the first sealing member 7 to the outside of the housing 5 generated when removing air bubbles from the first sealing member 7 can also be suppressed.

[0064] Furthermore, in this embodiment 1, the linear expansion coefficient of the first sealing member 7 is less than or equal to the linear expansion coefficient of the wiring conductor 4. With this structure, the deformation of the first sealing member 7 covering the wiring conductor 4 is less than the deformation of the wiring conductor 4 in terms of the amount of deformation caused by thermal expansion during temperature cycling, thus suppressing deformation and breakage of the wiring conductor 4.

[0065] Furthermore, in this embodiment 1, the elastic modulus of the first sealing member 7 is less than or equal to the elastic modulus of the wiring conductor 4 when the deformation is 0.2%. With this structure, by mitigating the deformation of the wiring conductor 4 during temperature cycling, the internal stress of the wiring conductor 4 can be reduced, thus suppressing wire breakage.

[0066] Furthermore, in this embodiment 1, a filler with a specific gravity of 2 or higher is added to the first sealing member 7. Normally, high-specific-gravity fillers in sealing members tend to settle before curing, but in this embodiment 1, since the first sealing member 7 is relatively thin, it is less affected by filler settling. Therefore, the internal stress of the first sealing member 7 caused by the difference in filler content at the upper and lower parts of the first sealing member 7 can be mitigated.

[0067] Furthermore, in this embodiment 1, the filler material added to the first sealing member 7 is, for example, at least one of BN (boron nitride), AlN (aluminum nitride), and Al2O3 (aluminum oxide). With this structure, it is expected that the temperature of the upper part of the semiconductor element 2 will be more uniform, heat dissipation will be improved, and thermal stress will be reduced.

[0068] Furthermore, in the first manufacturing method according to Embodiment 1, the sealing material 71 inside the housing 5 is heated at a first temperature under reduced pressure, causing the upper surface of the sealing material 71 to rise to the upper side of the wiring conductor 4 and then fall. Based on this structure, a first sealing member 7 can be easily formed, with a shape formed along the upper part of the plurality of wiring conductors 4, covering the upper part and filling the spaces between adjacent wiring conductors 4.

[0069] Furthermore, in the second manufacturing method according to Embodiment 1, the upper surface of the sealing material 71 placed on the upper side of the wiring conductor 4 is lowered by heating it at a first temperature under reduced pressure. With this structure, a first sealing member 7 can be easily formed, with a shape formed along the upper part of the plurality of wiring conductors 4, covering the upper part and filling the spaces between adjacent wiring conductors 4.

[0070] <Implementation Method 2>

[0071] Figure 12 This is a cross-sectional view showing the structure of the power semiconductor device according to Embodiment 2. The structure of Embodiment 2 is similar to that in... Figure 1 The structure is identical to that of the structure with the addition of a second sealing component 11, which is an insulating thermosetting resin.

[0072] The second sealing member 11 covers the upper part of the first sealing member 7. This structure allows for a longer insulation distance between different potentials, thereby improving the insulation withstand voltage between different potentials.

[0073] Furthermore, the viscosity of the curing agent contained in the second sealing component 11 before curing can also be lower than the viscosity of the curing agent contained in the first sealing component 7 before curing. With this structure, the first sealing component 7 can be covered by the second sealing component 11, which is easier to remove air bubbles from during manufacturing than the first sealing component 7, thus further improving the insulation withstand voltage between different potentials.

[0074] Furthermore, the molecular weight of the curing agent contained in the second sealing component 11 before curing can be smaller than the molecular weight of the curing agent contained in the first sealing component 7 before curing. Moreover, when the power semiconductor device is completed, the molecular weight of the curing agent contained in the second sealing component 11 can also be smaller than the molecular weight of the curing agent contained in the first sealing component 7. Even with such a structure, the first sealing component 7 can be covered by the second sealing component 11, which is easier to remove air bubbles from during manufacturing than the first sealing component 7, thus further improving the insulation withstand voltage between different potentials.

[0075] Furthermore, the second sealing component 11 can also be made of the same material as the first sealing component 7. This structure allows for easy management of the sealing components.

[0076] <Implementation Method 3>

[0077] Figure 13 and Figure 14 These are cross-sectional and top views showing the structure of the power semiconductor device according to Embodiment 3. Among them, in Figure 14 The illustration of the second sealing component 11 is omitted.

[0078] In this embodiment 3, when viewed from above, the first sealing member 7 is only disposed on the metal circuit pattern 1b that is bonded to the semiconductor element 2. The rest of the structure is the same as that of embodiment 2.

[0079] With this structure, a second sealing member 11 can be provided between the metal circuit patterns 1b. Therefore, when a component that is easier to remove air bubbles from during manufacturing than the first sealing member 7 is used for the second sealing member 11, the insulation withstand voltage between the metal circuit patterns 1b, i.e., between different potentials, can be improved.

[0080] <Implementation Method 4>

[0081] Figure 15 and Figure 16 These are cross-sectional and top views showing the structure of the power semiconductor device according to Embodiment 4. Among them, in Figure 16 The illustration of the second sealing component 11 is omitted.

[0082] In this embodiment 4, when viewed from above, the first sealing member 7 is only disposed on top of the semiconductor element 2. The rest of the structure is the same as that of embodiment 2.

[0083] With this structure, a second sealing member 11 can be provided between the semiconductor elements 2. Therefore, when a component that is easier to remove air bubbles from during manufacturing than the first sealing member 7 is used for the second sealing member 11, the insulation withstand voltage between the semiconductor elements 2, i.e., between different potentials, can be improved.

[0084] <Implementation Method 5>

[0085] Figure 17 This is a cross-sectional view showing the structure of the power semiconductor device according to Embodiment 5. Figures 18-20 This is a perspective view showing the structure of the power semiconductor device according to Embodiment 5. Embodiment 5 is similar to... Figure 1 The structure is the same as that in which a sealing component 17, which is an insulating thermosetting resin, is provided instead of the first sealing component 7, and a cover 18 is added.

[0086] The sealing member 17 is surrounded by the housing 5 and seals the semiconductor element 2. However, the upper surface of the sealing member 17 is different from the upper surface of the first sealing member 7 and is approximately planar. A cover 18 is provided at the opening of the housing 5, and a plurality of through holes 18a are provided in the cover 18.

[0087] In cases where the goal is to remove air bubbles from the sealing member 17 before its solidification by expanding the air bubbles within it using the decompression and heating methods described in Embodiment 1, the upper surface of the sealing member 17 rises due to the air bubbles. According to the power semiconductor device of Embodiment 5, the corner of the periphery of the through-hole 18a in the lower part of the cover 18 can contact the rising air bubbles and break them. Therefore, it is possible to prevent the sealing member 17 from overflowing outside the housing 5 and to suppress the presence of air bubbles within the sealing member 17.

[0088] Furthermore, to reduce the number of parts, the cover 18 can be part of the housing 5. The shape of the through hole 18a can be, for example, as shown in... Figure 18 That is a slit shape, which can be like Figure 19 That is polygonal in shape, and can be like Figure 20 It can be a circular shape, or it can be any other shape. In addition, this embodiment 5 can also be used in embodiments 1 to 4.

[0089] <Implementation Method 6>

[0090] Figure 21 This is a cross-sectional view showing the structure of the power semiconductor device according to Embodiment 6. In Embodiment 6, in Figure 17 In the structure, instead of the multiple through holes 18a provided in the cover 18, multiple protrusions 18b that taper toward the sealing member 17 are provided on the surface of the cover 18 on the side of the sealing member 17.

[0091] According to the power semiconductor device of this embodiment 6, the protrusion 18b of the cover 18 can contact the rising air bubble and break it. Therefore, it is possible to suppress the sealing member 17 from overflowing outside the housing 5 and to prevent air bubbles from remaining inside the sealing member 17. Furthermore, according to... Figure 21 The structure of the cover 18, which almost completely seals the opening of the housing 5, also prevents the sealing element 17 from flying out of the housing 5.

[0092] Furthermore, to reduce the number of components, the cover 18 can be part of the housing 5. The protrusion 18b can also be specifically provided at a location on the upper surface of the sealing member 17 where it can easily rise. In addition, this embodiment 6 can also be used in embodiments 1 to 4.

[0093] Furthermore, in this English disclosure, 'a' and 'an' mean more than one. Therefore, 'a', 'an', 'one or more', and 'at least one' can be used to mean the same thing.

[0094] Furthermore, it is possible to freely combine the various embodiments and variations, or to make appropriate modifications or omissions to the various embodiments and variations.

[0095] The various methods disclosed herein will be recorded hereafter as appendices.

[0096] (Postscript 1)

[0097] A power semiconductor device, wherein,

[0098] have:

[0099] Metal circuit patterns;

[0100] Semiconductor components are mounted on the aforementioned metal circuit pattern;

[0101] Multiple wiring conductors connect at least one of the semiconductor elements to each other, the metal circuit patterns to each other, and the semiconductor elements to the metal circuit patterns, and are arranged along each other;

[0102] A housing, which surrounds the aforementioned semiconductor element when viewed from above; and

[0103] The first sealing member seals the semiconductor element at a height lower than the maximum height of the wiring conductors above the semiconductor element, and covers the upper part in a shape formed along the upper part of the plurality of wiring conductors, and fills the spaces between adjacent wiring conductors.

[0104] (Postscript 2)

[0105] According to the power semiconductor device described in Appendix 1, wherein,

[0106] The linear expansion coefficient of the first sealing component is less than or equal to the linear expansion coefficient of the wiring conductor.

[0107] (Note 3)

[0108] According to the power semiconductor device described in Appendix 1 or 2, wherein,

[0109] The elastic modulus of the first sealing component is less than or equal to the elastic modulus of the wiring conductor when the deformation is 0.2%.

[0110] (Note 4)

[0111] According to any one of the appendices 1 to 3, the power semiconductor device, wherein,

[0112] It also includes a second sealing component that covers the upper part of the first sealing component.

[0113] (Note 5)

[0114] According to the power semiconductor device described in Appendix 4, wherein,

[0115] When viewed from above, the first sealing component is only disposed on the metal circuit pattern that is bonded to the semiconductor element.

[0116] (Note 6)

[0117] According to the power semiconductor device described in Appendix 4 or 5, wherein,

[0118] The molecular weight of the curing agent contained in the second sealing component is less than that of the curing agent contained in the first sealing component.

[0119] (Note 7)

[0120] According to the power semiconductor device described in Appendix 4, wherein,

[0121] When viewed from above, the first sealing component is only located on top of the semiconductor element.

[0122] (Postscript 8)

[0123] According to any one of the appendices 1 to 7, the power semiconductor device, wherein,

[0124] The first sealing component mentioned above contains filler with a specific gravity of 2 or higher.

[0125] (Note 9)

[0126] A power semiconductor device, wherein,

[0127] have:

[0128] Semiconductor components;

[0129] The housing surrounds the semiconductor element when viewed from above, and has an opening at the top.

[0130] A sealing component, surrounded by the aforementioned housing, and sealing the aforementioned semiconductor element; and

[0131] A cover is provided at the opening described above in the aforementioned housing.

[0132] The cover has multiple through holes.

[0133] (Postscript 10)

[0134] A power semiconductor device, wherein,

[0135] have:

[0136] Semiconductor components;

[0137] The housing surrounds the semiconductor element when viewed from above, and has an opening at the top.

[0138] A sealing component, surrounded by the aforementioned housing, and sealing the aforementioned semiconductor element; and

[0139] A cover is provided at the opening described above in the aforementioned housing.

[0140] On the surface of the cover on the side of the sealing member, there are a plurality of protrusions that taper toward the sealing member.

[0141] (Postscript 11)

[0142] A method for manufacturing a power semiconductor device, comprising the method for manufacturing the power semiconductor device described in any one of Appendices 1 to 8, wherein,

[0143] have:

[0144] A process for preparing a structure comprising the aforementioned metal circuit pattern, the aforementioned semiconductor element, the aforementioned plurality of wiring conductors, and the aforementioned housing;

[0145] The process of placing the sealing material that becomes the first sealing member on the inner side of the aforementioned housing;

[0146] The process of heating the sealing material at a first temperature under reduced pressure, causing the upper surface of the sealing material to rise to the upper side of the wiring conductor and then descending; and

[0147] The process of heating the sealing material, which has been heated to the first temperature, to the second temperature, which is higher than the first temperature, to form the first sealing component.

[0148] (Postscript 12)

[0149] A method for manufacturing a power semiconductor device, comprising the method for manufacturing the power semiconductor device described in any one of Appendices 1 to 8, wherein,

[0150] have:

[0151] A process for preparing a structure comprising the aforementioned metal circuit pattern, the aforementioned semiconductor element, the aforementioned plurality of wiring conductors, and the aforementioned housing;

[0152] The process of placing a sealing material, which becomes the first sealing component, on the upper side of the aforementioned wiring conductor;

[0153] The process of lowering the upper surface of the sealing material by heating it at a first temperature under reduced pressure; and

[0154] The process of heating the sealing material, which has been heated to the first temperature, to the second temperature, which is higher than the first temperature, to form the first sealing component.

[0155] (Postscript 13)

[0156] A method for manufacturing a power semiconductor device, comprising the method for manufacturing the power semiconductor device described in Appendix 4 or 5, wherein,

[0157] The viscosity of the curing agent contained in the second sealing component before curing is lower than the viscosity of the curing agent contained in the first sealing component before curing.

[0158] (Postscript 14)

[0159] A method for manufacturing a power semiconductor device, comprising the method for manufacturing the power semiconductor device described in Appendix 4 or 5, wherein,

[0160] The molecular weight of the curing agent contained in the second sealing component before curing is less than the molecular weight of the curing agent contained in the first sealing component before curing.

Claims

1. A power semiconductor device, wherein, have: Metal circuit patterns; Semiconductor components are mounted on the metal circuit pattern; Multiple wiring conductors connect at least one of the semiconductor elements to each other, the metal circuit patterns to each other, and the semiconductor elements to the metal circuit patterns, and are arranged along each other; A housing that surrounds the semiconductor element when viewed from above; as well as The first sealing member seals the semiconductor element at a height lower than the maximum height of the wiring conductors above the semiconductor element, and covers the upper portion in a shape formed along the upper portion of the plurality of wiring conductors, and fills the spaces between adjacent wiring conductors.

2. The power semiconductor device according to claim 1, wherein, The linear expansion coefficient of the first sealing component is lower than or equal to the linear expansion coefficient of the wiring conductor.

3. The power semiconductor device according to claim 1 or 2, wherein, The elastic modulus of the first sealing component is less than or equal to the elastic modulus of the wiring conductor when the deformation is 0.2%.

4. The power semiconductor device according to any one of claims 1 to 3, wherein, It also includes a second sealing component that covers the upper part of the first sealing component.

5. The power semiconductor device according to claim 4, wherein, When viewed from above, the first sealing component is disposed only on the metal circuit pattern that is coupled to the semiconductor element.

6. The power semiconductor device according to claim 4 or 5, wherein, The molecular weight of the curing agent contained in the second sealing component is less than that of the curing agent contained in the first sealing component.

7. The power semiconductor device according to claim 4, wherein, When viewed from above, the first sealing component is positioned only on top of the semiconductor element.

8. The power semiconductor device according to any one of claims 1 to 7, wherein, The first sealing component contains filler with a specific gravity of 2 or higher.

9. A method for manufacturing a power semiconductor device, comprising the method for manufacturing the power semiconductor device according to any one of claims 1 to 8, wherein, have: A process for preparing a structure comprising the metal circuit pattern, the semiconductor element, the plurality of wiring conductors, and the housing; The process of placing a sealing material, which becomes the first sealing component, on the inner side of the housing; The process of raising the upper surface of the sealing material to the upper side of the wiring conductor and then lowering it by heating the sealing material at a first temperature under reduced pressure; and The process of heating the sealing material at the first temperature to a second temperature higher than the first temperature to form the first sealing component.

10. A method for manufacturing a power semiconductor device, comprising the method for manufacturing the power semiconductor device according to any one of claims 1 to 8, wherein, have: A process for preparing a structure comprising the metal circuit pattern, the semiconductor element, the plurality of wiring conductors, and the housing; The process of placing a sealing material, which becomes the first sealing component, on the upper side of the wiring conductor; The process of lowering the upper surface of the sealing material by heating it at a first temperature under reduced pressure; and The process of heating the sealing material at the first temperature to a second temperature higher than the first temperature to form the first sealing component.

11. A method for manufacturing a power semiconductor device, comprising the method for manufacturing the power semiconductor device according to claim 4 or 5, wherein, The viscosity of the curing agent contained in the second sealing component before curing is less than the viscosity of the curing agent contained in the first sealing component before curing.

12. A method for manufacturing a power semiconductor device, comprising the method for manufacturing the power semiconductor device according to claim 4 or 5, wherein, The molecular weight of the curing agent contained in the second sealing component before curing is less than that of the curing agent contained in the first sealing component before curing.

13. A power semiconductor device, wherein, have: Semiconductor components; The housing surrounds the semiconductor element when viewed from above and has an opening at the top; A sealing component, surrounded by the housing, seals the semiconductor element; as well as A cover is provided at the opening in the housing. The cover has multiple through holes.

14. A power semiconductor device, wherein, have: Semiconductor components; The housing surrounds the semiconductor element when viewed from above and has an opening at the top; A sealing component, surrounded by the housing, seals the semiconductor element; as well as A cover is provided at the opening in the housing. On the surface of the cover on the side of the sealing member, there are a plurality of protrusions that taper toward the sealing member.

Images