Test systems, methods, apparatus, equipment and storage media

Abstract

This application discloses a testing system, method, apparatus, device, and storage medium. The testing system includes: a host computer with a first interactive bus interface and a second interactive bus interface; a testing verification module, which includes a second test command interactive interface, a set of test function interfaces, a set of external device interfaces, a control module, an interface bus collection module, an internal test scheme module, and an external test interface module. The control module is connected to the second interactive bus interface through the second test command interactive interface. The interface bus collection module is connected to the set of test function interfaces through the set of test function interfaces. The external test interface module is connected to external devices through the set of external device interfaces. The internal test scheme module is used to test the board management controller under test, and the external test interface module is used to connect external devices to assist in testing the board management controller under test. This application enables efficient testing of the board management controller.

Description

Technical Field

[0001] This application relates to the field of baseboard management controller technology, and in particular to a test system, method, apparatus, device and storage medium. Background Technology

[0002] As a chassis management device, the integrity and reliability of the Baseboard Management Controller (BMC) are of great importance to the safe and stable operation of the chassis. Therefore, reliable testing of the Baseboard Management Controller has a significant and far-reaching impact on the subsequent application of the BMC.

[0003] Currently, common BMCs generally adopt a phased process of software platform simulation, hardware interface testing, and real application scenario testing. Different phases require different testing environments and test code, resulting in a large testing workload. Furthermore, it is often necessary to repeatedly test between different phases, leading to low testing efficiency and long cycles. Summary of the Invention

[0004] This application aims to provide a testing system, method, apparatus, equipment, and storage medium that enables efficient testing of board management controllers.

[0005] A test system according to a first aspect embodiment of this application is used to test a substrate under test (TBT) management controller, wherein the TDT management controller has a first test command interaction interface and a set of test function interfaces; the test system includes:

[0006] The host computer has a first interactive bus interface and a second interactive bus interface, and the first interactive bus interface is connected to the first test command interactive interface.

[0007] The test and verification module includes a second test command interaction interface, a set of test function interfaces, a set of external device interfaces, a control module, an interface bus collection module, an internal test scheme module, and an external test interface module. The control module is connected to the second interaction bus interface through the second test command interaction interface. The interface bus collection module is connected to the set of test function interfaces through the set of test function interfaces. The external test interface module is connected to external devices through the set of external device interfaces. The internal test scheme module is used to test the board under test management controller, and the external test interface module is used to connect to the external devices to assist in testing the board under test management controller.

[0008] The control module is used to acquire test commands and preset reference results issued by the host computer, complete the test of the board under test management controller through the external device and the external test interface module, or complete the test of the board under test management controller through the internal test scheme module, and collect the test results and upload them to the host computer.

[0009] According to some embodiments of this application, the control module includes:

[0010] The test control module is connected to the second interactive bus interface through the second test command interaction interface. It is used to receive and parse the test commands and the preset reference results issued by the host computer, and to issue the parsed test scheme configuration command and / or test result acquisition command and the preset reference results, as well as to receive test results and upload them to the host computer.

[0011] The test plan control module is connected to the test control module, the interface bus collection module, the internal test plan module, and the external test interface module, respectively. It is used to receive and parse the test plan configuration command issued by the test control module, and send the parsed test plan control configuration information to the interface bus collection module, the internal test plan module, and the external test interface module for configuration.

[0012] The test result collection module is connected to the test control module, the internal test scheme module, and the external test interface module, respectively. It is used to receive the test result acquisition command and the preset reference result issued by the test control module, issue the preset reference result, collect test results from the internal test scheme module and the external test interface module, and upload the test results to the test control module.

[0013] According to some embodiments of this application, the interface bus collection module includes:

[0014] The interface connection configuration module is connected to the test scheme control module;

[0015] The interface connection selection module has a set of connection interfaces, a first set of selected connection interfaces, and a second set of selected connection interfaces. The set of connection interfaces is used to connect to the set of test function interfaces. The first set of selected connection interfaces is used to connect to the internal test scheme module, and the second set of selected connection interfaces is used to connect to the external test interface module. The interface connection configuration module is used to receive the test scheme control configuration information issued by the test scheme control module and configure the interface connection selection module.

[0016] According to some embodiments of this application, the internal testing scheme module includes:

[0017] First interface mapping management module;

[0018] The preset scheme module connects to the first selected connection interface set through the first interface mapping management module to test the management controller of the substrate under test and obtain the test generation results;

[0019] The first interface mapping configuration module is connected to the test scheme control module, the first interface mapping management module and the preset scheme module, and is used to receive the test scheme control configuration information issued by the test scheme control module, and to configure the first interface mapping management module and the preset scheme module.

[0020] The first status feedback module is connected to the test result collection module and the preset scheme module. It is used to receive the preset reference result sent by the test result collection module and the test generation result sent by the preset scheme module, compare the test generation result with the preset reference result, obtain the test result, and upload it to the test result collection module.

[0021] According to some embodiments of this application, the external test interface module includes:

[0022] The second interface mapping management module connects the external device interface set to the second selected connection interface set through the second interface mapping management module.

[0023] The second interface mapping configuration module is connected to the test scheme control module and the second interface mapping management module. It is used to receive the test scheme control configuration information issued by the test scheme control module and to configure the second interface mapping management module.

[0024] The second status feedback module is connected to the test result collection module and the second interface mapping management module. It is used to receive the preset reference result sent by the test result collection module and the test generation result sent by the second interface mapping management module, compare the test generation result with the preset reference result, obtain the test result, and upload it to the test result collection module.

[0025] According to some embodiments of this application, there are n substrate management controllers under test, the host computer has n first interactive bus interfaces, the test verification module has n sets of the test function interfaces, and the interface bus collection module includes n interface connection selection modules.

[0026] In this configuration, the first test command interaction interface of each of the board under test management controllers is connected to a first interaction bus interface, and each of the interface connection selection modules is connected to the set of test function interfaces through the set of test function interfaces.

[0027] The testing method according to a second aspect of the present invention is applied to the testing system described in the first aspect of the present invention, the testing method comprising the following steps:

[0028] Obtain the test configuration command issued by the host computer;

[0029] Parse the test configuration command to obtain the test scheme control configuration information;

[0030] The test scheme control configuration information is sent to the interface bus collection module and the internal test scheme module, or to the interface bus collection module and the external test interface module; wherein, upon receiving the test scheme control configuration information, the interface bus collection module, the internal test scheme module, and the external test interface module configure according to the test scheme control configuration information and generate configuration status feedback information;

[0031] Obtain the configuration status feedback information and upload it to the host computer;

[0032] Obtain the test start command issued by the host computer; wherein the test start command is generated when the host computer detects the configuration status feedback information; the test start command is synchronously transmitted to the board under test management controller, so that the internal test scheme module completes the test of the board under test management controller, or the external device and the external test interface module complete the test of the board under test management controller, and obtain the test generation result;

[0033] The test start command is parsed to obtain a preset reference result;

[0034] Obtain the test results;

[0035] The test result is obtained by comparing the preset reference result with the test generated result.

[0036] The test results are uploaded to the host computer.

[0037] The test apparatus according to a third aspect embodiment of this application includes:

[0038] The first acquisition module is used to acquire test configuration commands issued by the host computer;

[0039] The first parsing module is used to parse the test configuration command to obtain the test scheme control configuration information;

[0040] The distribution module is used to distribute the test plan control configuration information to the interface bus collection module and the internal test plan module, or to the interface bus collection module and the external test interface module; wherein, upon receiving the test plan control configuration information, the interface bus collection module, the internal test plan module, and the external test interface module configure according to the test plan control configuration information and generate configuration status feedback information;

[0041] The second acquisition module is used to acquire the configuration status feedback information and upload it to the host computer.

[0042] The third acquisition module is used to acquire the test start command issued by the host computer; wherein the test start command is generated when the host computer detects the configuration status feedback information; the test start command is synchronously transmitted to the board under test management controller, so that the internal test scheme module completes the test of the board under test management controller, or the external device and the external test interface module complete the test of the board under test management controller, and obtain the test generation result;

[0043] The second parsing module is used to parse the test start command and obtain a preset reference result;

[0044] The fourth acquisition module is used to acquire the test generation results;

[0045] The comparison module is used to compare the preset reference result with the test generated result to obtain the test result;

[0046] The upload module is used to upload the test results to the host computer.

[0047] An electronic device according to a fourth aspect of this application includes a processor and a memory, the memory storing a program or instructions executable on the processor, the program or instructions, when executed by the processor, implementing the steps of the test method as described in any of the first aspects of the present application.

[0048] A computer-readable storage medium according to a fifth aspect embodiment of the present application stores computer-executable instructions for performing the test method as described in the first aspect embodiment above.

[0049] In this embodiment, the testing system has a test verification module that integrates an internal test scheme module and an external test interface module that can connect to external devices. It also possesses the capability to perform tests using both internal virtual functional object test schemes and external real peripheral test objects, making it widely applicable. Furthermore, the testing method based on this system is highly flexible. Once the underlying scheme is preset, the test scheme, test objects, test quantity, specific test interfaces, and specific functional modules can all be uniformly configured and test result statistics can be performed through upper-level software, improving testing efficiency. This application proposes a testing system and method that covers the entire process from virtual platform test schemes to hardware interface test schemes and real application scenario test schemes, effectively improving the efficiency, reliability, convenience, automation, and versatility of baseboard management controller testing.

[0050] Other features and advantages of this application will be set forth in the following description and will be apparent in part from the description or may be learned by practicing the application. Attached Figure Description

[0051] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:

[0052] Figure 1 This is a schematic block diagram of the test system of this application;

[0053] Figure 2 This is a schematic block diagram of the interface bus collection module of the test system of this application;

[0054] Figure 3 This is a schematic block diagram of the internal test scheme module of the test system of this application;

[0055] Figure 4 This is a schematic block diagram of the external test interface module of the test system of this application;

[0056] Figure 5 This is a flowchart illustrating an embodiment of the testing method of this application;

[0057] Figure 6 This is a schematic diagram of the structure of an embodiment of the testing device of this application;

[0058] Figure 7 This is a schematic diagram of the hardware structure of an embodiment of the electronic device of this application. Detailed Implementation

[0059] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0060] In the description of this application, the use of terms such as "first," "second," etc., is for the purpose of distinguishing technical features only and should not be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated or the order of the technical features indicated.

[0061] In the description of this application, it should be understood that the orientation descriptions, such as up, down, etc., are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0062] In the description of this application, it should be noted that, unless otherwise explicitly defined, terms such as "setup," "installation," and "connection" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this application in conjunction with the specific content of the technical solution.

[0063] The technical solution of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the embodiments described below are some embodiments of this application, not all embodiments.

[0064] Figure 1 This is a schematic block diagram of the test system of this application; Figure 2 This is a schematic block diagram of the interface bus collection module of the test system of this application; Figure 3 This is a schematic block diagram of the internal test scheme module of the test system of this application; Figure 4 This is a schematic block diagram of the external test interface module of the test system of this application; Figure 5 This is a flowchart illustrating an embodiment of the testing method of this application; Figure 6 This is a schematic diagram of the structure of an embodiment of the testing device of this application; Figure 7 This is a schematic diagram of the hardware structure of an embodiment of the electronic device of this application. See below. Figures 1 to 7 The embodiments of this application will be further described below.

[0065] like Figures 1 to 4 As shown in the embodiment of this application, a test system is proposed for testing a board under test (BUT) management controller. The BUT management controller has a first test command interaction interface and a set of test function interfaces. The test system includes:

[0066] The host computer has a first interactive bus interface and a second interactive bus interface, and the first interactive bus interface is connected to the first test command interactive interface.

[0067] The test and verification module includes a second test command interaction interface, a set of test function interfaces, a set of external device interfaces, a control module, an interface bus collection module, an internal test scheme module, and an external test interface module. The control module is connected to the second interaction bus interface through the second test command interaction interface. The interface bus collection module is connected to the set of test function interfaces through the set of test function interfaces. The external test interface module is connected to external devices through the set of external device interfaces. The internal test scheme module is used to test the management controller of the board under test, and the external test interface module is used to connect external devices to assist in testing the management controller of the board under test.

[0068] The control module is used to obtain test commands and preset reference results issued by the host computer, complete the test of the management controller of the substrate under test through external devices and external test interface modules, or complete the test of the management controller of the substrate under test through internal test scheme modules, and collect test results and upload them to the host computer.

[0069] In this embodiment, the testing system has a test verification module that integrates an internal test scheme module and an external test interface module that can connect to external devices. It also possesses the capability to perform tests using both internal virtual functional object test schemes and external real peripheral test objects, making it widely applicable. Furthermore, the testing method based on this system is highly flexible. Once the underlying scheme is preset, the test scheme, test objects, test quantity, specific test interfaces, and specific functional modules can all be uniformly configured and test result statistics can be performed through upper-level software, improving testing efficiency. This application proposes a testing system and method that covers the entire process from virtual platform test schemes to hardware interface test schemes and real application scenario test schemes, effectively improving the efficiency, reliability, convenience, automation, and versatility of baseboard management controller testing.

[0070] The aforementioned host computer connects to the first test command interaction interface via the first interaction bus interface to connect with the management controller of the substrate under test, and connects to the second test command interaction interface via the second interaction bus interface to connect with the control module in the test verification module.

[0071] The host computer first sends commands to the control module to enable the test and verification module to complete the corresponding configuration. Then, it sends commands to the control module and the management controller of the substrate under test again. The management controller of the substrate under test starts to execute the test process. The control module collects the test results and uploads them to the host computer. The host computer classifies and statistically analyzes the results, forms a log file, and completes the test and verification of the management controller of the substrate under test.

[0072] The aforementioned Board Under Test (BMC) management controller is a device under test (DUT). Each BMC includes a first test command interaction interface and a set of function interfaces to be tested. There can be multiple BMCs under test, meaning the test system in this application can be applied to testing multiple BMCs and BMC clusters. The first test command interaction interface serves as the communication interface connecting the host computer, the test verification module, and each BMC controller. Specifically, it can be a communication interface such as UART, SPI, QSPI, I2C, or a network interface that enables inter-board data exchange. The set of function interfaces to be tested serves as the interaction interface set for the BMC under test to connect to the test verification module and complete various functions. Specifically, it can be a set of interfaces such as UART, SPI, QSPI, I2C, CAN, GPIO, JTAG, SDIO, and sGPIO.

[0073] In the aforementioned test and verification module, the interface bus collection module is connected to the BMC under test on one side and to the internal test scheme module and the external test interface module connected to external devices on the other side. The internal test scheme module contains preset test schemes, while the external test interface module enables test schemes to be performed in conjunction with external devices. The control module completes the configuration and preparation work of other modules in the test and verification module according to the information received from the host computer, and then completes the required test and verification, and collects the test results and uploads them back to the host computer. Through the test and verification module, the BMC under test can complete various test types and test scenarios without changing the wiring method, based on the control commands of the host computer.

[0074] The aforementioned external devices can be host devices or auxiliary verification devices and modules, specifically, flash memory, LEDs, temperature sensors, fans, CPUs, FPGAs, CPLDs, etc. These external devices can assist in the testing and verification of the BMC, such as testing whether the BMC can properly cooperate with the auxiliary verification devices to perform specified operations.

[0075] like Figure 1 As shown, in some embodiments, the control module includes:

[0076] The test control module is connected to the second interactive bus interface through the second test command interaction interface. It is used to receive and parse the test commands and preset reference results issued by the host computer, and to issue the parsed test scheme configuration commands and / or test result acquisition commands and preset reference results, as well as to receive test results and upload them to the host computer.

[0077] The test plan control module is connected to the test control module, the interface bus collection module, the internal test plan module, and the external test interface module, respectively. It is used to receive and parse the test plan configuration commands issued by the test control module, and send the parsed test plan control configuration information to the interface bus collection module, the internal test plan module, and the external test interface module for configuration.

[0078] The test result collection module is connected to the test control module, the internal test plan module, and the external test interface module. It is used to receive test result acquisition commands and preset reference results issued by the test control module, issue preset reference results, collect test results from the internal test plan module and the external test interface module, and upload the test results to the test control module.

[0079] In this embodiment, the test control module receives and parses instructions from the host computer, then transmits the parsed information to the test scheme control module and the test result collection module. Simultaneously, it accurately uploads the test results to the host computer, ensuring efficient information flow and playing a crucial role in bridging the gap between the upper and lower levels. The test scheme control module, based on its instructions, precisely configures the interface bus collection module, internal test scheme module, and external test interface module, enabling each module to work collaboratively according to the preset test scheme to perform the required BMC tests. The test result collection module is responsible for collecting the test results from the internal test scheme module and the external test interface module, and uploading them to the test control module, which then further uploads them to the host computer, forming a complete closed loop.

[0080] The test commands issued by the host computer to the control module include test configuration commands issued before the test begins and test start commands issued after the configuration is completed and the test begins.

[0081] In some cases, the test control module parses the received test configuration commands to obtain test scheme configuration commands, which are then sent to the test scheme control module. The test scheme control module parses the test scheme control configuration information and sends it to the interface bus collection module, internal test scheme module, and external test interface module accordingly, completing the configuration of each module. This ensures that the corresponding BMC under test connects to the corresponding internal test scheme module or external test interface module, completing the necessary pre-test preparations. Specifically, the test scheme configuration commands may include interface bus flow configuration commands, test scheme selection configuration commands, external test interface mapping configuration commands, and other specific configuration commands corresponding to the specific sending modules.

[0082] In some cases, the test control module can also obtain the status information of each configured module through the test result collection module and upload it to the host computer to determine whether the configuration is successful. Specifically, the status information of each module may include interface bus flow status information, test scheme selection status information, external test interface mapping status information, etc.

[0083] In some cases, the test control module parses the received test start command to obtain the test result acquisition command. Specifically, the test result acquisition command can include commands corresponding to different levels, such as internal test plan module-level verification command, internal test plan system-level verification command, device-level module verification command, and device-level system verification command, to obtain test results at different levels.

[0084] In some cases, the test control module receives test results and uploads them to the host computer. Specifically, test results can include internal test plan module-level verification results, internal test plan system-level verification results, device-level module verification results, device-level system verification results, and so on, corresponding to different levels of test results. It can be understood that the level of the test result retrieval command corresponds to the level of the retrieved test result.

[0085] The preset reference results issued by the host computer are further sent to the internal test scheme module and the external test interface module through the test result collection module. The internal test scheme module and the external test interface module compare the test results generated after their own tests with the received preset reference results to obtain the final test results. Then, they send the test results to the test result collection module, which collects them and uploads them to the test control module, and finally uploads them to the host computer.

[0086] In some cases, the test control module will send the received preset reference results to the test result collection module; specifically, the preset reference results may include internal test verification reference results and external test verification reference feedback results.

[0087] like Figure 2 As shown, in some embodiments, the interface bus collection module includes:

[0088] The interface connection configuration module connects to the test plan control module.

[0089] The interface connection selection module has a set of connection interfaces, a first set of selected connection interfaces, and a second set of selected connection interfaces. The set of connection interfaces is used to connect to the set of test function interfaces, the first set of selected connection interfaces is used to connect to the internal test scheme module, and the second set of selected connection interfaces is used to connect to the external test interface module. The interface connection configuration module is used to receive test scheme control configuration information issued by the test scheme control module and configure the interface connection selection module.

[0090] In this embodiment, the interface selection module uses a set of connection interfaces to connect to the BMC under test, a first set of connection interfaces to connect to the internal test scheme module, and a second set of connection interfaces to connect to the external test interface module. The interface configuration module flexibly configures the interface selection module according to the instructions and information issued by the test scheme control module. Therefore, through the interface selection module and the interface configuration module, different tests on the BMC under test can be performed simply by issuing different instructions from the host computer, without the need for manual wiring adjustments.

[0091] In some implementations, the number of interface connection selection modules is the same as the number of BMCs under test.

[0092] like Figure 3 As shown, in some implementations, the internal test scheme module includes:

[0093] First interface mapping management module;

[0094] The preset scheme module connects to the first selected connection interface set through the first interface mapping management module, which is used to test the management controller of the substrate under test and obtain the test generation results;

[0095] The first interface mapping configuration module is connected to the test plan control module, the first interface mapping management module, and the preset plan module. It is used to receive test plan control configuration information issued by the test plan control module and to configure the first interface mapping management module and the preset plan module.

[0096] The first status feedback module is connected to the test result collection module and the preset scheme module. It is used to receive the preset reference results sent by the test result collection module and the test generated results sent by the preset scheme module, compare the test generated results with the preset reference results, obtain the test results, and upload them to the test result collection module.

[0097] In this embodiment, the first interface mapping configuration module receives internal scheme test configuration information from the test scheme control module, and completes the configuration of the first interface mapping management module and the preset scheme module according to the configuration information; the first status feedback module receives the preset reference result from the test result collection module, and at the same time receives the test generation result from the preset scheme module during the test verification process, and reports the test result to the test result collection module after comparing the results.

[0098] In some cases, the first state feedback module can send preset reference results to the preset scheme module. The preset scheme module then performs the test, automatically compares the results, and obtains the test results. The first state feedback module then collects these test results and uploads them to the test result collection module. In other cases, the preset scheme module has its own preset reference results, eliminating the need to obtain them from the host computer.

[0099] like Figure 3 As shown, in some implementations, there can be multiple preset scheme modules, allowing for testing of the BMC under test using various different schemes. In some cases, the internal test scheme module includes m preset scheme modules, such as... Figure 3 As shown, it includes scheme 1, scheme 2, ..., scheme m.

[0100] like Figure 4 As shown, in some implementations, the external test interface module includes:

[0101] The second interface mapping management module connects the external device interface set to the second selected connection interface set.

[0102] The second interface mapping configuration module is connected to the test plan control module and the second interface mapping management module. It is used to receive test plan control configuration information issued by the test plan control module and to configure the second interface mapping management module.

[0103] The second status feedback module is connected to the test result collection module and the second interface mapping management module. It is used to receive the preset reference results sent by the test result collection module and the test generated results sent by the second interface mapping management module, compare the test generated results with the preset reference results, obtain the test results, and upload them to the test result collection module.

[0104] In this embodiment, the second interface mapping configuration module receives interface mapping information from the test scheme control module and configures the second interface mapping management module according to the mapping information. The second status feedback module receives the preset verification reference result issued by the test result collection module and compares the test generation result fed back by the external device through the interface mapping management module (specifically, it can be a verification feedback message) with the preset reference result to obtain the test result, which is then reported to the test result collection module. In some cases, the mapping configuration status of the second interface mapping management module can also be reported to the test result collection module.

[0105] like Figure 4 As shown, in some embodiments, there are n management controllers for the substrate under test, n first interactive bus interfaces for the host computer, n sets of test function interfaces for the test verification module, and n interface bus collection modules including n interface connection selection modules.

[0106] In this configuration, the first test command interaction interface of each board under test management controller is connected to a first interaction bus interface, and each interface connection selection module is connected to a set of test function interfaces through a set of test function interfaces.

[0107] In this embodiment, batch testing can be performed, reducing the workload of hardware replacement. Due to the design of n sets of test interface sets C and interface bus collection modules, n BMC objects can be tested simultaneously when using an internal virtual testing scheme. When using an external real testing scheme, a pipelined cyclic testing scheme can be used to test n BMCs sequentially, reducing the workload of frequently replacing BMC controllers.

[0108] Specifically, in some cases, there are n BMCs to be tested, such as Figure 1 As shown, the system includes BMC_1, BMC_2, ..., BMC_n. Therefore, the host computer has n first interactive bus interfaces, each corresponding to a first test command interaction interface J1, J2, ..., Jn of the n BMCs under test. Specifically, the host computer connects to BMC_1 via J1, BMC_2 via J2, and BMC_n via Jn. The host computer's second interactive bus interface is connected to the second test command interaction interface J0 of the test and verification module. J0, J1, J2, ..., Jn serve as communication interfaces connecting the host computer, the test and verification module, and each BMC controller. These interfaces can be UART, SPI, QSPI, I2C, network interfaces, or other communication interfaces that enable inter-board data exchange.

[0109] Specifically, in some cases, there are n BMCs to be tested, such as Figure 1As shown, including BMC_1, BMC_2, ..., BMC_n, the interface bus collection module of the test verification module has n sets of test function interfaces, which are connected one-to-one with the n sets of test function interfaces C1, C2, ..., Cn of the n BMCs under test. Specifically, the interface bus collection module of the test verification module is connected to BMC_1 through C1, to BMC_2 through C2, and to BMC_n through Cn. Among them, the test function interface sets C1, C2, ..., Cn are the interaction interface sets for the BMCs under test to connect to the test verification module to complete various functions, and can be interface sets such as UART, SPI, QSPI, I2C, CAN, GPIO, JTAG, SDIO, sGPIO, etc.

[0110] Specifically, in some cases, there are n BMCs to be tested, such as Figure 1 As shown, the interface bus collection module includes BMC_1, BMC_2, ..., BMC_n. It comprises n interface connection selection modules, namely Interface Connection Selection 1, Interface Connection Selection 2, ..., Interface Connection Selection n. Therefore, the n interface connection selection modules are connected to the n BMCs under test through n sets of test function interfaces, corresponding one-to-one with the n sets of test function interfaces C1, C2, ..., Cn of the n BMCs under test. Specifically, Interface Connection Selection 1 of the interface bus collection module connects to BMC_1 via C1, Interface Connection Selection 2 connects to BMC_2 via C2, and Interface Connection Selection n connects to BMC_n via Cn.

[0111] like Figures 1 to 4 As shown, in some implementations, there are n BMCs to be tested, such as... Figure 1 As shown, the interface bus collection module includes BMC_1, BMC_2, ..., BMC_n, which includes n interface connection selection modules, namely interface connection selection 1, interface connection selection 2, ..., interface connection selection n in the figure. The second interface mapping management module of the external test interface module has n interface sets, such as... Figure 4 As shown, including A1, A2, ..., An, the first interface mapping management module of the internal test scheme module has n interface sets, such as... Figure 3As shown, including B1, B2, ..., Bn, the n interface connection selection modules of the interface bus collection module are respectively connected to the external test interface module through A1, A2, ..., An, and connected to the internal test scheme module through B1, B2, ..., Bn. Specifically, interface connection selection 1 of the interface bus collection module is connected to the external test interface module through A1 and to the internal test scheme module through B1; interface connection selection 2 is connected to the external test interface module through A2 and to the internal test scheme module through B2; and interface connection selection n is connected to the external test interface module through An and to the internal test scheme module through Bn.

[0112] In this embodiment, n interface connection selection modules select configuration information according to their respective interface connection selections to realize the data flow direction of the set of interfaces under test C connected to them, and select to flow data with external test interface modules or internal test scheme modules.

[0113] like Figure 4 As shown in the figure, in some implementations, the second interface mapping management module of the external test interface module has n interface sets, including A1, A2, ..., An.

[0114] In this embodiment, the second interface mapping management module selectively connects the n interface sets A1, A2, ..., An to the interfaces of external devices according to the configuration information issued by the second interface mapping configuration module.

[0115] like Figure 3 As shown in the figure, in some implementations, the first interface mapping management module of the internal test scheme module has n interface sets, as shown in the figure, including B1, B2, ..., Bn. The internal test scheme module includes n preset scheme modules, as shown in the figure, including scheme 1, scheme 2, ..., scheme m.

[0116] In this embodiment, the first interface mapping management module completes the connection configuration between different functional interfaces in n interface sets B1, B2, ..., Bn and m preset scheme modules, namely scheme 1, scheme 2, ..., scheme m, according to the configuration information issued by the first interface mapping configuration module, so as to realize different verification schemes. The m scheme modules perform verification tests on the corresponding functional interfaces of the first interface mapping management module according to the configuration information issued by the first interface mapping configuration module and the preset reference results issued by the first status feedback module, obtain test generation results, obtain test results by comparing them with the preset reference results, and report the test results to the first status feedback module.

[0117] like Figure 5As shown in the embodiments of this application, a testing method is also proposed. This method can be applied to the above-mentioned testing system, specifically to the control module of the above-mentioned testing system. The testing method includes the following steps:

[0118] Step 101: Obtain the test configuration command issued by the host computer;

[0119] Step 102: Parse the test configuration commands to obtain the test scheme control configuration information;

[0120] Step 103: Send the test plan control configuration information to the interface bus collection module and the internal test plan module, or to the interface bus collection module and the external test interface module; wherein, upon receiving the test plan control configuration information, the interface bus collection module, the internal test plan module, and the external test interface module configure according to the test plan control configuration information and generate configuration status feedback information.

[0121] Step 104: Obtain configuration status feedback information and upload it to the host computer;

[0122] Step 105: Obtain the test start command issued by the host computer; wherein, the test start command is generated when the host computer detects the configuration status feedback information; the test start command is synchronously transmitted to the management controller of the board under test, so that the internal test scheme module can complete the test of the management controller of the board under test, or the external device and external test interface module can complete the test of the management controller of the board under test, and obtain the test generation result.

[0123] Step 106: Analyze the test startup command to obtain the preset reference results;

[0124] Step 107: Obtain the test results;

[0125] Step 108: Compare the preset reference results with the generated test results to obtain the test results;

[0126] Step 109: Upload the test results to the host computer.

[0127] In this embodiment, the BMC is effectively verified in four dimensions: virtual verification of module functions, virtual verification of the overall solution, real verification of module functions, and real verification of the overall solution. It can be used from the design stage, functional verification stage to stress testing stage of the BMC controller, without the need for repeated testing in different testing stages. The overall testing process is efficient, convenient, and highly automated.

[0128] In the above process, the host computer first sends a test configuration command to the control module. The control module receives and parses the command, and then controls the entire test verification module to complete the corresponding configuration, including the interface bus collection module, the internal test scheme module, and the external test interface module. After configuration, configuration status feedback information needs to be obtained. When the feedback information is normal, it indicates that the configuration is completed normally, and subsequent steps can be performed; otherwise, reconfiguration is required. After configuration, the host computer sends a test start command to the control module. At the same time, it also sends a command to the board management controller under test to start the test, so that the board management controller under test starts to execute the test process and generate test results. The control module obtains the test results and compares them with the preset reference results obtained from the command sent by the host computer to determine whether the test results are correct. This determines whether the test of the board management controller under test has passed, and the test results are obtained. Finally, the test results are uploaded to the host computer, which classifies and statistically analyzes them to form a log file, completing the test verification of the board management controller under test.

[0129] In some cases, preset reference results can be included in the test configuration command and set during the configuration process.

[0130] In some implementations, the internal virtual object module testing process of this application includes the following steps:

[0131] Step 1: The host computer sends an internal virtual object module configuration command to the test control module of the control module in the test verification module via J0;

[0132] Step 2: After receiving the configuration command, the test control module parses out the test plan control configuration information and sends the test plan control configuration information to the test plan control module.

[0133] Step 3: After receiving the test plan control configuration information, the test plan control module configures the interface bus collection module, the external test interface module, and the internal test plan module respectively.

[0134] Step 4: The interface bus collection module configures the specific test function interface set C (one or more BMC modules can be selected for testing) and the specific function interface subset within the interface set (different function interfaces of different BMCs can be tested) according to the received configuration information. The interface set connection is configured to connect to the internal test scheme module. After the configuration is completed, the configuration status is fed back to the test result collection module.

[0135] Step 5: The internal test scheme module sets up specific preset test scheme modules and preset reference results based on the received configuration information, and after configuration is completed, it sends configuration status feedback to the test result collection module.

[0136] Step 6: After the test result collection module receives the configuration completion information of the above modules, it sends a configuration completion signal to the control module. The control module then sends a configuration completion signal to the host computer via J0.

[0137] Step 7: After receiving the test and verification module configuration completion signal, the host computer sends the module test start command to the BMC cluster through J1, J2, ..., Jn respectively;

[0138] Step 8: After receiving the start command, each BMC cluster starts its module testing function and sends the corresponding function information through the test interface sets C1, C2, ..., Cn respectively.

[0139] Step 9: The interface bus collection module selects a subset of functional interfaces from the selected BMC objects, receives / sends relevant data according to the configured protocol information, and sends it to the internal test scheme module.

[0140] Step 10: The internal test plan module performs data feedback and result comparison on the received test data based on the configured test plan and preset reference results, and obtains the test results.

[0141] Step 11: The internal test solution module sends the test results to the host computer;

[0142] Step 12: Repeat steps 1 to 11 until all modules have been tested for all functions and the host computer has completed the preset number of loop tests.

[0143] In the following embodiments, the overall testing process of the internal virtual objects of this application is similar to the above process, and will not be repeated here.

[0144] In some implementations, the external real object module testing process of this application includes the following steps:

[0145] Step 1: The host computer module sends the external real object module configuration command to the test control module of the control module in the test verification module through J0;

[0146] Step 2: After receiving the configuration command, the test control module parses out the test plan control configuration information and sends the test plan control configuration information to the test plan control module.

[0147] Step 3: After receiving the test plan control configuration information, the test plan control module configures the interface bus collection module, the external test interface module, and the internal test plan module respectively.

[0148] Step 4: The interface bus collection module configures the specific test function interface set C (one or more BMC modules can be selected for testing) and the specific function interface subset within the interface set (different function interfaces of different BMCs can be tested) according to the received configuration information. The interface set connection is configured to connect to the external test interface module. After the configuration is completed, the configuration status is fed back to the test result collection module.

[0149] Step 5: The external test interface module sets up the specific test interface subset to connect to the corresponding external device interface subset according to the received configuration information, and sets up the corresponding bypass verification scheme. After the configuration is completed, it sends the configuration status feedback to the test result collection module.

[0150] Step 6: After the test result collection module receives the configuration completion information of the above modules, it sends a configuration completion signal to the control module. The control module then sends a configuration completion signal to the host computer via J0.

[0151] Step 7: After receiving the test and verification module configuration completion signal, the host computer sends the module test start command to the BMC cluster through J1, J2, ..., Jn respectively;

[0152] Step 8: After receiving the start command, each BMC cluster starts its module testing function and sends the corresponding function information through the test interface sets C1, C2, ..., Cn respectively.

[0153] Step 9: The interface bus collection module selects a subset of functional interfaces from the selected BMC objects, receives / sends relevant data according to the configured protocol information, and sends it to the external test interface module.

[0154] Step 10: The external test interface module obtains the test results based on the comparison results of the configured bypass verification scheme and the relevant feedback information from the external device.

[0155] Step 11: The external test interface module sends the test results to the host computer;

[0156] Step 12: Repeat steps 1 to 11 until all modules have been tested for all functions and the host computer has completed the preset number of loop tests.

[0157] In some implementations, the overall testing process for the external real object of this application is similar to the process described above, and will not be repeated here.

[0158] The testing method provided in this application can be executed by a testing device 200. This application uses the testing device 200 executing the testing method as an example to illustrate the testing device 200 provided in this application.

[0159] Please see Figure 6This is a schematic diagram of the structure of a testing device 200 provided in an embodiment of this application. Figure 6 As shown, the testing apparatus 200 includes:

[0160] The first acquisition module 201 is used to acquire test configuration commands issued by the host computer;

[0161] The first parsing module 202 is used to parse the test configuration commands and obtain the test scheme control configuration information.

[0162] The distribution module 203 is used to distribute test plan control configuration information to the interface bus collection module and the internal test plan module, or to the interface bus collection module and the external test interface module; wherein, upon receiving the test plan control configuration information, the interface bus collection module, the internal test plan module, and the external test interface module configure according to the test plan control configuration information and generate configuration status feedback information.

[0163] The second acquisition module 204 is used to acquire configuration status feedback information and upload it to the host computer.

[0164] The third acquisition module 205 is used to acquire the test start command issued by the host computer; wherein, the test start command is generated when the host computer detects the configuration status feedback information; the test start command is synchronously transmitted to the management controller of the substrate under test, so that the internal test scheme module can complete the test of the management controller of the substrate under test, or the external device and external test interface module can complete the test of the management controller of the substrate under test, and obtain the test generation result.

[0165] The second parsing module 206 is used to parse the test start command and obtain preset reference results;

[0166] The fourth acquisition module 207 is used to acquire the test generation results;

[0167] Comparison module 208 is used to compare the preset reference results with the test generated results to obtain the test results;

[0168] Upload module 209 is used to upload test results to the host computer.

[0169] Since the testing device 200 adopts all the technical solutions of the testing method of the above embodiments, it has at least all the beneficial effects brought about by the technical solutions of the above embodiments, and will not be described again here.

[0170] Figure 7 This is a schematic diagram of the hardware structure of the electronic device provided in the embodiments of this application.

[0171] This electronic device may include a processor 301 and a memory 302 storing computer program instructions.

[0172] Specifically, the processor 301 may include a central processing unit (CPU), an application-specific integrated circuit (ASIC), or one or more integrated circuits that can be configured to implement the embodiments of this application.

[0173] Memory 302 may include mass storage for data or instructions. For example, and not limitingly, memory 302 may include a hard disk drive (HDD), floppy disk drive, flash memory, optical disk, magneto-optical disk, magnetic tape, or Universal Serial Bus (USB) drive, or a combination of two or more of these. Where appropriate, memory 302 may include removable or non-removable (or fixed) media. Where appropriate, memory 302 may be internal or external to the integrated gateway disaster recovery device. In a particular embodiment, memory 302 is non-volatile solid-state memory.

[0174] In some embodiments, memory 302 may include read-only memory (ROM), random access memory (RAM), disk storage media device, optical storage media device, flash memory device, electrical, optical, or other physical / tangible memory storage device. Thus, generally, memory includes one or more tangible (non-transitory) computer-readable storage media (e.g., memory devices) encoded with software including computer-executable instructions, and when the software is executed (e.g., by one or more processors), it is operable to perform the operations described with reference to the method according to one aspect of this disclosure.

[0175] The processor 301 implements any of the testing methods described in the above embodiments by reading and executing computer program instructions stored in the memory 302.

[0176] In one example, the electronic device may also include a communication interface 303 and a bus 310. For example, Figure 7 As shown, the processor 301, memory 302, and communication interface 303 are connected through bus 310 and complete communication with each other.

[0177] The communication interface 303 is mainly used to realize communication between various modules, devices, units and / or equipment in the embodiments of this application.

[0178] Bus 310 includes hardware, software, or both, that couples components of an online data traffic metering device together. For example, and not limitingly, the bus may include an Accelerated Graphics Port (AGP) or other graphics bus, an Enhanced Industry Standard Architecture (EISA) bus, a Front Side Bus (FSB), HyperTransport (HT) interconnect, an Industry Standard Architecture (ISA) bus, an Infinite Bandwidth Interconnect, a Low Pin Count (LPC) bus, a memory bus, a Microchannel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association Local (VLB) bus, or other suitable buses, or combinations of two or more of these. Where appropriate, bus 310 may include one or more buses. Although specific buses are described and illustrated in embodiments of this application, any suitable bus or interconnect is contemplated herein.

[0179] The electronic device can perform the test methods described in the embodiments of this application, thereby achieving the combination Figure 5 and Figure 6 The test methods and apparatus described.

[0180] Furthermore, in conjunction with the testing methods in the above embodiments, this application embodiment can provide a computer storage medium for implementation. This computer storage medium stores computer program instructions; when these computer program instructions are executed by a processor, they implement any of the testing methods in the above embodiments.

[0181] It should be clarified that this application is not limited to the specific configurations and processes described above and shown in the figures. For the sake of brevity, detailed descriptions of known methods are omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of this application is not limited to the specific steps described and shown. Those skilled in the art can make various changes, modifications, and additions, or change the order of steps, after understanding the spirit of this application.

[0182] The functional blocks shown in the above-described block diagram can be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, they can be electronic circuits, application-specific integrated circuits (ASICs), appropriate firmware, plug-ins, function cards, etc. When implemented in software, the elements of this application are programs or code segments used to perform the required tasks. Programs or code segments can be stored on a machine-readable medium or transmitted over a transmission medium or communication link via data signals carried on a carrier wave. "Machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, fiber optic media, radio frequency (RF) links, etc. Code segments can be downloaded via computer networks such as the Internet, intranets, etc.

[0183] It should also be noted that the exemplary embodiments mentioned in this application describe methods or systems based on a series of steps or apparatus. However, this application is not limited to the order of the above steps; that is, the steps can be performed in the order mentioned in the embodiments, or in a different order, or several steps can be performed simultaneously.

[0184] The aspects of this disclosure have been described above with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this disclosure. It should be understood that each block in the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that these instructions, executable via the processor of the computer or other programmable data processing apparatus, enable the implementation of the functions / actions specified in one or more blocks of the flowchart illustrations and / or block diagrams. Such a processor can be, but is not limited to, a general-purpose processor, a special-purpose processor, a special application processor, or a field-programmable logic circuit. It is also understood that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can also be implemented by special-purpose hardware performing the specified functions or actions, or can be implemented by a combination of special-purpose hardware and computer instructions.

[0185] The above description is merely a specific implementation of this application. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, modules, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here. It should be understood that the protection scope of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the protection scope of this application.

Claims

1. A test system, characterized by, A test system for testing a to-be-tested board management controller, the to-be-tested board management controller having a first test command interaction interface and a set of to-be-tested function interface groups; The test system comprises: A host computer having a first interaction bus interface and a second interaction bus interface, the first interaction bus interface being connected with the first test command interaction interface; A test verification module, the test verification module comprising a second test command interaction interface, a set of test function interface groups, a set of external device interface groups, a control module, an interface bus collection module, an internal test scheme module and an external test interface module, the control module being connected with the second interaction bus interface through the second test command interaction interface, the interface bus collection module being connected with the to-be-tested function interface groups through the test function interface groups, the external test interface module being connected with external devices through the external device interface groups; wherein the internal test scheme module is configured to test the to-be-tested board management controller, and the external test interface module is configured to connect the external devices to assist in testing the to-be-tested board management controller; The control module is configured to obtain a test command and a preset reference result issued by the host computer, complete the test of the to-be-tested board management controller through the external devices and the external test interface module, or complete the test of the to-be-tested board management controller through the internal test scheme module, and collect the test result and upload the test result to the host computer.

2. The test system of claim 1, wherein, The control module comprises: A test control module connected with the second interaction bus interface through the second test command interaction interface, configured to receive and analyze the test command and the preset reference result issued by the host computer, issue a test scheme configuration command and / or a test result acquisition command obtained by analysis and the preset reference result, and receive the test result and upload the test result to the host computer; A test scheme control module connected with the test control module, the interface bus collection module, the internal test scheme module and the external test interface module, respectively, configured to receive and analyze the test scheme configuration command issued by the test control module, and issue test scheme control configuration information obtained by analysis to the interface bus collection module, the internal test scheme module and the external test interface module for configuration; A test result collection module connected with the test control module, the internal test scheme module and the external test interface module, respectively, configured to receive the test result acquisition command and the preset reference result issued by the test control module, issue the preset reference result, collect the test result of the internal test scheme module and the external test interface module, and upload the test result to the test control module.

3. The test system of claim 2, wherein, The interface bus collection module comprises: An interface connection configuration module connected with the test scheme control module; The interface connection selection module has a connection interface set, a first selected connection interface set and a second selected connection interface set, the connection interface set is used for connecting the test function interface set, the first selected connection interface set is used for connecting the internal test scheme module, and the second selected connection interface set is used for connecting the external test interface module; wherein the interface connection configuration module is used for receiving the test scheme control configuration information issued by the test scheme control module, and configuring the interface connection selection module.

4. The test system of claim 3, wherein, The internal test scheme module comprises: A first interface mapping management module; A preset scheme module connected with the first selected connection interface set through the first interface mapping management module, used for testing the to-be-tested baseboard management controller and obtaining a test generation result; A first interface mapping configuration module connected with the test scheme control module, the first interface mapping management module and the preset scheme module, used for receiving the test scheme control configuration information issued by the test scheme control module, and configuring the first interface mapping management module and the preset scheme module; A first state feedback module connected with the test result collection module and the preset scheme module, used for receiving the preset reference result issued by the test result collection module and the test generation result sent by the preset scheme module, comparing the test generation result with the preset reference result, obtaining a test result and uploading the test result to the test result collection module.

5. The test system of claim 3, wherein, The external test interface module comprises: A second interface mapping management module, the external device interface set is connected with the second selected connection interface set through the second interface mapping management module; A second interface mapping configuration module connected with the test scheme control module and the second interface mapping management module, used for receiving the test scheme control configuration information issued by the test scheme control module, and configuring the second interface mapping management module; A second state feedback module connected with the test result collection module and the second interface mapping management module, used for receiving the preset reference result issued by the test result collection module and the test generation result sent by the second interface mapping management module, comparing the test generation result with the preset reference result, obtaining a test result and uploading the test result to the test result collection module.

6. The test system of claim 3, wherein, The to-be-tested baseboard management controller is n, the host computer has n first interactive bus interfaces, the test verification module has n test function interface sets, and the interface bus collection module comprises n interface connection selection modules; Wherein, the first test command interactive interface of each to-be-tested baseboard management controller is connected with a first interactive bus interface, and each interface connection selection module is connected with a group of to-be-tested function interface sets through a group of test function interface sets.

7. A test method characterized by, The test method is applied to the test system as claimed in any one of claims 1 to 6, and comprises the following steps: Obtaining a test configuration command issued by a host computer; parsing the test configuration command to obtain test scheme control configuration information; the test scheme control configuration information is sent to an interface bus collection module and an internal test scheme module, or to the interface bus collection module and an external test interface module; wherein, the interface bus collection module, the internal test scheme module, and the external test interface module are configured according to the test scheme control configuration information and generate configuration state feedback information when the test scheme control configuration information is received; the configuration state feedback information is obtained and uploaded to the host computer; a test start command sent by the host computer is obtained; wherein, the test start command is generated when the host computer detects the configuration state feedback information; the test start command is synchronously transmitted to the substrate management controller to be tested, so that the internal test scheme module completes the test on the substrate management controller to be tested, or the external device and the external test interface module complete the test on the substrate management controller to be tested, and a test generation result is obtained; the test start command is parsed to obtain a preset reference result; the test generation result is obtained; the preset reference result and the test generation result are compared to obtain a test result; the test result is uploaded to the host computer.

8. A test device, characterized in that comprises: a first obtaining module for obtaining a test configuration command sent by a host computer; a first parsing module for parsing the test configuration command to obtain test scheme control configuration information; a sending module for sending the test scheme control configuration information to an interface bus collection module and an internal test scheme module, or to the interface bus collection module and an external test interface module; wherein, the interface bus collection module, the internal test scheme module, and the external test interface module are configured according to the test scheme control configuration information and generate configuration state feedback information when the test scheme control configuration information is received; a second obtaining module for obtaining the configuration state feedback information and uploading it to the host computer; a third obtaining module for obtaining a test start command sent by the host computer; wherein, the test start command is generated when the host computer detects the configuration state feedback information; the test start command is synchronously transmitted to the substrate management controller to be tested, so that the internal test scheme module completes the test on the substrate management controller to be tested, or the external device and the external test interface module complete the test on the substrate management controller to be tested, and a test generation result is obtained; a second parsing module for parsing the test start command to obtain a preset reference result; a fourth obtaining module for obtaining the test generation result; a comparison module for comparing the preset reference result and the test generation result to obtain a test result; an uploading module for uploading the test result to the host computer.

9. An electronic device, comprising: comprises a processor and a memory, the memory stores programs or instructions that can be run on the processor, and the programs or instructions are executed by the processor to implement the steps of the test method according to claim 7.

10. A computer-readable storage medium, characterized in that, The computer readable storage medium stores computer executable instructions for causing a computer to perform the test method of claim 7.

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