Ferroelectric capacitance model constructed based on voltage-controlled capacitance method and modeling method
By constructing a ferroelectric capacitor model based on the voltage-controlled capacitor method, the problems of insufficient modeling accuracy and low simulation efficiency in the existing technology are solved, realizing high-precision and fast ferroelectric capacitor simulation, which is suitable for FRAM circuit design and verification.
Patent Information
- Application Number
- CN202510974834.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-15
- Publication Date
- 2025-11-14
AI Technical Summary
Existing ferroelectric capacitor models are insufficient in terms of modeling accuracy and parameter configurability, making them difficult to integrate on mainstream simulation platforms. Furthermore, transient simulations are inefficient and neglect frequency effects and other time-dependent effects caused by dipole switching time delays.
A ferroelectric capacitor model based on voltage-controlled capacitor method is adopted and created using SPICE language. It includes positive port, negative port, main capacitor module, selection module and judgment module. The voltage-controlled capacitor and delay module are used to realize the dynamic adjustment of nonlinear capacitor. The switching control is combined with SPICE's built-in SGN function to simplify the model structure.
It achieves high-precision ferroelectric capacitance modeling, supports multiple polarization paths and voltage modes, is applicable to different material systems and device structures, has fast simulation speed, is easy to integrate into mainstream simulation platforms, and is suitable for FRAM circuit design.
Smart Images
Figure CN120951533A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of ferroelectric capacitor (Fecap) modeling technology, specifically relating to a ferroelectric capacitor model and modeling method based on voltage-controlled capacitor method. Background Technology
[0002] With the rapid development of next-generation non-volatile memory technology, ferroelectric random access memory (FRAM) has become one of the important candidate solutions in the post-Moore's Law era memory field due to its low power consumption, fast read / write speed, high durability, and excellent scalability. The core unit of ferroelectric memory is the ferroelectric capacitor. The basic storage unit of ferroelectric memory depends on the polarization state of the ferroelectric capacitor. Therefore, accurate modeling of ferroelectric capacitors is crucial for the circuit design, verification, and system optimization of memory arrays. Its storage mechanism relies on the polarization reversal behavior of ferroelectric materials under an applied electric field. Ferroelectric capacitors exhibit typical hysteretic polarization-voltage (PV) characteristic curves under an applied voltage, and different polarization states can be used to represent logic "0" and "1". Because ferroelectric capacitors have complex electrical behaviors such as nonlinearity, memory, and path dependence, a suitable model must be established to accurately characterize their dynamic characteristics in FRAM device and circuit design. Therefore, when designing FRAM chips and performing system simulations, a suitable ferroelectric capacitor model must be used to accurately represent the dynamic behavior of ferroelectric capacitors in memory.
[0003] Currently, there are various modeling methods based on ferroelectric capacitance models, including microscopic modeling based on physical mechanisms (such as the Landau-Khalatnikov model and the Preisach model) and behavioral modeling based on macroscopic characteristics, such as the QV function model and the Zero Switching-Time Transient (ZSTT) model. Regarding microscopic models, although they can explain the intrinsic properties of ferroelectric materials well, they often involve complex partial differential equations and multiple parameters, making them difficult to directly apply to circuit simulation platforms such as SPICE. Regarding macroscopic behavioral models, some existing technologies use macroscopic models based on QV function curve fitting, which have good practicality and accuracy, but their modeling process lacks a unified standard and often has shortcomings in transient simulation efficiency or scalability. Another existing technology is based on the switching current characteristics of ferroelectric capacitance, establishing a ferroelectric capacitance model independent of the voltage pulse amplitude and the measured settling time constant; however, the control circuit used in this model is too complex and unsuitable for simulating ferroelectric memories with a large number of cells.
[0004] Therefore, there is currently a lack of a compact ferroelectric capacitor modeling scheme that simultaneously possesses high modeling accuracy, strong parameter configurability, can be integrated into mainstream simulation platforms, and supports the description of dynamic polarization switching processes. Summary of the Invention
[0005] To address the aforementioned problems in the existing technology, this invention provides a ferroelectric capacitor model and modeling method based on the voltage-controlled capacitor method.
[0006] The technical problem to be solved by this invention is achieved through the following technical solution: A ferroelectric capacitor model based on voltage-controlled capacitor method is provided. The ferroelectric capacitor model is created using SPICE language and includes: a positive port, a negative port, a main capacitor module, a selection module, and a judgment module. The main capacitor module consists of a DC resistor and a nonlinear capacitor connected in parallel, with both the DC resistor and the nonlinear capacitor connected between the positive and negative ports; the nonlinear capacitor includes two voltage-controlled capacitors. The selection module includes a voltage-controlled voltage source and an SGN function switch. The input terminal of the voltage-controlled voltage source is connected to the positive port and the negative port, and the output terminal is connected to the judgment module. The judgment module includes a delay module and a linear capacitor. The input terminal of the delay module is connected to the output terminal of the voltage control voltage source, and the output terminal is connected to the SGN function switch. The output of the SGN function switch controls the switching of the two voltage-controlled capacitors.
[0007] Optionally, the gain of the voltage-controlled voltage source is adjustable.
[0008] Optionally, the delay time of the delay module is adjustable.
[0009] Optionally, the SGN function switch implements control functionality through the SGN function built into SPICE: When the input voltage is in the positive voltage scanning direction, the output value of the SGN function is +1; When the input voltage is in the negative voltage scanning direction, the output value of the SGN function is -1; The output value of the SGN function is used to select one of the two voltage-controlled capacitors to operate.
[0010] Optionally, the capacitance values of the two voltage-controlled capacitors are defined by experimentally measured CV data.
[0011] Optionally, the ferroelectric capacitor model is packaged as a SPICE-compatible two-port circuit.
[0012] Optionally, the ferroelectric capacitance model is used for circuit simulation of ferroelectric random access memory (FRAM).
[0013] This invention also provides a method for modeling ferroelectric capacitors based on voltage-controlled capacitors, comprising: S1. Obtain the CV data of the voltage-controlled capacitor used to simulate the behavior of ferroelectric capacitors under positive and negative scanning voltages; S2. Create an initial ferroelectric capacitor model using SPICE language. The ferroelectric capacitor model includes: a positive port, a negative port, a main capacitor module, a selection module, and a judgment module. The main capacitor module consists of a DC resistor and a nonlinear capacitor connected in parallel, both connected between the positive and negative ports. The nonlinear capacitor includes two voltage-controlled capacitors. The selection module includes a voltage-controlled voltage source and an SGN function switch. The input of the voltage-controlled voltage source is connected to the positive and negative ports, and its output is connected to the judgment module. The judgment module includes a delay module and a linear capacitor. The input of the delay module is connected to the output of the voltage-controlled voltage source, and its output is connected to the SGN function switch. The output of the SGN function switch is used to control the switching of the two voltage-controlled capacitors. S3. Generate a simulation netlist file adapted to the ferroelectric capacitor model, instantiate and call the ferroelectric capacitor model by constructing a sub-circuit netlist, and assign the CV data under the positive and negative scanning voltages to the two voltage-controlled capacitors to form a ferroelectric capacitor SPICE model with positive and negative ports.
[0014] Optionally, S1 includes: Obtain voltage-polarization PV curve data of the voltage-controlled capacitor used to simulate ferroelectric capacitance behavior under positive and negative scanning voltages; The voltage-polarization PV curve data under the positive and negative scanning voltages are differentiated using the SPICE language to generate CV data of the voltage-controlled capacitor under the positive and negative scanning voltages for simulating the behavior of ferroelectric capacitors.
[0015] Optionally, the ferroelectric capacitance SPICE model supports integration in HSPICE, Spectre, Finesim, and HSIM.
[0016] The beneficial effects of the ferroelectric capacitance model constructed based on the voltage-controlled capacitor method provided by this invention are as follows: (1) To address the problem that models based on physical mechanisms or mathematical models have many parameters and are complex, making them difficult to embed into circuit-level EDA simulation tools, this invention establishes a nonlinear capacitor based on voltage-controlled capacitor (VCCAP) in the main ferroelectric capacitor model. According to the principle of voltage-controlled capacitor, the size of the nonlinear capacitor is dynamically adjusted by controlling the voltage in circuit simulation, thereby simulating the nonlinear behavior of the ferroelectric capacitor. That is, a ferroelectric capacitor model independent of the amplitude of the voltage pulse and the measured settling time constant is constructed. The ferroelectric capacitor model constructed in this way directly simulates its nonlinear behavior from its CV relationship. Combined with a DC resistor, it can effectively capture and describe the nonlinear and hysteresis characteristics of ferroelectric devices, and still has high accuracy while simplifying the model structure.
[0017] (2) To address the issues of low transient simulation efficiency and neglect of frequency effects and other time-dependent effects caused by dipole switching time delay in some ferroelectric capacitor models, this invention establishes a nonlinear capacitor based on voltage-controlled capacitors. The charge increment of its capacitor model is only a function of the applied voltage and the initial state of the capacitor, not a function of time, thus solving the problem of frequency effects and other time-dependent effects caused by switching time delay. In particular, the ferroelectric capacitor model of this invention does not depend on time-switching current, therefore it has a fast simulation speed and high transient simulation efficiency.
[0018] (3) This invention utilizes polarization state as a model memory feature, constructs a state update and control mechanism through a delay element, and uses the built-in SGN function of SPICE to achieve the effect of switching control, thereby selecting the defined nonlinear capacitor and forming a novel ferroelectric capacitor model based on behavior description. This model can effectively capture the nonlinear behavior and hysteresis characteristics of ferroelectric capacitors during polarization reversal, and has extremely high modeling accuracy and dynamic response capability. Furthermore, in the ferroelectric capacitor model of this invention, the main capacitor circuit only includes two nonlinear capacitors with voltage control, and only uses the SGN function and a delay element. By distinguishing the linear capacitor, the positive / negative voltage flow direction of the capacitor model can be determined by the voltage difference between the voltage state at the previous moment and the current state, which greatly simplifies the structure of the control circuit part of the ferroelectric capacitor model.
[0019] Therefore, the modeling structure of this invention is simple, the physical meaning of the parameters is clear, and it is easy to extract from actual measurement data. It can accurately describe the PV behavior of ferroelectric capacitors and can be flexibly integrated into circuit simulation tools as an efficient and compact model. It supports multiple polarization paths and voltage modes, and is suitable for modeling needs of different material systems and device structures. It supports integration and use in mainstream simulation platforms such as HSPICE, Spectre, Finesim, and HSIM. It has the advantages of fast simulation speed and easy integration with EDA tools, and is expected to be more widely used in FRAM circuit design.
[0020] The present invention will now be described in further detail with reference to the accompanying drawings. Attached Figure Description
[0021] Figure 1 This is a schematic diagram of the structure of a ferroelectric capacitor model constructed based on the voltage-controlled capacitor method provided by the present invention; Figure 2 This is a schematic diagram of the ferroelectric capacitance model provided by the present invention applied to FRAM simulation; Figure 3 This is a comparison of a set of PV curves simulated using the ferroelectric capacitance model provided by this invention and the measured PV curves. Figure 4 This is a comparison between a PV curve simulated using the ferroelectric capacitance model provided by this invention and a measured PV curve. Figure 5 It is a CV curve simulated using the ferroelectric capacitance model provided by this invention; Figure 6 It is an IV curve simulated using the ferroelectric capacitance model provided by this invention; Figure 7 The application scenarios of the ferroelectric capacitor model provided by the present invention are illustrated schematically. Figure 8 This is a flowchart illustrating a ferroelectric capacitor modeling method based on voltage-controlled capacitor method provided by the present invention. Detailed Implementation
[0022] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.
[0023] To address the problems of low simulation accuracy, complex model structure, difficulty in parameter extraction, poor compatibility and low simulation efficiency in EDA (Electronic Design Automation) tools, existing ferroelectric capacitor modeling methods provide a ferroelectric capacitor model and modeling method based on voltage-controlled capacitor method.
[0024] This invention constructs two nonlinear capacitors by controlling a voltage-controlled capacitor, replacing the original nonlinear capacitor representation based on complex physical mechanisms or mathematical models. It combines a delay element and a linear capacitor as a control circuit to construct a behavioral model, effectively capturing and describing the nonlinear and hysteretic characteristics of ferroelectric devices. Furthermore, this invention utilizes polarization states as model memory features, constructs a state update and control mechanism through the delay element, and uses the built-in SGN function in SPICE to achieve switching control, selecting the defined nonlinear capacitor. This forms a novel ferroelectric capacitor model based on behavioral description, effectively capturing the nonlinear behavior and hysteretic characteristics of ferroelectric capacitors during polarization reversal, exhibiting extremely high modeling accuracy and dynamic response capabilities.
[0025] The following section provides a detailed description of a ferroelectric capacitor model constructed using the voltage-controlled capacitor method, which is created using the SPICE language. (See attached image for details.) Figure 1 The ferroelectric capacitor model includes: positive port Pos, negative port Neg, main capacitor module, selection module and judgment module; The main capacitor module consists of a DC resistor R. Fe and nonlinear capacitance C Fe Composed of parallel connections, DC resistance R Fe and nonlinear capacitance C Fe Both are connected between the positive port Pos and the negative port Neg; nonlinear capacitor C Fe It includes two voltage-controlled capacitors.
[0026] Specifically, the capacitance values of the two voltage-controlled capacitors are defined by experimentally measured CV data. The dynamic change in capacitance value with polarization state based on the applied voltage reflects the nonlinear properties of ferroelectric capacitance, thus simulating the hysteresis loop of ferroelectric materials. It can be understood that this invention uses the nonlinear capacitance C defined by the voltage-controlled capacitor method (VCCAP) based on experimentally measured CV data. Fe Used as a nonlinear capacitor element, such a nonlinear capacitor C Fe The voltage-volume (CV) relationship is entirely determined experimentally, and the more data points measured, the more accurate the simulated PV curve. Therefore, this ferroelectric capacitor model has extremely high accuracy. Furthermore, the nonlinear capacitance C defined by the voltage-controlled capacitor method... Fe There is a corresponding capacitance value for each voltage, which eliminates the need for traditional mathematical formulas for fitting calculations and greatly improves the simulation speed of the model.
[0027] DC resistance R Fe The leakage current resistance of the equivalent ferroelectric material is used to simulate the leakage current effect of ferroelectric capacitors and characterize the dielectric loss characteristics of ferroelectric capacitors.
[0028] The selection module includes a voltage-controlled voltage source (VCVS) and an SGN function switch. The input of the voltage-controlled voltage source is connected to the positive and negative ports, and the output is connected to the judgment module.
[0029] Specifically, the voltage-controlled voltage source VCVS is a SPICE language device in the circuit netlist. Its voltage is applied to the voltage across the main capacitor module and transmitted to the selection module. The input of the voltage-controlled voltage source is connected to the main capacitor module, and the output is connected to the delay module. In this way, the voltage-controlled voltage source can transmit the voltage across the capacitor model nodes Pos and Neg to the subsequent circuits for positive / negative input voltage scanning analysis and judgment, while ensuring that it does not affect the voltage across the ferroelectric capacitor.
[0030] The SGN function represents a switch that switches the connection state of a ferroelectric capacitor by applying voltages across its terminals (POS and NEG), thereby enabling two different voltage-controlled capacitors. This SGN function switch is controlled by the built-in SGN function in SPICE: when the input voltage is in the positive voltage scanning direction, the SGN function outputs +1; when the input voltage is in the negative voltage scanning direction, the SGN function outputs -1. The output value of the SGN function is used to select one of the two voltage-controlled capacitors to operate. Specifically, a positive voltage direction (voltage increment direction) indicates a positive voltage scanning direction, and vice versa for a negative voltage scanning direction. Based on these two scanning directions, the corresponding two nonlinear capacitors are switched and selected.
[0031] The decision module includes a delay element and a linear capacitor. The input of the delay element is connected to the output of the voltage control source, and the output is connected to the SGN function switch. The output of the SGN function switch controls the switching of the two voltage-controlled capacitors of the nonlinear capacitor.
[0032] The delay module is used to implement the delay function. Based on the defined propagation delay time, this device can adjust the propagation delay in sub-circuit modeling, thereby adjusting the sampling accuracy of the model. The linear capacitor is a conventional linear capacitor used to extract the effective capacitance value (charge amount) of the charge tracking capacitor Cqtrace flowing through the delay module.
[0033] In the ferroelectric capacitor model provided by this invention, each module achieves dynamic segmented modeling and polarization state switching through electrical signal linkage. Specifically, the ferroelectric capacitor model of this invention defines two voltage-controlled capacitors in the main capacitor module. According to the principle of voltage-controlled capacitors, there is a corresponding nonlinear capacitance value at each voltage value, that is, its nonlinear behavior is directly simulated from its CV relationship. This constructs a ferroelectric capacitor model that is independent of the amplitude of the voltage pulse and the settling time constant of the measurement. In circuit simulation, the size of the nonlinear capacitance is dynamically adjusted by controlling the voltage, thereby simulating the nonlinear behavior of the ferroelectric capacitor. In terms of controlling the switching of the two voltage-controlled capacitors, the ferroelectric capacitor model uses a delay module to form a state update and control mechanism. The output terminal is connected to a conventional linear capacitor to store and capture the amount of charge flowing through the ferroelectric capacitor at the previous moment. Then, the amount of charge flowing through the ferroelectric capacitor at the previous moment and the current moment are compared. When the amount of charge flowing through the ferroelectric capacitor at the current moment increases (positive voltage), that is, the input voltage is in the positive voltage scanning direction, and vice versa, it is in the negative voltage scanning direction.
[0034] Furthermore, this invention achieves switching control through the SGN function built into SPICE. When the input voltage is in the positive voltage scanning direction (i.e., the output value is positive, the SGN function value is +1), and vice versa. The voltage-controlled capacitor (VCCAP) is selected based on the ±1 of the SGN output value, thus forming a novel ferroelectric capacitor modeling scheme based on behavioral description.
[0035] Therefore, the ferroelectric capacitor model constructed in this invention directly simulates its nonlinear behavior from its CV relationship. While simplifying the model structure, it still has high accuracy and can effectively capture the nonlinear behavior and hysteresis characteristics of ferroelectric capacitors during polarization reversal. It has extremely high modeling accuracy and dynamic response capability.
[0036] like Figure 2 As shown, although the ferroelectric capacitor model provided by this invention consists of multiple modules, the entire model only has two ports: the positive port Pos and the negative port Neg. In subsequent simulation circuit calls, this model can be treated as a conventional embedded capacitor model. This is also an advantage of sub-circuits in SPICE models; regardless of the simplicity or complexity of the sub-circuit's internal structure, for external calls, the sub-circuit is like a black box, requiring only that the input-output structure conforms to the preset parameters. Therefore, calibration analysis of the fabricated model is necessary to ensure its accuracy and facilitate subsequent device coupling and circuit simulation.
[0037] The ferroelectric capacitor SPICE model provided by this invention is presented in the form of SPICE netlist or Verilog-A, and supports integration and use in HSPICE, Spectre, Finesim and HSIM.
[0038] In use, the ferroelectric capacitor model provided by this invention has two ports, positive and negative, just like a regular capacitor. When calling the final ferroelectric capacitor behavior model, regardless of whether the internal structure of the sub-circuit is simple or complex, the sub-circuit is like a black box for external calls. It is only necessary to ensure that the input-output structure conforms to the preset.
[0039] Specifically, when calling the ferroelectric capacitor model provided by this invention, by applying a scanning voltage between its two ports and performing transient simulation, key curves describing the characteristics of the model are obtained, including the hysteresis characteristic curve (QV curve), the capacitance-voltage characteristic curve (CV curve), and the current-voltage characteristic curve (IV curve). The corresponding simulation waveforms are as follows: Figures 3-6 As shown. Figure 3 This is a comparison of a set of PV curves simulated using the ferroelectric capacitance model provided by this invention and the measured PV curves. Figure 4 This is a comparison between a PV curve simulated using the ferroelectric capacitance model provided by this invention and a measured PV curve. Figure 5 It is a CV curve simulated using the ferroelectric capacitance model provided by this invention; Figure 6 This is an IV curve simulated using the ferroelectric capacitance model provided by this invention.
[0040] Analysis of the simulation curves reveals that the PV curve includes an unsaturated region and a standard saturated hysteresis loop. Furthermore, the IV and CV curves show different response characteristics to changes in forward and reverse scanning voltages, further validating the model's good fitting ability to ferroelectric characteristics. These simulation results demonstrate that the ferroelectric capacitor behavior model established in this invention can accurately reproduce the typical electrical behavior of ferroelectric capacitors and is suitable for application in the design and verification of ferroelectric memory circuits. This fully proves the usability and engineering practical value of the ferroelectric capacitor behavior model proposed in this invention.
[0041] This invention provides a ferroelectric capacitor model based on the voltage-controlled capacitor method. Addressing the problem that models based on physical mechanisms or mathematical models have many parameters, are complex, and difficult to embed into circuit-level EDA simulation tools, this invention establishes a nonlinear capacitor based on voltage-controlled capacitors (VCCAP) within the main ferroelectric capacitor model. According to the principle of voltage-controlled capacitors, the size of the nonlinear capacitor is dynamically adjusted by controlling the voltage during circuit simulation, thereby simulating the nonlinear behavior of the ferroelectric capacitor. This constructs a ferroelectric capacitor model independent of the voltage pulse amplitude and the measured settling time constant. The ferroelectric capacitor model constructed in this way directly simulates its nonlinear behavior from its CV relationship. Combined with a DC resistor, it can effectively capture and describe the nonlinear and hysteresis characteristics of ferroelectric devices, maintaining high accuracy while simplifying the model structure.
[0042] To address the issues of low transient simulation efficiency and neglect of frequency effects and other time-dependent effects caused by dipole switching time delay in some ferroelectric capacitor models, this invention establishes a nonlinear capacitor based on voltage-controlled capacitor (VCCAP). In this model, the charge increment is only a function of the applied voltage and the initial state of the capacitor, not time, thus resolving the problems of frequency effects and other time-dependent effects caused by switching time delay. In particular, the ferroelectric capacitor model of this invention does not depend on time-switching current, therefore it has a fast simulation speed and high transient simulation efficiency.
[0043] To address the issue of overly complex switching control circuits in some ferroelectric capacitor models, this invention utilizes polarization states as model memory features. A state update and control mechanism is constructed using a delay element, and the SGN function built into SPICE is used to achieve switching control. This allows for the selection of defined nonlinear capacitors, thus forming a novel ferroelectric capacitor modeling scheme based on behavioral description. This method effectively captures the nonlinear behavior and hysteresis characteristics of ferroelectric capacitors during polarization reversal, exhibiting extremely high modeling accuracy and dynamic response capabilities. Furthermore, the main capacitor circuit of this invention consists of only two voltage-controlled nonlinear capacitors. Using only the SGN function and a delay element, the positive / negative voltage flow direction of the capacitor model can be determined by the voltage difference between the previous and current states of the linear capacitor, greatly simplifying the control structure of the ferroelectric capacitor model.
[0044] In summary, this invention features a simple modeling structure and clear physical meaning of parameters, making it easy to extract from actual measurement data. It can accurately describe the PV behavior of ferroelectric capacitors and is a highly efficient and compact model that can be flexibly integrated into circuit simulation tools. It supports multiple polarization paths and voltage modes, and is suitable for modeling needs of different material systems and device structures. It supports integration and use in mainstream simulation platforms such as HSPICE, Spectre, Finesim, and HSIM. It has the advantages of fast simulation speed and easy integration with EDA tools, and is expected to be more widely used in FRAM circuit design.
[0045] The ferroelectric capacitor model provided by this invention is mainly used for circuit simulation of ferroelectric random access memory (FRAM), but it is not limited to this.
[0046] See Figure 7 This model is not only applicable to the performance optimization and reliability analysis of memory chips, but also to simulation verification based on ferroelectric memory (FRAM) and various electronic devices, such as traditional memory, dedicated storage devices, and in-memory computing systems that integrate computing and storage functions. In addition, it can be widely used in peripheral control devices, including various processor units, embedded system platforms and various electronic devices, to assist in system-level design and functional verification.
[0047] In this invention, the gain of the voltage-controlled voltage source is adjustable. This allows for precise matching of the polarization voltage range of different ferroelectric materials by flexibly adjusting gain parameters (such as the gain value in the SPICE command), ensuring that the voltage signal transmitted to the judgment module is within the optimal detection range and avoiding signal distortion. Furthermore, the adjustable gain of the voltage-controlled voltage source improves model compatibility, thereby meeting diverse needs.
[0048] In one embodiment, the delay time of the delay module is adjustable. This allows for precise control of the time resolution of voltage state sampling by adjusting the delay parameter (TD value), enabling the model to accurately capture polarization reversal processes at different speeds and resolving the frequency-dependent error problem caused by fixed delays in traditional models. Furthermore, the adjustable delay enhances the model's adaptability to ferroelectric materials processed using different methods, achieving higher modeling accuracy and dynamic response capabilities.
[0049] Based on the same inventive concept, embodiments of the present invention also provide a method for modeling ferroelectric capacitors based on the voltage-controlled capacitor method, such as... Figure 8 As shown, the method includes the following steps: S1. Obtain the CV data of the voltage-controlled capacitor used to simulate the behavior of ferroelectric capacitors under positive and negative scanning voltages.
[0050] Specifically, S1 includes: (1) Obtain the voltage-polarization PV curve data of the voltage-controlled capacitor used to simulate the behavior of ferroelectric capacitors under positive and negative scanning voltages.
[0051] Specifically, the acquired voltage-polarization PV curve data are classified into PV data under positive scanning voltage and PV data under negative scanning voltage. Since the PV data is approximately equivalent to the QV data, the derivatives of the QV data under the two positive and negative scanning voltages can be used to obtain the corresponding two CV data (voltage-polarization PV curve data under positive and negative scanning voltages).
[0052] (2) The voltage-polarization PV curve data under positive and negative scanning voltages are differentiated by SPICE language to generate CV data of voltage-controlled capacitor under positive and negative scanning voltages for simulating the behavior of ferroelectric capacitors.
[0053] S2. Use SPICE language to create the initial ferroelectric capacitor model; the ferroelectric capacitor model includes: positive port, negative port, main capacitor module, selection module and judgment module.
[0054] The main capacitor module consists of a DC resistor and a nonlinear capacitor connected in parallel, with both connected between the positive and negative ports. The nonlinear capacitor includes two voltage-controlled capacitors. The selection module includes a voltage-controlled voltage source and an SGN function switch. The input of the voltage-controlled voltage source is connected to the positive and negative ports, and the output is connected to the judgment module. The judgment module includes a delay module and a linear capacitor. The input of the delay module is connected to the output of the voltage-controlled voltage source, and the output is connected to the SGN function switch. The output of the SGN function switch is used to control the switching of the two voltage-controlled capacitors of the nonlinear capacitor.
[0055] Specifically, the initial ferroelectric capacitor model is created using the SPICE language, the port types of the two ports of the model and the internal SPICE device parameters are defined, and the two CV data obtained are written into the voltage-controlled capacitor VCCAP to complete the definition of the nonlinear ferroelectric capacitor.
[0056] For example, the behavior of a voltage-controlled capacitor (VCCAP) can be described as follows: Gcap n+ n- VCCAP PWL(1) in+ in- + x1,y1 x2,y2 ... x100,y100; Where Gcap is the name of the voltage-controlled capacitor, n+ and n- are the output control nodes of the voltage-controlled capacitor, and in+ and in- are the input control nodes of the voltage-controlled capacitor. The + sign is a newline character. VCCAP indicates that the component type is a voltage-controlled capacitor. PWL(1) indicates that the control function uses the PWL (Piecewise Linear) form. The number 1 in the parentheses has no practical meaning. Writing PWL(1) is a fixed format. x1,y1 x2,y2 ... x100,y100 represent the capacitance value y corresponding to each voltage x. In order to ensure the accuracy of the model, the x and y data of VCCAP data should generally be more than 30.
[0057] Therefore, the above description of the behavior of the voltage-controlled capacitor specifically means: a Gcap voltage-controlled capacitor with output port V(n+, n-) and input port V(in+, in-). It achieves the function of a voltage-controlled capacitor, meaning that for each voltage x, there is a corresponding capacitance value y, thus realizing the function of a non-linear capacitor.
[0058] For example, the behavior of the delay element can be described as follows: Exxx n+ n- [VCVS] DELAY in+ in- TD=val [SCALE=val]; Where Exxx represents the component name of the voltage-controlled voltage source, n+ and n- represent the output control nodes of the voltage-controlled voltage source, and in+ and in- represent the input control nodes of the voltage-controlled voltage source. [VCVS] indicates a voltage-controlled voltage source, DELAY is a keyword indicating the implementation of a delay function, TD=val is the defined delay time, and [SCALE=val] is optional and is a scaling factor, which defaults to 1.
[0059] Therefore, the above description of the delay module's behavior specifically means that the voltage-controlled source named Exxx outputs V(n+, n-) as the value of the input V(in+, in-) after a delay of TD = val seconds. This module allows the device to adjust the propagation delay in subcircuit modeling.
[0060] For example, the behavior of a voltage-controlled voltage source can be described as follows: Exxx n+ n- [VCVS] in+ in- gain [MAX=val][MIN=val]; Where Exxx represents the component name of the voltage-controlled voltage source, n+ and n- are the output control nodes of the voltage-controlled voltage source, and in+ and in- are the input control nodes of the voltage-controlled voltage source. [VCVS] represents the voltage-controlled voltage source, and gain represents the input-to-output gain. When gain=1, the output voltage V(n+, n-) is equal to the input voltage V(in+, in-). (MAX=val is the maximum output voltage value. The default setting is undefined, and no maximum value is set. MIN=val is the minimum output voltage value. The default setting is undefined, and no minimum value is set. [MAX=val][MIN=val] is not currently used in this netlist.)
[0061] Therefore, the above description of the behavior of the voltage-controlled voltage source specifically means: a voltage-controlled voltage source named Exxx has an output port V(n+, n-), an input port V(in+, in-), and a voltage gain of gain. In this netlist, it is gain1, and its function is to transmit the voltage across the V(Pos,Neg) node at one time, i.e., without loss, to the subsequent circuits for analysis and judgment.
[0062] S3. Generate a simulation netlist file adapted to the ferroelectric capacitor model. Instantiate and call the ferroelectric capacitor model by constructing a sub-circuit netlist, and assign the CV data under positive and negative scanning voltages to the two voltage-controlled capacitors to form a ferroelectric capacitor SPICE model with positive and negative ports.
[0063] Specifically, in the simulation information definition interface of the ferroelectric capacitor parameterization unit, the netlist functions of the ferroelectric capacitor (such as parameter matching of simulation units such as HSPICE, SPICE, TSPICE, Verilog-A, ams, auCdl, auLvs, HspiceD, Spectre, etc.) are defined. This allows the simulation unit to match, recognize, and call the parameters when they are input into the netlist, thus establishing a simulation netlist file adapted to the initial ferroelectric capacitor behavior model. The model is instantiated by constructing the corresponding sub-circuit netlist, and the data extracted from the test is assigned to the initial model parameters to achieve the generation of the final ferroelectric capacitor behavior model. Finally, it is encapsulated as a two-port SPICE model for use in memory pre- and post-simulation.
[0064] The ferroelectric capacitance SPICE model created using the method of this invention supports integrated use in HSPICE, Spectre, Finesim, and HSIM.
[0065] It should be noted that the modeling method embodiment is basically similar to the ferroelectric capacitor model embodiment, so the description is relatively simple. For relevant details, please refer to the description of the ferroelectric capacitor model embodiment. The model established by this method has the same beneficial effects as the ferroelectric capacitor model embodiment.
[0066] It should be noted that the terms "first," "second," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. Rather, they are merely examples of apparatuses and methods consistent with some aspects of the invention.
[0067] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Furthermore, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.
[0068] Although the invention has been described herein in conjunction with various embodiments, those skilled in the art will understand and implement other variations of the disclosed embodiments by reviewing the accompanying drawings and the disclosure in carrying out the claimed invention. In the description of the invention, the word "comprising" does not exclude other components or steps, "a" or "an" does not exclude a plurality, and "a plurality" means two or more, unless otherwise explicitly specified. Furthermore, while different embodiments may describe certain measures, this does not mean that these measures cannot be combined to produce good results.
[0069] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.
Claims
1. A ferroelectric capacitor model constructed based on the voltage-controlled capacitor method, characterized in that, The ferroelectric capacitor model is created using SPICE language and includes: positive port, negative port, main capacitor module, selection module and judgment module. The main capacitor module consists of a DC resistor and a nonlinear capacitor connected in parallel, with both the DC resistor and the nonlinear capacitor connected between the positive and negative ports; the nonlinear capacitor includes two voltage-controlled capacitors. The selection module includes a voltage-controlled voltage source and an SGN function switch. The input terminal of the voltage-controlled voltage source is connected to the positive port and the negative port, and the output terminal is connected to the judgment module. The judgment module includes a delay module and a linear capacitor. The input terminal of the delay module is connected to the output terminal of the voltage control voltage source, and the output terminal is connected to the SGN function switch. The output of the SGN function switch controls the switching of the two voltage-controlled capacitors.
2. The ferroelectric capacitance model according to claim 1, characterized in that, The gain of the voltage-controlled voltage source is adjustable.
3. The ferroelectric capacitance model according to claim 1, characterized in that, The delay time of the delay module is adjustable.
4. The ferroelectric capacitance model according to claim 1, characterized in that, The SGN function switch is controlled via the SGN function built into SPICE. When the input voltage is in the positive voltage scanning direction, the output value of the SGN function is +1; When the input voltage is in the negative voltage scanning direction, the output value of the SGN function is -1; The output value of the SGN function is used to select one of the two voltage-controlled capacitors to operate.
5. The ferroelectric capacitance model according to claim 1, characterized in that, The capacitance values of the two voltage-controlled capacitors are defined by the experimentally measured CV data.
6. The ferroelectric capacitance model according to claim 1, characterized in that, The ferroelectric capacitor model is encapsulated as a SPICE-compatible two-port circuit.
7. The ferroelectric capacitance model according to claim 1, characterized in that, The ferroelectric capacitor model is used for circuit simulation of ferroelectric random access memory (FRAM).
8. A method for modeling ferroelectric capacitors based on voltage-controlled capacitor method, characterized in that, include: S1. Obtain the CV data of the voltage-controlled capacitor used to simulate the behavior of ferroelectric capacitors under positive and negative scanning voltages; S2. Use SPICE language to create the initial ferroelectric capacitance model; The ferroelectric capacitor model includes: a positive port, a negative port, a main capacitor module, a selection module, and a judgment module. The main capacitor module consists of a DC resistor and a nonlinear capacitor connected in parallel, both connected between the positive and negative ports. The nonlinear capacitor includes two voltage-controlled capacitors. The selection module includes a voltage-controlled source and an SGN function switch. The input of the voltage-controlled source is connected to the positive and negative ports, and its output is connected to the judgment module. The judgment module includes a delay module and a linear capacitor. The input of the delay module is connected to the output of the voltage-controlled source, and its output is connected to the SGN function switch. The output of the SGN function switch controls the switching of the two voltage-controlled capacitors. S3. Generate a simulation netlist file adapted to the ferroelectric capacitor model, instantiate and call the ferroelectric capacitor model by constructing a sub-circuit netlist, and assign the CV data under the positive and negative scanning voltages to the two voltage-controlled capacitors to form a ferroelectric capacitor SPICE model with positive and negative ports.
9. The ferroelectric capacitor modeling method based on voltage-controlled capacitor method according to claim 8, characterized in that, S1 includes: Obtain voltage-polarization PV curve data of the voltage-controlled capacitor used to simulate ferroelectric capacitance behavior under positive and negative scanning voltages; The voltage-polarization PV curve data under the positive and negative scanning voltages are differentiated using the SPICE language to generate CV data of the voltage-controlled capacitor under the positive and negative scanning voltages for simulating the behavior of ferroelectric capacitors.
10. The method according to claim 8, characterized in that, The ferroelectric capacitor SPICE model supports integration in HSPICE, Spectre, Finesim, and HSIM.