Method for manufacturing metal oxide film semiconductor transistor

Abstract

A method for manufacturing a metal oxide film semiconductor transistor, the method comprising: a step in which a SiC substrate is heated in hydrogen gas to etch the surface of the SiC substrate; a step for growing a silicon film on the surface of the SiC substrate by heating the SiC substrate in a gas containing hydrogen gas and a silicon source gas to a temperature lower than the heating temperature of the SiC substrate during the etching, after the implementation of the etching; a step for forming a gate insulating film comprising silicon oxide on the surface of the silicon film; and a step for performing a nitrogen termination process on the SiC substrate after the gate insulating film is formed.

Description

Technical Field

[0001] The technology disclosed in this specification relates to a method for manufacturing metal oxide semiconductor (MOS) transistors. Background Technology

[0002] In the manufacturing method of the MOS transistor disclosed in Patent Document 1, a SiC substrate (i.e., a substrate made of silicon carbide) is heated in a gas containing hydrogen and silicon raw material gas. The surface of the SiC substrate is etched by hydrogen, and a silicon film (i.e., Si) is formed on the surface of the SiC substrate. Next, a silicon oxide film (i.e., SiO2) is formed on the surface of the silicon film as a gate insulating film. At this time, the silicon film is oxidized, thereby suppressing the oxidation of the surface of the SiC substrate. By suppressing the oxidation of the SiC substrate surface in this way, the interface state density at the interface between the silicon oxide film and the SiC substrate can be reduced. By reducing the interface state density at the interface between the silicon oxide film and the SiC substrate, the channel mobility is increased and the channel resistance is reduced. Therefore, the on-resistance of the MOS transistor can be reduced. After forming the silicon oxide film, a nitrogen termination treatment is performed. The nitrogen termination treatment further reduces the interface state density at the interface between the silicon oxide film and the SiC substrate.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent document 1: Japanese Patent Application Publication No. 2021-192397.

[0006] In the technology of Patent Document 1, silicon agglomeration sometimes occurs on a portion of the surface of the SiC substrate during silicon film growth. As a result, leakage current may sometimes occur through the silicon agglomeration. In this specification, a technique for suppressing silicon agglomeration is proposed in a method for manufacturing a MOS transistor with low interface state density at the interface between the silicon oxide film and the SiC substrate. Summary of the Invention

[0007] The method for manufacturing a MOS transistor disclosed in this specification includes: a step of etching a SiC substrate by heating it in hydrogen gas; a step of heating the SiC substrate to a temperature lower than the heating temperature of the SiC substrate during etching in a gas containing hydrogen and silicon raw material gas after etching, thereby growing a silicon film on the surface of the SiC substrate; a step of forming a gate insulating film made of silicon oxide on the surface of the silicon film; and a step of performing a nitrogen termination treatment on the SiC substrate after forming the gate insulating film.

[0008] In this manufacturing method, after etching the surface of the SiC substrate, a silicon film formation process is performed at a temperature lower than that of etching. Since the etching of the SiC substrate is performed at a high temperature, the surface of the SiC substrate can be adequately cleaned. Because the silicon film formation process is performed at a temperature lower than that of etching, silicon migration on the surface of the SiC substrate is difficult to occur during the silicon film formation process. Therefore, silicon aggregation can be suppressed and a silicon film can be formed uniformly. In the gate insulating film formation process, the silicon film is oxidized to become silicon oxide. As a result, oxidation of the SiC substrate surface is suppressed, making it difficult for interface states to form at the interface between the gate insulating film and the SiC substrate. Then, through nitrogen termination treatment, the SiC crystal is nitrogen-terminated at the interface between the gate insulating film and the SiC substrate. As explained above, according to this manufacturing method, a MOS transistor with suppressed silicon aggregation and a low interface state density at the interface between the gate insulating film and the SiC substrate can be manufactured. Attached Figure Description

[0009] Figure 1 This is a cross-sectional view of a MOS transistor.

[0010] Figure 2 This is an explanatory diagram of the manufacturing method of an embodiment.

[0011] Figure 3 This is an explanatory diagram of the manufacturing method of an embodiment.

[0012] Figure 4 This is an illustration of the condensation zone of silicon.

[0013] Figure 5 This is a graph showing the relationship between the heating temperature and the number of elements that produce condensation zones during the silicon film formation process. Detailed Implementation

[0014] Figure 1This illustrates a MOS transistor 10 manufactured using the manufacturing method described in this embodiment. The MOS transistor 10 has a SiC substrate 12, a gate insulating film 14, a gate electrode 16, an interlayer insulating film 18, a source electrode 20, and a drain electrode 22. The SiC substrate 12 has an upper surface 12a and a lower surface 12b as its main surfaces. A plurality of trenches 24 are formed on the upper surface 12a of the SiC substrate 12. Each trench 24 extends in a straight line parallel to each other on the upper surface 12a. The gate insulating film 14 covers the inner surfaces of each trench 24 (i.e., the side surfaces 24a and bottom surfaces 24b of the trench 24). The gate electrode 16 is disposed within each trench 24. The gate electrode 16 is insulated from the SiC substrate 12 by the gate insulating film 14. The interlayer insulating film 18 covers the upper surface of the gate electrode 16. The source electrode 20 covers the upper surface 12a of the SiC substrate 12 and the upper surface of the interlayer insulating film 18. The source electrode 20 is insulated from the gate electrode 16 by an interlayer insulating film 18. The drain electrode 22 covers the lower surface 12b of the SiC substrate 12.

[0015] The SiC substrate 12 has a source region 30, a contact region 32, a body region 34, a drift region 36, and a drain region 38. The source region 30 is an n-type region with a high n-type impurity concentration. The source region 30 is connected to the source electrode 20 and the gate insulating film 14. The contact region 32 is a p-type region with a high p-type impurity concentration. The contact region 32 is connected to the source electrode 20. The body region 34 is a p-type region with a lower p-type impurity concentration than the contact region 32. The body region 34 is connected from below to the source region 30 and the contact region 32. The body region 34 is connected to the gate insulating film 14 below the source region 30. The drift region 36 is an n-type region with a lower n-type impurity concentration than the source region 30. The drift region 36 is connected from below to the body region 34. The drift region 36 is connected to the gate insulating film 14 below the body region 34. Drain region 38 is an n-type region with a higher n-type impurity concentration than drift region 36. Drain region 38 is connected to drift region 36 from below. Drain region 38 is connected to drain electrode 22.

[0016] When a potential higher than a threshold is applied to the gate electrode 16, a channel is formed within the body region 34 along the gate insulating film 14 (i.e., the side surface 24a of the trench 24). The source region 30 and the drift region 36 are connected through the channel. When a potential higher than that of the source electrode 20 is applied to the drain electrode 22 in the state where the channel is formed, electrons flow from the source region 30 through the channel and the drift region 36 to the drain region 38.

[0017] Next, as an example, a method for manufacturing the MOS transistor 10 will be described. Furthermore, the manufacturing method of this example is characterized in its gate structure formation method; therefore, the gate structure formation method will be described primarily below.

[0018] like Figure 2 As shown in (a), the SiC substrate 12 is prepared before trench formation. The SiC layer exposed on the upper surface 12a is an epitaxial layer (i.e., a SiC layer formed by epitaxial growth). Figure 2 n shown in (a) + region, p + region, p - region and n - The regions are source region 30, contact region 32, bulk region 34, and drift region 36, respectively. Additionally, although not illustrated, [the following is missing from the original text]. Figure 2 (a) A drain region 38 is provided on the lower surface side of the SiC substrate 12.

[0019] First, such as Figure 2 As shown in (b), by selectively etching the upper surface 12a of the SiC substrate 12, a trench 24 is formed on the upper surface 12a that connects the source region and the bulk region to reach the drift region.

[0020] Next, as Figure 2 As shown in (c), the SiC substrate 12 is heated and oxidized to form a sacrificial oxide film 40 (i.e., a silicon oxide film) on the upper surface 12a and the inner surfaces of the trench 24 (i.e., the side surfaces 24a and the bottom surface 24b). Then, as... Figure 2 As shown in (d), the sacrificial oxide film 40 is removed by etching. By forming the sacrificial oxide film 40 on the surface of the SiC substrate 12 in this way and then removing it, defects and contaminants can be removed from the surface of the SiC substrate 12.

[0021] Furthermore, the sacrificial oxide film formation and removal processes are not essential and can be omitted. Regardless of whether the sacrificial oxide film formation and removal processes are performed, carbon defects with C-C bonds exist at a high density on the surface of the SiC substrate 12. These carbon defects form interface states that trap electrons. If carbon defects exist at a high density at the interface between the channel and the gate insulating film 14 (i.e., the side surface 24a of the trench 24), Coulomb scattering occurs due to electrons trapped by the interface states, resulting in a high channel resistance. In contrast, as will be explained below, in the manufacturing method of this embodiment, a gate structure can be formed with a low interface state density at the side surface 24a of the trench 24.

[0022] Next, implement Figure 3The high-temperature hydrogen etching process is shown in (a). In the high-temperature hydrogen etching process, firstly, a SiC substrate 12 is placed in the chamber of the CVD apparatus, and hydrogen (H2) gas is supplied to the chamber. Furthermore, silicon raw material gas is not supplied to the chamber during the high-temperature hydrogen etching process. Next, the SiC substrate 12 is heated in hydrogen to a temperature of 1200°C or higher (e.g., 1300°C). Thus, the surface of the SiC substrate 12 (i.e., the upper surface 12a and the inner surface of the trench 24) is etched by hydrogen gas. Here, an extremely thin layer near the surface of the SiC substrate 12 is etched. As a result, carbon defects can be removed from the surface of the SiC substrate 12. That is, the carbon defect density on the surface of the SiC substrate 12 can be reduced by the high-temperature hydrogen etching process.

[0023] Next, implement Figure 3 The silicon film formation process is shown in (b). The silicon film formation process and the high-temperature hydrogen etching process are performed continuously in the same chamber. By performing the high-temperature hydrogen etching process and the silicon film formation process in the same chamber, the quality of the manufactured MOS transistors can be stabilized, and the manufacturing efficiency of the MOS transistors can be improved. In the silicon film formation process, hydrogen gas and silicon raw material gas are supplied to the chamber. Furthermore, the silicon raw material gas is a gas containing silicon atoms, which is the raw material gas for the formed silicon film 42. As the silicon raw material gas, for example, silane (SiH4) can be used. Next, the SiC substrate 12 is heated in the hydrogen gas and silicon raw material gas. Here, the temperature of the SiC substrate 12 is controlled to a temperature higher than the decomposition temperature of the silicon raw material gas and lower than the heating temperature in the high-temperature hydrogen etching process. For example, the temperature of the SiC substrate 12 can be controlled to a temperature higher than 400°C (i.e., the decomposition temperature of silane) and lower than 1100°C. In the silicon film formation process, on the surface of the SiC substrate 12 (i.e., the upper surface 12a and the inner surface of the trench 24), a reaction of etching the SiC substrate 12 with hydrogen gas and a reaction of forming a single-crystal silicon film 42 on the surface of the SiC substrate 12 with silicon raw material gas occur in parallel. Because the etching and film formation reactions occur in parallel, the silicon film 42 is grown on the surface of the clean SiC substrate 12. Furthermore, because the etching and film formation reactions occur in parallel, a thin silicon film 42 with a thickness of 6 nm or less is formed in the silicon film formation process.

[0024] Next, implement Figure 3 The gate insulating film formation process is shown in (c). Here, a reduced-pressure CVD apparatus is used to form a silicon oxide layer 44 on the surface of the silicon film 42. That is, the silicon oxide layer 44 is formed on the upper part of the upper surface 12a and in the trench 24. In addition, the silicon film 42 is oxidized during the formation of the silicon oxide layer 44. The silicon oxide film 42a formed by the oxidation of the silicon film 42 is integrated with the silicon oxide layer 44 formed by CVD. Thus, the gate insulating film 14 is formed.

[0025] Next, a nitrogen-termining process is performed. In the nitrogen-termining process, the SiC substrate 12 is heated to a temperature of 1200°C or higher (e.g., 1250°C) in nitrogen gas (i.e., N2 gas) or oxide nitrogen gas (e.g., NO gas, N2O gas, etc.). This terminates the SiC crystal with nitrogen.

[0026] Next, as Figure 3 As shown in (d), a gate electrode 16 is formed within the trench 24. Furthermore, an interlayer insulating film 18 is formed on the gate electrode 16. Thus, the trench gate structure is completed. Next, as... Figure 1 As shown, a contact hole 20a is formed by selectively removing the gate insulating film 14 on the upper surface 12a. Next, a source electrode 20 is formed to cover the upper surface 12a of the SiC substrate 12. Next, a drain electrode 22 is formed to cover the lower surface 12b of the SiC substrate 12. Through these processes, the process is completed. Figure 1 The MOS transistor 10 shown is shown.

[0027] Next, the manufacturing methods of Comparative Example 1 and the embodiments will be described by comparison. In the manufacturing method of Comparative Example 1, a silicon oxide layer 44 is formed directly on the surface of the SiC substrate 12 without forming a silicon film 42. If the silicon oxide layer 44 is formed in this way, the surface of the SiC substrate 12 will be oxidized during the formation of the silicon oxide layer 44. In addition, in this case, the surface of the SiC substrate may be oxidized in the subsequent nitrogen termination process. For example, if nitrogen oxide gas is used in the nitrogen termination process, the surface of the SiC substrate may be oxidized due to oxygen atoms in the nitrogen oxide gas. In addition, even if nitrogen gas is used in the nitrogen termination process, the surface of the SiC substrate may be oxidized due to trace amounts of oxidizing gas mixed into the chamber. If the surface of the SiC substrate is oxidized in the gate insulating film formation process and the nitrogen termination process, carbon defects will be generated on the surface of the SiC substrate.

[0028] In contrast, in the manufacturing method of this embodiment, in the gate insulating film formation step and the nitrogen termination process, the silicon film 42 is oxidized instead of the SiC substrate 12. Since the silicon film 42 is oxidized instead of the SiC substrate 12, oxidation of the surface of the SiC substrate 12 is suppressed. Therefore, carbon defects are less likely to occur on the surface of the SiC substrate 12 (i.e., the interface between the SiC substrate 12 and the gate insulating film 14). Thus, the interface state density at the interface between the SiC substrate 12 and the gate insulating film 14 can be reduced. With this effect and the effect of nitrogen termination of the SiC crystal through the nitrogen termination process, the interface state density at the interface between the SiC substrate 12 and the gate insulating film 14 can be significantly reduced. Therefore, a MOS transistor 10 with low interface state density at side 24a (i.e., the interface between the body region 34 and the gate insulating film 14) can be manufactured. Therefore, according to this manufacturing method, the channel mobility of the MOS transistor 10 can be improved. Therefore, according to this manufacturing method, a MOS transistor 10 with low on-resistance can be manufactured.

[0029] Next, the manufacturing method of Comparative Example 2 and the manufacturing method of the Example will be described while comparing them. In the manufacturing method of Comparative Example 2, the high-temperature hydrogen etching process is not performed, but a silicon film formation process is performed. In the silicon film formation process of Comparative Example 2, the SiC substrate 12 is heated in hydrogen to a temperature of 1200°C or higher (e.g., 1300°C). That is, in the silicon film formation process of Comparative Example 2, the heating temperature of the SiC substrate 12 is higher than that of the silicon film formation process of the Example. If the silicon film formation process is performed at such a high temperature, silicon atoms move through migration in the grown silicon film 42, such as... Figure 4 As shown in (a), a silicon condensation zone 46 is formed on a portion of the side surface 24a of the trench 24. In the condensation zone 46, the thickness of the silicon film 42 locally increases. Therefore, as... Figure 4 As shown in (b), when the trench gate construction is completed, a portion of the condensate 46 (i.e., the silicon layer) remains unoxidized. If... Figure 4 As shown in (b), if the condensed portion 46 remains adjacent to the bulk region, leakage current flows between the source and drain of the MOS transistor.

[0030] In contrast, in the manufacturing method of this embodiment, one side of the SiC substrate is etched in a high-temperature hydrogen etching process, and then a silicon film formation process with a lower heating temperature than the high-temperature hydrogen etching process is performed. In the high-temperature hydrogen etching process, the SiC substrate 12 is heated to a high temperature, thus allowing for proper cleaning of the surface of the SiC substrate 12. In the silicon film formation process, the temperature of the SiC substrate 12 is controlled to a lower temperature than that of the high-temperature hydrogen etching process, thus suppressing silicon migration in the silicon film 42. Therefore, the silicon film 42 can be formed with a uniform thickness, and the formation of agglomerates 46 can be suppressed. Therefore, according to the manufacturing method of this embodiment, the generation of defects caused by leakage current can be suppressed.

[0031] Figure 5 The results show the evaluation of the number of agglomerates 46 formed during silicon film formation processes at different temperatures. When the SiC substrate was heated to 1150°C during the silicon film formation process, 3653 agglomerates 46 were formed per wafer. In contrast, at heating temperatures of 1100°C and 900°C, the number of agglomerates 46 formed per wafer was 0. Thus, by controlling the heating temperature of the SiC substrate during the silicon film formation process below 1100°C, the formation of agglomerates 46 can be significantly suppressed.

[0032] Furthermore, the manufacturing method of a trench-type MOS transistor was described in the above embodiments. However, the techniques disclosed in this specification can also be applied to the manufacturing of MOS transistors with a planar gate structure. In this case, the techniques disclosed in this specification enable the formation of a gate insulating film covering the main surface (e.g., the upper surface) of the SiC substrate. However, silicon agglomeration tends to occur within the trench, therefore, by using the techniques disclosed in this specification in a trench-type MOS transistor, higher performance can be obtained.

[0033] The following describes the structure of the technology disclosed in this specification.

[0034] (Structure 1)

[0035] Structure 1 is a method for manufacturing a MOS transistor, comprising: a step of heating a SiC substrate in hydrogen to etch the surface of the SiC substrate; after the etching, heating the SiC substrate in a gas containing hydrogen and silicon raw material gas to a temperature lower than the heating temperature of the SiC substrate during the etching, thereby growing a silicon film on the surface of the SiC substrate; a step of forming a gate insulating film made of silicon oxide on the surface of the silicon film; and a step of performing a nitrogen termination treatment on the SiC substrate after forming the gate insulating film.

[0036] (Structure 2)

[0037] Structure 2 is manufactured according to the manufacturing method described in Structure 1, wherein a trench is provided on the main surface of the SiC substrate, the side surface of the trench is etched in the etching process, the silicon film is grown on the side surface of the trench in the process of growing the silicon film, and the gate insulating film is formed on the surface of the silicon film covering the side surface of the trench in the process of forming the gate insulating film.

[0038] (Structure 3)

[0039] Structure 3 is a manufacturing method according to Structure 1 or Structure 2, wherein in the process of growing the silicon film, the temperature of the SiC substrate is controlled to be below 1100°C.

[0040] (Structure 4)

[0041] Structure 4 is a manufacturing method according to any one of Structures 1 to 3, wherein in the process of growing the silicon film, the temperature of the SiC substrate is controlled to be above the decomposition temperature of the silicon raw material gas.

[0042] (Structure 5)

[0043] Structure 5 is a manufacturing method according to any one of Structures 1 to 4, wherein the thickness of the silicon film is 6 nm or less.

[0044] (Structure 6)

[0045] Structure 6 is a manufacturing method according to any one of Structures 1 to 5, wherein the etching and silicon film growth processes are performed in the same chamber.

[0046] (Structure 7)

[0047] Structure 7 is a manufacturing method according to any one of Structures 1 to 6, wherein a sacrificial oxide film is formed on the surface of the SiC substrate, and then a process of removing the sacrificial oxide film is performed before the etching.

[0048] (Structure 8)

[0049] Structure 8 is manufactured according to any one of Structures 1 to 7, wherein the surface of the SiC substrate is the surface of the epitaxial layer.

[0050] (Structure 9)

[0051] Structure 9 is a manufacturing method according to any one of Structures 1 to 8, wherein the gate insulating film is formed by chemical vapor deposition in the step of forming the gate insulating film.

[0052] (Structure 10)

[0053] Structure 10 is a manufacturing method according to any one of Structures 1 to 9, wherein in the nitrogen termination process, the SiC substrate is heated to a temperature of 1200°C or higher in nitrogen or nitrogen oxide gas.

[0054] According to structure 2, the aggregation of silicon on the side of the trench can be suppressed.

[0055] According to structure 3, silicon aggregation can be suppressed more effectively.

[0056] Structure 4 enables the appropriate growth of silicon films.

[0057] According to structure 5, the silicon film can be appropriately oxidized during the formation of the gate insulating film.

[0058] Structure 6 enables the efficient fabrication of MOS transistors.

[0059] According to structure 7, it is possible to remove defects on the surface of the SiC substrate.

[0060] According to structure 10, the interface state density at the interface between the SiC substrate and the gate insulating film can be further reduced.

[0061] The embodiments have been described in detail above, but these are merely illustrative and do not limit the scope of the claims. The technology described in the claims includes technologies obtained by various modifications and alterations to the specific examples described above. The technical elements described in this specification or drawings exert their technical usefulness individually or in various combinations, and are not limited to the combinations described in the claims at the time of application. Furthermore, the technology illustrated in this specification or drawings achieves multiple objectives simultaneously, and achieving one of these objectives is itself technically useful.

Claims

1. A method for manufacturing a metal oxide film semiconductor transistor, characterized in that, have: The process of heating a SiC substrate in hydrogen to etch the surface of the SiC substrate; The process of heating the SiC substrate to a temperature lower than the heating temperature of the SiC substrate during the etching in a gas containing hydrogen and silicon raw material gas after the etching is performed, thereby growing a silicon film on the surface of the SiC substrate. The process of forming a gate insulating film made of silicon oxide on the surface of the silicon film; and The process of performing nitrogen termination treatment on the SiC substrate after forming the gate insulating film.

2. The manufacturing method according to claim 1, characterized in that, Trenches are formed on the surface of the SiC substrate. In the etching process, the sides of the trench are etched. In the process of growing the silicon film, the silicon film is grown on the sides of the trench. In the process of forming the gate insulating film, the gate insulating film is formed on the surface of the silicon film that covers the sidewalls of the trench.

3. The manufacturing method according to claim 1 or 2, characterized in that, In the process of growing the silicon film, the temperature of the SiC substrate is controlled to be below 1100°C.

4. The manufacturing method according to claim 1 or 2, characterized in that, In the process of growing the silicon film, the temperature of the SiC substrate is controlled to be above the decomposition temperature of the silicon raw material gas.

5. The manufacturing method according to claim 1 or 2, characterized in that, The thickness of the silicon film is less than 6 nm.

6. The manufacturing method according to claim 1 or 2, characterized in that, The etching and silicon film growth processes are performed in the same chamber.

7. The manufacturing method according to claim 1 or 2, characterized in that, A sacrificial oxide film is formed on the surface of the SiC substrate, and then a process for removing the sacrificial oxide film is performed before the etching.

8. The manufacturing method according to claim 1 or 2, characterized in that, The surface of the SiC substrate is the surface of the epitaxial layer.

9. The manufacturing method according to claim 1 or 2, characterized in that, In the process of forming the gate insulating film, the gate insulating film is formed by chemical vapor deposition.

10. The manufacturing method according to claim 1 or 2, characterized in that, In the nitrogen-terminated process, the SiC substrate is heated to a temperature above 1200°C in nitrogen or nitrogen oxide gas.

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