Control method of domain controller, domain controller and vehicle

Abstract

The embodiment of the invention provides a control method of a domain controller, the domain controller and a vehicle, the domain controller comprises a power distribution chip and a power distribution load, and when a whole vehicle sleep instruction is received, a first load current value of the power distribution load is obtained; judging whether the power distribution chip meets a condition of entering a sleep mode according to the first load current value; when the power distribution chip does not meet the sleep mode entering condition, controlling the power distribution chip to be in an awakening mode, and judging whether the power distribution chip meets the sleep mode entering condition or not after a preset time period; if the power distribution chip does not meet the condition of entering the sleep mode after continuous N times of judgment, it is determined that the power distribution chip breaks down, other components, except the power distribution chip, of the vehicle are controlled to be in the sleep mode, the power distribution chip is controlled to be kept in the wake-up mode, and N is a preset value. It can be ensured that the domain controller can operate with the lowest power consumption under different conditions, and the whole vehicle feed risk caused by the fact that a power distribution chip cannot normally sleep is avoided.

Description

Technical Field

[0001] This application relates to the field of control technology, and in particular to a control method for a domain controller, a domain controller, and a vehicle. Background Technology

[0002] With the continuous upgrading of vehicle electronic and electrical architecture, the traditional distributed electronic and electrical architecture has gradually transformed into a new generation of regional architecture. In this new regional architecture, many automotive electronic control units (ECUs) need to implement regional intelligent power distribution functions. Intelligent power distribution not only needs to provide normal power to the load but also needs to have different functions such as current detection and operating mode configuration, replacing the traditional physical fuse function. Some automotive electronic control units (ECUs) not only need to distribute power after the vehicle starts but also need to maintain low power consumption while the vehicle is in sleep mode; this power distribution method is called constant power distribution.

[0003] Currently, the mainstream constant power distribution solution in the industry uses Efuse intelligent power distribution chip for power distribution. Efuse power distribution chip can distribute power to the power distribution load in the vehicle's sleep mode or wake-up mode. However, when the power distribution load is a special load or there is an abnormal operating condition or other fault, the Efuse power distribution chip may be abnormally woken up from the vehicle's sleep mode and unable to sleep, resulting in an excessive dark current in the vehicle and a power outage. Summary of the Invention

[0004] This application provides a domain controller control method, a domain controller, and a vehicle, aiming to improve the problem of abnormal power distribution mode of the power distribution chip due to power distribution load in the current power distribution scheme.

[0005] To address the aforementioned problems, this application discloses a control method for a domain controller, wherein the domain controller includes a power distribution chip and a power distribution load, and the method includes:

[0006] Upon receiving a vehicle hibernation command, the first load current value of the power distribution load is obtained;

[0007] Determine whether the power distribution chip meets the conditions for entering sleep mode based on the first load current value;

[0008] If the power distribution chip does not meet the conditions for entering the sleep mode, the power distribution chip is controlled to be in wake-up mode, and after a preset time period, it is determined whether the power distribution chip meets the conditions for entering the sleep mode.

[0009] If, after N consecutive checks, the power distribution chip does not meet the conditions for entering the sleep mode, it is determined that the power distribution chip has malfunctioned. The system then controls all other components in the vehicle except the power distribution chip to enter sleep mode, and controls the power distribution chip to remain in the wake-up mode. Here, N is a preset value.

[0010] Optionally, the domain controller includes a microprocessor and a sampling resistor, the power distribution load is connected to the sampling resistor, and the step of obtaining the first load current value of the power distribution load when receiving a vehicle sleep command includes:

[0011] Upon receiving a vehicle sleep command, the microprocessor obtains the current value of the sampling resistor.

[0012] The current value of the sampling resistor is determined as the first load current value.

[0013] Optionally, determining whether the power distribution chip meets the conditions for entering sleep mode based on the first load current value includes:

[0014] If the first load current value is greater than or equal to a preset current threshold, the power distribution chip is kept in wake-up mode; the preset current threshold is the critical current value for the power distribution chip to switch from wake-up mode to sleep mode.

[0015] If the first load current value is less than the preset current threshold, the power distribution chip is controlled to enter sleep mode.

[0016] Optionally, the domain controller includes a microprocessor, and the step of determining whether the power distribution chip meets the conditions for entering the sleep mode after a preset time period includes:

[0017] After the preset time period, obtain the second load current value of the power distribution load;

[0018] Based on the second load current value and the preset current threshold, determine whether the power distribution chip meets the conditions for entering the sleep mode;

[0019] If the power distribution chip does not meet the requirements for entering the sleep mode, the power distribution chip is kept in the wake-up mode and the microprocessor is kept in the sleep mode, and the wake-up time period is obtained;

[0020] After the wake-up period, the microprocessor is controlled to enter wake-up mode, and after the preset period, the conditions for the power distribution chip to enter the sleep mode are determined again.

[0021] Optionally, the step of acquiring the wake-up time period includes:

[0022] The number of judgments is the number of consecutive counts starting from the first judgment on whether the power distribution chip meets the conditions for entering the sleep mode;

[0023] The wake-up time period is determined based on the number of judgments.

[0024] Optionally, other components of the vehicle besides the power distribution chip include a microprocessor and a power distribution load.

[0025] Optionally, the method further includes:

[0026] When the power distribution chip meets the requirements for entering the sleep mode, the domain controller is controlled to enter the sleep mode.

[0027] This application also discloses a domain controller, including a memory and a processor, wherein the memory is used to store computer programs; and the processor is used to execute the programs stored in the memory to implement the control method of any of the domain controllers described in this application.

[0028] This application also discloses a vehicle, including the domain controller described in this application embodiment.

[0029] This application also discloses a computer-readable storage medium storing a computer program, which, when executed by a processor, implements any of the methods described in this application.

[0030] The embodiments of this application have the following advantages:

[0031] In this embodiment, the domain controller includes a power distribution chip and a power distribution load. Upon receiving a vehicle sleep command, the controller acquires a first load current value of the power distribution load. Based on the first load current value, it determines whether the power distribution chip meets the conditions for entering sleep mode. If the power distribution chip does not meet the conditions for entering sleep mode, the controller puts the power distribution chip into wake-up mode. After a preset time period, it determines whether the power distribution chip meets the conditions for entering sleep mode. If, after N consecutive determinations, the power distribution chip does not meet the conditions for entering sleep mode, it is determined that the power distribution chip has malfunctioned. The controller then puts all other components of the vehicle except the power distribution chip into sleep mode and keeps the power distribution chip in wake-up mode, where N is a preset value. When the embodiment of this application receives a vehicle sleep command, it can dynamically determine whether the current power distribution chip meets the conditions for entering sleep mode by using the first load current value. In wake-up mode (i.e., the conditions for entering sleep mode are not met), it determines whether the power distribution load meets the conditions for entering sleep mode by multiple delays, and determines whether the power distribution load is faulty. In the case of a power distribution load failure, it controls all other components except the power distribution chip to enter sleep mode, so as to solve the limitations of the current power distribution chip when the power distribution load fails. While taking into account the normal sleep of the power distribution load, it can ensure that the domain controller can operate with the lowest power consumption under different conditions, avoid the risk of vehicle power failure caused by the power distribution chip's inability to sleep normally, and is applicable to power distribution schemes with different power distribution loads, thus having greater versatility. Attached Figure Description

[0032] Figure 1 This is a flowchart of the control method for a domain controller provided in an embodiment of this application;

[0033] Figure 2 This is a schematic diagram of the structure of a domain controller provided in an embodiment of this application;

[0034] Figure 3 This is a schematic diagram of a power distribution load in a normal sleep state, provided in an embodiment of this application.

[0035] Figure 4 This is a schematic diagram of a sleep mode when the power distribution load is a special load, provided in an embodiment of this application;

[0036] Figure 5 This is a schematic diagram of a sleep mode when the power distribution load is abnormal, provided in an embodiment of this application;

[0037] Figure 6 This is a structural diagram of the electronic device provided in the embodiments of this application. Detailed Implementation

[0038] To make the technical problems, technical solutions, and beneficial effects solved by this application clearer, the following detailed description is provided in conjunction with embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0039] Currently, mainstream constant power distribution solutions utilize the Efuse intelligent power distribution chip to distribute power to the loads in both vehicle sleep and wake-up states. Specifically, in vehicle sleep mode, the Efuse power distribution chip is configured via software to enter a low-power mode (sleep mode), i.e., the bypass mode of the chip. During this mode, the chip can supply low-power power to the loads through its internal bypass channel (load current < bypass saturation current). When the vehicle wakes up or the load is awakened, if the load current exceeds the bypass saturation current value, the Efuse chip will automatically switch to an external switching channel to supply power to the load. Therefore, the Efuse power distribution chip can switch between sleep and wake-up modes.

[0040] It should be noted that after the vehicle goes into sleep mode, the wake-up conditions for the domain controller are: (1) a vehicle bus wake-up message and (2) a domain controller peripheral wake-up. The domain controller can be woken up if either of the two conditions is met. The sleep conditions for the domain controller are: (1) a vehicle bus sleep command and (2) no wake-up source for the domain controller peripheral. The domain controller can go into sleep mode if both conditions are met.

[0041] However, the following two special cases may occur during the Efuse power distribution process:

[0042] (1) The power distribution load is a special load, such as a T-BOX. After the T-BOX goes into sleep mode, it will intermittently wake up automatically and connect to the TSP (Telematics Service Provider) backend, but it will not wake up the whole vehicle. After the T-BOX wakes up, the current will return from the sleep current to the normal operating current, and after a certain period of time, it will enter sleep mode again. After waking up, the T-BOX operating current will exceed the Bypass saturation current value in the Efuse low power mode, causing the Efuse to be abnormally woken up.

[0043] (2) The power distribution load has abnormal operating conditions, such as the power distribution load itself having a fault or defect that prevents it from going into hibernation, or an overcurrent during hibernation, that is, the current is abnormally large during hibernation, exceeding the Bypass saturation current value in Efuse low power mode, causing Efuse to be abnormally woken up.

[0044] Both of these situations essentially stem from a fault in the power distribution load downstream of the Efuse power distribution chip during its sleep state. This fault causes the load current of the power distribution load to exceed the bypass saturation current during the sleep state, resulting in the Efuse being abnormally woken up and unable to enter sleep state again. Consequently, the Efuse chip may remain in wake-up mode, leading to a large dark current and causing power loss in the entire vehicle.

[0045] Specifically, the mainstream regional power distribution solution currently uses power distribution chips represented by ST VNF1048. In low-power mode, the minimum switching current of the VNF1048's internal bypass channel is likely 100mA (minimum value). This means that when the load current exceeds 100mA, there is a risk that the Efuse chip will be woken up. When the vehicle is in sleep mode, if the power distribution load changes (such as T-BOX automatic wake-up or abnormal load sleep causing excessive current), and the load current exceeds the bypass current threshold (100mA), the Efuse chip will be woken up, subsequently waking up the domain control ECU unit. Since the vehicle has no network wake-up message, the domain control ECU unit will re-enter the sleep process. If the Efuse power distribution load current remains >100mA, the domain control ECU unit cannot use commands to put the Efuse chip into low-power mode, thus preventing the entire domain control ECU unit from entering sleep mode normally, resulting in a power shortage in the vehicle.

[0046] Because the current-carrying capacity of the bypass switch channel inside the Efuse power distribution chip is limited in low-power mode (sleep), semiconductor manufacturers are unable to further improve the current-carrying capacity of the power distribution chip in low-power mode due to factors such as chip manufacturing process, cost, and heat dissipation. Based on this, this application proposes a power distribution chip control method for the two special load current variations mentioned above, which can avoid the potential risk of vehicle-wide power failure without requiring additional hardware design or increasing costs.

[0047] This application provides a control method for a domain controller. Please refer to [link / reference]. Figure 1 This includes the following steps:

[0048] Step 101: Upon receiving the vehicle hibernation command, obtain the first load current value of the power distribution load;

[0049] Reference Figure 2 This is a schematic diagram of the structure of a domain controller provided in an embodiment of this application. Specifically, the domain controller ECU unit (domain controller) includes a microprocessor (MCU), a power distribution chip (Efuse), a power MOSFET, a sampling resistor, and a load ECU (power distribution load).

[0050] Microprocessor (MCU): The MCU wake-up pin is connected to the Efuse chip diagnostic pin (DIAG pin), that is, it wakes up the MCU by detecting the high and low level changes of the DIAG signal; the MCU controls the Efuse chip interface signal to be either SPI (Serial Peripheral Interface) or IO (Input Output) port, and controls the switching of the power distribution mode of the Efuse chip.

[0051] Power distribution chip: Abbreviated as Efuse, there is no restriction on specific chip models, such as ST's VNF1048 as a representative model. The chip itself has operating mode switching function, low static power consumption current, I2T protection algorithm, etc. The Efuse chip and its peripheral circuits (sampling resistor, power MOSFET) constitute the power distribution circuit. The Efuse power distribution chip has two power distribution paths: one is the power distribution through the closed external power MOSFET Q1, which is the power distribution path when the Efuse is in normal operating mode; the other is the power distribution through the internal bypass switching channel of the Efuse chip to the load, which is the power distribution path when the Efuse chip is in low power mode (sleep mode).

[0052] Power MOSFET Q1: PNP MOSFET (PNP type metal oxide semiconductor field effect transistor), which is driven to open by the Efuse DRV (chip driver) pin. When the MOSFET is closed, the BAT (battery) supplies power to the load ECU.

[0053] Sampling resistor R1: Used to collect the current value of the external switch power distribution path, that is, to collect the power distribution current of the load ECU.

[0054] Load ECU (Electronic Control Unit): Abbreviated as Load, it is an external power distribution load that requires constant power from the Efuse to ensure normal power supply to the load when it is awake or in sleep mode.

[0055] It should be noted that the connection between the above components is identified by conductive material lines (wires), including but not limited to inherited circuit board signal traces. This application embodiment does not limit the material, physical properties, or implementation form of the wires, as long as they meet the charge transfer function.

[0056] The OUT pin of the power distribution chip Efuse is connected to the power distribution load ECU and is used to distribute power to the ECU. When the power distribution chip Efuse is in normal working mode, the load ECU is powered by the external power MOSFET switching path through the OUT pin; when the power distribution chip Efuse is in low power mode, the power is output by the internal bypass channel through the OUT pin.

[0057] In this embodiment of the application, when a vehicle hibernation command is received, in order to determine whether there is a fault in the power distribution load downstream of the power distribution chip that causes the power distribution chip to be abnormally woken up, it is necessary to obtain the first current value of the power distribution load to determine whether the current power distribution load will wake up the power distribution chip.

[0058] Step 102: Determine whether the power distribution chip meets the conditions for entering sleep mode based on the first load current value;

[0059] In this embodiment of the application, based on the first load current value of the power distribution load, it can be determined whether the current power distribution load will wake up the power distribution chip in sleep mode. If it is woken up, it can be determined that the power distribution chip does not meet the conditions for entering sleep mode. If it is not woken up, it can be determined that the power distribution chip meets the conditions for entering sleep mode.

[0060] Step 103: If the power distribution chip does not meet the conditions for entering the sleep mode, control the power distribution chip to be in the wake-up mode, and determine whether the power distribution chip meets the conditions for entering the sleep mode after a preset time period.

[0061] In this embodiment of the application, if the power distribution chip does not meet the conditions for entering the sleep mode, it can be assumed that the power distribution load has experienced abnormal current changes in the sleep mode. At this time, the domain control ECU unit monitors the power distribution chip periodically to determine whether the power distribution chip meets the conditions for entering the sleep mode.

[0062] Specifically, if the power distribution chip does not meet the conditions for entering sleep mode, it is necessary to keep the power distribution chip in wake-up mode and check whether the power distribution chip meets the conditions for entering sleep mode after a preset period of time to determine whether the power distribution chip is faulty. Simply put, by checking whether the power distribution chip meets the conditions for entering sleep mode, it can be determined whether the current load current of the current power distribution load will cause the power distribution chip to be abnormally woken up.

[0063] Step 104: If, after N consecutive judgments, the power distribution chip does not meet the conditions for entering the sleep mode, it is determined that the power distribution chip has malfunctioned. Other components of the vehicle except the power distribution chip are controlled to enter the sleep mode, and the power distribution chip is controlled to maintain the wake-up mode, where N is a preset value.

[0064] In this embodiment of the application, it can be determined whether the load current of the current power distribution load has an abnormal change based on whether the power distribution chip meets the conditions for entering the sleep mode. Specifically, if the power distribution chip does not meet the conditions for entering the sleep mode after N consecutive judgments, it can be considered that the power distribution chip has malfunctioned and cannot sleep normally at this time, that is, the load current of the power distribution load has an abnormal change.

[0065] In this embodiment, N is a preset value. N judgments refer to the limited number of times the sleep conditions of the power distribution chip are judged within a certain time period. By judging whether the power distribution chip meets the conditions for entering the sleep mode through N consecutive judgments, this embodiment can better eliminate the influence of instantaneous interference or accidental factors, so as to determine whether the power distribution chip has failed. This ensures the safety of the vehicle's sleep mode and enables reliable management and response to abnormal situations.

[0066] After confirming that the power distribution chip has failed, in order to ensure that the domain controller can operate with the lowest power consumption under different conditions and avoid the risk of vehicle power failure caused by the power distribution chip's inability to sleep properly, while keeping the power distribution chip in wake-up mode, it is also necessary to keep other components in the vehicle in sleep mode.

[0067] In one embodiment of this application, when it is determined that the power distribution chip has failed, it is also necessary to generate fault information and report it to the vehicle. The fault information can be used to notify the vehicle that the power distribution chip of that circuit has failed.

[0068] When the embodiment of this application receives a vehicle sleep command, it can dynamically determine whether the current power distribution chip meets the conditions for entering sleep mode by using the first load current value. In wake-up mode (i.e., the conditions for entering sleep mode are not met), it determines whether the power distribution load meets the conditions for entering sleep mode by multiple delays, and determines whether the power distribution load is faulty. In the case of a power distribution load failure, it controls all other components except the power distribution chip to enter sleep mode, so as to solve the limitations of the current power distribution chip when the power distribution load fails. While taking into account the normal sleep of the power distribution load, it can ensure that the domain controller can operate with the lowest power consumption under different conditions, avoid the risk of vehicle power failure caused by the power distribution chip's inability to sleep normally, and is applicable to power distribution schemes with different power distribution loads, thus having greater versatility.

[0069] In one embodiment of this application, the domain controller includes a microprocessor and a sampling resistor. The step of acquiring the first load current value of the power distribution load upon receiving a vehicle sleep command includes:

[0070] Upon receiving a vehicle sleep command, the microprocessor obtains the current value of the sampling resistor.

[0071] The current value of the sampling resistor is determined as the first load current value.

[0072] In the embodiments of this application, such as Figure 4 As shown, in addition to the power distribution chip and power distribution load, the domain controller also includes a microprocessor (MCU) and a sampling resistor (R1). Specifically, when the domain controller ECU unit receives the vehicle sleep command, the microprocessor in the domain controller ECU unit obtains the current value of the external power distribution load of the power distribution chip through SPI, that is, reads the current value of the sampling resistor (R1) in the external channel.

[0073] like Figure 4 As shown, the ISP / ISN pin of the power distribution chip is connected to both ends of the sampling resistor R1. By acquiring the voltage across R1 and converting it, the current value of the sampling resistor R1 can be obtained and determined as the first load current value of the power distribution load. It should be noted that all subsequent load current values ​​related to the power distribution load will be determined using this method.

[0074] This application embodiment utilizes a direct connection between the sampling resistor and the power distribution chip pins to obtain the load current through voltage conversion. This method accurately reflects the actual current state of the power distribution load in real time. Furthermore, the method is consistently used to determine the load current, ensuring data consistency and avoiding errors caused by different acquisition methods. The design of the microprocessor reading the current value via SPI and obtaining the current threshold from the power distribution chip register enables efficient acquisition of key parameters for the mode transition from sleep mode to wake-up mode, providing a precise basis for subsequent wake-up of the power distribution chip based on the current threshold. In addition, this integrated design (microprocessor, sampling resistor, and power distribution chip working together) eliminates the need for additional complex hardware, simplifying the circuit structure and reducing costs while ensuring current acquisition accuracy. It also provides stable underlying support for energy consumption control and wake-up response in the vehicle's sleep state.

[0075] In one embodiment of this application, after the domain control ECU unit receives a vehicle sleep command, both the domain control ECU unit and the power distribution load enter sleep mode. At this time, most non-essential circuits stop working to reduce energy consumption. While the power distribution chip enters a low-power sleep state, its internal current detection circuit (including a sampling resistor and a comparator) maintains extremely low-power operation to continuously monitor the load current. When the power distribution load generates current due to external triggers (such as user operation or sensor signals), and the current value does not meet the conditions for entering sleep mode, the power distribution chip will automatically exit sleep mode and enter wake-up mode. Simultaneously, it generates a DIAG (diagnosis) diagnostic signal and sends it to the microprocessor to wake it up. After being woken up, the microprocessor can respond to and process the wake-up event, ensuring a rapid response when needed, while avoiding unnecessary energy consumption and false wake-ups during sleep mode.

[0076] In one embodiment of this application, determining whether the power distribution chip meets the conditions for entering sleep mode based on the first load current value includes:

[0077] If the first load current value is greater than or equal to a preset current threshold, the power distribution chip is kept in wake-up mode; the preset current threshold is the critical current value for the power distribution chip to switch from wake-up mode to sleep mode.

[0078] If the first load current value is less than the preset current threshold, the power distribution chip is controlled to enter sleep mode.

[0079] Specifically, when the first load current value is greater than or equal to the preset current threshold, it indicates that the power distribution load has a high power demand (such as an external trigger signal causing the load to need to work normally). In this case, it can be understood that the power distribution chip does not meet the conditions for entering the sleep mode, and the power distribution chip needs to be kept in the wake-up mode. When the first load current value is less than the preset current threshold, it indicates that the power distribution load has an extremely low power demand (in a low-power state or without additional operation). In this case, it can be understood that the power distribution chip meets the conditions for entering the sleep mode, and the power distribution chip can be configured to enter the sleep mode.

[0080] In this embodiment, the first load current value can be understood as the load current value I0 of the power distribution load before the power distribution chip enters the sleep mode, and the preset current threshold can be understood as the bypass current threshold I1 of the power distribution chip. Generally, the preset current threshold is stored in the register inside the power distribution chip. At this time, the microprocessor can obtain the preset current threshold by reading the register of the power distribution chip. Specifically, the preset current threshold can be simply understood as the switching condition of the power distribution chip between sleep mode and wake-up mode, that is, whether the power distribution chip meets the condition for entering the sleep mode.

[0081] like Figure 2 As shown, the DRV pin is the driver pin for the Efuse chip, connected to the power MOSFET. When the power distribution chip is in wake-up mode, the DRV pin controls the external power MOSFET Q1 to turn on and the internal bypass switch channel of the Efuse chip to turn off. This is the power distribution path for the power distribution chip in wake-up mode (normal operating mode). When the power distribution chip is in sleep mode, the external power MOSFET Q1 is turned off, and the internal bypass switch channel of the Efuse chip is closed. This is the power distribution path for the power distribution chip in sleep mode (low-power mode). It can be understood that the power MOSFET Q1 is the power distribution path when the power distribution chip is operating normally externally, and the bypass switch channel is the power distribution path when the power distribution chip is operating in low-power mode internally. The power MOSFET Q1 and the bypass switch channel can be considered mutually exclusive; only one can be on at a time, while the other is off.

[0082] In this embodiment, after the domain control ECU unit receives a sleep command, it does not directly control the power distribution chip to enter sleep mode. Instead, it first compares the first load current value with a preset current threshold to determine whether the sleep conditions are met. If the power load still has a high power demand (first load current value ≥ preset current threshold), the power distribution chip is kept in wake-up mode to ensure normal load operation and prevent functional interruption due to forced sleep. If the load power demand has dropped to a sleep-friendly level (first load current value < preset current threshold), the power distribution chip is controlled to enter sleep mode to achieve low power consumption. Simultaneously, the current signal-based judgment method directly reflects the actual load state, ensuring the rationality of entering sleep mode and the necessity of maintaining wake-up mode. This balances the execution of sleep commands with the continuity of load operation, improving the power distribution reliability of the domain control ECU unit in sleep scenarios.

[0083] In one embodiment of this application, the domain controller includes a microprocessor, and the step of determining whether the power distribution chip meets the conditions for entering the sleep mode after a preset time period includes:

[0084] After the preset time period, obtain the second load current value of the power distribution load;

[0085] Based on the second load current value and the preset current threshold, determine whether the power distribution chip meets the conditions for entering the sleep mode;

[0086] If the power distribution chip does not meet the requirements for entering the sleep mode, the power distribution chip is kept in the wake-up mode and the microprocessor is kept in the sleep mode, and the wake-up time period is obtained;

[0087] After the wake-up period, the microprocessor is controlled to enter wake-up mode, and after the preset period, the conditions for the power distribution chip to enter the sleep mode are determined again.

[0088] If the current of the power distribution load does not meet the requirements for the power distribution chip to enter sleep mode (i.e., the power distribution chip is still in wake-up mode), the microprocessor (MCU) needs to wait for a preset time period T0 before reading the load current (second load current value) of the power distribution load again. Based on this current value and a preset current threshold, it is further determined whether the current of the power distribution load meets the requirements for the power distribution chip to enter sleep mode after the preset time period. The determination method at this time is the same as the comparison method based on the first load current value and the current threshold mentioned above, and will not be repeated here. It should be noted that the second load current value here can still be understood as the load current value of the power distribution load before the power distribution chip enters sleep mode; therefore, it must be compared with the preset current threshold I1 for judgment.

[0089] If, after a preset time period T0, the current of the power distribution load still does not meet the conditions for the power distribution chip to enter sleep mode, that is, the power distribution mode of the power distribution chip remains in wake-up mode, then it is necessary to control the microprocessor MCU to enter sleep mode and maintain the power distribution chip in normal working mode (wake-up mode) for normal power supply.

[0090] After the microprocessor (MCU) enters sleep mode, it is necessary to wake up the MCU automatically. Specifically, it is necessary to obtain the wake-up time period corresponding to this wake-up. The wake-up time period refers to the interval between when the microprocessor is woken up from sleep state (i.e., the time to remain in sleep after a single sleep). It can be understood as a timing cycle RTC (Real-Time Clock), which can be generated by the clock inside the microprocessor (MCU).

[0091] In this embodiment, after the RTC timing period ends, the microprocessor (MCU) is woken up, i.e., the microprocessor is controlled to enter wake-up mode. This wake-up operation is achieved by the DIAG signal generated by the power distribution chip. Upon receiving this signal, the microprocessor is woken up. After the MCU is woken up, the load current of the power distribution load needs to be detected again to further determine whether the current load current meets the conditions for the power distribution chip to enter sleep mode. Specifically, after a preset time period since the MCU was woken up, the load current value of the power distribution load is compared with a preset current threshold to determine whether the power distribution chip meets the conditions for entering sleep mode. This avoids measurement errors caused by unstable circuit states (such as instantaneous fluctuations in the current signal) immediately after the microprocessor is woken up, ensuring that the acquired load current value accurately reflects the stable operating state of the power distribution load. In this way, the judgment based on the current value, the preset current threshold, and the wake-up time period is more accurate, reducing misjudgments caused by instantaneous current anomalies and providing accurate current data support for subsequent judgments on whether the load has continuous abnormal power consumption.

[0092] It should be noted that if the power distribution chip does not switch from wake-up mode to sleep mode, the obtained load current value can still be understood as the load current value I0 of the power distribution load before the power distribution chip enters sleep mode. Therefore, it is necessary to compare and judge with the preset current threshold I1.

[0093] This application embodiment detects load current in stages (acquiring load current values ​​multiple times and combining them with threshold judgment) and introduces a wake-up time period, which can accurately capture abnormal change trends of power distribution load current. This avoids energy waste caused by continuous operation of the microprocessor, and ensures reliable capture and response to abnormal current events even at extremely low power consumption by combining timed wake-up and preset time periods. This achieves efficient monitoring of the power distribution load current status, improves the domain controller's ability to perceive power distribution load anomalies and the fineness of energy consumption control.

[0094] In one embodiment of this application, obtaining the wake-up time period includes:

[0095] The number of judgments is the number of consecutive counts starting from the first judgment on whether the power distribution chip meets the conditions for entering the sleep mode;

[0096] The wake-up time period is determined based on the number of judgments.

[0097] In this embodiment, the number of judgments refers to the consecutive count n starting from the first judgment of whether the power distribution chip meets the conditions for entering sleep mode. This can be understood as the consecutive loop count n of the microprocessor MCU entering sleep mode due to insufficient load current and being woken up by the RTC timer and then re-checking. Based on the number of judgments, the RTC timer wake-up interval (wake-up time period) set after the microprocessor MCU enters sleep mode in each loop is determined. Therefore, the wake-up time period is not fixed but dynamically calculated based on the number of judgments n.

[0098] It is understood that the second load current value in the embodiments of this application refers to the load current value obtained after the wake-up time period of the first timing cycle RTC plus the preset time period. Similarly, the load current values ​​collected subsequently are all the load current values ​​obtained after the wake-up time period of the (n-1)th timing cycle RTC plus the preset time period.

[0099] Specifically, the wake-up time period differs for each time period RTC. The wake-up time period for each time period RTC is doubled from the wake-up time period of the previous time period RTC. That is, the wake-up time period for the first time period RTC is T1, for the second time period it is 2*T1, for the third time period it is 4*T1, for the fourth time period it is 8*T1, and so on, with the wake-up time period for the nth time period RTC being 2*T1. n-1*T1. It should be noted that the wake-up time period is continuously doubled according to the timing cycle, rather than gradually increasing by the same amount of time, because gradually increasing the time would lead to an increase in the average current consumption.

[0100] In one embodiment of this application, a wake-up time threshold T2 is also required. This wake-up time threshold refers to the maximum allowed sum of wake-up time periods corresponding to all RTC timing cycles during the periodic wake-up process initiated by the microprocessor due to the power distribution chip's inability to enter sleep mode. By introducing the wake-up time threshold T2, the total wake-up time of all timing cycles' RTCs can be constrained to not exceed the wake-up time threshold T2, i.e., T1 + 2 * T1 + ... + 2. n-1 *T1≤T2. Under this condition, based on the wake-up time threshold T2 and the wake-up time period T1 corresponding to the first timing cycle RTC, the upper limit of the number of judgments n can be determined. At this time, the upper limit of n is the preset value N. The actual meaning of N is: after a maximum of N consecutive judgments, if the power distribution load current continues to be abnormal, causing the power distribution chip to be unable to enter sleep mode, then the power distribution load is determined to be faulty; conversely, as long as the load current of the power distribution load is less than the current threshold in any timing cycle RTC, that is, when the number of judgments n is less than N, it can be determined that the load current of the power distribution load does not change abnormally, that is, the power distribution load is not faulty, and the power distribution chip meets the conditions for entering sleep mode.

[0101] Reference Figure 3 This is a schematic diagram of a hibernation process when the power distribution load is normal, provided in an embodiment of this application. First, the vehicle CAN bus sends a hibernation command, and each domain controller (domain control ECU unit) starts the hibernation process. As a lower-level load of the domain controller, the power distribution load will hibernate first, and finally the domain controller will hibernate (it needs to be determined in conjunction with the load current and current threshold of the power distribution load).

[0102] Reference Figure 4 This is a schematic diagram of a sleep mode when the power distribution load is a special load, provided in an embodiment of this application. In the initial stage, the sleep process is the same as the sleep process when the power distribution load is normal. However, when the power distribution load is a special load, the power distribution load will wake up on its own. At this time, the load current exceeds the current threshold, and then the domain controller is triggered to wake up. This reflects the order of wake-up. Finally, the domain controller ECU unit goes into sleep mode (which needs to be determined by combining the timing cycle RTC, current threshold, and load current).

[0103] Reference Figure 5This is a schematic diagram of a hibernation process when the power distribution load is abnormal, provided in an embodiment of this application. In the initial stage, the hibernation process is the same as the hibernation process when the power distribution load is normal. However, when the power distribution load is abnormal, the power distribution load will also wake up on its own. At this time, the load current exceeds the current threshold, and then the domain controller is triggered to wake up. This reflects the order of wake-up. Finally, the domain controller ECU unit goes into hibernation (which needs to be judged in combination with the timing period RTC, the preset current threshold, and the load current).

[0104] like Figure 4 and Figure 5 As shown, Figure 5 Includes Figure 4 In that case, that is Figure 5 In this process, as long as the power distribution load goes into sleep mode on any RTC, it will return to normal. Figure 4 The process can be understood as follows: Figure 5 This describes a process under extreme circumstances.

[0105] This application's embodiments employ a timing cycle design that doubles the wake-up time period, combined with the constraint that the total wake-up time does not exceed the wake-up time threshold. This design can accurately capture the current change trend of the power distribution load through multiple detections, while avoiding the detection process from taking up too much time and affecting the normal operation of other functions. When the load current is continuously abnormal, the fault can be determined in a timely manner, and when the current returns to normal, the absence of a fault can be quickly confirmed. This achieves efficient and accurate detection of power distribution load faults. At the same time, by extending the wake-up time period in a stepped manner, the energy consumption caused by frequent microprocessor wake-ups is reduced, thus balancing detection accuracy and energy consumption control.

[0106] In one embodiment of this application, the wake-up time period, wake-up time threshold, and preset time period mentioned above are calibration values ​​obtained by combining power distribution load characteristics, domain controller sleep process, vehicle power management, etc.

[0107] In one embodiment of this application, the vehicle's other components besides the power distribution chip include a microprocessor and a power distribution load.

[0108] In this embodiment, after the power distribution chip is set to wake-up mode, it must maintain its power supply circuit to ensure continuous power distribution to loads that may be malfunctioning but still require power. At this time, other components within the domain controller, such as the microprocessor that has completed detection and control command transmission, and the loads powered by this power distribution chip, no longer need to operate; continuing to operate would only increase unnecessary energy consumption.

[0109] Therefore, it is necessary to put all components within the domain controller, except for the power distribution chip, into sleep mode and terminate the timer cycle (RTC). Specifically, all components within the domain controller, excluding the power distribution chip, mainly include: putting the microprocessor into sleep mode to stop unnecessary operations, and putting the power distribution loads into sleep mode to cut off unnecessary current consumption paths. By putting these components into sleep mode, the overall power consumption of the domain controller can be minimized.

[0110] In the special case where the power distribution chip cannot hibernate normally due to abnormal load current, the embodiments of this application can also put other components of the domain controller into hibernation mode by precisely controlling them. This concentrates the power consumption of the domain controller on the necessary power supply link of the power distribution chip, ensuring that the domain controller can operate with the lowest power consumption under special circumstances. This avoids the surge in power consumption caused by multiple components working at the same time, thereby reducing the risk of power failure of the whole vehicle due to long-term high power consumption operation.

[0111] In one embodiment of this application, the method further includes:

[0112] When the power distribution chip meets the requirements for entering the sleep mode, the domain controller is controlled to enter the sleep mode.

[0113] When the power distribution chip meets the requirements for entering sleep mode, that is, when there is no abnormal change in the load current of the power distribution load, it is necessary to control the power distribution chip to supply power in low power mode (sleep mode), that is, the entire domain control ECU unit enters low power mode.

[0114] Specifically, such as Figure 2 As shown, the microprocessor (MCU) and the power distribution chip (Efuse) are connected via DIAG and SPI signals. The microprocessor uses SPI to configure the Efuse to enter different power distribution modes. Under normal conditions, DIAG is high, meaning the Efuse is high in both normal operation and low-power mode. In low-power mode, if the current change of the external load ECU exceeds the bypass current capacity, the Efuse triggers a change in the DIAG level (from high to low) to wake up the MCU, thereby waking up the entire domain control ECU unit.

[0115] This application embodiment achieves precise adaptation between the power distribution mode and the actual load state. When the power distribution chip meets the conditions for entering sleep mode (i.e., the load current is normal), switching the power distribution chip from wake-up mode to sleep mode can reduce energy consumption in a timely manner, which meets the low power consumption requirements of the domain controller ECU unit. This control logic not only ensures the reliability of power supply in fault scenarios, but also takes into account the energy consumption optimization in normal scenarios, so that the working mode of the power distribution chip is always matched with the load demand, further improving the stability and energy efficiency of the domain controller.

[0116] It should be noted that the comparison between the load current value I0 before the power distribution chip enters sleep mode and the bypass current threshold I1 of the power distribution chip in this embodiment of the application has the following overall judgment logic:

[0117] (1) If I0 < I1, the power distribution chip is considered to meet the conditions for entering the sleep mode and can enter the sleep process. At this time, the power distribution chip is configured to sleep mode (i.e., bypass mode).

[0118] (2) If the power distribution chip successfully enters sleep mode (i.e., the power distribution chip is in sleep mode), and the load current value of the power distribution load suddenly increases to I2: if I2 < I1, the power distribution chip will remain in sleep mode; if I2 > I1, the power distribution chip will automatically exit sleep mode and enter wake-up mode.

[0119] (3) If I0 > I1, it is considered that the power distribution chip does not meet the conditions for entering the sleep mode, and the power distribution chip is kept in the working mode (wake-up mode).

[0120] This application also provides an electronic device 60, please refer to... Figure 6 It includes a processor 610 and a memory 620, wherein the memory 610 is used to store computer programs; the processor 620 is used to execute the programs stored in the memory 610 to implement the domain controller control method described in any embodiment of this application.

[0121] This application also provides a domain controller, including a memory and a processor, wherein the memory is used to store computer programs; and the processor is used to execute the programs stored in the memory to implement the control method of any of the domain controllers described in this application.

[0122] This application also provides a vehicle, including the domain controller described in this application embodiment.

[0123] This application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the domain controller control method described in any embodiment of this application.

[0124] In this application, "multiple" refers to two or more.

[0125] In this application, unless otherwise expressly defined, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0126] The terms “first,” “second,” “third,” “fourth,” etc., in this application (if present) are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0127] In this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, in this application, the character " / " generally indicates that the preceding and following related objects have an "or" relationship.

[0128] Unless otherwise specified, all steps in this application may be performed sequentially or randomly. For example, if the method includes steps A and B, it means that the method may include steps A and B performed sequentially, or it may include steps B and A performed sequentially. For example, if the method may also include step C, it means that step C may be added to the method in any order. For example, the method may include steps A, B, and C, or it may include steps A, C, and B, or it may include steps C, A, and B, etc.

[0129] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A control method for a domain controller, characterized in that, The domain controller includes a power distribution chip and a power distribution load, and the method includes: Upon receiving a vehicle hibernation command, the first load current value of the power distribution load is obtained; Determine whether the power distribution chip meets the conditions for entering sleep mode based on the first load current value; If the power distribution chip does not meet the conditions for entering the sleep mode, the power distribution chip is controlled to be in wake-up mode, and after a preset time period, it is determined whether the power distribution chip meets the conditions for entering the sleep mode. If, after N consecutive checks, the power distribution chip does not meet the conditions for entering the sleep mode, it is determined that the power distribution chip has malfunctioned. The system then controls all other components in the vehicle except the power distribution chip to enter sleep mode, and controls the power distribution chip to remain in the wake-up mode. Here, N is a preset value.

2. The method according to claim 1, characterized in that, The domain controller includes a microprocessor and a sampling resistor. The power distribution load is connected to the sampling resistor. The step of acquiring the first load current value of the power distribution load upon receiving a vehicle sleep command includes: Upon receiving a vehicle sleep command, the microprocessor obtains the current value of the sampling resistor. The current value of the sampling resistor is determined as the first load current value.

3. The method according to claim 1, characterized in that, The step of determining whether the power distribution chip meets the conditions for entering sleep mode based on the first load current value includes: If the first load current value is greater than or equal to a preset current threshold, the power distribution chip is kept in wake-up mode; the preset current threshold is the critical current value for the power distribution chip to switch from wake-up mode to sleep mode. If the first load current value is less than the preset current threshold, the power distribution chip is controlled to enter sleep mode.

4. The method according to claim 3, characterized in that, The domain controller includes a microprocessor, and the step of determining whether the power distribution chip meets the conditions for entering the sleep mode after a preset time period includes: After the preset time period, obtain the second load current value of the power distribution load; Based on the second load current value and the preset current threshold, determine whether the power distribution chip meets the conditions for entering the sleep mode; If the power distribution chip does not meet the requirements for entering the sleep mode, the power distribution chip is kept in the wake-up mode and the microprocessor is kept in the sleep mode, and the wake-up time period is obtained; After the wake-up period, the microprocessor is controlled to enter wake-up mode, and after the preset period, the conditions for the power distribution chip to enter the sleep mode are determined again.

5. The method according to claim 4, characterized in that, The wake-up time period includes: The number of judgments is the number of consecutive counts starting from the first judgment on whether the power distribution chip meets the conditions for entering the sleep mode; The wake-up time period is determined based on the number of judgments.

6. The method according to claim 1, characterized in that, Other components of the vehicle besides the power distribution chip include a microprocessor and a power distribution load.

7. The method according to claim 1, characterized in that, The method further includes: When the power distribution chip meets the requirements for entering the sleep mode, the domain controller is controlled to enter the sleep mode.

8. A domain controller, characterized in that, include: Memory and processor, wherein memory is used to store computer programs; A processor for executing a program stored in memory to implement the method described in any one of claims 1-7.

9. A vehicle, characterized in that, Includes the domain controller as described in claim 8.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the method described in any one of claims 1-7.

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