Output overshoot suppression circuit, suppression method and switching converter

Abstract

The present application provides an output overshoot suppression circuit, suppression method and switching converter, the output overshoot suppression circuit comprising: an overshoot detection circuit for comparing a feedback voltage representing an output voltage with a reference voltage to generate an overshoot protection signal; and the control circuit is used for controlling to disconnect a current path of the inductor in the first time after receiving the effective overshoot protection signal so as to increase the voltage difference between the two ends of the inductor, and controlling to connect a follow current path of the inductor after the first time is ended. According to the invention, the decline slope of the inductive current can be increased during output overshoot, so that the inductive current rapidly declines to a zero point, thereby greatly reducing the overshoot amplitude of the output voltage, and ensuring that a system and a post-stage load work in a safe voltage range.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of switching power supply, in particular to an output overshoot suppression circuit, a suppression method and a switching converter. BACKGROUND

[0002] Nowadays, the application of a large number of intelligent terminals and handheld devices puts forward higher and higher requirements on the load current mutation and output fast transient response of the switching converter (such as DC-DC converter). The switching converter with excellent transient response capability is more and more favored by customers. The existing switching converter can maintain stable output in the case of light load and heavy load. However, when the load changes from heavy load to light load, the large current on the inductor needs a certain time to discharge to zero, which causes the output voltage of the switching converter to be affected by the inductor current and the overshoot phenomenon occurs, affecting the safety of the subsequent load. SUMMARY

[0003] In order to solve the above technical problems, the present application provides an output overshoot suppression circuit, a suppression method and a switching converter, which aims to reduce the output voltage overshoot when the load jumps and ensure that the system and the subsequent load work in a safe voltage range.

[0004] According to the first aspect of the present application, a switching converter is provided, which is applied to a switching converter, and the switching converter comprises: an inductor, a main power tube and a synchronous rectification tube, a common connection node of the inductor, the main power tube and the synchronous rectification tube is a switching node,

[0005] The output overshoot suppression circuit comprises:

[0006] An overshoot detection circuit compares a feedback voltage representing an output voltage and a reference voltage to generate an overshoot protection signal;

[0007] A control circuit controls to disconnect the current path of the inductor within a first time after receiving the valid overshoot protection signal, so as to increase the voltage difference across the inductor, and controls to connect the freewheeling path of the inductor after the first time ends.

[0008] Optionally, the control circuit controls to disconnect the current path of the inductor in response to the following operations:

[0009] Controlling the main power tube to be turned off, and the body diode of the main power tube is opposite to the direction of the inductor current;

[0010] Controlling the synchronous rectification tube to be turned off, and the body diode of the synchronous rectification tube is opposite to the direction of the inductor current.

[0011] Optionally, the control circuit connects the control end of the synchronous rectifier to the output end or the switching node of the switching converter to turn off the synchronous rectifier.

[0012] Optionally, the switching converter is a step-up converter, and when the synchronous rectifier is a PMOS transistor, the control circuit connects the control end of the synchronous rectifier to the high potential end of the output end, and when the synchronous rectifier is an NMOS transistor, the control circuit connects the control end of the synchronous rectifier to the switching node.

[0013] Alternatively, the switching converter is a step-down converter, and when the synchronous rectifier is a PMOS transistor, the control circuit connects the control end of the synchronous rectifier to the switching node, and when the synchronous rectifier is an NMOS transistor, the control circuit connects the control end of the synchronous rectifier to the low potential end of the output end.

[0014] Optionally, the control circuit connects the control end of the synchronous rectifier to the first voltage to turn off the synchronous rectifier,

[0015] wherein when the switching converter is a step-up converter and the synchronous rectifier is a PMOS transistor, the first voltage is greater than the output voltage;

[0016] when the switching converter is a step-down converter and the synchronous rectifier is an NMOS transistor, the first voltage is less than the low potential of the output end.

[0017] Optionally, the reference voltage is equal to a reference voltage, or the reference voltage is equal to the sum of the reference voltage and a bias voltage, and the switching converter converts the input voltage to the output voltage based on the reference voltage.

[0018] Optionally, the synchronous rectifier has a first end, a second end, a body end, and a control end;

[0019] The body diode of the synchronous rectifier includes a first diode between the first end and the body end, and a second diode between the second end and the body end.

[0020] The direction of the first diode is the same as the direction of the inductor current.

[0021] The direction of the second diode is opposite to the direction of the inductor current.

[0022] During the first time, the control circuit shorts the first diode.

[0023] Optionally, the synchronous rectifier includes:

[0024] a first transistor, a body diode direction of the first transistor is same as a direction of inductor current;

[0025] a second transistor, a body diode direction of the second transistor is opposite to the direction of inductor current;

[0026] controlling the second transistor to be off in the first time.

[0027] Optionally, the control circuit is further configured to:

[0028] controlling a body diode direction of the synchronous rectifier to be same as the direction of inductor current when the inductor current drops to zero.

[0029] According to a second aspect of the present application, there is provided a switching converter comprising the output overshoot suppression circuit according to any of the embodiments of the present application.

[0030] According to a third aspect of the present application, there is provided an output overshoot suppression method for a switching converter, the switching converter comprising an inductor, a main power transistor and a synchronous rectifier, a common connection node of the inductor, the main power transistor and the synchronous rectifier being a switching node,

[0031] the output overshoot suppression method comprising:

[0032] comparing a feedback voltage representing an output voltage and a reference voltage to determine whether an output voltage of the switching converter has an overshoot;

[0033] controlling a current path of the inductor to be disconnected in a first time when the overshoot is detected to increase a voltage difference across the inductor;

[0034] controlling a freewheeling path of the inductor to be connected after the first time ends.

[0035] Optionally, the controlling the current path of the inductor to be disconnected comprises:

[0036] controlling the main power transistor to be off, a body diode direction of the main power transistor being opposite to the direction of inductor current;

[0037] controlling the synchronous rectifier to be off, a body diode direction of the synchronous rectifier being opposite to the direction of inductor current.

[0038] Optionally, a control terminal of the synchronous rectifier is connected to an output of the switching converter or the switching node to control the synchronous rectifier to be off.

[0039] Optionally, the method further comprises: controlling the body diode direction of the synchronous rectifier to be same as the direction of inductor current after the inductor current drops to zero.

[0040] The beneficial effects of the present application at least include:

[0041] The embodiment of the present application monitors the output voltage of the switching converter to determine whether an overshoot occurs, and controls the current path of the inductor to be disconnected within the first time after the output voltage is monitored to have an overshoot, thereby increasing the voltage difference across the inductor based on the characteristic that the inductor current cannot change abruptly, and then controls the freewheeling path of the inductor to be connected to the output node after the first time ends. Since the voltage difference across the inductor has been pulled up when the inductor current freewheels, the falling slope of the inductor current can be increased, the inductor current is rapidly reduced to zero in a short time, the overshoot of the inductor current to the output voltage when the load changes is reduced, the system and the subsequent load are ensured to work in a safe voltage range, and the overshoot protection method is simple.

[0042] It should be noted that the foregoing general description and the following detailed description are only exemplary and explanatory, and cannot limit the present application. BRIEF DESCRIPTION OF DRAWINGS

[0043] Figure 1 A structural schematic diagram of a switching converter is shown;

[0044] Figure 2 A waveform schematic diagram of the switching converter in Figure 1 when the load changes is shown;

[0045] Figure 3 A structural schematic diagram of a switching converter provided by the first embodiment of the present application is shown;

[0046] Figure 4 A structural schematic diagram of a switching converter provided by the second embodiment of the present application is shown;

[0047] Figure 5 A waveform schematic diagram of the switching converter provided by the embodiments of the present application when the load changes is shown;

[0048] Figure 6 A flowchart of a control method of the switching converter provided by the embodiment of the present application is shown. DETAILED DESCRIPTION

[0049] In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the related drawings. The preferred embodiments of the present application are shown in the drawings. However, the present application can be realized in different forms, and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0050] Reference within the specification to "one embodiment" or "an embodiment" or "some embodiments" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the application. The appearances of the phrase "in one embodiment" or "in some embodiments" in various places within the specification are not necessarily all referring to the same embodiment, although it can. The terms "including," "comprising," "having" and variations thereof are meant to encompass the items listed thereafter and equivalents thereof as well as additional items. The terms "coupled" and "connected," and variations thereof, are intended to encompass a connection between two or more elements, which is sufficed only by the direct connection between these elements, but can also be evidenced by an electrical connection between these elements where a signal, if present is used to enable, allow or create a connection between these two elements.

[0051] In the description of the application, the word "exemplary" or "for example" is used to mean serving as an example, instance, or illustration. Any implementation described as "exemplary" or "for example" is not necessarily to be construed as preferred or advantageous over other implementations. The term "and / or" as used in a phrase such as "A and / or B" herein is intended to include both "A and B" and "A or B" and "A and B or not A" and "A or not A and B" and "not A and B" and "not A or not B" and "not A and not B" as well. The term "plurality" as used herein means two or more. In addition, the use of "first", "second", etc. in the description of the application is not meant to denote a particular order or precedence, but is simply used to distinguish one item from another. The skilled person will understand that "first", "second", etc. does not mean a fixed order or precedence, and that "first", "second", etc. does not mean different.

[0052] In addition, the same reference numbers in different drawings represent the same or similar elements, and thus repeated description of the same or similar elements will be omitted. Each part is described in a parallel and progressive manner in the specification, and each part focuses on the difference from other parts. The same or similar parts between parts can be understood by referring to each other.

[0053] The output voltage overshoot problem of the switching converter when the load jumps is described herein by taking a boost converter as an example. It should be understood that the technical solutions disclosed in the embodiments of the application are also applicable to buck converters, and only need to be adjusted according to the structural difference between the boost circuit and the buck circuit, and the same inventive concept is followed.

[0054] As Figure 1As shown, the power stage circuit of the boost type switching converter generally comprises an inductor L1, a main power tube Q1, a rectifier tube Q2, an input capacitor Ci and an output capacitor Co, the inductor L1 is connected between the positive electrode of the input voltage Vin and the drain of the main power tube Q1, the source of the main power tube Q1 is grounded, when the rectifier tube Q2 is a PMOS transistor, the source of the rectifier tube Q2 is connected to the drain of the main power tube Q1, the drain of the rectifier tube Q2 is connected to the positive electrode of the output voltage Vo, the negative electrode of the output voltage Vo is grounded, and the main power tube Q1 and the rectifier tube Q2 control the switching state through the PWM signal to achieve the purpose of controlling the output voltage Vo. Wherein, I L represents the inductor current, Io represents the load current, and Rload represents the size of the load.

[0055] Figure 1 The switching converter shown in the figure can maintain stable output in the case of light load and heavy load. However, when the load changes from heavy load to light load, it takes a certain time for the large current on the inductor to discharge to zero, resulting in that the output voltage Vo of the switching converter is affected by the inductor current I L , and the overshoot phenomenon occurs, as shown in Figure 2 , when the load changes from heavy load to light load, the output voltage Vo will have an overshoot of ΔV1, and due to the large overshoot, the safety of the subsequent load is affected.

[0056] One solution is to speed up the response speed of the control loop (not shown) of the switching converter, and try to quickly pull down the inductor current I L , but this solution has a certain effect on the buck converter (buck type switching converter), but for the boost converter (boost type switching converter), due to the problem of right half plane zero point, the response speed of the loop cannot be fast, and the heavier the load, the more serious the problem, and the regulation loop has little effect on reducing the overshoot amplitude of the output voltage Vo.

[0057] Based on this, a new switching converter scheme is provided in the present application, and the switching converter scheme provided by the embodiments of the present application will be specifically introduced below taking the boost type switching converter (boost converter) as an example:

[0058] As shown in Figure 3 and Figure 4As shown, the switching converter provided by the embodiments of the present application comprises an inductor L1, a main power tube Q1, a synchronous rectification tube, and an output overshoot suppression circuit 30. The inductor L1 is coupled between the positive pole of an input voltage Vin of the switching converter and a switching node SW. The main power tube Q1 is coupled between the switching node SW and a reference ground (e.g., the negative pole of the input voltage Vin). The synchronous rectification tube is coupled between the switching node SW and an output node (e.g., the positive pole of an output voltage Vo). The negative pole of the output voltage Vo is coupled to the reference ground. In other words, the switching node SW is a common connection node of the main power tube Q1, the synchronous rectification tube, and the inductor L1. An input capacitor Ci is connected in parallel across the input voltage Vin, and an output capacitor Co is connected in parallel across the output voltage Vo. Wherein, I L represents the inductor current, and Io represents the load current. Rload equivalently represents the size of the load.

[0059] The output overshoot suppression circuit 30 further comprises an overshoot detection circuit 31 and a control circuit 32.

[0060] The overshoot detection circuit 31 compares a feedback voltage VFB representing the output voltage Vo with a reference voltage to generate an overshoot protection signal Vo_os. In the embodiments, the overshoot detection circuit 31 generates a valid overshoot protection signal Vo_os when the feedback voltage VFB representing the output voltage Vo is greater than the reference voltage, and generates an invalid overshoot protection signal Vo_os otherwise. The overshoot detection circuit 31 may, for example, be implemented by a comparison circuit.

[0061] Optionally, in some embodiments, the reference voltage is equal to the aforementioned reference voltage Vref. In other embodiments, the reference voltage is equal to the sum of the aforementioned reference voltage Vref and a bias voltage offset, so that a more reasonable range detection can be achieved, avoiding the influence of reasonable fluctuations of the output voltage Vo on the detection result, and facilitating the improvement of the accuracy of the overshoot detection.

[0062] In the embodiments, the feedback voltage VFB of the output voltage Vo can be obtained by means of resistance voltage division. For example, the output voltage Vo is divided by a resistor R1 and a resistor R2 to obtain the feedback voltage VFB.

[0063] The control circuit 32 is connected with the overshoot detection circuit 31, receives the overshoot protection signal Vo_os, and after receiving a valid overshoot protection signal Vo_os, controls to disconnect the current path of the inductor L1 within a first time to increase the voltage difference across the inductor L1, and controls to connect the freewheeling path of the inductor L1 after the first time ends.

[0064] In the switching converter, the main power tube Q1 controls the on-off of the energy storage path of the inductor L1, and the synchronous rectification tube controls the on-off of the freewheeling path of the inductor L1. When the main power tube Q1 is turned on, the inductor L1 stores energy, and the inductor current rises. When the synchronous rectification tube is turned on, the inductor L1 releases energy, and the inductor current falls. Further, in some embodiments, the control circuit 32 can, within a first time after receiving a valid overshoot protection signal Vo_os, control the main power tube Q1 to be turned off (the body diode of the main power tube Q1 is opposite to the direction of the inductor current I L ), control the synchronous rectification tube to be turned off, and control the body diode of the synchronous rectification tube to be opposite to the direction of the inductor current I L , so as to disconnect the current path of the inductor L1. After the first time ends, the control circuit 32 can control the freewheeling path of the inductor L1 to be connected in response to controlling the synchronous rectification tube to be turned on. It can be understood that, within the first time, since there is no current path for the inductor and the inductor current cannot be abruptly changed, the voltage difference across the inductor L1 will gradually increase within the first time, so that when the inductor L1 starts to freewheel at the end of the first time, the falling slope of the inductor current I L is increased based on the increase of the voltage difference across the inductor L1, so that the inductor current I L can quickly fall. Herein, the diode direction refers to the direction in which the anode of the diode points to the cathode, i.e., the forward conduction direction of the diode.

[0065] In specific implementation, when it is detected that the output voltage Vo overshoots, the control circuit 32 connects the control end of the synchronous rectification tube to the output end or the switching node SW of the switching converter, so that the synchronous rectification tube is turned off within the first time and is turned on after the first time ends, based on the type of the switching converter and the type of the synchronous rectification tube.

[0066] Optionally, in some embodiments, when the switching converter is a step-up converter, if the synchronous rectifier is a PMOS transistor, the control terminal of the synchronous rectifier is connected to the high potential of the output terminal when the output overshoot is detected, at this time the control terminal voltage of the synchronous rectifier is the output voltage Vo, at this time the gate-source voltage Vo-Vsw of the synchronous rectifier is greater than the threshold voltage of the PMOS transistor, so the synchronous rectifier can be controlled to be in the off state in the first time; in the first time, the switching node voltage Vsw increases, when the switching node voltage Vsw increases to make Vo-Vsw less than the threshold voltage of the PMOS transistor, the synchronous rectifier switches to the on state, i.e. the first time ends. Similarly, if the synchronous rectifier is an NMOS transistor, the control terminal of the synchronous rectifier is connected to the switching node SW when the output overshoot is detected, at this time the control terminal voltage of the synchronous rectifier is the switching node voltage Vsw, at this time the gate-source voltage Vsw-Vo of the synchronous rectifier is less than the threshold voltage of the NMOS transistor, so the synchronous rectifier can be controlled to be in the off state in the first time; in the first time, the switching node voltage Vsw increases, when the switching node voltage Vsw increases to make Vsw-Vo greater than the threshold voltage of the NMOS transistor, the synchronous rectifier switches to the on state, i.e. the first time ends.

[0067] Optionally, in some embodiments, when the switching converter is a step-up converter, if the synchronous rectifier is a PMOS transistor, the control terminal of the synchronous rectifier is connected to the high potential of the output terminal when the output overshoot is detected, at this time the control terminal voltage of the synchronous rectifier is the output voltage Vo, at this time the gate-source voltage Vo-Vsw of the synchronous rectifier is greater than the threshold voltage of the PMOS transistor, so the synchronous rectifier can be controlled to be in the off state in the first time; in the first time, the switching node voltage Vsw increases, when the switching node voltage Vsw increases to make Vo-Vsw less than the threshold voltage of the PMOS transistor, the synchronous rectifier switches to the on state, i.e. the first time ends. Similarly, if the synchronous rectifier is an NMOS transistor, the control terminal of the synchronous rectifier is connected to the switching node SW when the output overshoot is detected, at this time the control terminal voltage of the synchronous rectifier is the switching node voltage Vsw, at this time the gate-source voltage Vsw-Vo of the synchronous rectifier is less than the threshold voltage of the NMOS transistor, so the synchronous rectifier can be controlled to be in the off state in the first time; in the first time, the switching node voltage Vsw increases, when the switching node voltage Vsw increases to make Vsw-Vo greater than the threshold voltage of the NMOS transistor, the synchronous rectifier switches to the on state, i.e. the first time ends.

[0068] Further, when the switching converter is a step-up converter and the synchronous rectifier is a PMOS transistor, a first voltage greater than the high voltage of the output can be applied to the control terminal of the synchronous rectifier when the output overshoot is detected, so that the synchronous rectifier is turned off in the first time. Of course, this requires an additional voltage source to generate the first voltage. Similarly, when the switching converter is a step-down converter and the synchronous rectifier is an NMOS transistor, a second voltage less than the low voltage of the output can be applied to the control terminal of the synchronous rectifier when the output overshoot is detected, so that the synchronous rectifier is turned off in the first time.

[0069] In some examples, the switching converter further comprises an error amplifier 21, a first input terminal of the error amplifier 21 receives a feedback voltage VFB of the output voltage Vo, a second input terminal of the error amplifier 21 receives a reference voltage Vref, and an output terminal of the error amplifier 21 outputs an error amplified signal Vc to the control circuit 32, so that the control circuit 32 can generate a corresponding driving signal according to the error amplified signal Vc to control the switching states of the main power transistor and the synchronous rectifier when the output voltage Vo is not overshooting, so as to convert the input voltage Vin of the switching converter into the output voltage Vo and maintain the output voltage Vo at the target value corresponding to the reference voltage Vref.

[0070] For example, in the example shown in Figure 3 , the control circuit 32 generates a corresponding driving signal Vgs1 to control the switching state of the main power transistor Q1 according to the error amplified signal Vc, and generates a corresponding driving signal Vgs2 to control the switching state of the synchronous rectifier. Figure 4 , the control circuit 32 generates a corresponding driving signal Vgs1 to control the switching state of the main power transistor Q1 according to the error amplified signal Vc, and generates a corresponding driving signal Vgs2 and Vgs3 to control the switching state of the synchronous rectifier.

[0071] That is to say, the control circuit 32 disclosed in the embodiments of the present application can perform the related functions of output overshoot suppression when receiving a valid overshoot protection signal Vo_os, and perform the related functions of normal power conversion control when receiving an invalid overshoot protection signal Vo_os. Of course, the control circuit 32 can also be set as at least two circuit parts that can be manufactured or applied independently, so as to realize the above two functions independently or cooperatively.

[0072] In some preferred embodiments, the control circuit 32 is further configured to control the body diode of the synchronous rectifier in the same direction as the inductor current I L after detecting that the inductor current I L falls to zero after the output overshoot is suppressed, so as to prevent the output terminal current from flowing to the input terminal through the body diode during normal operation.

[0073] In implementation, in Figure 3 In the embodiment shown, the synchronous rectifier includes a transistor Q2 having a first terminal, a second terminal, a body terminal and a control terminal, and the body diode of the synchronous rectifier includes a diode D11 between the first terminal and the body terminal of the transistor Q2, and a diode D12 between the second terminal and the body terminal of the transistor Q2, the diode D11 has the same direction as the inductor current I L , and the diode D12 has the opposite direction as the inductor current I L . At this time, the control circuit 32 controls the direction of the body diode of the synchronous rectifier by shorting one of the diode D11 and the diode D12. For example, the direction of the body diode of the synchronous rectifier is controlled to be the same as the inductor current I L by shorting the diode D12; or the direction of the body diode of the synchronous rectifier is controlled to be opposite to the inductor current I L by shorting the diode D11 after detecting the overshoot of the output voltage Vo, i.e. receiving a valid overshoot protection signal Vo_os. It should be noted that, in Figure 3 the embodiment shown, the transistor Q2 is a low-voltage device.

[0074] In the example shown in Figure 3 , the switching converter further includes a switch K11 coupled between the first terminal and the body terminal of the transistor Q2, and a switch K12 coupled between the second terminal and the body terminal of the transistor Q2. At this time, the control circuit 32 includes a control signal V_K11 and a control signal V_K12, and the control circuit 32 is specifically configured to: when no overshoot of the output voltage Vo is detected, output an invalid control signal V_K11 to control the switch K11 to be in an open state, and output a valid control signal V_K12 to control the switch K12 to be in a closed state, so as to control the diode D11 to be in a normal state, the diode D12 to be in a shorted state, and the direction of the body diode of the synchronous rectifier to be the same as the inductor current I L ; and when the overshoot of the output voltage Vo is detected, output a valid control signal V_K11 to control the switch K11 to be in a closed state, and output an invalid control signal V_K12 to control the switch K12 to be in an open state, so as to control the body diode D11 to be in a shorted state, the body diode D12 to be in a normal state, and the direction of the body diode of the synchronous rectifier to be opposite to the inductor current I L .

[0075] Further, the control circuit 32 further comprises a switching signal Vos generated by the control circuit 32, and the control circuit 32 controls the connection of the control terminal of the transistor Q2 to the output terminal or the switching node SW of the switching converter according to the switching signal Vos when detecting the overshoot of the output voltage Vo. The switching circuit is not shown in the figure and can use a conventional structure.

[0076] Optionally, in some optional embodiments, the switch K11 coupled between the anode and the cathode of the diode D11 can be omitted, and in this case, the overshoot protection signal generated by the control circuit 32 comprises a control signal V_K12, and the control circuit 32 controls the body diode direction of the synchronous rectifier by whether short-circuiting the diode D12.

[0077] In Figure 4 the embodiment shown in the figure, the synchronous rectifier comprises a transistor Q2 and a transistor Q3, and the body diode of the synchronous rectifier comprises a diode D31 between the first terminal and the second terminal of the transistor Q2 and a diode D32 between the first terminal and the second terminal of the transistor Q3, the direction of the diode D31 is the same as the direction of the inductor current I L , and the direction of the diode D32 is opposite to the direction of the inductor current I L , and in this case, the control circuit 32 controls the body diode direction of the synchronous rectifier by controlling the switching state of the transistor Q3. For example, by controlling the transistor Q3 to be turned on, the body diode direction of the synchronous rectifier is controlled to be the same as the direction of the inductor current I L ; or after detecting the overshoot of the output voltage Vo, i.e. after receiving the valid overshoot protection signal Vo_os, by controlling the transistor Q3 to be turned off, the body diode direction of the synchronous rectifier is controlled to be opposite to the direction of the inductor current I L . It should be noted that in Figure 4 the embodiment shown in the figure, the transistor Q2 and the transistor Q3 are high-voltage devices.

[0078] Optionally, after detecting the overshoot of the output voltage Vo, i.e. after receiving the valid overshoot protection signal Vo_os, the control circuit 32 further comprises controlling the transistor Q2 to be in the on state or the off state, wherein when the transistor Q2 is in the off state, the voltage difference between the switching node and the output node after the first time can be larger.

[0079] In Figure 4 the embodiment shown in the figure, when the control circuit 32 does not detect the overshoot of the output voltage Vo, the control circuit 32 comprises an output valid driving signal Vgs3 to maintain the transistor Q3 in the on state, so that the diode D32 is in the short-circuit state, and the body diode direction of the synchronous rectifier is controlled to be the same as the direction of the inductor current I L .

[0080] In Figure 4In the illustrated embodiment, the control circuit 32 includes generating a switching signal Vos. When an overshoot of the output voltage Vo is detected, the control terminal of the transistor Q3 is connected to the output terminal of the switching converter or the switching node SW according to the switching signal Vos. A specific switching circuit diagram is not shown; a conventional structure can be used.

[0081] In the above embodiments, Figure 3 transistor Q2 and Figure 4 Transistor Q3 in the example is a PMOS transistor, with its first terminal being one of the source and drain terminals of the PMOS transistor, and its second terminal being the other of the source and drain terminals. Of course, Figure 3 transistor Q2 and Figure 4 The transistor Q3 in the circuit can also be other types of transistors, as long as they can achieve the freewheeling function and the switching node SW voltage is higher than the output voltage Vo when triggering Vo overshoot.

[0082] In this article, the inductor current I L The direction generally refers to the inductor current I. L For a boost-type switching converter, the positive direction of the current is defined as the direction of the current flowing from the positive terminal of the input voltage Vin to the switching node SW, and from the switching node SW to the positive terminal of the output voltage Vo. L The positive direction.

[0083] It is understandable that, in the first instant, when the current path of inductor L1 (including the energy storage path and freewheeling path of inductor L1) is disconnected, due to the inductor current I on inductor L1... L The inductor current I on inductor L1 cannot change abruptly. L This will cause a change in the voltage (denoted as Vsw) at the switching node SW. For example, in a boost converter, the voltage Vsw at the switching node SW will increase during the first time interval, thereby increasing the voltage difference across inductor L1. After the first time interval ends and the freewheeling path of inductor L1 is connected, this increased voltage difference will cause the inductor current I to increase. L A steeper descent allows the inductor current to drop rapidly to zero within a short time. (Reference) Figure 6 The solid lines show waveforms obtained using the embodiments of this application, while the dashed lines show waveforms obtained using conventional solutions. A comparison of the solid and dashed lines reveals that, compared to conventional solutions, the solutions provided by the embodiments of this application can reduce the inductor current I when the load of the switching converter changes abruptly from heavy load to light load / no load. LThe output voltage Vo can be reduced to zero faster, and the overshoot amplitude is smaller, ΔV2<ΔV1. That is, the scheme provided by the embodiments of the present application can effectively reduce the output voltage overshoot when the load jumps, and ensure that the system and the subsequent load work in a safe voltage range.

[0084] Further, the embodiments of the present application also provide an output overshoot suppression method of a switching converter, which can be applied to the output overshoot suppression circuit or the switching converter as disclosed in any of the preceding embodiments, as shown in the accompanying drawings, the output overshoot suppression method comprises the following steps: Figure 6

[0085] In step 610, the feedback voltage representing the output voltage and the reference voltage are compared to determine whether the output voltage of the switching converter has an overshoot.

[0086] In step 620, the current path of the inductor is controlled to be disconnected within the first time when the overshoot is detected, so as to increase the voltage difference across the inductor.

[0087] In this step, the control of the disconnection of the current path of the inductor includes: controlling the main power tube to be turned off, and the body diode of the main power tube is opposite to the direction of the inductor current; and controlling the synchronous rectifier tube to be turned off, and the body diode of the synchronous rectifier tube is opposite to the direction of the inductor current. In some embodiments, the control end of the synchronous rectifier tube is connected to the output end or the switching node of the switching converter to control the synchronous rectifier tube to be turned off.

[0088] In step 630, the freewheeling path of the inductor is controlled to be connected after the first time ends.

[0089] Further, the output overshoot suppression method further comprises: when the output voltage returns to normal or the inductor current drops to zero, controlling the body diode of the synchronous rectifier tube to be opposite to the direction of the inductor current, and controlling the main power tube and the synchronous rectifier tube of the switching converter to enter the normal switching state, so as to convert the input to the output.

[0090] It should be noted that, in specific implementation, the specific implementation of each step in the output overshoot suppression method of the switching converter described above and the technical effects that can be obtained can be referred to the foregoing embodiments of the switching converter, which will not be described here.

[0091] Finally, it should be noted that: obviously, the above embodiments are only examples for clearly illustrating the present application, and are not limitations on the embodiments. Based on the above description, those skilled in the art can make other different forms of changes or modifications. Here, it is not necessary and impossible to enumerate all the embodiments. The obvious changes or modifications derived therefrom are still within the protection scope of the present application.​

Claims

1. An output overshoot suppression circuit, applied to a switching converter, the switching converter comprising: The inductor, main power transistor, and synchronous rectifier are configured such that their common connection node is a switching node. The output overshoot suppression circuit includes: The overshoot detection circuit compares the feedback voltage, which characterizes the output voltage, with the reference voltage to generate an overshoot protection signal. Upon receiving a valid overshoot protection signal, the control circuit controls to disconnect the current path of the inductor within a first time period to increase the voltage difference across the inductor, and then controls to connect the freewheeling path of the inductor after the first time period ends.

2. The output overshoot suppression circuit according to claim 1, wherein, The control circuit responds to the following operation by disconnecting the current path of the inductor: The main power transistor is controlled to turn off, and the direction of the body diode of the main power transistor is opposite to the direction of the inductor current; The synchronous rectifier is controlled to turn off, and the direction of the body diode of the synchronous rectifier is controlled to be opposite to the direction of the inductor current.

3. The output overshoot suppression circuit according to claim 2, wherein, The control circuit controls the synchronous rectifier tube to be connected to the output terminal of the switching converter or the switching node, thereby turning off the synchronous rectifier tube.

4. The output overshoot suppression circuit according to claim 3, wherein, The switching converter is a boost converter. When the synchronous rectifier is a PMOS transistor, the control circuit controls the control terminal of the synchronous rectifier to be connected to the high potential terminal of the output. When the synchronous rectifier is an NMOS transistor, the control circuit controls the control terminal of the synchronous rectifier to be connected to the switching node. Alternatively, the switching converter is a buck converter. When the synchronous rectifier is a PMOS transistor, the control circuit controls the control terminal of the synchronous rectifier to connect to the switching node. When the synchronous rectifier is an NMOS transistor, the control circuit controls the control terminal of the synchronous rectifier to connect to the low potential terminal of the output.

5. The output overshoot suppression circuit according to claim 2, wherein, The control circuit controls the synchronous rectifier diode to be connected to a first voltage, thereby turning off the synchronous rectifier diode. Wherein, when the switching converter is a boost converter and the synchronous rectifier is a PMOS transistor, the first voltage is greater than the output voltage; When the switching converter is a buck converter and the synchronous rectifier is an NMOS, the first voltage is less than the low potential of the output terminal.

6. The output overshoot suppression circuit according to claim 1, wherein, The reference voltage is equal to the base voltage, or the reference voltage is equal to the sum of the base voltage and the bias voltage, and the switching converter realizes the conversion of input voltage to output voltage based on the base voltage.

7. The output overshoot suppression circuit according to claim 2, wherein, The synchronous rectifier tube has a first end, a second end, a body end, and a control end; The body diode of the synchronous rectifier includes a first diode located between the first end and the body end, and a second diode located between the second end and the body end; The direction of the first diode is the same as the direction of the inductor current; The direction of the second diode is opposite to the direction of the inductor current; During the first time period, the control circuit short-circuit the first diode.

8. The output overshoot suppression circuit according to claim 2, wherein, The synchronous rectifier tube includes: The first transistor has a body diode direction that is the same as the direction of the inductor current. The second transistor has a body diode direction opposite to the direction of the inductor current. During the first time period, the control circuit controls the second transistor to turn off.

9. The output overshoot suppression circuit according to claim 2, wherein, The control circuit is further configured to: When the inductor current drops to zero, the body diode of the synchronous rectifier is controlled to be in the same direction as the inductor current.

10. A switching converter, wherein, Includes the output overshoot suppression circuit as described in any one of claims 1-9.

11. A method for suppressing output overshoot in a switching converter, the switching converter comprising an inductor, a main power transistor, and a synchronous rectifier, wherein the common connection node of the inductor, the main power transistor, and the synchronous rectifier is a switching node. The output overshoot suppression method includes: The feedback voltage and reference voltage, which characterize the output voltage, are compared to determine whether the output voltage of the switching converter has overshooted. Upon detecting an overshoot, the current path of the inductor is disconnected to increase the voltage difference across the inductor. After the first time period ends, the freewheeling path connected to the inductor is controlled.

12. The output overshoot suppression method according to claim 11, wherein, Controlling the current path that disconnects the inductor includes: The main power transistor is controlled to turn off, and the direction of the body diode of the main power transistor is opposite to the direction of the inductor current; The synchronous rectifier is controlled to turn off, and the direction of the body diode of the synchronous rectifier is controlled to be opposite to the direction of the inductor current.

13. The output overshoot suppression method according to claim 12, wherein, Connect the control terminal of the synchronous rectifier to the output terminal of the switching converter or the switching node to control the synchronous rectifier to turn off.

14. The output overshoot suppression method according to claim 12, wherein, Also includes: When the inductor current is detected to drop to zero, the body diode of the synchronous rectifier is controlled to be in the same direction as the inductor current.

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