Back contact solar cell and photovoltaic module

Abstract

The embodiment of the present application relates to the field of photovoltaics, and provides a back contact solar cell, a preparation method thereof and a photovoltaic module, the back contact solar cell comprising: a substrate, the substrate having a first doped region, a second doped region and a spacer region; a first doped semiconductor layer on the corresponding first doped region; a second doped semiconductor layer on the corresponding second doped region; the second doped semiconductor layer having a second doped element different from the first doped element in the conductive type; a conductive layer on a part of the spacer region, one side of the conductive layer being in electrical contact with the first doped semiconductor layer, and the other side of the conductive layer being in electrical contact with the second doped semiconductor layer; a passivation layer covering the first doped semiconductor layer, the second doped semiconductor layer, the conductive layer and the spacer region; a first electrode in electrical contact with the first doped semiconductor layer; and a second electrode in electrical contact with the second doped semiconductor layer.

Description

[0001] This application is a divisional application of the patent application filed on April 22, 2024, with application number 202410484598X and invention title "Back Contact Solar Cell and its Preparation Method, Photovoltaic Module". Technical Field

[0002] This application relates to the photovoltaic field, and in particular to a back-contact solar cell and its preparation method, as well as a photovoltaic module. Background Technology

[0003] IBC (Interdigitated Back Contact) solar cells are solar cells with positive and negative metal electrodes arranged in an interdigitated pattern on the back side of the cell. The PN junction is located on the back of the cell. IBC cells are among the most efficient photovoltaic cells currently available. Using monocrystalline silicon as the substrate, with both the PN junction and metal electrodes located on the back, and no metal electrodes on the front blocking light, they achieve very high short-circuit current and conversion efficiency.

[0004] Photovoltaic modules, composed of multiple cells, are typically installed in open, sunny locations. Over long-term use, they inevitably accumulate obstructions such as birds, dust, and fallen leaves, creating shadows on the solar modules. In large solar module arrays, improper row spacing can also lead to mutual shadows. Due to these localized shadows, the current and voltage of some individual cells within the solar module change. This results in an increase in the product of current and voltage in certain areas of the module, leading to localized temperature increases. Defects in some individual cells can also cause localized heating during operation; this phenomenon is called the "hot spot effect."

[0005] In IBC cells, since the P-type and N-type doped regions are located on the back side of the substrate and are completely isolated, the hot spot effect can affect the power output of the photovoltaic module and cause safety issues due to localized temperature increases during the process of assembling multiple IBC cells into a string and then encapsulating them into a photovoltaic module. Therefore, how to improve and solve the "hot spot effect" is an urgent problem that engineers need to solve. Summary of the Invention

[0006] This application provides a back-contact solar cell and its preparation method, as well as a photovoltaic module, which at least helps to improve the hot spot effect problem.

[0007] According to some embodiments of this application, one aspect of this application provides a back-contact solar cell, comprising: a substrate having a plurality of first doped regions arranged along a first direction, a second doped region being located between adjacent first doped regions, and a spacer region being located between the first doped regions and the second doped regions; a first doped semiconductor layer located on a corresponding first doped region; the first doped semiconductor layer containing a first doping element; a second doped semiconductor layer located on a corresponding second doped region; the second doped semiconductor layer containing a second doping element having a different conductivity type than the first doping element; at least one A conductive layer is located on a portion of the spacer region. One side of the conductive layer is electrically contacted with the first doped semiconductor layer, and the other side of the conductive layer is electrically contacted with the second doped semiconductor layer. The conductive layer includes a first conductive layer and a second conductive layer. The orthographic projection of the first conductive layer onto the projection plane is a first projection, and the orthographic projection of the second conductive layer onto the projection plane is a second projection. The first projection and the second projection at least partially overlap, so that the bottom surface of the first conductive layer and the surface of the second conductive layer form a concave structure. A passivation layer covers the first doped semiconductor layer, the second doped semiconductor layer, the conductive layer, and the spacer region.

[0008] In some embodiments, the extension length of the spacer region is a first length, the contact length between the conductive layer and the first doped semiconductor layer is a second length, and the ratio of the second length to the first length is less than or equal to 30%; the first doped region and the second doped region are arranged alternately along the first direction Y, and the length of the spacer region along the second direction X is the extension length of the spacer region; the second doped region surrounds the first doped region, and the inner perimeter of the spacer region is the extension length of the spacer region.

[0009] In some embodiments, the inner perimeter of the spacer region is the extension length of the spacer region, and at least one of the first doped semiconductor layers includes a long side extending along the first direction and a short side extending along the second direction, and the conductive layer is in electrical contact with the short side.

[0010] In some embodiments, the length of the shorter side is a third length, and the ratio of the third length to the second length is greater than or equal to 10%.

[0011] In some embodiments, the plurality of first doped semiconductor layers includes: a plurality of first portions, each first portion being a first doped semiconductor layer electrically in contact with a corresponding conductive layer; and a plurality of second portions, each second portion being a first doped semiconductor layer not electrically in contact with the conductive layer; wherein, N1 / N≥5%, N1 is the number of first portions, and N is the total number of the plurality of first doped semiconductor layers.

[0012] In some embodiments, 0 ≤ N2 ≤ 10, where N2 is the number of second parts located between two adjacent first parts.

[0013] In some embodiments, the number of second parts between every two adjacent first parts is equal.

[0014] In some embodiments, the material of the conductive layer is the same as that of at least one of the first doped semiconductor layer or the second doped semiconductor layer.

[0015] In some embodiments, the device further includes: a first electrode, which is electrically in contact with the first doped semiconductor layer; and a second electrode, which is electrically in contact with the second doped semiconductor layer.

[0016] In some embodiments, the conductive layer is located on the substrate corresponding to the spacer region and is in electrical contact with the side of the corresponding first doped semiconductor layer.

[0017] In some embodiments, the first doped semiconductor layer includes an extension located on a portion of the spacer region, and the conductive layer is in electrical contact with the top and side surfaces of the extension.

[0018] In some embodiments, the conductive layer further extends to a portion of the top surface of the first doped semiconductor layer corresponding to the first doped region, and the conductive layer is physically insulated from the first electrode.

[0019] In some embodiments, the top surface of the second doped semiconductor layer is lower than the top surface of the first doped semiconductor layer, and the side surface of the conductive layer is an arc surface.

[0020] In some embodiments, the first conductive layer is located on the side of the first doped semiconductor layer, the second conductive layer is located on the surface of the first doped semiconductor layer, and an acute angle is formed between the bottom surfaces of the first conductive layer and the second conductive layer.

[0021] In some embodiments, the method further includes: a first tunneling dielectric layer located between the first doped semiconductor layer and the substrate; and / or a second tunneling dielectric layer located between the second doped semiconductor layer and the substrate.

[0022] In some embodiments, the system further includes: a first intrinsic dielectric layer and a first transparent conductive layer, wherein the first intrinsic dielectric layer is located between the first doped semiconductor layer and the substrate, and the first transparent conductive layer is located on the surface of the first doped semiconductor layer; and / or, a second intrinsic dielectric layer and a second transparent conductive layer, wherein the second intrinsic dielectric layer is located between the second doped semiconductor layer and the substrate, and the second transparent conductive layer is located on the surface of the second doped semiconductor layer.

[0023] According to some embodiments of this application, another aspect of this application provides a photovoltaic module, including: a battery string, formed by connecting a plurality of back-contact solar cells as described in any of the above embodiments; a connecting member for electrically connecting two adjacent back-contact solar cells; an encapsulating film for covering the surface of the battery string; and a cover plate for covering the surface of the encapsulating film away from the battery string.

[0024] The technical solution provided in this application has at least the following advantages:

[0025] In the back-contact solar cell provided in this application embodiment, the substrate has a first doped region, a second doped region, and a spacer region. It also includes a first doped semiconductor layer on the first doped region, a second doped semiconductor layer on the second doped region, and a conductive layer on a portion of the spacer region. The two sides of the conductive layer are electrically connected to the first doped semiconductor layer and the second doped semiconductor layer, respectively, to achieve electrical connection between the two, thereby realizing electrical transmission between them. This electrical transmission channel can serve as a channel for leakage current in the tunnel junction between P-type doped ions and N-type doped ions (minority carriers and majority carriers), dispersing the leakage current channel in one place, thereby relieving the pressure of a leakage current channel in one place, and uniformly dispersing the leakage current in various places. This allows for controllable adjustment and improvement of the leakage current problem of the cell, thereby effectively reducing high voltage or high heat events in one or more leakage current regions in the back-contact solar cell, and thus solving or improving the "hot spot effect" caused by local overheating.

[0026] Furthermore, for a battery string composed of multiple back-contact solar cells, a back-contact solar cell with a conductive layer is provided. When the solar cell exhibits a hot spot effect, the conductive layer connects the first doped semiconductor layer and the second doped semiconductor layer and has a reverse bias voltage. This reverse bias voltage balances the increased local current and voltage of the back-contact solar cell itself due to the "hot spot effect," thereby improving and compensating for the problems caused by the "hot spot effect." This can prevent a problem from occurring in a battery string and effectively avoid the power reduction problem caused by the battery string being shaded. Attached Figure Description

[0027] One or more embodiments are illustrated by way of example with reference to the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Unless otherwise stated, the drawings in the accompanying drawings do not constitute a limitation on scale. In order to more clearly illustrate the technical solutions in the embodiments of this application or in the conventional art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 This is a schematic diagram of a back-contact solar cell provided in an embodiment of this application;

[0029] Figure 2 for Figure 1 A schematic diagram of the first type of cross-sectional structure along section A1-A2;

[0030] Figure 3 for Figure 1 A schematic diagram of the first type of cross-sectional structure along section B1-B2;

[0031] Figure 4 for Figure 1 A schematic diagram of the second type of cross-sectional structure along section A1-A2;

[0032] Figure 5 for Figure 1 A schematic diagram of the second type of cross-sectional structure along section B1-B2;

[0033] Figure 6 for Figure 1 A schematic diagram of the third cross-sectional structure along section A1-A2;

[0034] Figure 7 for Figure 1 A schematic diagram of the third cross-sectional structure along section B1-B2;

[0035] Figure 8 for Figure 1 A schematic diagram of the fourth cross-sectional structure along section B1-B2;

[0036] Figure 9 for Figure 1 A schematic diagram of the fifth type of cross-sectional structure along section B1-B2;

[0037] Figure 10 for Figure 1 A schematic diagram of the sixth type of cross-sectional structure along section B1-B2;

[0038] Figure 11 This is a schematic diagram of the structure of a back contact solar cell with a spacer region and a first doped region according to an embodiment of this application;

[0039] Figure 12 This application provides a schematic diagram of another structure of a back-contact solar cell according to one embodiment;

[0040] Figure 13 An optical microscope image of a first processing area in a back-contact solar cell provided in an embodiment of this application;

[0041] Figure 14 This is a schematic diagram of a back-contact solar cell structure corresponding to a substrate, provided in another embodiment of the present application for the fabrication method of a back-contact solar cell;

[0042] Figure 15 for Figure 14 A schematic diagram of a cross-sectional structure along section B1-B2;

[0043] Figure 16 This is a schematic diagram of a back contact solar cell structure corresponding to the formation of the first doped film in a method for fabricating a back contact solar cell according to another embodiment of this application;

[0044] Figure 17 for Figure 16 A schematic diagram of a cross-sectional structure along section B1-B2;

[0045] Figure 18 This is a schematic diagram of a back contact solar cell corresponding to the first doped film with the second doped region removed in a method for fabricating a back contact solar cell according to another embodiment of this application;

[0046] Figure 19 for Figure 18 A schematic diagram of a cross-sectional structure along section B1-B2;

[0047] Figure 20 This is a schematic diagram of a back contact solar cell structure corresponding to the formation of a second doped film in a method for fabricating a back contact solar cell according to another embodiment of this application;

[0048] Figure 21 for Figure 20 A schematic diagram of a cross-sectional structure along section B1-B2;

[0049] Figure 22 This is a schematic diagram of a back-contact solar cell corresponding to the second doped film after removing the first doped region in a method for fabricating a back-contact solar cell according to another embodiment of this application;

[0050] Figure 23 for Figure 22 A schematic diagram of a cross-sectional structure along section B1-B2;

[0051] Figure 24 A schematic diagram of a photovoltaic module provided in another embodiment of this application;

[0052] Figure 25 for Figure 24 A schematic diagram of a cross-sectional structure along section M1-M2. Detailed Implementation

[0053] As can be seen from the background technology, current back-contact solar cells and photovoltaic modules have a "hot spot effect", which leads to a loss of battery efficiency.

[0054] Analysis has revealed that one reason for the "hot spot effect" in current back-contact solar cells and photovoltaic modules is that shading of back-contact solar cells is a normal occurrence caused by inherent obstructions (such as utility poles or trees) and / or by debris falling on the module or accumulated dirt. Partial shading of the back-contact solar cell can cause the diode to enter reverse bias, resulting in power dissipation instead of power generation, and can also cause the back-contact solar cell to heat up. This degrades system performance, can lead to cell breakdown, and, if hot spots are generated, can pose a potential reliability hazard.

[0055] One solution to this problem is to insert a bypass diode into the circuitry within the solar module's junction box. This bypass diode is activated when a cell or battery pack enters reverse bias, removing the circuit string containing the damaged cell. For example, in a module with three strings (12-18 cells), this means a single cell shading event can result in a loss of one-third of the power from the panel. Furthermore, the cost of diodes is not negligible and must be considered in the balance between the module's materials and the total cost per watt. Cascade protection is not perfect, and some hot spots may not conduct through the cascade diodes, posing a reliability hazard. Additionally, hot spot screening is still required in such embodiments, and shading tolerance is poor. Shading can also cause significant losses in many residential applications with inherently shading roofs, and also in concentrated PV applications.

[0056] Based on this, this application embodiment provides a back-contact solar cell. The substrate of the back-contact solar cell has a first doped region, a second doped region, and a spacer region. It also includes a first doped semiconductor layer located on the first doped region, a second doped semiconductor layer located on the second doped region, and a conductive layer located on a portion of the spacer region. The two sides of the conductive layer are in electrical contact with the first doped semiconductor layer and the second doped semiconductor layer, respectively. First, the conductive layer itself acts as a connecting layer to electrically connect the first doped semiconductor layer and the second doped semiconductor layer, thereby realizing electrical transmission between them to achieve current shunting of opposite polarities, thus forming a bypass diode. This can effectively balance and improve the increased local current and voltage of the back-contact solar cell itself due to the "hot spot effect," thereby improving and compensating for the problems caused by the "hot spot effect," avoiding problems in a cell string, and effectively preventing the power reduction problem caused by the cell string being shaded.

[0057] Furthermore, the back-contact solar cell includes at least one conductive layer. Each conductive layer itself acts as an electrical transport channel, electrically connecting the first doped semiconductor layer and the second doped semiconductor layer. This electrical transport channel can serve as a channel for leakage current in the tunnel junction between P-type doped ions and N-type doped ions (minority carriers and majority carriers), dispersing the leakage current channel in one place, thereby relieving the pressure of a leakage current channel in one place, and uniformly dispersing the leakage current in various places. This allows for controllable adjustment and improvement of the leakage current problem of the cell, and can effectively reduce high voltage or high heat events in one or more leakage current areas in the back-contact solar cell. This can solve or improve the "hot spot effect" caused by local overheating.

[0058] As used herein, the terms “vertical,” “longitudinal,” “horizontal,” and “lateral” refer to the principal plane of the reference structure and are not necessarily defined by the Earth’s gravitational field. A “horizontal” or “lateral” direction is generally parallel to the principal plane of the structure, while a “vertical” or “longitudinal” direction is generally perpendicular to the principal plane of the structure. The principal plane of the structure is defined by the surface of the structure that has a relatively large area compared to the other surfaces of the structure. Referring to the figures, a “horizontal” or “lateral” direction may be perpendicular to the indicated “Z” axis and parallel to the indicated “X” axis and / or parallel to the indicated “Y” axis; and a “vertical” or “longitudinal” direction may be parallel to the indicated “Z” axis, perpendicular to the indicated “X” axis, and perpendicular to the indicated “Y” axis.

[0059] As used herein, features described as “adjacent” to each other (e.g., areas, structures, devices) mean and include features with one or more disclosed identifiers that are most closely (e.g., closest) to each other. Additional features (e.g., additional areas, additional structures, additional devices) with one or more disclosed identifiers that do not match “adjacent” features may be positioned between “adjacent” features. In other words, “adjacent” features may be positioned directly adjacent to each other such that no other features intervene between “adjacent” features; or “adjacent” features may be positioned indirectly adjacent to each other such that at least one feature having an identifier other than the identifier associated with at least one “adjacent” feature is positioned between “adjacent” features. Thus, features described as “vertically adjacent” to each other mean and include features disclosed by one or more identifiers located at the vertical closest (e.g., vertically closest) to each other. Furthermore, features described as “horizontally adjacent” to each other mean and include features of one or more disclosed identifiers located at the horizontal closest (e.g., horizontally closest) to each other.

[0060] In the following description, the second component may be formed or disposed above or on the first component, or on the surface of the first component, or on one side of the first component. This may include embodiments where the first and second components are in direct contact, and may also include embodiments where an additional component may be present between the first and second components, thereby preventing direct contact. For simplicity and clarity, various components may be drawn at different scales. In the accompanying drawings, some layers / components may be omitted for simplicity.

[0061] Unless otherwise specified, the formation or provision of a second component on the surface of a first component means that the first component and the second component are in direct contact.

[0062] The “components” mentioned above can refer to layers, films, regions, parts, structures, etc.

[0063] Furthermore, for ease of description, spaced relative terms such as “below,” “under,” “lower,” “above,” and “upper” may be used herein to describe the relationship of one element or component to another (or other) element or component as shown in the figures. In addition to the orientations shown in the figures, spaced relative terms are intended to include different orientations of the device during use or operation. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spaced relative descriptors used herein can be interpreted accordingly. Additionally, the term “made of” may mean “comprising” or “consisting of.” Furthermore, one or more additional operations may occur during / between the described operations in subsequent manufacturing processes, and the order of operations may change. In the following embodiments, the terms “upper,” “above,” and / or “above” are defined along directions of increasing distance from the front and rear surfaces. Materials, configurations, dimensions, processes, and / or operations as described in the embodiments may be used in other embodiments, and their detailed descriptions may be omitted.

[0064] As used herein, spatial relative terms such as “below,” “under,” “lower,” “bottom,” “above,” “upper,” “top,” “front,” “back,” “left,” and “right” are used for ease of description to describe the relationship between one element or feature and another element or feature illustrated in the figures. Unless otherwise specified, spatial relative terms are intended to cover different orientations of material other than those depicted in the figures. For example, if the material in the figures is inverted, then an element described as “below,” “under,” “lower,” or “bottom” of another element or feature would be oriented “above” or “top” of said other element or feature. Thus, the term “below” may cover both above and below orientations depending on the context in which the term is used, as will be apparent to those skilled in the art. Material may be oriented in other ways (e.g., rotated 90 degrees, inverted, flipped), and the spatial relative descriptive terms used herein may be interpreted accordingly.

[0065] As used herein, unless the context clearly indicates otherwise, the singular forms “a / an” and “the” inherently include the plural forms as well. As used herein, “and / or” includes any and all combinations of one or more of the associated listed items.

[0066] As used herein, the terms "substantially" or "basically" with respect to a given parameter, property, or condition mean and include the degree to which a given parameter, property, or condition conforms to deviations (e.g., within acceptable tolerances) as would be understood by one of ordinary skill in the art. By way of example, depending on the specific parameter, property, or condition that is substantially satisfied, it may satisfy at least 90.0%, at least 95.0%, at least 99.0%, at least 99.9%, or even 100.0%.

[0067] As used herein, the terms "about," "approximately," or "about" when referring to a particular parameter include the value, and those skilled in the art will understand that the deviation from the value is within acceptable tolerances of the particular parameter. For example, "about" or "about" with respect to a value may include additional values ​​that are in the range of 90.0% to 110.0% of the value, such as in the range of 95.0% to 105.0%, 97.5% to 102.5%, 99.0% to 101.0%, 99.5% to 100.5%, or 99.9% to 100.1%.

[0068] As used herein, “conductive material” means and includes one or more of the following conductive materials: metals (e.g., tungsten (W), titanium (Ti), molybdenum (Mo), niobium (Nb), vanadium (V), hafnium (Hf), tantalum (Ta), chromium (Cr), zirconium (Zr), iron (Fe), ruthenium (Ru), osmium (Os), cobalt (Co), rhodium (Rh), iridium (Ir), nickel (Ni), palladium (Pa), platinum (Pt), copper (Cu), silver (Ag), gold (Au), aluminum (Al)), alloys (e.g., Co-based alloys, Fe-based alloys) The term "conductive structure" refers to and includes structures formed from and containing conductive materials, such as gold, Ni-based alloys, Fe and Ni-based alloys, Co and Ni-based alloys, Fe and Co-based alloys, Co, Ni and Fe-based alloys, Al-based alloys, Cu-based alloys, magnesium (Mg)-based alloys, Ti-based alloys, steel, low-carbon steel, and stainless steel. It also includes conductive metal materials (e.g., conductive metal nitrides, conductive metal silicides, conductive metal carbides, and conductive metal oxides) and conductive doped semiconductor materials (e.g., conductive doped polysilicon, conductive doped germanium (Ge), and conductive doped silicon-germanium (SiGe)). Furthermore, "conductive structure" means and includes structures formed from conductive materials and containing conductive materials.

[0069] As used herein, “insulating material” means and includes one or more of the following electrically insulating materials: at least one dielectric oxide material (e.g., one or more of silicon oxide (SiOx), phosphosilicate glass, borosilicate glass, borosilicate glass, fluorosilicate glass, aluminum oxide (AlOx), hafnium oxide (HfOx), niobium oxide (NbOx), titanium oxide (TiOx), zirconium oxide (ZrOx), tantalum oxide (TaOx), and magnesium oxide (MgOx); at least one dielectric nitride material (e.g., silicon nitride (SiNy)); at least one dielectric oxynitride material (e.g., silicon oxynitride (SiOxNy)); at least one dielectric carbon oxide material (e.g., silicon oxycarbonate (SiOxCy)); at least one hydrogenated dielectric carbon oxide material (e.g., hydrogenated silicon oxycarbonate (SiCxOyHz)); and at least one dielectric carbon oxynitride material (e.g., silicon oxycarbonate (SiOxCzNy)). The chemical formulas containing one or more of “x”, “y”, and “z” (e.g., SiOx, AlOx, HfOx, NbOx, TiOx, SiNy, SiOxNy, SiOxCy, SiCxOyHz, SiOxCzNy) in this document represent materials containing “x” atoms of one element, “y” atoms of another element, and “z” atoms of an additional element (if present) relative to each atom of another element (e.g., Si, Al, Hf, Nb, Ti). Because chemical formulas represent relative atomic ratios rather than strict chemical structures, insulating materials may include one or more stoichiometric compounds and / or one or more non-stoichiometric compounds, and the values ​​of “x”, “y”, and “z” (if present) may be integers or non-integers. As used herein, the term “non-stoichiometric compound” means and includes compounds composed of an element that cannot be expressed by a ratio of well-defined natural numbers and violates the law of definite proportions. Additionally, “insulating structure” means and includes structures formed of and containing insulating materials.

[0070] Unless the context otherwise indicates, the materials described herein can be formed by any suitable technique, including but not limited to spin coating, blanket coating, chemical vapor deposition (CVD), plasma-enhanced CVD (PECVD), atomic layer deposition (ALD), plasma-enhanced ALD (PEALD), physical vapor deposition (PVD) (e.g., sputtering), or epitaxial growth. Depending on the specific material to be formed, the technique used for depositing or growing the material can be selected by one of ordinary skill in the art. Additionally, unless the context otherwise indicates, the removal of the material described herein can be achieved by any suitable technique, including but not limited to etching (e.g., dry etching, wet etching, vapor phase etching), ion milling, planarization (e.g., chemical mechanical planarization (CMP)), or other known methods.

[0071] As used herein, the term "semiconductor" can refer to, for example, a material layer, substrate, wafer, or substructure, and includes any substrate semiconductor structure. "Semiconductor" should be understood to include silicon sapphire (SOS) technology, silicon-on-insulator (SOI) technology, thin-film transistor (TFT) technology, doped and undoped semiconductors, epitaxial silicon layers supported by a substrate semiconductor structure, and other semiconductor structures well known to those skilled in the art. Furthermore, when "semiconductor" is referred to in the following description, regions / junctions may have been formed in the substrate semiconductor structure using prior process steps, and the term "semiconductor" may include an underlying layer containing such regions / junctions.

[0072] Unless the context clearly indicates otherwise, the term "conductive" and its related forms, such as conduct, conducting, and conduction, conductively, and conductivity, as used herein refer to electrical conductivity. Similarly, unless the context clearly indicates otherwise, the term "connection" and its related forms, such as connect, connected, and connection, as used herein refer to electrical connection.

[0073] The embodiments of this application will now be described in detail with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been provided in the embodiments of this application to facilitate a better understanding of the application. However, the technical solutions claimed in this application can be implemented even without these technical details and various variations and modifications based on the following embodiments.

[0074] Figure 1 This is a schematic diagram of a back-contact solar cell provided in an embodiment of this application; Figure 2 for Figure 1 A schematic diagram of the first type of cross-sectional structure along section A1-A2; Figure 3 for Figure 1 A schematic diagram of the first type of cross-sectional structure along section B1-B2. Among them, Figure 1 The area enclosed by the dashed circle represents the first doped region, the spacer region, and the second doped region.

[0075] refer to Figures 1 to 3 One embodiment of this application provides a back-contact solar cell, including: a substrate 100, the substrate 100 having a plurality of first doped regions 101 arranged along a first direction Y, a second doped region 102 between adjacent first doped regions 101, and a spacer region 103 between the first doped regions 101 and the second doped regions 102.

[0076] In some embodiments, the material of the substrate 100 may be an elemental semiconductor material. Specifically, the elemental semiconductor material is composed of a single element, such as silicon or germanium. The elemental semiconductor material may be monocrystalline, polycrystalline, amorphous, or microcrystalline (a state simultaneously possessing both monocrystalline and amorphous states is called microcrystalline). For example, silicon may be at least one of monocrystalline silicon, polycrystalline silicon, amorphous silicon, or microcrystalline silicon.

[0077] In some embodiments, the substrate 100 may also be a compound semiconductor material. Common compound semiconductor materials include, but are not limited to, silicon germanide, silicon carbide, gallium arsenide, indium gallium dihydrogen phosphate, perovskite, cadmium telluride, and copper indium selenide. The substrate 100 may also be a sapphire substrate, a silicon-on-insulator substrate, or a germanium-on-insulator substrate.

[0078] In some embodiments, the substrate 100 can be an N-type semiconductor substrate or a P-type semiconductor substrate. The N-type semiconductor substrate is doped with an N-type dopant element, which can be any one of group V elements such as phosphorus (P), bismuth (Bi), antimony (Sb), or arsenic (As). The P-type semiconductor substrate is doped with a P-type dopant element, which can be any one of group III elements such as boron (B), aluminum (Al), gallium (Ga), or indium (In).

[0079] In some embodiments, the substrate 100 has a front side 112 and a back side 111 disposed opposite to each other. Here, "front" and "back" in front and back are relative, that is, "front" refers to the side facing the sunlight in the vertical direction, and "back" refers to the side facing away from the sunlight in the vertical direction.

[0080] In some embodiments, the back-contact solar cell is a single-sided cell, with the front side 112 serving as the light-receiving surface to receive incident light, and the back side 111 serving as the back-lighting surface. The back-lighting surface can also receive incident light, but its efficiency in receiving incident light is somewhat lower than that of the light-receiving surface.

[0081] In some embodiments, the back-contact solar cell is a bifacial cell, meaning that both the front and back sides of the substrate can serve as light-receiving surfaces and can be used to receive incident light.

[0082] In some embodiments, the back surface 111 has a plurality of first doped regions 101 arranged along the first direction Y, a second doped region 102 is provided between adjacent first doped regions 101, and a spacer region 103 is provided between the first doped region 101 and the second doped region 102.

[0083] In some embodiments, the first doped region 101 refers to the region where the orthographic projection of the first electrode 151 onto the reference plane is located, and the first doped region 101 serves as a functional region for forming a first type of metal electrode; similarly, the second doped region 102 refers to the region where the orthographic projection of the second electrode onto the reference plane is located, and the second doped region 102 serves as a functional region for forming a second type of metal electrode. The spacer region 103 refers to the region where the orthographic projections of the first electrode 151 and the second electrode 152 onto the reference plane do not overlap, that is, the spacer region serves as a functional region where no metal electrode is formed. In other words, the first doped region 101, the second doped region 102, and the spacer region 103 (which is also a non-metallic electrode region) are regions defined by functionally dividing the substrate 100 (back side 111) to illustrate the distribution of the film layer structure of the back contact solar cell. All three actually belong to the substrate 100 (back side 111), and there is no boundary between different regions. Only the film layers on them may be different. For example, the first doped region 101 has a first doped semiconductor layer 120, the second doped region 102 has a second doped semiconductor layer 140, and part of the spacer region 103 has a conductive layer 110.

[0084] It is worth noting that, to ensure that the films contacted by the first electrode 151 and the second electrode 152 are both corresponding functional films, the range of the first doped region 101 is set to be greater than or equal to the orthographic projection range of the first electrode 151 on the reference plane. That is, any orthographic projection of the first electrode 151 on the reference plane is located within the first doped region 101, and the distance between the edge of the first doped region 101 and the edge of the orthographic projection pattern is greater than or equal to 0. Similarly, the range of the second doped region 102 is greater than or equal to the orthographic projection range of the second electrode 152 on the reference plane. The reference plane is a flat surface perpendicular to the thickness direction Z of the substrate. The reference plane is parallel to the surface formed by the second direction X and the first direction Y.

[0085] In some embodiments, the first doped region 101 is either an N-region or a P-region, and the second doped region 102 is either an N-region or a P-region.

[0086] Continue to refer to Figure 2 The back-contact solar cell includes: a first doped semiconductor layer 120, which is located on a corresponding first doped region 101; the first doped semiconductor layer 120 contains a first doped element; a second doped semiconductor layer 140, which is located on a corresponding second doped region 102; the second doped semiconductor layer 140 contains a second doped element with a different conductivity type than the first doped element.

[0087] In some embodiments, the first doped semiconductor layer 120 is either an N-type doped layer or a P-type doped layer; the second doped semiconductor layer 140 is either an N-type doped layer or a P-type doped layer.

[0088] In some embodiments, the dopant elements in the first doped semiconductor layer 120 have the same conductivity type as the dopant elements in the substrate 100. For example, the substrate 100 has N-type dopant elements, and the first doped semiconductor layer 120 has N-type dopant elements; or the substrate 100 has P-type dopant elements, and the first doped semiconductor layer 120 has P-type dopant elements. In this way, the first doped semiconductor layer 120 and the substrate 100 have dopant elements of the same conductivity type. By setting the concentration of dopant elements in the first doped semiconductor layer 120 to be greater than the concentration of dopant elements in the substrate 100, a high-low junction is formed between the substrate 100 and the first doped semiconductor layer 120. Under the action of the built-in electric field constructed by the high-low junction, charge carriers can quickly migrate from the substrate 100 to the first doped semiconductor layer 120 and be collected by the first electrode.

[0089] Conversely, the dopant elements in the second doped semiconductor layer 140 have different conductivity types than the dopant elements in the substrate 100. For example, the substrate 100 may contain N-type dopant elements, while the second doped semiconductor layer 140 may contain P-type dopant elements; or the substrate 100 may contain P-type dopant elements, while the second doped semiconductor layer 140 may contain N-type dopant elements. In this way, a PN junction is formed between the substrate 100 and the second doped semiconductor layer 140. Minority and majority carriers flow to their respective P-regions and N-regions under their respective forces, which helps to accelerate carrier mobility.

[0090] In other embodiments, the above situation is reversed. For example, the dopant elements in the first doped semiconductor layer 120 have a different conductivity type than the dopant elements in the substrate 100, while the dopant elements in the second doped semiconductor layer 140 have the same conductivity type as the dopant elements in the substrate 100. These will not be described in detail here.

[0091] In some embodiments, the first doped semiconductor layer 120 is located on the back side 111 of the substrate 100, and the first doped semiconductor layer 120 is in direct contact with the substrate 100 without any additional film layer between them. Furthermore, the first doped semiconductor layer 120 and the substrate 100 can be prepared from the same initial substrate through different diffusion processes.

[0092] In some embodiments, the material of the first doped semiconductor layer 120 may be an elemental semiconductor material or a compound semiconductor material.

[0093] Figure 4 for Figure 1 A schematic diagram of the second type of cross-sectional structure along section A1-A2; Figure 5 for Figure 1 A schematic diagram of the second type of cross-sectional structure along section B1-B2; Figure 6 for Figure 1A schematic diagram of the third cross-sectional structure along section A1-A2; Figure 7 for Figure 1 A schematic diagram of the third type of cross-sectional structure along section B1-B2.

[0094] In some embodiments, reference Figure 4 or Figure 6 The first doped semiconductor layer 120 is located on the back side 111 of the substrate 100. There is a first dielectric layer between the first doped semiconductor layer 120 and the substrate 100, and the two are not in direct contact.

[0095] The first dielectric layer includes two cases, and the first doped semiconductor layer 120 also includes two corresponding cases, which will be explained below with reference to the relevant figures:

[0096] First scenario: Reference Figure 4 and Figure 5 If the first tunneling dielectric layer 121 serves as the first dielectric layer, then a passivated contact structure is formed between the first dielectric layer and the first doped semiconductor layer 120.

[0097] The back-contact solar cell further includes: a first tunneling dielectric layer located between the first doped semiconductor layer and the substrate; and / or, a second tunneling dielectric layer located between the second doped semiconductor layer and the substrate.

[0098] In some embodiments, the first doped semiconductor layer 120 can form a band bend on the surface of the substrate 100, and the first tunneling dielectric layer 121 causes an asymmetric shift in the energy band on the surface of the substrate 100, so that the barrier for the majority carriers (also known as majority carriers) is lower than the barrier for the minority carriers (also known as minority carriers). Therefore, the majority carriers can more easily perform quantum tunneling through the first tunneling dielectric layer 121, while the minority carriers have difficulty passing through the first tunneling dielectric layer 121, so as to achieve selective transport of carriers.

[0099] Furthermore, the first tunneling dielectric layer 121 serves a chemical passivation effect. Specifically, due to interface state defects at the interface between the substrate 100 and the first tunneling dielectric layer 121, the interface state density on the back side 111 is relatively high. This increased interface state density promotes the recombination of photogenerated carriers, increasing the fill factor, short-circuit current, and open-circuit voltage of the back-contact solar cell, thereby improving the photoelectric conversion efficiency of the back-contact solar cell. By positioning the first tunneling dielectric layer 121 on the back side 111, the first tunneling dielectric layer 121 chemically passivates the surface of the substrate 100. Specifically, by saturating the dangling bonds of the substrate 100, it reduces the defect state density of the substrate 100, thereby reducing the recombination centers on the substrate 100 and lowering the carrier recombination rate.

[0100] The first doped semiconductor layer 120 serves as a field passivation layer. Specifically, an electrostatic field pointing inwards from the substrate 100 is formed on the surface of the substrate 100, causing minority carriers to escape from the interface, thereby reducing the minority carrier concentration and decreasing the carrier recombination rate at the interface of the substrate 100. This increases the open-circuit voltage, short-circuit current, and fill factor of the back-contact solar cell, thereby improving the photoelectric conversion efficiency of the back-contact solar cell.

[0101] In some embodiments, the thickness of the first tunneling dielectric layer 121 is 0.5 nm to 10 nm. The thickness range of the first tunneling dielectric layer 121 is 0.5 nm to 1.3 nm, 1.3 nm to 4.6 nm, 4.6 nm to 6.1 nm, or 6.1 nm to 10 nm. When the thickness of the first tunneling dielectric layer 121 is within any of these ranges, the thickness of the first tunneling dielectric layer 121 is relatively thin, allowing majority carriers to easily tunnel through it, while minority carriers have difficulty passing through, thus achieving selective carrier transport.

[0102] In some embodiments, the material of the first tunneling dielectric layer 121 includes at least one of silicon oxide, amorphous silicon, microcrystalline silicon, nanocrystalline silicon, or silicon carbide.

[0103] In some embodiments, the first doped semiconductor layer 120 includes at least one of a doped amorphous silicon layer, a doped polycrystalline silicon layer, a doped microcrystalline silicon layer, a doped silicon carbide layer, or a doped crystalline silicon layer.

[0104] Second scenario: Reference Figure 6 and Figure 7 The first intrinsic dielectric layer 122 serves as the first dielectric layer, and the first intrinsic dielectric layer 122, the first doped semiconductor layer 120, and the substrate 100 form a heterojunction structure. The back-contact solar cell also includes a first transparent conductive layer 126, which is located on the surface of the first doped semiconductor layer 120, and the first electrode 151 is in contact with the first transparent conductive layer 126. The heterojunction structure allows for a higher open-circuit voltage at the interface between the first intrinsic dielectric layer 122 and the substrate 100, and also enables better passivation, thus facilitating improved conversion efficiency.

[0105] The back-contact solar cell further includes: a first intrinsic dielectric layer and a first transparent conductive layer, wherein the first intrinsic dielectric layer is located between the first doped semiconductor layer and the substrate, and the first transparent conductive layer is located on the surface of the first doped semiconductor layer; and / or, a second intrinsic dielectric layer and a second transparent conductive layer, wherein the second intrinsic dielectric layer is located between the second doped semiconductor layer and the substrate, and the second transparent conductive layer is located on the surface of the second doped semiconductor layer.

[0106] In some embodiments, the material of the first intrinsic dielectric layer 122 includes intrinsic amorphous silicon, intrinsic microcrystalline silicon, intrinsic silicon oxide, intrinsic silicon nitride nanocrystalline silicon, or intrinsic silicon carbide. The thickness of the first intrinsic dielectric layer 122 may be greater than or equal to 2 micrometers and less than or equal to 10 micrometers, preferably 5 micrometers. In some cases, due to the influence of subsequent diffusion or doping process conditions of other film layers, the intrinsic dielectric layer may also include a small amount of dopant elements.

[0107] In some embodiments, the second doped semiconductor layer 140 includes one or more composite thin film layers stacked together from N-type doped or P-type doped amorphous silicon, amorphous silicon oxide, amorphous silicon carbide, microcrystalline silicon, hydrogenated microcrystalline silicon, microcrystalline silicon oxide, microcrystalline silicon carbide, or polycrystalline silicon semiconductor thin films.

[0108] Among them, the use of hydrogenated microcrystalline silicon can have a larger band gap and a narrower absorption spectrum range, thus effectively improving the photoelectric conversion efficiency of the battery. Furthermore, with the increase of crystallinity, the series resistance decreases and the fill factor increases, which can improve the output current of the battery and effectively extend the battery life.

[0109] In some embodiments, the first transparent conductive layer 126 may include at least one of tin-doped indium oxide (ITO), aluminum-doped zinc oxide (AZO), cerium-doped indium oxide, and tungsten-doped indium oxide.

[0110] The second doped semiconductor layer 140 can also include various cases as described above; for example, in some examples, refer to Figure 2 The second doped semiconductor layer 140 is in direct contact with the substrate 100; in some examples, reference Figure 4 A second tunneling dielectric layer 141 (second dielectric layer) is provided between the second doped semiconductor layer 140 and the substrate 100; in some examples, reference... Figure 6 The second doped semiconductor layer 140 has a second intrinsic dielectric layer 142 (second dielectric layer) between it and the substrate 100. The surface of the second doped semiconductor layer 140 has a second transparent conductive layer 146, and the second electrode 152 is in electrical contact with the second transparent conductive layer 146.

[0111] In some embodiments, the film structures of the first doped semiconductor layer 120 on the first doped region 101 and the second doped semiconductor layer 140 on the second doped region 102 may be the same or different, for example, Figure 2 In the back-contact solar cell, the first doped semiconductor layer 120 on the first doped region 101 is in direct contact with the substrate 100, and the second doped semiconductor layer 140 on the second doped region 102 is in direct contact with the substrate 100. Figure 4In the back-contact solar cell, the first doped region 101 has a first tunneling dielectric layer 121 and a first doped semiconductor layer 120, and the first electrode 151 is in contact with the first doped semiconductor layer 120; the second doped region 102 has a second tunneling dielectric layer 141 and a second doped semiconductor layer 140, and the second electrode 152 is in contact with the second doped semiconductor layer 140. Figure 6 In the back-contact solar cell, the first doped region 101 has a first intrinsic dielectric layer 122, a first doped semiconductor layer 120, and a first transparent conductive layer 126, and the first electrode 151 is in contact with the first transparent conductive layer 126; the second doped region 102 has a second intrinsic dielectric layer 142, a second doped semiconductor layer 140, and a second transparent conductive layer 146, and the second electrode 152 is in contact with the second transparent conductive layer 146.

[0112] Continue to refer to Figure 3 The back-contact solar cell includes at least one conductive layer 110, which is located on a portion of the spacer region 103. One side of the conductive layer 110 is electrically contacted with a first doped semiconductor layer 120, and the other side of the conductive layer 110 is electrically contacted with a second doped semiconductor layer 140. The conductive layer 110 itself acts as a connecting layer, electrically connecting the first doped semiconductor layer 120 and the second doped semiconductor layer 140, thereby realizing electrical transmission between them to achieve current shunting of opposite polarities, thus forming a bypass diode. This can effectively balance and improve the increased local current and voltage of the back-contact solar cell due to the "hot spot effect," thereby improving and compensating for the problems caused by the "hot spot effect," preventing problems in a cell string, and effectively ensuring the power of the cell string due to shading events.

[0113] Furthermore, the back-contact solar cell includes multiple conductive layers 110. Each conductive layer 110 itself serves as an electrical transport channel, electrically connecting the first doped semiconductor layer 120 and the second doped semiconductor layer 140. This electrical transport channel can act as a channel for leakage current in the tunnel junction between P-type doped ions and N-type doped ions (minority carriers and majority carriers), dispersing the original leakage current channel and thus alleviating the pressure of a single leakage current channel. It evenly disperses the leakage current of each individual, thereby controllably adjusting and improving the leakage current problem of the cell. In turn, it can effectively reduce high voltage or high heat events in one or more leakage current areas of the back-contact solar cell, thereby solving or improving the "hot spot effect" caused by local overheating.

[0114] In some embodiments, reference Figure 3The conductive layer 110 is located on the substrate 100 corresponding to the spacer region 103 and is in electrical contact with the side surface of the corresponding first doped semiconductor layer 120. Thus, the conductive layer 110 is in contact with the side surface of the first doped semiconductor layer 120, meaning the conductive layer 110 is not located on the top surface of the first doped semiconductor layer 120, but rather on the surface of the substrate 100. The conductive layer 110 can passivate the surface of the spacer region and repair etching defects on the surface of the spacer region. The contact area between the conductive layer 110 and the side surface of the first doped semiconductor layer 120 can be controlled by a single variable at the contact point between a single first doped semiconductor layer 120 and a second doped semiconductor layer 140, thereby controlling the leakage current and making the entire operation more convenient and accurate.

[0115] The spacer region 103 includes a first processing region 131 and a second processing region 132. The first processing region 131 is the region corresponding to the conductive layer 110, and the second processing region 132 is the region not corresponding to the conductive layer 110. The region corresponding to the conductive layer 110 can refer to the orthographic projection region of the conductive layer onto the substrate; the region not corresponding to the conductive layer 110 can refer to the region within the spacer region other than the orthographic projection region of the conductive layer onto the substrate.

[0116] It is worth noting that, Figure 3 The shape of the conductive layer 110 is merely an example. In this example, the conductive layer 110 has a partially raised structure because the second doped film during fabrication is located on the first doped semiconductor layer 120. This partially raised structure is physically insulated from the first electrode, meaning that the raised structure does not contact the first electrode, thereby controlling the magnitude of the leakage current. While ensuring leakage current, the back-contact solar cell exhibits a higher cell efficiency. In some embodiments, the surface of the conductive layer is flat or conformal to the back surface; that is, the surface of the conductive layer does not have a raised structure.

[0117] Secondly, in the various figures of the embodiments of this application, the contact areas of each region and the film layer are all vertical side contact or surface contact, and the structure of the film layer is a regular shape. However, these are only examples. In reality, the contact areas between film layers can also be inclined surfaces at an acute angle to the vertical direction, etc. The embodiments of this application do not limit them.

[0118] Figure 8 for Figure 1 A schematic diagram of the fourth cross-sectional structure along section B1-B2; Figure 9 for Figure 1 A schematic diagram of the fifth type of cross-sectional structure along section B1-B2; Figure 10 for Figure 1 A schematic diagram of the sixth type of cross-sectional structure along section B1-B2.

[0119] In some embodiments, reference Figure 8 The first doped semiconductor layer 120 includes an extension 123 located on a portion of the spacer region 103. The conductive layer 110 is electrically contacted with the top surface and side surface of the extension 123. Since the first doped semiconductor layer 120 extends onto the spacer region, the contact area between the first doped semiconductor layer 120 and the conductive layer 110 can include a portion of the surface and side surface, thereby reducing the size of the corresponding conductive layer 110, reducing the amount of conductive layer 110 used, and lowering the fabrication cost. The first doped semiconductor layer 120 located in the first doped region serves as the body portion 124.

[0120] It is worth noting that, Figure 8 The shape of the conductive layer 110 is merely an example. In this example, the extension does not occupy the entire first processing area; that is, the extension does not contact the second doped semiconductor layer 140. In some embodiments, the size of the extension and the first processing area can be set according to actual needs. The extension may completely occupy the first processing area and also be in electrical contact with the second doped semiconductor layer 140; or the extension may occupy half of the first processing area.

[0121] In some embodiments, reference Figure 9 The conductive layer 110 extends to a portion of the top surface of the first doped semiconductor layer 120 corresponding to the first doped region 101, and the conductive layer 110 is physically insulated from the first electrode 151. Thus, with a constant contact area between the conductive layer 110 and the first doped semiconductor layer 120, the amount of conductive layer 110 used can be reduced accordingly, thereby reducing the amount of conductive layer 110 used. Physical insulation means no contact.

[0122] In some embodiments, reference Figure 10 The material of the conductive layer 110 is the same as the material of the first doped semiconductor layer 120.

[0123] In some embodiments, reference Figure 3 The material of the conductive layer 110 is the same as the material of the second doped semiconductor layer 140.

[0124] In some embodiments, the extension length of the spacer region 103 is a first length, and the contact length between the conductive layer 110 and the first doped semiconductor layer 120 is a second length. The ratio of the second length L1 to the first length is less than or equal to 30%. A ratio of less than or equal to 30% ensures that the area of ​​the conductive layer 110 is moderate, and the leakage current released by the first doped semiconductor layer 120 and the second doped semiconductor layer 140 will not be large. Therefore, this leakage current or reverse bias voltage can alleviate the large leakage current in localized areas of the entire battery and the thermal problems caused by the "hot spot effect" while ensuring battery efficiency, and can also avoid the problem of reduced efficiency in large PN junction contact areas.

[0125] In some embodiments, the ratio of the second length L1 to the first length can be 10%, 15%, 18%, 23%, or 29%.

[0126] Figure 11 This is a schematic diagram of the structure of a back contact solar cell with a spacer region and a first doped region according to an embodiment of this application; Figure 12 This application provides an embodiment of another structural schematic diagram of a back-contact solar cell.

[0127] refer to Figure 12 The first doped region 101 and the second doped region 102 are arranged alternately along the first direction Y, and the length L2 of the spacer region 103 along the second direction X is the extension length of the spacer region 103; Reference Figure 11 The second doped region 102 surrounds the first doped region 101, and the inner perimeter of the spacer region 103 is the extension length of the spacer region 103. The inner perimeter of the spacer region 103 refers to the perimeter of the contact area between the spacer region and the first doped region in the orthographic projection pattern on the reference plane. In other words, since the spacer region surrounds the first doped region, the spacer region is a hollow ring structure, and the inner perimeter refers to the perimeter of the cross-sectional pattern of the small ring.

[0128] In some embodiments, reference Figure 11 The inner perimeter of the spacer region 103 is the extension length of the spacer region 103. At least one first doped semiconductor layer 120 includes a long side 161 extending along the first direction Y and a short side 162 extending along the second direction X. The conductive layer 110 is in electrical contact with the short side 162. Thus, the area corresponding to the short side is larger, which can provide more space for corresponding operations on the first processing area. This can effectively reduce the impact on the surrounding first and second doped semiconductor layers, improve the accuracy of the conductive layer 110 and the balance of leakage current.

[0129] In some embodiments, reference Figure 11 The length of the short side 162 is the third length L3. The ratio of the third length L3 to the second length L1 is greater than or equal to 10%. This allows the conductive layer 110 to cover a larger area, thus ensuring the accuracy of the leakage current value.

[0130] In some embodiments, the ratio of the third length L3 to the second length L1 can be 15%, 38%, 59%, 88%, or 99%.

[0131] In some embodiments, the plurality of first doped semiconductor layers 120 include: a plurality of first portions, the first portions being first doped semiconductor layers 120 electrically in contact with a corresponding conductive layer 110; and a plurality of second portions, the second portions being first doped semiconductor layers 120 not electrically in contact with the conductive layer 110.

[0132] In some embodiments, N1 / N ≥ 5%, where N1 is the number of first parts and N is the total number of multiple first doped semiconductor layers 120. A larger number of first parts can equalize a leakage current area into multiple contact areas, which can avoid the problem of local overheating caused by hot spot effect, and also ensure the balance of current collection at various points on the surface of the back contact solar cell, thereby improving the poor EL appearance and thermal problems of the back contact solar cell.

[0133] The ratio of N1 / N can be 10%, 13%, 20% or 30%.

[0134] In some embodiments, 0 ≤ N2 ≤ 10, where N2 is the number of second parts located between two adjacent first parts. By controlling the number of second parts between the first parts, the distance between the two contact areas can be ensured to be neither too far nor too close, resulting in a more suitable arrangement between the contact areas. This leads to a more uniform leakage current across the entire back contact solar cell surface and a more uniform reverse bias voltage generated at various locations. This allows for timely release and equalization of the current and voltage generated by any hot spot effect, preventing significant damage to the back contact solar cell.

[0135] N2 can be 0, 2, 5, 8 or 10.

[0136] In some embodiments, the number of second parts between every two adjacent first parts is equal.

[0137] In some embodiments, Figure 13 An optical microscope image of a first processing area in a back-contact solar cell provided in an embodiment of this application, with reference to... Figure 13 The top surface of the second doped semiconductor layer 140 is lower than the top surface of the first doped semiconductor layer 120, and the side surface of the conductive layer 110 is curved.

[0138] It is worth noting that, Figure 13 In the structure shown, since the thickness of the first doped semiconductor layer and the conductive layer are both relatively thin, the layering of the two is illustrated by dashed lines in the figure.

[0139] In some embodiments, reference Figure 13 The conductive layer 110 includes a first conductive layer 116 and a second conductive layer 117. The first conductive layer 116 is located on the side of the first doped semiconductor layer 120, and the second conductive layer 117 is located on the surface of the first doped semiconductor layer 120. An acute angle is formed between the bottom surfaces of the first conductive layer 116 and the second conductive layer 117. The acute angle indicates that at least one of the first conductive layer and the second conductive layer is not a plane or a vertical plane, but an inclined plane. The inclined plane can improve the internal reflection of sunlight, thereby improving the photoelectric conversion efficiency.

[0140] In some embodiments, reference Figure 13 The first conductive layer 116 is projected onto the projection plane as a first projection, and the second conductive layer 117 is projected onto the projection plane as a second projection. The first and second projections at least partially overlap. Thus, the second conductive layer 117 protrudes from the first conductive layer 116, forming a recessed region. This recessed region can capture sunlight, concentrating it within the recessed area, where it is then absorbed by the substrate, forming photogenerated carriers. The recessed structure can improve the internal reflectivity of sunlight, thereby improving the cell efficiency of the back-contact solar cell. The projection plane can be considered a reference plane.

[0141] In some embodiments, the conductive layer 110 has a brim structure 118, which is located in the contact area between the first conductive layer 110 and the second conductive layer 110, and the side of the brim structure 118 is an arc surface.

[0142] Continue to refer to Figure 2 The back-contact solar cell includes a passivation layer 115, which covers a first doped semiconductor layer 120, a second doped semiconductor layer 140, a conductive layer 110, and a spacer region 103.

[0143] In some embodiments, the passivation layer 115 may be a single-layer structure or a stacked structure, and the material of the passivation layer 115 may be one or more of the following materials: silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride, titanium oxide, hafnium oxide, or aluminum oxide.

[0144] In some embodiments, the back-contact solar cell further includes an anti-reflection layer located on the surface of the passivation layer. The anti-reflection layer reduces or eliminates reflected light from the surface of the back-contact solar cell, thereby increasing the light transmittance of the surface and reducing or eliminating stray light in the system. The anti-reflection layer is made of silicon nitride or silicon oxynitride.

[0145] In some embodiments, the front side 112 has a textured structure 114, which includes a plurality of pyramidal structures 104. The back contact solar cell also includes a front passivation layer 109 covering the textured structure 114.

[0146] In some embodiments, the front passivation layer 109 can be a single-layer structure or a stacked structure, and the material of the front passivation layer 109 can be one or more of the following materials: silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride, titanium oxide, hafnium oxide, or aluminum oxide.

[0147] In some embodiments, the material of the front passivation layer 109 is the same as that of the passivation layer 115, and the front passivation layer 109 and the passivation layer 115 are prepared in the same manufacturing process.

[0148] Continue to refer to Figure 2The back-contact solar cell includes a first electrode 151, which is in electrical contact with a first doped semiconductor layer 120.

[0149] Continue to refer to Figure 2 The back-contact solar cell includes a second electrode 152, which is in electrical contact with a second doped semiconductor layer 140.

[0150] In some embodiments, either the first electrode 151 or the second electrode 152 may be sintered from a burn-through metal paste, which may include at least one of silver, aluminum, copper, tin, gold, lead, or nickel.

[0151] In some embodiments, the back surface may have an uneven structure, that is, at least one of the first doped region, the second doped region, and the spacer region may have an uneven structure. The uneven structure can increase the internal reflection of incident light, thereby improving the utilization rate of incident light and thus improving the cell efficiency of the back contact solar cell.

[0152] In the back-contact solar cell provided in this application embodiment, the substrate has a first doped region 101, a second doped region 102, and a spacer region 103. It also includes a first doped semiconductor layer 120 located on the first doped region 101, a second doped semiconductor layer 140 located on the second doped region 102, and a conductive layer 110 located on a portion of the spacer region 103. The two sides of the conductive layer 110 are in electrical contact with the first doped semiconductor layer 120 and the second doped semiconductor layer 140, respectively, to realize the electrical connection between the two, thereby realizing the electrical transmission between them. This electrical transmission channel can serve as a channel for the leakage current of the tunnel junction between P-type doped ions and N-type doped ions (minority carriers and majority carriers), dispersing the original leakage current channel, thereby relieving the pressure of a leakage current channel, and uniformly dispersing the leakage current from various locations. This allows for controllable adjustment and improvement of the leakage current problem of the cell, thereby effectively reducing high voltage or high heat events in one or more leakage current regions in the back-contact solar cell, and thus solving or improving the "hot spot effect" caused by local overheating.

[0153] Furthermore, for a battery string composed of multiple back-contact solar cells, a back-contact solar cell with a conductive layer 110 is provided. When the solar cell has a hot spot effect, the conductive layer 110 connects the first doped semiconductor layer 120 and the second doped semiconductor layer 140 and has a reverse bias voltage. The reverse bias voltage balances the increased local current and voltage of the back-contact solar cell itself due to the "hot spot effect", thereby improving and compensating for the problems caused by the "hot spot effect", avoiding problems in a battery string, and effectively ensuring the power of the battery string due to shading events.

[0154] Accordingly, another aspect of this application provides a method for preparing a back-contact solar cell, which can be used to prepare the back-contact solar cell provided in the above embodiments. The same or corresponding technical features as those in the above embodiments will not be described in detail here.

[0155] Figures 14-23 This is a schematic diagram of the structure of a back-contact solar cell corresponding to each step of a method for fabricating a back-contact solar cell according to an embodiment of this application. Figures 14-23 The above embodiments Figure 4 The corresponding method for fabricating back-contact solar cells is described in the embodiments of this application. Figure 4 The method for fabricating a back-contact solar cell shown is described in detail as an example. Other embodiments can be appropriately adjusted by those skilled in the art in conjunction with the corresponding fabrication methods. The embodiments in this application will not be described in detail.

[0156] refer to Figure 14 and Figure 15 The preparation method includes: providing a substrate 100, the substrate 100 having a plurality of first doped regions 101 arranged along a first direction Y, a second doped region 102 between adjacent first doped regions 101, and a spacer region 103 between the first doped regions 101 and the second doped regions 102.

[0157] A raw substrate is provided, and the first and second surfaces of the raw substrate are smoothed surfaces. The first surface is texturized. The texturization process includes chemical etching, for example, cleaning the raw substrate with a mixed solution of potassium hydroxide and hydrogen peroxide. Specifically, the desired textured surface structure 114 can be formed by controlling the concentration ratio of potassium hydroxide and hydrogen peroxide solutions. In some embodiments, the textured surface structure can also be formed by laser etching, mechanical methods, or plasma etching. In laser etching, the laser process parameters are controlled to obtain a textured surface structure with the desired morphology. The textured surface structure 114 includes multiple pyramidal structures 104, the remaining raw substrate serves as a substrate 100, the first surface of the substrate serves as a front face 112, and the second surface of the substrate serves as a back face 111.

[0158] In some embodiments, after forming the velvet structure 114, a polishing process is further performed on the back surface 111 of the substrate 100 to form a polished surface on the back surface 111 of the substrate 100.

[0159] refer to Figures 16 to 19 A first doped semiconductor layer 120 is formed on the corresponding first doped region 101, and the first doped semiconductor layer 120 contains a first doping element.

[0160] refer to Figure 16 and Figure 17In some embodiments, the process steps for forming the first doped semiconductor layer 120 include: forming a first dielectric film 105 and a first doped film 106 on the first doped region 101, the spacer region 103, and the second doped region 102, wherein the first doped film is located on the surface of the first dielectric film 105; Reference Figure 18 and Figure 19 Remove the first doped film 106 and the first dielectric film 105 on the second doped region 102, wherein the first doped film 106 located on the first doped region 101 serves as the first doped semiconductor layer 120, and the first dielectric film 105 serves as the first tunneling dielectric layer 121.

[0161] If formed Figure 10 The back-contact solar cell shown has a spacer region 103 including a first processing region 131 and a second processing region 132. A first doped film 106 is located in both the first processing region 131 and the second processing region 132. The process of removing the first doped film 106 from the second doped region 102 further includes removing the first doped film 106 from the second processing region 132. The remaining first doped film 106 on the first processing region 131 serves as a conductive layer. A conductive layer 110 is located on the first processing region 131.

[0162] form Figure 8 The back-contact solar cell shown includes, during the removal of the first doped film 106 on the second doped region 102, the removal of the first doped film 106 in the second processing region 132 and a portion of the first doped film 106 in the first processing region 131, with the remaining first doped film 106 on the first processing region 131 serving as an extension. A conductive layer 110 is located on the first processing region 131.

[0163] refer to Figures 20 to 23 A second doped semiconductor layer 140 is formed on the corresponding second doped region 102. The second doped semiconductor layer 140 contains a second doped element with a different conductivity type than the first doped element. A conductive layer 110 is formed on a portion of the spacer region 103. One side of the conductive layer 110 is in electrical contact with the first doped semiconductor layer 120, and the other side of the conductive layer 110 is in electrical contact with the second doped semiconductor layer 140.

[0164] In some embodiments, reference Figure 19 The process of removing the first doped film 106 on the second doped region 102 further includes: removing the first doped film 106 and the first dielectric film 105 of the first processing region 131; the process steps for forming the second doped semiconductor layer 140 include: referencing Figure 20 as well as Figure 21A second dielectric film 107 and a second doped film 108 are formed on the surface of the first doped semiconductor layer 120, the first processing region 131, the second processing region 132, and the second doped region 102, with the second doped film 108 located on the surface of the second dielectric film 107; Reference Figure 22 as well as Figure 23 The second dielectric film 107 and the second doped film 108 located on the first doped semiconductor layer 120 and the second processing region 132 are removed. The second doped film 108 located on the first processing region 131 serves as the conductive layer 110, the second doped film 108 located on the second doped region 102 serves as the second doped semiconductor layer 140, and the remaining second dielectric film serves as the second tunneling dielectric layer 141.

[0165] In some embodiments, removing the film layers in the aforementioned regions can be achieved through a masking and etching process or a patterning process. The mask can include any one of ink, paraffin wax, or a doped silicon glass layer. The etching process can include any one of dry etching, wet etching, or laser etching.

[0166] The processes for forming the various films mentioned above can include chemical vapor deposition or physical vapor deposition.

[0167] refer to Figure 4 and Figure 5 A passivation layer 115 is formed, which covers the first doped semiconductor layer 120, the second doped semiconductor layer 140, the conductive layer 110, and the spacer region 103; a first electrode 151 is formed, which is in electrical contact with the first doped semiconductor layer 120; and a second electrode 152 is formed, which is in electrical contact with the second doped semiconductor layer 140.

[0168] Accordingly, another aspect of this application provides a photovoltaic module, including any of the back-contact solar cells in the above embodiments and the back-contact solar cells prepared by the preparation method of the back-contact solar cells provided in the above embodiments. The same or corresponding technical features as those in the above embodiments will not be described in detail here.

[0169] Figure 24 A schematic diagram of a photovoltaic module provided in another embodiment of this application; Figure 25 for Figure 24 A schematic cross-sectional view along section M1-M2. This is to illustrate the connection relationship between the connecting components and the solar cell. Figure 24 The surface shown is the structure on the back of the substrate, and the encapsulation film and cover plate are not shown.

[0170] refer to Figure 24 and Figure 25A photovoltaic module includes: a battery string, which is formed by connecting a plurality of back-contact solar cells 20 as described in any of the above embodiments or back-contact solar cells 20 prepared by any of the above embodiments; a connecting member 28 for electrically connecting two adjacent back-contact solar cells 20; an encapsulating film 21 for covering the surface of the battery string; and a cover plate 22 for covering the surface of the encapsulating film 21 away from the battery string.

[0171] Specifically, in some embodiments, multiple back-contact solar cells 20 can be electrically connected by a connecting component 28, which is welded to the main grid / sub-grid on the cell 30.

[0172] In some embodiments, the connecting member 28 is welded to a sub-grid on the battery cell, the sub-grid including a first electrode 151 and a second electrode 152. In some embodiments, the connecting member 28 is welded to a main grid on the battery cell, the main grid including a first main grid and a second main grid, the first main grid being welded to a first electrode and the second main grid being welded to a second electrode.

[0173] In some embodiments, the encapsulating film 21 includes a first encapsulating film and a second encapsulating film. The first encapsulating film covers one of the front or back sides of the back-contact solar cell, and the second encapsulating film covers the other of the front or back sides of the back-contact solar cell. Specifically, at least one of the first encapsulating film or the second encapsulating film may be an organic encapsulating film such as polyvinyl butyral (PVB) film, ethylene-vinyl acetate copolymer (EVA) film, polyvinyl octene elastomer (POE) film, or polyethylene terephthalate (PET) film.

[0174] It is worth noting that the first encapsulating film and the second encapsulating film still have a dividing line before the lamination process. After the lamination process, the photovoltaic module will no longer have the concept of the first encapsulating film and the second encapsulating film. That is, the first encapsulating film and the second encapsulating film have formed an integral encapsulating film 21.

[0175] In some embodiments, the cover plate 22 can be a glass cover plate, a plastic cover plate, or other cover plate with light-transmitting function. Specifically, the surface of the cover plate 22 facing the encapsulating film 21 can be an uneven surface, thereby increasing the utilization rate of incident light. The cover plate 22 includes a first cover plate and a second cover plate, the first cover plate being opposite to the first encapsulating film, and the second cover plate being opposite to the second encapsulating film; or the first cover plate being opposite to the side of the solar cell that is in back contact with the solar cell, and the second cover plate being opposite to the other side of the solar cell that is in back contact with the solar cell.

[0176] While this application discloses preferred embodiments as described above, it is not intended to limit the scope of the claims. Any person skilled in the art can make various possible variations and modifications without departing from the concept of this application. Therefore, the scope of protection of this application should be determined by the scope defined in the claims. Furthermore, the embodiments and accompanying drawings in this specification are merely illustrative and do not represent the full scope of protection of the claims.

[0177] Those skilled in the art will understand that the above embodiments are specific examples of implementing this application, and in practical applications, various changes in form and detail can be made without departing from the spirit and scope of this application. Any person skilled in the art can make various alterations and modifications without departing from the spirit and scope of this application; therefore, the scope of protection of this application should be determined by the scope defined in the claims.

Claims

1. A back-contact solar cell, characterized in that, include: A substrate (100) has a plurality of first doped regions (101) arranged along a first direction Y, a second doped region (102) between adjacent first doped regions (101), and a spacer region (103) between the first doped region (101) and the second doped region (102). A first doped semiconductor layer (120) is located on a corresponding first doped region (101); the first doped semiconductor layer (120) contains a first doping element; A second doped semiconductor layer (140) is located on a corresponding second doped region (102); the second doped semiconductor layer (140) contains a second doped element with a different conductivity type than the first doped element; At least one conductive layer (110) is located on a portion of the spacer region (103). One side of the conductive layer (110) is in electrical contact with the first doped semiconductor layer (120), and the other side of the conductive layer (110) is in electrical contact with the second doped semiconductor layer (140). The conductive layer (110) includes a first conductive layer (116) and a second conductive layer (117). The orthographic projection of the first conductive layer (116) onto the projection plane is a first projection, and the orthographic projection of the second conductive layer (117) onto the projection plane is a second projection. The first projection and the second projection at least partially overlap, so that the bottom surface of the first conductive layer and the surface of the second conductive layer form a concave structure. A passivation layer (115) covers the first doped semiconductor layer (120), the second doped semiconductor layer (140), the conductive layer (110), and the spacer region (103).

2. The back-contact solar cell according to claim 1, characterized in that, The extension length of the spacer region (103) is a first length, and the contact length between the conductive layer (110) and the first doped semiconductor layer (120) is a second length. The ratio of the second length L1 to the first length is less than or equal to 30%. The first doped region (101) and the second doped region (102) are arranged alternately along the first direction Y, and the length of the spacer region (103) along the second direction X is the extension length of the spacer region (103); the second doped region (102) surrounds the first doped region (101), and the inner perimeter of the spacer region (103) is the extension length of the spacer region (103).

3. The back-contact solar cell according to claim 2, characterized in that, The inner perimeter of the spacer region (103) is the extension length of the spacer region (103), and at least one of the first doped semiconductor layers (120) includes a long side (161) extending along the first direction Y and a short side (162) extending along the second direction X, and the conductive layer (110) is in electrical contact with the short side (162).

4. The back-contact solar cell according to claim 3, characterized in that, The length of the short side (162) is a third length L3, and the ratio of the third length L3 to the second length L1 is greater than or equal to 10%.

5. The back-contact solar cell according to claim 1, characterized in that, The plurality of the first doped semiconductor layers (120) include: Multiple first parts, wherein the first part is the first doped semiconductor layer (120) that is in electrical contact with the corresponding conductive layer (110). Multiple second parts, the second parts being the first doped semiconductor layer (120) that is not in electrical contact with the conductive layer (110). Wherein, N1 / N≥5%, N1 is the number of the first part, and N is the total number of the plurality of the first doped semiconductor layers (120).

6. The back-contact solar cell according to claim 5, characterized in that, 0≤N2≤10, where N2 is the number of second parts located between two adjacent first parts.

7. The back-contact solar cell according to claim 5 or 6, characterized in that, The number of second parts is equal between every two adjacent first parts.

8. The back-contact solar cell according to claim 1, characterized in that, The material of the conductive layer (110) is the same as that of at least one of the first doped semiconductor layer (120) or the second doped semiconductor layer (140).

9. The back-contact solar cell according to claim 1, characterized in that, Also includes: The first electrode (151) is in electrical contact with the first doped semiconductor layer (120); The second electrode (152) is in electrical contact with the second doped semiconductor layer (140).

10. The back-contact solar cell according to claim 9, characterized in that, The conductive layer (110) is located on the substrate (100) corresponding to the spacer region (103) and is in electrical contact with the side of the corresponding first doped semiconductor layer (120).

11. The back-contact solar cell according to claim 9, characterized in that, The first doped semiconductor layer (120) includes an extension (123) located on a portion of the spacer region (103), and the conductive layer (110) is in electrical contact with the top and side surfaces of the extension (123).

12. The back-contact solar cell according to claim 10 or 11, characterized in that, The conductive layer (110) also extends to a portion of the top surface of the first doped semiconductor layer (120) corresponding to the first doped region (101), and the conductive layer (110) is physically insulated from the first electrode (151).

13. The back-contact solar cell according to claim 12, characterized in that, The top surface of the second doped semiconductor layer (140) is lower than the top surface of the first doped semiconductor layer (120), and the side surface of the conductive layer (110) is curved.

14. The back-contact solar cell according to claim 13, characterized in that, The first conductive layer (116) is located on the side of the first doped semiconductor layer (120), and the second conductive layer (117) is located on the surface of the first doped semiconductor layer (120). An acute angle is formed between the bottom surfaces of the first conductive layer (116) and the second conductive layer (117).

15. The back-contact solar cell according to claim 1, characterized in that, Also includes: A first tunneling dielectric layer is located between the first doped semiconductor layer and the substrate; And / or, a second tunneling dielectric layer, the second tunneling dielectric layer being located between the second doped semiconductor layer and the substrate.

16. The back-contact solar cell according to claim 1, characterized in that, Also includes: A first intrinsic dielectric layer and a first transparent conductive layer, wherein the first intrinsic dielectric layer is located between the first doped semiconductor layer and the substrate, and the first transparent conductive layer is located on the surface of the first doped semiconductor layer; and / or, a second intrinsic dielectric layer and a second transparent conductive layer, wherein the second intrinsic dielectric layer is located between the second doped semiconductor layer and the substrate, and the second transparent conductive layer is located on the surface of the second doped semiconductor layer.

17. A photovoltaic module, characterized in that, include: A battery string is formed by connecting multiple back-contact solar cells (20) as described in any one of claims 1 to 16; A connecting component (28) is used to electrically connect two adjacent back-contact solar cells (20). An encapsulating film (21) is used to cover the surface of the battery string; A cover plate (22) is used to cover the surface of the encapsulation film (21) facing away from the battery string.

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