High-brightness red light Mini LED chip and preparation method thereof

Abstract

The invention relates to a high-brightness red light Mini LED chip and a preparation method thereof. The high-brightness red light Mini LED chip sequentially comprises a transparent substrate, a bonding layer, a P-GaP light window layer, a P-AlInP limiting layer, an MQW multi-quantum well layer, an N-AIInP limiting layer, an N-AlGaInP current expansion layer, an N-GaAs ohmic layer, a P primary electrode, an N primary electrode, a DBR passivation layer, a P electrode bonding pad and an N electrode bonding pad from bottom to top. According to the method, the mask layer is manufactured during coarsening of the GaP window layer, multi-section coarsening is adopted, the photoresist mask is removed before the last coarsening, the area outside the mask layer is coarsened and during the last coarsening, the whole face is coarsened, the coarsening structure with the surface pattern is formed, the light-emitting area is increased, and therefore the brightness of the chip is improved.

Description

Technical Field

[0001] This invention relates to a high-brightness red Mini LED chip and its fabrication method, belonging to the field of LED chip manufacturing technology. Background Technology

[0002] Mini LED refers to LED devices with a chip size between 50 and 200 micrometers (μm), which is smaller than traditional LEDs (>200μm) but slightly larger than Micro LEDs (<50μm). Mini LED is an emerging display technology that falls between traditional LEDs and Micro LEDs, achieving higher image quality and energy efficiency through smaller LED chips.

[0003] Currently, Mini LED is rapidly moving towards large-scale commercialization, shining brightly in fields such as TVs, monitors, laptops, tablets, automotive displays, and VR. However, the generally high prices of current application terminals are undoubtedly a major obstacle to the continued growth of the Mini LED market. The high cost of Mini LED chips, driver ICs, backplanes, and auxiliary materials, which account for the majority of the cost, is due to factors such as technological routes, yield rates, and supply chain integration. Red Mini LEDs replace the substrate by bonding transparent materials such as sapphire substrates to red epitaxial wafers through a SiO2 layer. Due to the large difference in refractive index between SiO2, GaP, and Al2O3, total internal reflection occurs when light emitted from the epitaxial layer enters the sapphire substrate. The current mainstream method is to roughen the entire GaP surface to reduce total emission.

[0004] As the size of Mini LED chips continues to shrink, there is an urgent need to improve the brightness of the chips. Summary of the Invention

[0005] To address the issue of improving the brightness of Mini LED chips, this invention provides a high-brightness red Mini LED chip; The present invention also provides a method for preparing the above-mentioned high-brightness red Mini LED chip.

[0006] Terminology Explanation: 1. Mini LED, sub-millimeter light-emitting diode.

[0007] 2. MOCVD is a vapor phase epitaxial growth technique.

[0008] 3. PECVD is a plasma-enhanced chemical vapor deposition technique.

[0009] The technical solution of the present invention is as follows: A high-brightness red Mini LED chip comprises, from bottom to top, a transparent substrate, a bonding layer, a P-GaP optical window layer, a P-AlInP confinement layer, an MQW multiple quantum well layer, an N-AlInP confinement layer, an N-AlGaInP current spreading layer, an N-GaAs ohmic layer, a P primary electrode, an N primary electrode, a DBR passivation layer, a P electrode pad, and an N electrode pad.

[0010] The fabrication method of the above-mentioned high-brightness red Mini LED chip includes the following steps: (1) Using the MOCVD method, GaInP blocking layer, N-GaAs ohmic layer, N-AlInP confinement layer, N-AlGaInP current spreading layer, MQW multiple quantum well layer, P-AlInP confinement layer and P-GaP optical window layer are sequentially grown on GaAs substrate to obtain an epitaxial wafer. (2) A roughening mask is fabricated by photolithography. After hardening, the P-GaP optical window layer is roughened to obtain the roughened surface of the P-GaP optical window layer. (3) Deposit a bonding layer on the roughened surface of the P-GaP optical window layer; (4) The bonding layer is CMP polished to obtain a smooth and clean polished surface of the bonding layer; (5) After cleaning and activating the polished surfaces of the sapphire substrate and bonding layer, bonding is performed to obtain a bonded sheet; (6) Remove the GaAs substrate and GaInP barrier layer from the obtained bonded wafer to complete the substrate replacement; (7) The wafer obtained in step (6) is etched to the GaP layer through photolithography and ICP etching processes to form a mesa; (8) The P primary electrode and N primary electrode were fabricated by photolithography, vapor deposition, stripping and alloying processes, respectively; (9) Deposit a DBR passivation layer on the P primary electrode and N primary electrode made in step (8), and use ICP to etch the DBR passivation layer directly above the P electrode and N electrode to form a P conductive hole and an N conductive hole. (10) Fabricate P electrode pads and N electrode pads above P conductive holes and N conductive holes respectively; (11) After thinning, cutting and sorting the epitaxial wafer obtained in step (10), a high-brightness red Mini LED is obtained.

[0011] According to a preferred embodiment of the present invention, in step (2), the roughening mask occupies 3%-5% of the chip area; when roughening the P-GaP optical window layer, multiple roughening processes are adopted. In the last roughening process, the photoresist mask is removed and the entire surface is roughened. The number of roughening processes is 3-5 times, and the roughening time is 20-120 seconds. By controlling the roughening time and the number of roughening processes, the roughening thickness is adjusted to 6000-10000 angstroms.

[0012] Further preferred, the roughened mask occupies 4% of the chip area.

[0013] In a further preferred embodiment, GaP roughening is performed using a mixture of concentrated sulfuric acid, hydrofluoric acid, and iodic acid. The roughening process is first performed for 20 seconds, followed by rinsing and drying, then roughening for another 20 seconds. After rinsing and drying, the mask is removed, and finally, a third roughening process is performed for 60 seconds.

[0014] A further preferred roughening thickness is 8000 angstroms.

[0015] According to a preferred embodiment of the present invention, the bonding layer is a SiO2 bonding layer.

[0016] According to a preferred embodiment of the present invention, in step (3), the SiO2 bonding layer has a thickness of 2.5-3.5 μm and is deposited on the roughened surface of the P-GaP optical window layer by PECVD or electron beam evaporation.

[0017] More preferably, the SiO2 bonding layer has a thickness of 3 μm.

[0018] According to a preferred embodiment of the present invention, in step (5), the bonding temperature is 350-500 degrees Celsius and the bonding pressure is 9-14 KKG.

[0019] Further preferred, the bonding temperature is 400 degrees Celsius and the bonding pressure is 13.5 kg.

[0020] The beneficial effects of this invention are as follows: This invention creates a mask layer during the roughening of the GaP window layer and employs multi-stage roughening. Before the final roughening, the area outside the mask layer is roughened. During the final roughening, the photoresist mask is removed, and the entire surface is roughened to form a roughened structure with surface patterns, thereby increasing the light-emitting area and improving the chip brightness. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of the structure of the high-brightness red Mini LED chip of the present invention.

[0022] Figure 2 This is a schematic diagram of the structure of an existing red Mini LED chip.

[0023] Figure 3 This is a schematic diagram of an epitaxial wafer structure.

[0024] Figure 4 This is a schematic diagram of the roughened wafer.

[0025] Figure 5 This is a schematic diagram of the wafer after the bonding layer has grown.

[0026] Figure 6 This is a schematic diagram of the bonded wafer.

[0027] Figure 7 This is a schematic diagram of the wafer after the temporary substrate and etch barrier layer have been removed.

[0028] Figure 8 This is a schematic diagram of the structure after the table surface etching is completed.

[0029] Figure 9 This is a schematic diagram of the structure after the P and N primary ohmic contact electrodes are completed.

[0030] Figure 10 This is a schematic diagram of the structure after DBR etching is completed.

[0031] In the figure, 1. GaAs substrate; 2. GaInP barrier layer; 3. N-GaAs ohmic layer; 4. N-AlGaInP current spreading layer; 5. N-AlInP confinement layer; 6. MQW multiple quantum well layer; 7. P-AlInP confinement layer; 8. P-GaP optical window layer; 9. Bonding layer; 10. Transparent substrate; 11. P primary electrode; 12. N primary electrode; 13. DBR passivation layer; 14. P electrode pad; 15. N electrode pad. Detailed Implementation

[0032] The present invention will be further described below with reference to the embodiments and accompanying drawings, but is not limited thereto.

[0033] Example 1 A high-brightness red Mini LED chip, such as Figure 1 As shown, from bottom to top, the structure includes a transparent substrate 10, a bonding layer 9, a P-GaP optical window layer 8, a P-AlInP confinement layer 7, an MQW multiple quantum well layer 6, an N-AlInP confinement layer 5, an N-AlGaInP current spreading layer 4, an N-GaAs ohmic layer 3, a P primary electrode 11, an N primary electrode 12, a DBR passivation layer 13, a P electrode pad 14, and an N electrode pad 15.

[0034] Example 2 The method for fabricating the high-brightness red Mini LED chip described in Example 1 includes the following steps: (1) Using the MOCVD method, a GaInP barrier layer 2, an N-GaAs ohmic layer 3, an N-AlInP confinement layer 5, an N-AlGaInP current spreading layer 4, an MQW multiple quantum well layer 6, a P-AlInP confinement layer 7, and a P-GaP optical window layer 88 are sequentially grown on a GaAs substrate 1 to obtain an epitaxial wafer; Figure 3 As shown; (2) A roughening mask is fabricated using photolithography. After hardening, the P-GaP optical window layer 8 is roughened to obtain the roughened surface of the P-GaP optical window layer 8; for example... Figure 4 As shown; (3) Deposit bonding layer 9 on the roughened surface of P-GaP optical window layer 8; such as Figure 5 As shown; (4) The bonding layer 9 is subjected to CMP polishing to obtain a smooth and clean polished surface of the bonding layer 9; (5) After cleaning and activating the polished surface of the sapphire substrate and bonding layer 9, bonding is performed to obtain a bonded sheet; such as Figure 6 As shown; (6) Remove the GaAs substrate 1 and GaInP barrier layer 2 from the obtained bonded wafer to complete the substrate replacement; as follows: Figure 7 As shown; (7) The wafer obtained in step (6) is etched down to the GaP layer using photolithography and ICP etching processes to form a mesa; as shown Figure 8 As shown; (8) The P primary electrode 11 and N primary electrode 12 are fabricated through photolithography, evaporation, stripping, and alloying processes, respectively; for example Figure 9 As shown; (9) Deposit a DBR passivation layer 13 on the P primary electrode 11 and N primary electrode 12 made in step (8), and use ICP to etch the DBR passivation layer 13 directly above the P electrode and N electrode to form P conductive holes and N conductive holes. (10) Fabricate P-electrode pad 14 and N-electrode pad 15 above the P-conductive via and the N-conductive via, respectively; as shown Figure 10 As shown; (11) After thinning, cutting and sorting the epitaxial wafer obtained in step (10), a high-brightness red Mini LED is obtained.

[0035] Example 3 The difference between the method for fabricating the high-brightness red Mini LED chip described in Example 2 and the method described in Example 2 is that: In step (2), the roughening mask occupies 3%-5% of the chip area; when roughening the P-GaP optical window layer 7, multiple roughenings are performed. During the last roughening, the photoresist mask is removed and the entire surface is roughened. The number of roughenings is 3-5 times and the roughening time is 20-120 seconds. By controlling the roughening time and number of roughenings, the roughening thickness is adjusted to 6000-10000 angstroms.

[0036] Bonding layer 9 is a SiO2 bonding layer.

[0037] In step (3), the SiO2 bonding layer has a thickness of 2.5-3.5 μm and is deposited on the roughened surface of the P-GaP optical window layer 7 by PECVD or electron beam evaporation.

[0038] In step (5), the bonding temperature is 350-500 degrees Celsius and the bonding pressure is 9-14 KKG.

[0039] Example 4 The difference between the method for fabricating the high-brightness red Mini LED chip described in Example 3 and the method described in Example 3 is that: The roughening mask occupies 4% of the chip area.

[0040] GaP was roughened using a mixture of concentrated sulfuric acid, hydrofluoric acid, and iodic acid. The roughening process was first performed for 20 seconds, followed by rinsing and drying, then roughening for another 20 seconds. After rinsing and drying, the mask was removed, and finally, a third roughening process was performed for 60 seconds.

[0041] The roughening thickness is 8000 angstroms.

[0042] The SiO2 bonding layer thickness is 3 μm.

[0043] The bonding temperature is 400 degrees Celsius and the bonding pressure is 13.5 kg.

[0044] Example 5 The method for fabricating the high-brightness red Mini LED chip described in Example 1 includes the following steps: (1) Using the MOCVD method, N-GaAs buffer layer, N-GaInP barrier layer, N-GaAs ohmic contact layer, N-AlGaInP current spread layer 4, N-AlInP confinement layer 5, MQW multiple quantum well layer 6, P-AlInP confinement layer 7, and P-GaP window layer are sequentially grown on an n-GaAs temporary substrate. (2) A roughening mask layer is formed on the P-GaP window layer of the epitaxial wafer in step (1) by photolithography, accounting for 4%. GaP roughening is performed by a mixture of concentrated sulfuric acid, hydrofluoric acid and iodic acid. The roughening is performed for 20 seconds, then rinsed and dried, and then roughened for another 20 seconds. After rinsing and drying, the mask is removed, and then the third roughening is performed for 60 seconds. (3) A SiO2 bonding layer with a thickness of 2.5 μm is deposited on the surface of the wafer obtained in step (2) by PECVD evaporation; (4) The SiO2 bonding layer is CMP polished to obtain a smooth and clean polished surface with a roughness of less than 2nm; (5) After cleaning and activating the sapphire substrate and the wafer obtained in step (4), they are bonded at a bonding temperature of 400 degrees Celsius and a bonding pressure of 13.5 KKG. (6) The n-GaAs temporary substrate 1 of the bonded wafer is removed by a mixed solution of ammonia, hydrogen peroxide and water, with a volume ratio of 1:4:5; the GaInP barrier layer is removed by a mixed solution of hydrochloric acid and water, with a volume ratio of 3:2, exposing the N-GaAs ohmic contact layer 3. (7) The wafer surface obtained in step (6) is used to create a mesa pattern by photolithography, and then ICP etching is used to etch to the P-GaP window layer with an etching depth of 5.5 μm; (8) P primary electrode 11 and N primary electrode 12 are formed by photolithography and evaporation processes, respectively. The P electrode is Au / AuBe / Au and the N electrode is AuGeNiPtAu. (9) A DBR passivation layer 13 with a structure of 16 pairs of TiO2 / SiO2 is deposited on the wafer obtained in step (8). Then, P conductive holes and N conductive holes are formed directly above the P primary electrode 11 and N primary electrode 12 by photolithography and ICP etching. (10) P electrode pad 14 and N electrode pad 15 are fabricated above P conductive holes and N conductive holes by photolithography and evaporation processes, respectively, with the structure being TiAlTiAlTiAlTiAu; (11) After thinning, stealth cutting and sorting tests of the epitaxial wafer obtained in step (10), a high-brightness red Mini LED can be obtained.

[0045] A performance comparison was made between the Mini LED fabricated using existing processes and the Mini LED fabricated in this embodiment. The structure of the existing red Mini LED chip is as follows: Figure 2 As shown; The specific performance comparison is shown in Table 1: As shown in Table 1, the Mini LED prepared in this embodiment has an increased light-emitting area, thereby improving the chip brightness.

[0046] For any technical solutions not described in detail or limited above, reference shall be made to existing technologies for manufacturing light-emitting diodes.

Claims

1. A high-brightness red Mini LED chip, characterized in that, From bottom to top, it includes a transparent substrate, a bonding layer, a P-GaP optical window layer, a P-AlInP confinement layer, an MQW multiple quantum well layer, an N-AlInP confinement layer, an N-AlGaInP current spreading layer, an N-GaAs ohmic layer, a P primary electrode, an N primary electrode, a DBR passivation layer, a P electrode pad, and an N electrode pad.

2. The method for fabricating the high-brightness red Mini LED chip according to claim 1, characterized in that, The steps include the following: (1) A GaInP blocking layer, an N-GaAs ohmic layer, an N-AlInP confinement layer, an N-AlGaInP current spreading layer, an MQW multiple quantum well layer, a P-AlInP confinement layer, and a P-GaP optical window layer are sequentially grown on a GaAs substrate to obtain an epitaxial wafer. (2) A roughening mask is fabricated by photolithography. After hardening, the P-GaP optical window layer is roughened to obtain the roughened surface of the P-GaP optical window layer. (3) Deposit a bonding layer on the roughened surface of the P-GaP optical window layer; (4) The bonding layer is subjected to CMP polishing to obtain the polished surface of the bonding layer; (5) After cleaning and activating the polished surfaces of the sapphire substrate and bonding layer, bonding is performed to obtain a bonded sheet; (6) Remove the GaAs substrate and GaInP barrier layer from the obtained bonded wafer to complete the substrate replacement; (7) The wafer obtained in step (6) is etched to the GaP layer through photolithography and ICP etching processes to form a mesa; (8) The P primary electrode and N primary electrode were fabricated by photolithography, vapor deposition, stripping and alloying processes, respectively; (9) Deposit a DBR passivation layer on the P primary electrode and N primary electrode made in step (8), and use ICP to etch the DBR passivation layer directly above the P electrode and N electrode to form a P conductive hole and an N conductive hole. (10) Fabricate P electrode pads and N electrode pads above P conductive holes and N conductive holes respectively; (11) After thinning, cutting and sorting the epitaxial wafer obtained in step (10), a high-brightness red MiniLED is obtained.

3. The method for fabricating a high-brightness red Mini LED chip according to claim 2, characterized in that, In step (2), the roughening mask occupies 3%-5% of the chip area; when roughening the P-GaP optical window layer, multiple roughenings are performed. During the last roughening, the photoresist mask is removed and the entire surface is roughened. The number of roughenings is 3-5 times and the roughening time is 20-120 seconds. By controlling the roughening time and number of roughenings, the roughening thickness is adjusted to 6000-10000 angstroms.

4. The method for fabricating a high-brightness red Mini LED chip according to claim 3, characterized in that, The roughening mask occupies 4% of the chip area.

5. The method for fabricating a high-brightness red Mini LED chip according to claim 3, characterized in that, GaP was roughened using a mixture of concentrated sulfuric acid, hydrofluoric acid, and iodic acid. The roughening process was first performed for 20 seconds, followed by rinsing and drying, then roughening for another 20 seconds. After rinsing and drying, the mask was removed, and finally, a third roughening process was performed for 60 seconds.

6. The method for fabricating a high-brightness red Mini LED chip according to claim 3, characterized in that, The roughening thickness is 8000 angstroms.

7. The method for fabricating a high-brightness red Mini LED chip according to claim 2, characterized in that, The bonding layer is a SiO2 bonding layer.

8. The method for fabricating a high-brightness red Mini LED chip according to claim 2, characterized in that, In step (3), the SiO2 bonding layer has a thickness of 2.5-3.5 μm and is deposited on the roughened surface of the P-GaP optical window layer by PECVD or electron beam evaporation. More preferably, the SiO2 bonding layer has a thickness of 3 μm.

9. The method for fabricating a high-brightness red Mini LED chip according to any one of claims 2-8, characterized in that, In step (5), the bonding temperature is 350-500 degrees Celsius and the bonding pressure is 9-14 KKG.

10. The method for fabricating a high-brightness red Mini LED chip according to claim 9, characterized in that, The bonding temperature is 400 degrees Celsius and the bonding pressure is 13.5 kg.

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