EML chip performance and TEC ACR joint test method

Abstract

The invention discloses an EML chip performance and TEC ACR joint test method, which comprises the steps of designing a carrier tool which comprises a base, a clamping block A, a clamping block B, a pogo probe clamping jig, a basic nut and a spring accessory, so that the carrier tool can clamp a BOX device, thereby facilitating normal test of a PD in a free space and completing production; the method further comprises the steps that a pogo probe based on a four-wire method is designed, after an insulating skin of an aluminum wire is removed, the head of the pogo probe is surrounded by the exposed aluminum wire, then the two parts are connected through tin, the Sense end welding process is conducted, then the pogo probe is inserted into a probe sleeve, ACR test positive electrode or negative electrode assembly can be completed, and the other stage is manufactured in the same way. According to the invention, the divergent light test efficiency of the EML chip based on the BOX packaging device is improved, the ACR test cost of the TEC and the EML performance test cost are reduced, the ACR test precision is improved, and the test error is reduced.

Description

Technical Field

[0001] This invention relates to the field of testing technology for BOX packaging, and more particularly to a combined testing method for EML chip performance and TEC ACR. Background Technology

[0002] Common BOX-packaged optical device testing is based on collimated light testing, but the testing efficiency of BOXes without lens devices in the manufacturing process is low. This approach improves testing efficiency by designing a coupling process for PD testing. Furthermore, common ACR testing BOX processes containing TECs separate ACR testing from EML performance testing, resulting in higher testing costs. Summary of the Invention

[0003] This invention provides a joint testing method for EML chip performance and TEC ACR, which improves the efficiency of EML chip divergence testing based on BOX packaging devices, reduces the cost of TEC ACR testing and EML performance testing, improves ACR testing accuracy, and reduces testing errors.

[0004] To achieve the above objectives, the present invention provides the following technical solution: A method for joint testing of EML chip performance and TEC ACR includes designing a carrier fixture, which includes a base, clamping block A, clamping block B, pogo probe clamping fixture, and basic nut and spring accessories, so that it can clamp BOX devices so that the PD can be tested normally in free space and production can be completed. It also includes designing a pogo probe based on the four-wire method. After stripping the insulation of the aluminum wire, the bare aluminum wire is wrapped around the head of the pogo probe. Then, the two parts are connected with solder. The above is the soldering process of the Sense end. After that, the pogo probe is inserted into the probe sleeve to complete the assembly of the positive or negative electrode of the ACR test. The other stage is made in the same way. The ACR test method for TEC is as follows: Use a jig to hold the pogo probe with both positive and negative electrodes and extend it to a fixed distance. Once the probe contacts the TEC contact surface, the ACR test will begin. The EML chip performance testing method is as follows: S1. The different COC tests between the BOX packages of the multi-channel EML are mainly achieved by moving the carrier to test the performance of different channels. Taking one channel as a test case, before testing the EML, the piezoelectric probe is moved forward to above the EML power-on PAD, and then directly lowered to a fixed height to achieve constant current applied to the LD and test the reverse current when the EAM is biased. S2, Z-axis optical power optimal position test: PD first moves to the preset position on the X-axis, and then moves to the preset position on the Y-axis. At this time, the Z-axis movement is divided into two stages. In the first stage, it moves at high speed to the safe height of the BOX device surface. After the PD moves to this position, it enters the second stage, which uses slow speed to detect the height of the BOX surface. The second stage is the height descent mode: when the PD descends, it contacts the device surface and is pressed. This pressure is synchronously transmitted to the pressure sensor, thereby realizing the bottoming out of the EML chip Z-axis. After the bottoming out is completed, the PD rises and stays fixed. S3, X-axis optical power maximum value test: After PD recovers, the Z-axis position is fixed, and the X-axis optical power value test begins. The test is conducted at a self-set horizontal shift distance and at fixed intervals within the self-set horizontal shift distance. Then, the test points are fitted with a Gaussian distribution curve to obtain the maximum optical power. The maximum optical power test of S4 and Y-axis does not need to be performed during operation because the light output of EML is discrete. Theoretically, the closer the light output port is to the Y-axis, the greater the power output. Therefore, this position is fixed. S5. For other channel tests, the Z-axis and X-axis position data of the first channel test are memorized, and the test is run directly to that position.

[0005] Preferably, clamping block A and clamping block B are assembled on the base, and the base has a hollowed-out "U" shape inside for placing the pogo probe for ACR testing.

[0006] Preferably, the connection method between the four-wire-based pogo probe and the testing instrument is as follows: A test lead is drawn from the positive Sense terminal and the positive Force terminal of the test instrument, and the ends of the two leads are soldered to the positive end of the pogo probe. Similarly, a test lead is drawn from the negative Sense terminal and the negative Force terminal, and the ends of the two leads are soldered to the negative end of the pogo probe.

[0007] Preferably, if the EML chip is a dual-sided TEC, a relay is added to assist in the connection between the pogo probe based on the four-wire method and the test instrument, and dual-sided rapid testing is achieved by switching the relay.

[0008] Preferably, the surface safety height of the BOX device in S2 is 150um~300um.

[0009] Compared with the prior art, the beneficial effects of the present invention are as follows: the present invention improves the efficiency of EML chip divergence light testing based on BOX packaging device, reduces the cost of TEC ACR testing and EML performance testing, improves ACR testing accuracy, and reduces testing error. Attached Figure Description

[0010] Figure 1 This is a schematic diagram of the carrier tooling structure according to an embodiment of the present invention; Figure 2 This is a wiring diagram of a pogo probe based on the four-wire method according to an embodiment of the present invention; Figure 3 This is a diagram showing the operation of testing the PD and piezoelectric probe in an embodiment of the present invention. Detailed Implementation

[0011] In the description of this invention, it should be understood that the terms "upper", "lower", "front", "rear", "left", "right", "top", "bottom", "inner", "outer", "vertical", "horizontal", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0012] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0013] like Figure 1-3 As shown, an embodiment of the present invention includes the design of a carrier fixture, which includes a base, clamping block A, clamping block B, a pogo probe clamping fixture, and basic nuts and spring accessories, so that it can clamp BOX devices so that the PD can be tested normally in free space and production can be completed.

[0014] This also includes designing a pogo probe based on a four-wire method. After stripping the insulation from the aluminum wire, the exposed aluminum wire is wrapped around the pogo probe head, and then the two parts are connected with solder. This is the soldering process for the Sense end. Afterwards, the pogo probe is inserted into the probe sleeve to complete the assembly of the positive or negative electrode for ACR testing. The other stage is fabricated similarly. Its connection method to the testing instrument is as follows: A test lead is drawn from the positive Sense terminal and the positive Force terminal of the test instrument, and the ends of the two leads are soldered to the positive end of the pogo probe. Similarly, a test lead is drawn from the negative Sense terminal and the negative Force terminal, and the ends of the two leads are soldered to the negative end of the pogo probe.

[0015] The ACR test method for TEC is as follows: A jig is used to hold the pogo probes (positive and negative terminals) at a fixed distance. The ACR test begins once the probes contact the TEC contact surface. For the four-wire method, an additional wire is led to a voltmeter. The voltmeter has extremely high resistance, so the current flowing through it is negligible compared to the current flowing through the resistor being tested, thus avoiding interference with the resistance value during the ACR test.

[0016] The EML chip performance testing method is as follows: S1. The different COC tests between the BOX packages of the multi-channel EML are mainly achieved by moving the carrier to test the performance of different channels. Taking one channel as a test case, before testing the EML, the piezoelectric probe is moved forward to above the EML power-on PAD, and then directly lowered to a fixed height to achieve constant current applied to the LD and test the reverse current when the EAM is biased. S2, Z-axis optical power optimal position test: PD first moves to the preset position on the X-axis, and then moves to the preset position on the Y-axis. At this time, the Z-axis movement is divided into two stages. In the first stage, it moves at high speed to the safe height of the BOX device surface. After the PD moves to this position, it enters the second stage, which uses slow speed to detect the height of the BOX surface. The second stage is the height descent mode: when the PD descends, it contacts the device surface and is pressed. This pressure is synchronously transmitted to the pressure sensor, thereby realizing the bottoming out of the EML chip Z-axis. After the bottoming out is completed, the PD rises and stays fixed. S3, X-axis optical power maximum value test: After PD recovers, the Z-axis position is fixed, and the X-axis optical power value test begins. The test is conducted at a self-set horizontal shift distance and at fixed intervals within the self-set horizontal shift distance. Then, the test points are fitted with a Gaussian distribution curve to obtain the maximum optical power. The maximum optical power test of S4 and Y-axis does not need to be performed during operation because the light output of EML is discrete. Theoretically, the closer the light output port is to the Y-axis, the greater the power output. Therefore, this position is fixed. S5. For other channel tests, the Z-axis and X-axis position data of the first channel test are memorized, and the test is run directly to that position.

[0017] Preferably, clamping block A and clamping block B are assembled on the base, and the base has a hollowed-out "U" shape inside for placing the pogo probe for ACR testing.

[0018] As a preferred option, if the EML chip has a dual-sided TEC, a relay can be added to assist in the connection between the pogo probe based on the four-wire method and the test instrument, and dual-sided rapid testing can be achieved by switching the relay.

[0019] Preferably, the surface safety height of the BOX device in S2 is 150um~300um.

[0020] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A method for joint testing of EML chip performance and ACR of TEC, characterized in that: This includes designing a carrier fixture, which includes a base, clamping block A, clamping block B, a pogo probe clamping fixture, and basic nuts and spring accessories, so that it can clamp BOX devices so that the PD can be tested normally in free space and production can be completed. It also includes designing a pogo probe based on the four-wire method. After stripping the insulation of the aluminum wire, the bare aluminum wire is wrapped around the head of the pogo probe. Then, the two parts are connected with solder. The above is the soldering process of the Sense end. After that, the pogo probe is inserted into the probe sleeve to complete the assembly of the positive or negative electrode of the ACR test. The other stage is made in the same way. The ACR test method for TEC is as follows: Use a jig to hold the pogo probe with both positive and negative electrodes and extend it to a fixed distance. Once the probe contacts the TEC contact surface, the ACR test will begin. The EML chip performance testing method is as follows: S1. The different COC tests between the BOX packages of the multi-channel EML are mainly achieved by moving the carrier to test the performance of different channels. Taking one channel as a test case, before testing the EML, the piezoelectric probe is moved forward to above the EML power-on PAD, and then directly lowered to a fixed height to achieve constant current applied to the LD and test the reverse current when the EAM is biased. S2, Z-axis optical power optimal position test: PD first moves to the preset position on the X-axis, and then moves to the preset position on the Y-axis. At this time, the Z-axis movement is divided into two stages. In the first stage, it moves at high speed to the safe height of the BOX device surface. After the PD moves to this position, it enters the second stage, which uses slow speed to detect the height of the BOX surface. The second stage is the height descent mode: when the PD descends, it contacts the device surface and is pressed. This pressure is synchronously transmitted to the pressure sensor, thereby realizing the bottoming out of the EML chip Z-axis. After the bottoming out is completed, the PD rises and stays fixed. S3, X-axis optical power maximum value test: After PD recovers, the Z-axis position is fixed, and the X-axis optical power value test begins. The test is conducted at a self-set horizontal shift distance and at fixed intervals within the self-set horizontal shift distance. Then, the test points are fitted with a Gaussian distribution curve to obtain the maximum optical power. The maximum optical power test of S4 and Y-axis does not need to be performed during operation because the light output of EML is discrete. Theoretically, the closer the light output port is to the Y-axis, the greater the power output. Therefore, this position is fixed. S5. For other channel tests, the Z-axis and X-axis position data of the first channel test are memorized, and the test is run directly to that position.

2. The experimental vacuum homogenizer according to claim 1, characterized in that: Clamping block A and clamping block B are assembled on the base, and the base has a hollowed-out "U" shape inside for placing the pogo probe for ACR testing.

3. The experimental vacuum homogenizer according to claim 1, characterized in that: The connection method between the four-wire-based pogo probe and the testing instrument is as follows: A test lead is drawn from the positive Sense terminal and the positive Force terminal of the test instrument, and the ends of the two leads are soldered to the positive end of the pogo probe. Similarly, a test lead is drawn from the negative Sense terminal and the negative Force terminal, and the ends of the two leads are soldered to the negative end of the pogo probe.

4. The experimental vacuum homogenizer according to claim 3, characterized in that: If the EML chip is a dual-sided TEC, a relay is added to assist in the connection between the pogo probe based on the four-wire method and the test instrument. The dual-sided rapid test is achieved by switching the relay.

5. The experimental vacuum homogenizer according to claim 1, characterized in that: The surface safety height of the BOX device in S2 is 150um~300um.

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