Laser pulse synchronous control device and signal conditioning method thereof

Abstract

The invention discloses a laser pulse synchronous control device and a signal conditioning method thereof, and the device comprises a sequential circuit which is used for generating a first-stage envelope signal based on a seed sampling circuit and a primary screening signal, and transmitting the first-stage envelope signal to a first-stage AOM drive circuit. The first-stage AOM driving circuit is used for driving a first-stage AOM acousto-optic crystal to perform primary screening on laser pulses, generating a second-stage switching signal based on the seed sampling signal and the switching control signal, and transmitting the second-stage switching signal to the second-stage AOM driving circuit; therefore, the second-stage AOM driving circuit drives the second-stage AOM acousto-optic crystal to control the output of the laser pulse after the primary screening, and the secondary screening of the laser pulse after the primary screening is realized. The rising edge phase difference between the synchronizing signal and the switch control signal is set as the preset value, so that the problem of phase difference between an internal menu of the laser and an external control signal is solved.

Description

[0001] The present application is a divisional application of the invention application entitled Laser pulse synchronization control device (application number: 2023100606415, 2023-01-16). TECHNICAL FIELD

[0002] The present application relates to the technical field of femtosecond laser pulse control, in particular to a laser pulse synchronization control device. BACKGROUND

[0003] In the field of brittle processing, laser single pulse energy is in the range of several hundred microjoules, and the selected single frequency is in the range of several hundred KHz pulse light, which has been widely used. And with the improvement of technology, some special brittle materials need larger energy single pulse beam to achieve good cutting effect, and the current common method to obtain larger energy pulse beam is to reduce the seed light selected single frequency, and then the light can be increased in a certain range to improve the single cluster light power.

[0004] At present, in the process of selecting single, the machine table signal and the laser signal are often used to realize the selection of single, but when the internal low (50KHz-500KHz) selected single frequency is generated, it is difficult to cooperate between the machine table and the laser signal in the existing signal registration mode. If the on-demand pulse output (POD) mode is used, because the internal clock is not synchronized with the external clock, when the processing frequency and the internal frequency are close, the missing point problem is easy to occur. SUMMARY

[0005] The technical problem to be solved by the present application is that the existing laser selected single mode makes it difficult to cooperate between the machine table and the laser, and the on-demand pulse output mode is used, the internal clock is not synchronized with the external clock, and when the processing frequency and the internal frequency are close, the missing point problem is easy to occur.

[0006] In order to solve the above technical problems, the present application provides a laser pulse synchronization control device, characterized in that it comprises:

[0007] A seed sampling circuit is used to obtain a seed sampling signal based on the seed laser, and transmit the seed sampling signal to a timing circuit to provide a timing reference for the timing circuit;

[0008] a timing circuit, configured to generate a first-stage envelope signal based on the seed sampling circuit and the primary screening signal, and transmit the first-stage envelope signal to the first-stage AOM driving circuit, so that the first-stage AOM driving circuit drives the first-stage AOM acousto-optic crystal to perform primary screening on the laser pulse, and configured to generate a second-stage switching signal based on the seed sampling signal and the light-on control signal, and transmit the second-stage switching signal to the second-stage AOM driving circuit, so that the second-stage AOM driving circuit drives the second-stage AOM acousto-optic crystal to control the output of the laser pulse after the primary screening, and perform secondary screening on the laser pulse after the primary screening;

[0009] an AOM driving circuit, configured to control the switching of the first-stage AOM acousto-optic crystal based on the first-stage envelope signal, so as to perform primary screening on the laser pulse, and configured to control the switching of the second-stage AOM acousto-optic crystal based on the second-stage switching signal, so as to control the output of the laser pulse after the primary screening, and perform secondary screening on the laser pulse after the primary screening;

[0010] a machine tool control board card, configured to provide the timing circuit with a synchronization signal and a light-on control signal.

[0011] Preferably, the laser pulse synchronization control device further comprises a detection sampling circuit, configured to obtain a primary sampling signal based on the laser pulse after the primary screening, and transmit the primary sampling signal to the timing circuit, so as to provide the timing circuit with a judgment basis for whether the laser pulse is correctly output.

[0012] The timing circuit is further configured to judge whether the laser pulse after the primary screening is correctly output based on the primary sampling signal, and control the output of the laser pulse if yes, or control the end of the output of the laser pulse if no.

[0013] Preferably, the seed sampling circuit and the detection sampling circuit each comprise a beam splitter, a photodiode and an amplifier connected in sequence.

[0014] Preferably, when the timing circuit performs primary screening based on the synchronization signal:

[0015] The timing circuit receives the synchronization signal provided by the machine tool control board card, outputs the first-stage envelope signal to the first-stage AOM driving circuit based on the seed sampling signal and the synchronization signal, so that the phase and frequency of the laser pulse screened by the first-stage AOM driving circuit are the same as those of the synchronization signal, and the primary screening signal in this primary screening manner comprises the synchronization signal.

[0016] Preferably, the phase difference between the synchronization signal and the rising edge of the light-on control signal is a preset value, so that the laser pulse after the primary screening and the light-on control signal have the same phase.

[0017] Preferably, when the timing circuit performs the primary screening based on a single external control mode:

[0018] The timing circuit outputs a first-stage envelope signal to the first-stage AOM drive circuit based on a seed sampling signal and a set repetition frequency, so that the first-stage AOM drive circuit drives the first-stage AOM acousto-optic crystal to output laser pulses of a specific phase and frequency; and each time the rising edge of the light-on control signal is received, the counter of the timing circuit is reset to zero. In this primary screening mode, the primary screening signal includes the set repetition frequency.

[0019] Preferably, the timing circuit includes a connected FPGA unit and a high-speed DAC unit, the first-stage envelope signal is output by the high-speed DAC unit, and the second-stage switch signal is output by the FPGA unit.

[0020] Preferably, the FPGA unit includes an FPGA and a signal output circuit and at least one set of signal input circuits connected to the FPGA, respectively.

[0021] When the timing circuit performs the primary screening based on a synchronization signal, the synchronization signal is input to the FPGA through a set of signal input circuits, and the light-on control signal is input to the FPGA through another set of signal input circuits.

[0022] When the timing circuit performs the primary screening based on a single external control mode, the light-on control signal is input to the FPGA through a set of signal input circuits.

[0023] The FPGA outputs a second-stage switch signal to the second-stage AOM drive circuit based on the signal output circuit.

[0024] Preferably, the high-speed DAC unit includes an operational amplifier circuit and a high-speed DAC connected to the output end of the operational amplifier circuit.

[0025] Preferably, the laser pulse synchronization control device further includes a host computer, and the host computer is in communication connection with the timing circuit through RS232, so as to provide the timing circuit with a set repetition frequency.

[0026] Compared with the prior art, one or more embodiments of the above scheme can have the following advantages or beneficial effects:

[0027] The laser pulse synchronization control device provided by the embodiment of the application sets the phase difference between the rising edges of the synchronization signal and the light-on control signal as a preset value, takes the synchronization signal output by the machine tool control card as a reference, and adjusts the first-stage frequency division phase according to the synchronization signal in the process of frequency division of the first-stage AOM acousto-optic crystal, so as to solve the problem of the phase difference between the internal menu of the laser and the external control signal; and the synchronization signal and the light-on control signal are sent to the timing circuit by the machine tool control card, so that the laser signal and the machine tool control card signal are synchronized, and the problem of great difficulty in aligning the machine signal and the laser signal is solved.

[0028] Additional features and advantages of the application will be set forth in the description that follows, and in part will be apparent from the description, or can be learned by practice of the application. The objectives and other advantages of the application will be realized and attained by the structure particularly pointed out in the description and claims. BRIEF DESCRIPTION OF DRAWINGS

[0029] The accompanying drawings are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the application. In the drawings:

[0030] Figure 1 A structure schematic diagram of the laser pulse synchronization control device of the embodiment of the application is shown;

[0031] Figure 2 A circuit schematic diagram of the signal input circuit in the embodiment of the application is shown;

[0032] Figure 3 A circuit schematic diagram of the signal output circuit in the embodiment of the application is shown;

[0033] Figure 4 A circuit schematic diagram of the operational amplifier circuit in the embodiment of the application is shown;

[0034] Figure 5 A signal conditioning diagram when the timing circuit in the embodiment of the application performs primary screening based on a single external control mode is shown

[0035] Figure 6 A signal conditioning diagram when the timing circuit in the embodiment of the application performs primary screening based on a synchronization signal is shown;

[0036] Figure 7 A circuit schematic diagram of the two-stage amplifier in the embodiment of the application is shown. DETAILED DESCRIPTION

[0037] The embodiments of the present application will be described in detail below with reference to the accompanying drawings and embodiments, so that how the present application applies technical means to solve technical problems and achieves technical effects can be fully understood and implemented. It should be noted that, as long as there is no conflict, each embodiment in the present application and each feature in each embodiment can be combined with each other, and the formed technical solutions are all within the protection scope of the present application.

[0038] The existing laser pulse on-demand output (POD) mode does not change the menu frequency, it only selects the pulse after the light-on control signal in a series of menu pulses to output, so that when the menu frequency and the light-on control signal demand frequency are different, the position of the light output is easy to determine, but if the menu frequency and the light-on control signal demand frequency are small, the machining missing point problem is easy to appear.

[0039] Example I

[0040] To solve the technical problems in the prior art, an embodiment of the present application provides a laser pulse synchronous control device.

[0041] Figure 1 The structure schematic diagram of the laser pulse synchronous control device of the embodiment of the present application is shown, referring to Figure 1 The laser pulse synchronous control device of the embodiment of the present application comprises a seed sampling circuit, a timing circuit, an AOM driving circuit, a machine tool control board card, an upper computer and a detection sampling circuit.

[0042] The seed sampling circuit is mainly used for converting the seed laser into a clock sampling signal and transmitting the clock sampling signal to the timing circuit to provide a timing reference for the timing circuit. The seed sampling circuit comprises a beam splitter, a photodiode and an amplifier connected in sequence. The beam splitter in the circuit is used to split the seed laser beam from the seed laser. The photodiode in the circuit is used to convert the seed laser beam into a seed electric signal. The amplifier in the circuit is used to amplify the seed electric signal to obtain the seed sampling signal.

[0043] The timing circuit comprises an FPGA unit and a high-speed DAC unit connected in sequence. The FPGA unit comprises an FPGA and a signal output circuit and a plurality of signal input circuits connected with the FPGA respectively. Preferably, the FPGA can adopt a 10M16SCE144C8G model. Referring to Figure 2 The signal input circuit comprises a photoelectric coupler and an inverter, etc. The photoelectric coupler is used to convert the synchronization signal or the light-on control signal into a corresponding electric signal through an optical device to achieve a good isolation effect of the electric signal. The inverter is used to enhance the driving capacity of the electric signal and transmit the inverted signal to the FPGA. The signal input circuit realizes the transmission of the synchronization signal or the light-on control signal to the FPGA. Referring toFigure 3 As shown, the signal output circuit includes an inverter and the like, and is configured to enhance the driving of the 2-stage switching signal output by the FPGA and transmit the driving-enhanced 2-stage switching signal to the 2-stage AOM driving circuit.

[0044] When the timing circuit performs the primary screening based on the synchronization signal, two groups of signal input circuits are required, the synchronization signal is input to the FPGA through one group of signal input circuits, and the light-on control signal is input to the FPGA through the other group of signal input circuits. When the timing circuit performs the primary screening based on a single external control mode, only one group of signal input circuits is required, and the light-on control signal is input to the FPGA through the group of signal input circuits.

[0045] The high-speed DAC unit includes an operational amplifier circuit and a parallel high-speed DAC connected to the operational amplifier circuit. Referring to Figure 4 As shown, the operational amplifier circuit includes an operational amplifier and the like, and the operational amplifier can be of the AD9748ACPZ type. The operational amplifier circuit is configured to enhance the driving of the analog envelope output by the FPGA and transmit the 1-stage envelope signal to the 1-stage AOM driving circuit.

[0046] The main working mode of the timing circuit is to generate a 1-stage envelope signal based on the seed sampling circuit and the primary screening signal, and transmit the 1-stage envelope signal to the 1-stage AOM driving circuit, so that the 1-stage AOM driving circuit drives the 1-stage AOM acousto-optic crystal to perform primary screening on the laser pulse, and generates a 2-stage switching signal based on the seed sampling signal and the light-on control signal, and transmits the 2-stage switching signal to the 2-stage AOM driving circuit, so that the 2-stage AOM driving circuit drives the 2-stage AOM acousto-optic crystal to control the output of the primary screened laser pulse, and realizes the secondary screening on the primary screened laser pulse. The 1-stage envelope signal is output by the high-speed DAC, and the 2-stage switching signal is output by the FPGA.

[0047] The primary screening signal includes two types, one is to perform primary screening on the laser pulse through the synchronization signal provided by the external machine tool control board, and the other is to perform primary screening on the laser pulse through a single external control mode set in advance by the timing circuit, wherein the single external control mode includes a pre-set repetition frequency, and the pre-set repetition frequency can be transmitted to the timing circuit by the host computer through RS232. It should be noted that the pre-set repetition frequency can also be transmitted to the timing circuit by the host computer through other reasonable communication modes, which will not be described in detail here.

[0048] When the timing circuit performs primary screening based on the synchronization signal, the machine tool control board provides the synchronization signal to the timing circuit. After receiving the synchronization signal, the timing circuit outputs a first-stage envelope signal to the first-stage AOM drive circuit based on the synchronization signal and the seed sampling signal. The first-stage envelope signal can make the phase and frequency of the laser pulse screened by the first-stage AOM drive circuit the same as the synchronization signal. Further, the FPGA in the timing circuit multiplies the frequency of the 50M crystal oscillator to a high frequency (i.e., a set repetition frequency), and then uses the high frequency PLL frequency as a reference to collect the seed sampling signal to obtain a marker signal. The marker signal controls the generation of a DAC clock signal and a DAC data signal, and the FPGA outputs the DAC clock signal and the DAC data signal to the high-speed DAC to control the high-speed DAC to output an envelope signal. The FPGA determines the frequency and phase of the seed sampling signal according to the collected optical signal, and resets the FPGA counter to zero in the timing circuit at the rising edge of the synchronization signal, and then generates an analog signal envelope based on the synchronization signal. Further, the analog signal envelope generation process is as follows: at the starting end of the synchronization signal, the first root burst analog signal envelope starting point is generated by the high-speed DAC half a period before the first root burst pulse light, the first root burst analog signal envelope starting high-speed DAC amplitude is set by the pre-set amplitude parameter, and the first root burst analog signal envelope end point is generated by the high-speed DAC half a period after the first root burst pulse light. At this point, the first root burst analog signal envelope setting is completed. In this way, the analog signal envelope of all required bursts is generated. When the next synchronization signal arrives, the FPGA starts to control the high-speed DAC to generate the next string of BURST analog signal envelopes. In this primary screening mode, the primary screening signal includes the synchronization signal. It should be noted that when the synchronization signal is lost in this mode, the laser triggers an emergency stop alarm.

[0049] The analog signal envelope is output by the FPGA controlling the high-speed DAC, and is received by the first-stage AOM drive circuit. Since the light needs to consume some flight time during transmission in the optical fiber, the actual analog signal envelope output needs a certain delay to match each optical pulse. After receiving the envelope signal, the first-stage AOM drive circuit converts it into an amplitude-modulated radio frequency signal with a carrier wave, which is input into the first-stage AOM acousto-optic crystal. After receiving the radio frequency signal, the first-stage AOM acousto-optic crystal starts to screen and amplitude modulate the seed source signal passing through the crystal. If the delay is appropriate, the radio frequency signal envelope can be within the required BURST light, achieving the purpose of selecting different amplitude burst seed source optical pulses.

[0050] It should be noted that in order to solve the phase difference between the primary screening signal of the laser and the light-on control signal, in this mode, the rising edge phase difference between the synchronization signal and the light-on control signal is set to a preset value. The phase difference can make the primary screened laser pulse and the light-on control signal have the same phase, thereby achieving the purpose of synchronization between the light-on control signal and the synchronization signal, so as to avoid the problem of missing points when the processing frequency and the internal frequency are close.

[0051] When the timing circuit performs primary screening based on a single external control mode: the timing circuit needs to output a first-stage envelope signal to the first-stage AOM drive circuit based on a seed sampling signal and a set repetition frequency. The first-stage envelope signal can make the first-stage AOM drive circuit drive the first-stage AOM acousto-optic crystal to output laser pulses of a specific phase and frequency. Further, the FPGA in the timing circuit multiplies the 50M crystal oscillator to a high frequency (i.e. the set repetition frequency), and then uses the high frequency PLL frequency as a reference to collect the seed sampling signal to obtain a marker signal; the marker signal controls the generation of a DAC clock signal and a DAC data signal, and the FPGA outputs the DAC clock signal and the DAC data signal to the high-speed DAC to control the high-speed DAC to output an envelope. The seed sampling signal is monitored by the crystal oscillator signal, which can conveniently adjust, delay, etc. the monitored optical signal. The primary screening signal in this primary screening mode includes the set repetition frequency.

[0052] The high-speed DAC in the timing circuit outputs an envelope analog signal of a specific amplitude to the acousto-optic drive device at a specific position between each pulse based on the optical signal collected by the FPGA. Further, using the delay function of the crystal oscillator signal, a analog signal envelope is given to the first-stage AOM drive circuit by the high-speed DAC between two optical signal troughs. The first-stage AOM drive circuit outputs a carrier RF signal with a certain amplitude to drive the first-stage AOM acousto-optic crystal according to the time and amplitude of the analog signal envelope. If the laser pulse passes through the first-stage AOM acousto-optic crystal at the arrival time of the carrier RF signal, the optical pulse will be deflected to the next stage. If the laser pulse does not pass through the first-stage AOM acousto-optic crystal at the arrival time of the carrier RF signal, the laser pulse will be discarded without deflection to the waste light path.

[0053] In order to solve the phase difference between the primary screening signal of the laser and the light-on control signal, the timing circuit is set to reset the FPGA counter to zero each time the rising edge of the light-on control signal is received, thereby achieving the purpose of synchronization between the light-on control signal and the primary screening signal (i.e. the set repetition frequency), so as to avoid the problem of missing points when the processing frequency and the internal frequency are close.

[0054] It should be noted that the laser itself is provided with a laser seed source and a plurality of AOM acousto-optic crystals outputting laser pulses, and the embodiment is implemented on the basis of the laser, and the laser pulses, the first-stage AOM acousto-optic crystal and the second-stage AOM acousto-optic crystal in the embodiment are all provided for the laser.

[0055] The timing circuit receives the primary screening signal and also receives the light-on control signal provided by the machine tool control board card. When the timing circuit receives the light-on control signal provided by the machine tool control board card, the FPGA counter in the timing circuit is reset to zero when the rising edge of the light-on control signal is received. Similarly, the FPGA in the timing circuit is multiplied to a high frequency through the 50M crystal oscillator, and then the high frequency PLL frequency is used as a reference to collect the seed sampling signal. Then, the delay function of the crystal oscillator signal is used to provide a control signal to the second-stage AOM drive circuit. The second-stage AOM drive circuit outputs a carrier radio frequency signal with a certain amplitude to drive the second-stage AOM acousto-optic crystal to pass light according to the time and amplitude of the control signal. If the primary screened laser pulse passes through the second-stage AOM acousto-optic crystal within the arrival time of the carrier radio frequency signal, the laser pulse will be normally output. If the primary screened laser pulse does not pass through the second-stage AOM acousto-optic crystal within the arrival time of the carrier radio frequency signal, the laser pulse is deflected into the waste light path and discarded.

[0056] It should be noted that the second-stage AOM drive circuit is controlled by the second-stage switching signal, so that the second-stage AOM drive circuit drives the second-stage AOM acousto-optic crystal to pass light or not, thereby realizing the control of whether the laser outputs the laser pulse, i.e., acting as a switch. At the same time, the second-stage switching signal is generated based on the light-on control signal, and the primary screened laser pulse is screened again based on the second-stage switching signal, thereby realizing the control of the frequency and amplitude of the laser output laser pulse, and further achieving the purpose of selecting the laser pulse with the required frequency and amplitude.

[0057] Further, the light-on control signal includes two working modes, a GATE working mode and a TIGGER working mode. When the light-on control signal is in the GATE working mode, the laser pulse output by the second-stage AOM acousto-optic crystal will continuously output the primary screened laser pulse when the light-on control signal is at a high level. When the light-on control signal is in the TIGGER working mode, the frequency of the laser pulse output by the second-stage AOM acousto-optic crystal is consistent with the frequency of the light-on control signal.

[0058] Figure 5 A signal conditioning diagram when the timing circuit in the first embodiment of the application performs primary screening based on a single external control mode is shown; Figure 6 A signal conditioning diagram when the timing circuit in the first embodiment of the application performs primary screening based on a synchronization signal is shown; Figure 5 and Figure 6As shown, when the gate control signal is in the GATE mode, the FPGA in the timing circuit controls the 2-stage AOM acousto-optic crystal to open at the high level of the external control GATE signal, at which time the laser emits the complete BURST laser pulse string at the high level of the external control GATE signal. When the gate control signal is in the TIGGER mode, the FPGA controls the 2-stage AOM acousto-optic crystal to open at the first BURST after the rising edge of the external control TRIGGER signal, at which time the laser emits the first BURST after the rising edge of the external control TRIGGER signal. It should be noted that the processes of generating the 1-stage envelope signal and generating the 2-stage switching signal by the timing circuit do not interfere with each other.

[0059] When the laser pulse synchronization control device of the embodiment of the application realizes the primary screening of the laser pulse through the single external control mode or the synchronization signal mode of the timing circuit, and realizes the secondary screening of the laser pulse through the gate control signal provided by the machine tool control board card.

[0060] The AOM driving circuit is used for controlling the switching of the 1-stage AOM acousto-optic crystal based on the 1-stage envelope signal, so as to realize the primary screening of the laser pulse, and is used for controlling the switching of the 2-stage AOM acousto-optic crystal based on the 2-stage switching signal, so as to realize the control of the output of the laser pulse after the primary screening, and realize the secondary screening of the laser pulse after the primary screening. The AOM driving circuit includes the 1-stage AOM driving circuit and the 2-stage AOM driving circuit.

[0061] The machine tool control board card is used for providing the synchronization signal and the gate control signal for the timing circuit. The upper computer is connected with the timing circuit through the RS232 communication, so as to provide the set repetition frequency for the timing circuit. The detection sampling circuit has the same structure as the seed sampling circuit, and thus the specific structure is not described herein. Preferably, the amplifiers in the detection sampling circuit and the seed sampling circuit are both magnitude amplifiers, and the circuit diagrams of the two-stage amplifiers are as shown in Figure 7 .

[0062] The detection sampling circuit is used for acquiring the primary sampling signal based on the laser pulse after the primary screening, and transmitting the primary sampling signal to the timing circuit, so as to provide the judgment basis for the correct output of the laser for the timing circuit.

[0063] At this time, the FPGA in the time sequence circuit is also used to judge whether the primary screened laser pulse is a correct output based on the primary sampling signal. The specific judgment method is: judging whether the frequency of the primary screened laser pulse is consistent with the set frequency. In the process of collecting the seed sampling signal to obtain the mark signal, the FPGA is multiplied by the 50M crystal oscillator to a high frequency, and the high frequency PLL frequency is used as a reference to set the light signal to be collected by the upper computer. For example, if the seed source is 20MHz and the set frequency is 100K, the upper computer will transmit 200 (20000000 / 100000) to the FPGA. When each mark bit arrives, the internal counter of the FPGA will +1. When the counter reaches 200, the counter is reset to zero and starts counting again.

[0064] When the frequency of the primary screened laser pulse is consistent with the set frequency, it means that the primary screened laser pulse output is normal and there is no offset phenomenon. At this time, the FPGA can normally control the laser pulse output. Otherwise, the FPGA controls the output of the laser pulse to end.

[0065] The laser pulse synchronization control device provided by the embodiment of the present application sets the phase difference between the rising edges of the synchronization signal and the light-on control signal as a preset value, takes the synchronization signal output by the machine tool control board card as a reference, and adjusts the phase of the first-stage frequency division according to the synchronization signal in real time when the first-stage AOM acousto-optic crystal is frequency-divided, so as to solve the problem of the phase difference between the internal menu of the laser and the external control signal. Moreover, the machine tool control board card sends the synchronization signal and the light-on control signal to the time sequence circuit, realizes the synchronization process of the laser signal and the machine tool control board card signal, and solves the problem of the great difficulty in aligning the machine table signal and the laser signal.

[0066] Although the embodiments disclosed in the present application are as above, the content described is only the embodiments adopted for the purpose of facilitating the understanding of the present application, and is not used to limit the present application. Any person skilled in the art of the present application can make any modification and change in the implementation form and details without departing from the spirit and scope disclosed in the present application. However, the protection scope of the present application shall be subject to the scope defined in the appended claims.

Claims

1. A laser pulse synchronization control device, characterized by, The application relates to a laser pulse screening device and a method thereof. The seed sampling circuit is used for acquiring a seed sampling signal based on a seed laser and transmitting the seed sampling signal to a timing circuit to provide a timing reference for the timing circuit. The timing circuit is used for generating a first-stage envelope signal based on the seed sampling circuit and a primary screening signal, transmitting the first-stage envelope signal to a first-stage AOM drive circuit to enable the first-stage AOM drive circuit to drive a first-stage AOM acousto-optic crystal to perform primary screening on a laser pulse, and generating a second-stage switching signal based on the seed sampling signal and a light-on control signal, transmitting the second-stage switching signal to a second-stage AOM drive circuit to enable the second-stage AOM drive circuit to drive a second-stage AOM acousto-optic crystal to control the output of the laser pulse after primary screening and perform secondary screening on the laser pulse after primary screening. The AOM drive circuit is used for controlling the switching of the first-stage AOM acousto-optic crystal based on the first-stage envelope signal to perform primary screening on the laser pulse, and controlling the switching of the second-stage AOM acousto-optic crystal based on the second-stage switching signal to control the output of the laser pulse after primary screening and perform secondary screening on the laser pulse after primary screening. The machine tool control board card is used for providing a synchronization signal and a light-on control signal for the timing circuit. The primary screening signal is used for performing primary screening on the laser pulse by the synchronization signal provided by the external machine tool control board card, and the phase difference between the rising edges of the synchronization signal and the light-on control signal is a preset value, which enables the laser pulse after primary screening to have the same phase as the light-on control signal. The machine tool control board card provides the synchronization signal for the timing circuit, and the timing circuit outputs the first-stage envelope signal to the first-stage AOM drive circuit based on the synchronization signal and the seed sampling signal, so that the phase and frequency of the laser pulse screened by the first-stage AOM acousto-optic crystal driven by the first-stage AOM drive circuit are the same as those of the synchronization signal.

2. The apparatus of claim 1, wherein, The timing circuit comprises an FPGA unit and a high-speed DAC unit connected in sequence, the first-stage envelope signal is output by the high-speed DAC unit, and the second-stage switching signal is output by the FPGA unit. The FPGA unit comprises an FPGA and a signal output circuit and a plurality of groups of signal input circuits connected to the FPGA respectively, the signal input circuit comprises a photoelectric coupler and an inverter connected in sequence, the photoelectric coupler is used for converting the synchronization signal or the light-on control signal into a corresponding electrical signal by using an optoelectronic device to achieve a good isolation effect of the electrical signal, and the inverter is used for enhancing the driving capacity of the electrical signal and transmitting the inverted signal to the FPGA. The high-speed DAC unit comprises an operational amplifier circuit and a plurality of high-speed DACs connected in parallel, the operational amplifier circuit is used for driving and enhancing the analog envelope output by the FPGA to transmit the first-stage envelope signal to the first-stage AOM drive circuit.

3. The apparatus of claim 2, wherein, The FPGA in the timing circuit is multiplied to a high frequency through a 50M crystal oscillator, and then the seed sampling signal is collected based on the high frequency to obtain a mark signal; the mark signal controls the generation of a DAC clock signal and a DAC data signal, and the FPGA outputs the DAC clock signal and the DAC data signal to a high-speed DAC to control the high-speed DAC to output an envelope signal.

4. The apparatus of claim 2, wherein, When the timing circuit performs primary screening based on a synchronization signal: the FPGA determines the frequency and phase of the seed sampling signal according to the collected optical signal, and resets the counter of the FPGA in the timing circuit to zero at the rising edge of the synchronization signal, and then generates an analog signal envelope based on the synchronization signal; The analog signal envelope is sent out by the high-speed DAC controlled by the FPGA, and the 1st-stage AOM drive circuit receives it.

5. The apparatus of claim 4, wherein, At the starting end of the synchronization signal, a first burst analog signal envelope starting point is generated by the high-speed DAC half a period before the first burst pulse light, the first burst analog signal envelope starting high-speed DAC amplitude is set by a pre-set amplitude parameter, and a first burst analog signal envelope ending point is generated by the high-speed DAC half a period after the first burst pulse light, so as to complete the setting of the first burst analog signal envelope, and the setting process is repeated until all the analog signal envelopes of the required bursts are completed.

6. The apparatus of claim 5, wherein, When the synchronization signal is lost, the laser triggers an emergency stop alarm.

7. The apparatus of claim 4, wherein, The 1st-stage AOM drive circuit outputs a carrier radio frequency signal with a certain amplitude to drive the 1st-stage AOM acousto-optic crystal according to the time and amplitude of the analog signal envelope, if the laser pulse passes through the 1st-stage AOM acousto-optic crystal at the arrival time of the carrier radio frequency signal, the light pulse will be deflected to the next stage, and if the laser pulse does not pass through the 1st-stage AOM acousto-optic crystal at the arrival time of the carrier radio frequency signal, the laser pulse will be discarded without deflection into the waste light path.

8. A signal conditioning method using the laser pulse synchronization control device according to any one of claims 1 to 7, characterized by: The light-on control signal includes two working modes, a GATE working mode and a TRIGGER working mode.

9. The signal conditioning method of claim 8, wherein, In the GATE working mode, the FPGA in the timing circuit controls the 2nd-stage AOM acousto-optic crystal to open at the high level of the external control GATE signal, at which time the laser emits the complete BURST laser pulse string at the high level of the external control GATE signal.

10. The signal conditioning method of claim 8, wherein, In the TRIGGER working mode, the FPGA in the timing circuit controls the 2nd-stage AOM acousto-optic crystal to open in the first BURST after the rising edge of the external control TRIGGER signal, at which time the laser emits the first BURST after the rising edge of the external control TRIGGER signal.

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