Clock frequency control method and related device

Abstract

The invention provides a clock frequency control method, which comprises the following steps of: sending a first signal to a first circuit module through a first general input / output interface in a preset duration before an application processor enters a standby state, and transmitting the first signal to a second circuit module through a preset transmission line, the first signal is used for prompting the first circuit module and the second circuit module to enter the standby state; after the preset duration, a second signal is sent to a clock frequency module through a second general input and output interface, and the second signal is used for switching the clock frequency module from the first frequency mode to a second frequency mode, the clock frequency of the first circuit module and the clock frequency of the second circuit module are adjusted from a first frequency to a second frequency, and the second frequency is smaller than the first frequency. The clock frequency of the chip can be adjusted according to the state of the terminal equipment, and the power consumption of the terminal equipment is greatly reduced while the performance is ensured.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of data control, in particular to a clock frequency control method and related device. BACKGROUND

[0002] Terminal devices, especially folding mobile phones or folding computers and the like, due to their foldable structure, are more compact and portable than ordinary terminal devices of the same volume, and meet the communication and entertainment needs of users. However, the existing terminal devices include multiple circuit boards, and frequent information interaction is required between different circuit boards, so multiple cables need to be connected to ensure the efficiency and quality of data transmission between different circuit boards. At present, the circuit boards of the terminal device are continuously working at any time, resulting in high power consumption of the terminal device. SUMMARY

[0003] Therefore, the present application provides a clock frequency control method and related device, which can adjust the clock frequency of the chip in combination with the state of the terminal device, greatly reducing the power consumption while ensuring performance.

[0004] In a first aspect, an embodiment of the present application provides a clock frequency control method applied to an application processor of a terminal device, wherein the terminal device further includes a first circuit module, a second circuit module, and a clock frequency module, a transmission line between the application processor and the first circuit module includes a first general-purpose input / output interface, a transmission line between the application processor and the clock frequency module includes a second general-purpose input / output interface, the clock frequency module is further connected to the first circuit module and the second circuit module respectively, and the first circuit module and the second circuit module are connected by a preset transmission line. The method includes:

[0005] Before the application processor enters a standby state for a preset time period, a first signal is sent to the first circuit module through the first general-purpose input / output interface, the first signal is transmitted to the second circuit module through the preset transmission line, and the first signal is used to prompt the first circuit module and the second circuit module to enter the standby state.

[0006] After the preset time period, a second signal is sent to the clock frequency module through the second general-purpose input / output interface, the second signal is used to switch the clock frequency module from a first frequency mode to a second frequency mode, so as to adjust the clock frequency of the first circuit module and the second circuit module from a first frequency to a second frequency, and the second frequency is less than the first frequency.

[0007] In a second aspect, an embodiment of the present application provides a clock frequency control apparatus, applied to an application processor of a terminal device, the terminal device further comprising a first circuit module, a second circuit module and a clock frequency module, a transmission line between the application processor and the first circuit module comprising a first general-purpose input / output interface, a transmission line between the application processor and the clock frequency module comprising a second general-purpose input / output interface, the clock frequency module further connecting the first circuit module and the second circuit module respectively, the first circuit module and the second circuit module being connected by a preset transmission line, the apparatus comprising:

[0008] a first sending unit configured to send a first signal to the first circuit module through the first general-purpose input / output interface before the application processor enters a standby state for a preset time length, the first signal being transmitted to the second circuit module through the preset transmission line, the first signal being used to prompt the first circuit module and the second circuit module to enter the standby state;

[0009] a second sending unit configured to send a second signal to the clock frequency module through the second general-purpose input / output interface after the preset time length, the second signal being used to make the clock frequency module switch from a first frequency mode to a second frequency mode, so as to adjust the clock frequency of the first circuit module and the second circuit module from a first frequency to a second frequency, the second frequency being less than the first frequency.

[0010] In a third aspect, an embodiment of the present application provides a terminal device, comprising a processor, a memory, a communication interface and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the processor, and the programs comprise instructions for performing steps in any method of the first aspect of the embodiments of the present application.

[0011] In a fourth aspect, an embodiment of the present application provides a computer readable storage medium, wherein the computer readable storage medium stores a computer program for electronic data exchange, and the computer program causes a computer to perform some or all of the steps described in any method of the first aspect of the embodiments of the present application.

[0012] In a fifth aspect, an embodiment of the present application provides a computer program product, wherein the computer program product includes a non-transitory computer readable storage medium storing a computer program, and the computer program is operable to cause a computer to perform some or all of the steps described in any method of the first aspect of the embodiments of the present application.

[0013] It can be seen that by the clock frequency control method and the related device, the application processor applied to the terminal device further comprises a first circuit module, a second circuit module and a clock frequency module, a transmission line between the application processor and the first circuit module comprises a first general-purpose input / output interface, a transmission line between the application processor and the clock frequency module comprises a second general-purpose input / output interface, the clock frequency module is further connected to the first circuit module and the second circuit module respectively, the first circuit module and the second circuit module are connected by a preset transmission line, a first signal is sent to the first circuit module through the first general-purpose input / output interface before the application processor enters a standby state for a preset time length, the first signal is transmitted to the second circuit module through the preset transmission line, and the first signal is used to prompt the first circuit module and the second circuit module to enter the standby state; after the preset time length, a second signal is sent to the clock frequency module through the second general-purpose input / output interface, the second signal is used to make the clock frequency module switch from a first frequency mode to a second frequency mode, so as to adjust the clock frequency of the first circuit module and the second circuit module from a first frequency to a second frequency, and the second frequency is less than the first frequency. The clock frequency of the chip can be adjusted according to the state of the terminal device, so that the performance is guaranteed and the power consumption of the terminal device is greatly reduced. BRIEF DESCRIPTION OF DRAWINGS

[0014] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0015] Figure 1 A system architecture diagram of a clock frequency control method provided by the embodiment of the present application;

[0016] Figure 2 A structural schematic diagram of a terminal device provided by the embodiment of the present application;

[0017] Figure 3 Another structural schematic diagram of a terminal device provided by the embodiment of the present application;

[0018] Figure 4 A flowchart of a clock frequency control method provided by the embodiment of the present application;

[0019] Figure 5 Another flowchart of a clock frequency control method provided by the embodiment of the present application;

[0020] Figure 6A function unit composition block diagram of a clock frequency control device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0021] In order to enable persons skilled in the art to better understand the schemes of the present application, the technical schemes in the embodiments of the present application will be clearly and completely described below in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by persons skilled in the art without creative labor fall within the scope of protection of the present application.

[0022] The terms "first", "second", and the like in the specification and claims of the present application and the above-described drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but can optionally include steps or units not listed, or can optionally include other steps or units inherent to the process, method, product, or device.

[0023] It should be understood that the term "and / or" herein is only used to describe the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B can mean that A exists alone, A and B exist together, and B exists alone. In addition, the character " / " in this paper represents that the front and rear associated objects are a "or" relationship. The "multiple" appearing in the embodiments of the present application means two or more than two.

[0024] The "at least one" or similar expressions in the embodiments of the present application means any combination of these items, including any combination of single item or multiple items, means one or more, and multiple means two or more than two. For example, at least one of a, b or c can represent the following seven cases: a, b, c, a and b, a and c, b and c, a, b and c. Among them, each of a, b and c can be an element or a set containing one or more elements.

[0025] The "connection" appearing in the embodiments of the present application means direct connection or indirect connection and various connection modes to realize communication between devices, which is not limited by the embodiments of the present application.

[0026] Reference to“an embodiment” herein means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase“in an embodiment” in various places in the specification are not necessarily referring to the same embodiment nor are separate or alternative embodiments mutually exclusive of other embodiments. It is appreciated that embodiments described herein can be combined with other embodiments.

[0027] The related content, concepts, meanings, technical problems, technical solutions, beneficial effects and the like related to the embodiments of the application are described below.

[0028] Please refer to Figure 1 , Figure 1 A system architecture diagram of a clock frequency control method provided by the embodiments of the application, the system architecture includes an application processor 110, a first circuit module 120, a second circuit module 130, and a clock frequency module 140, wherein the clock frequency module 140 includes a clock switching switch module 141 and a clock module 142, the clock switching switch module includes a first switch K1 and a second switch K2, the clock module 142 supports a first frequency mode and a second frequency mode, and the second frequency is less than the first frequency.

[0029] The transmission line between the application processor 110 and the first circuit module 120 includes a first general-purpose input / output (GPIO) interface, the transmission line between the application processor 110 and the clock frequency module 140 includes a second GPIO interface, and the clock frequency module 140 is further connected to the first circuit module 120 and the second circuit module 130 respectively.

[0030] Specifically, the clock switching switch module 141 is connected to the first circuit module 120 and the second circuit module 130 respectively.

[0031] Specifically, please refer to Figure 2 , Figure 2A structural schematic diagram of a terminal device is provided in the embodiments of the present application. The terminal device comprises a first shell, a second shell, and a connecting assembly arranged between the first shell and the second shell. A first circuit board 21 is arranged in the first shell, a second circuit board 22 is arranged in the second shell, and a part of a preset transmission line 23 is arranged in the connecting assembly, used for transmitting data between the first circuit board 21 and the second circuit board 22, thereby saving the internal space of the connecting assembly. When the terminal device needs to be folded, the first shell and the second shell of the terminal device can be rotated around the connecting assembly to switch from an unfolded state to a folded state, so as to reduce the screen of the terminal device and facilitate carrying. When the terminal device needs to be unfolded, the first shell and the second shell can be rotated around the connecting assembly to switch from the folded state to the unfolded state.

[0032] In a possible embodiment, if the terminal device is a reel-type folding device, that is, the second shell comprises a receiving space for receiving the first shell, when the terminal device is in a retracted state, the first shell is received in the second shell, if the terminal device needs to be unfolded, the first shell is moved away from the second shell under the guidance of the connecting assembly, so that the terminal device is switched from the retracted state to the unfolded state. Similarly, if the terminal device needs to be retracted, the first shell is moved towards the second shell under the guidance of the connecting assembly, so that the terminal device is switched from the unfolded state to the retracted state.

[0033] The preset transmission line 23 can transmit aggregated signals, including aggregation of SPI signals, I2C signals, and GPIO signals.

[0034] It can be seen that in the present example, the terminal device transmits data between the first circuit board in the first shell and the second circuit board in the second shell through the preset transmission line 23, thereby ensuring transmission quality, saving space in the connecting assembly, and further reducing the weight and volume of the terminal device, and improving user experience.

[0035] Specifically, please refer to Figure 3 , Figure 3Another structure diagram of a terminal device provided by the embodiment of the present application is provided, the terminal device comprising an application processor, a first circuit module, a second circuit module, and a load module, wherein the first circuit module and the application processor are arranged on the first circuit board 21, the second circuit module and the load module are arranged on the second circuit board 22, the transmission line between the application processor and the first circuit module further comprises a first serial peripheral interface (SPI) interface 211, a first inter-integrated circuit (I2C) interface 213, and a first general-purpose input / output interface 214, the transmission line between the second circuit module and the load module comprises a second serial peripheral interface 212, a second inter-integrated circuit interface 215, and a third general-purpose input / output interface 216, and the preset transmission line comprises a signal sending interface, a signal receiving interface, and a control interface. It should be noted that the first serial peripheral interface 211 and the second serial peripheral interface are used for transmitting SPI signals, the first inter-integrated circuit interface 213 and the second inter-integrated circuit interface 215 are used for transmitting I2C signals, and the first general-purpose input / output interface 214 and the third general-purpose input / output interface 216 are used for transmitting GPIO signals.

[0036] The first circuit module and the second circuit module can be field programmable gate arrays (FGPA), the first circuit module is used for converting low-speed parallel signals into high-speed signal series, the low-speed signals are distributed in parallel to the load module by the second circuit module after passing through the shaft, so as to achieve the purpose of reducing the width of the transmission line passing through the shaft, that is, the preset transmission line can save the cost of the transmission line.

[0037] Specifically, in the non-standby state, the application processor needs to communicate with the load module through the I2C / SPI transmission line at a high frequency, and needs to notify each other through the GPIO transmission line, that is, the FPGA needs to support aggregation of all I2C, SPI, and GPIO signals, at this time, the working clock of the FPGA needs to be kept in a high-frequency state, and in the standby state, the application processor is in a standby sleep state, at this time, the application processor does not need to communicate with the load module through the I2C / SPI transmission line, only needs to ensure normal transmission of the GPIO signal to timely wake up the application processor according to the demand; when the load module needs to restore communication with the application processor, the load module first triggers an interrupt to wake up the application processor, at this time, the application processor needs to communicate with the load through the I2C / SPI transmission line. Therefore, in the standby sleep state, the FPGA only needs to aggregate the GPIO signal, at this time, the working clock of the FPGA can be in a low-frequency state.

[0038] After understanding the above system architecture and terminal device, the following will be described in combination with Figure 4The clock frequency control method in the embodiment of the application is described, Figure 4 A flowchart of a clock frequency control method provided in the embodiment of the application is applied to the application processor in the system architecture and the terminal device, and specifically includes the following steps:

[0039] In step 401, a first signal is sent to a first circuit module through a first general input / output interface before the application processor enters a standby state for a preset time length.

[0040] The first signal is transmitted to the second circuit module through the preset transmission line, and the first signal is used to prompt the first circuit module and the second circuit module to enter the standby state. It should be noted that the standby state can be a state in which the terminal device is blacked out and hibernates.

[0041] After the first circuit module receives the first signal, the first signal can be transmitted to the second circuit module through the preset transmission line, so that the first circuit module and the second circuit module both enter the standby state.

[0042] The preset time length can be x milliseconds, and the purpose is to give the first circuit module and the second circuit module time to enter the standby state, thereby preparing for subsequent adjustment of the clock frequency.

[0043] In step 402, a second signal is sent to a clock frequency module through a second general input / output interface after the preset time length.

[0044] The second signal is used to make the clock frequency module switch from a first frequency mode to a second frequency mode, so as to adjust the clock frequency of the first circuit module and the second circuit module from a first frequency to a second frequency, and the second frequency is less than the first frequency.

[0045] Specifically, the application processor sends the second signal to the clock frequency module, and the clock frequency signal controls the first switch in the clock switching switch module to be disconnected and the second switch to be connected when the second signal is received, so that the clock frequency module enters the second frequency mode from the first frequency mode. Since the clock frequency module is connected to the first circuit module and the second circuit module, respectively, the clock frequency of the first circuit module and the second clock module is adjusted from the first frequency to the second frequency, that is, the first circuit module and the second clock module operate at a low clock frequency in the standby state, which greatly reduces the power consumption. At the same time, the application processor does not need to communicate with the load in the standby state, and the performance is not affected.

[0046] It can be seen that by the clock frequency control method, the application processor applied to the terminal device further comprises a first circuit module, a second circuit module and a clock frequency module, a transmission line between the application processor and the first circuit module comprises a first general input / output interface, a transmission line between the application processor and the clock frequency module comprises a second general input / output interface, the clock frequency module is further connected to the first circuit module and the second circuit module respectively, the first circuit module and the second circuit module are connected by a preset transmission line, a first signal is sent to the first circuit module through the first general input / output interface before the application processor enters a standby state for a preset time length, the first signal is transmitted to the second circuit module through the preset transmission line, and the first signal is used to prompt the first circuit module and the second circuit module to enter the standby state; after the preset time length, a second signal is sent to the clock frequency module through the second general input / output interface, the second signal is used to make the clock frequency module switch from a first frequency mode to a second frequency mode, so as to adjust the clock frequency of the first circuit module and the second circuit module from a first frequency to a second frequency, and the second frequency is less than the first frequency. The clock frequency of the chip can be adjusted according to the state of the terminal device, so that the performance is guaranteed and the power consumption of the terminal device is greatly reduced.

[0047] The following will be described in combination with Figure 5 Another clock frequency control method in the embodiment of the application will be described, Figure 5 The flowchart of another clock frequency control method provided by the embodiment of the application is applied to an application processor of a terminal device, the terminal device further comprises a first circuit module, a second circuit module and a clock frequency module, a transmission line between the application processor and the first circuit module comprises a first general input / output interface, a transmission line between the application processor and the clock frequency module comprises a second general input / output interface, the clock frequency module is further connected to the first circuit module and the second circuit module respectively, the first circuit module and the second circuit module are connected by a preset transmission line, and specifically comprises the following steps:

[0048] Step 501, if the application processor exits the standby state, a third signal is sent to the clock frequency module through the second general input / output interface.

[0049] The third signal is used to make the clock frequency module switch from the second frequency mode to the first frequency mode.

[0050] Specifically, the application processor sends a third signal to the clock frequency module, and the clock frequency signal controls the second switch in the clock switch module to be turned off and the first switch to be turned on when the third signal is received, so that the clock frequency module enters the first frequency mode from the second frequency mode. Since the clock frequency module is connected to the first circuit module and the second circuit module respectively, the clock frequencies of the first circuit module and the second clock module are adjusted from the second frequency to the first frequency, i.e., running at a high clock frequency in the standby state to ensure the performance of the device.

[0051] In step 502, a fourth signal is sent to the first circuit module through the first general input and output interface.

[0052] The fourth signal is transmitted to the second circuit module through the preset transmission line, and the fourth signal is used to prompt the first circuit module and the second circuit module to exit the standby state.

[0053] In a possible embodiment, a preset time length can be waited before the fourth signal is sent, so that the clock frequency module completes the switching of the frequency mode.

[0054] After the first circuit module receives the first signal, the first signal can be transmitted to the second circuit module through the preset transmission line, so that the first circuit module and the second circuit module both exit the standby state.

[0055] It can be seen that, by the above clock frequency control method, the application processor applied to a terminal device further includes a first circuit module, a second circuit module, a clock frequency module, a transmission line between the application processor and the first circuit module includes a first general input and output interface, a transmission line between the application processor and the clock frequency module includes a second general input and output interface, the clock frequency module is further connected to the first circuit module and the second circuit module respectively, and a preset transmission line is connected between the first circuit module and the second circuit module. Before the application processor enters the standby state for a preset time length, a first signal is sent to the first circuit module through the first general input and output interface, the first signal is transmitted to the second circuit module through the preset transmission line, and the first signal is used to prompt the first circuit module and the second circuit module to enter the standby state. After the preset time length, a second signal is sent to the clock frequency module through the second general input and output interface, the second signal is used to make the clock frequency module switch from the first frequency mode to the second frequency mode, so as to adjust the clock frequencies of the first circuit module and the second circuit module from the first frequency to the second frequency, and the second frequency is less than the first frequency. The clock frequency of the chip can be adjusted according to the state of the terminal device, the performance is ensured, and the power consumption of the terminal device is greatly reduced.

[0056] The above describes the scheme of the embodiments of the present application mainly from the perspective of the process of executing the method. It can be understood that, in order to implement the above functions, the electronic device comprises hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art should easily realize that, in combination with the units and algorithm steps of each example described in the embodiments provided herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a certain function is implemented in the form of hardware or computer software driving hardware depends on the specific application of the technical solution and the design constraint conditions. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0057] The embodiments of the present application can divide the functional units of the electronic device according to the above method examples. For example, each functional unit can be divided according to each function, or two or more functions can be integrated in one processing unit. The integrated unit can be implemented in the form of hardware or software functional unit. It should be noted that the division of units in the embodiments of the present application is illustrative, and is only a logical functional division. In actual implementation, there can be another division method.

[0058] In the case of dividing each functional module according to each function, Figure 6 A functional unit composition block diagram of a clock frequency control device provided by the embodiments of the present application is applied to an application processor of a terminal device, wherein the terminal device further comprises a first circuit module, a second circuit module and a clock frequency module, a transmission line between the application processor and the first circuit module comprises a first general-purpose input / output interface, a transmission line between the application processor and the clock frequency module comprises a second general-purpose input / output interface, the clock frequency module is further connected to the first circuit module and the second circuit module respectively, and the first circuit module and the second circuit module are connected by a preset transmission line. The clock frequency control device 600 comprises:

[0059] A first sending unit 610 is configured to send a first signal to the first circuit module through the first general-purpose input / output interface before the application processor enters a standby state for a preset time length, wherein the first signal is transmitted to the second circuit module through the preset transmission line, and the first signal is used to prompt the first circuit module and the second circuit module to enter the standby state.

[0060] The second sending unit 620 is configured to send a second signal to the clock frequency module through the second general input and output interface after the preset time length, so as to make the clock frequency module switch from the first frequency mode to the second frequency mode, and to adjust the clock frequency of the first circuit module and the second circuit module from the first frequency to the second frequency, wherein the second frequency is less than the first frequency.

[0061] It can be seen that, by using the clock frequency control method and the related device, the application processor of the terminal device further comprises a first circuit module, a second circuit module and a clock frequency module, the transmission line between the application processor and the first circuit module comprises a first general input and output interface, the transmission line between the application processor and the clock frequency module comprises a second general input and output interface, the clock frequency module is further connected to the first circuit module and the second circuit module respectively, the first circuit module and the second circuit module are connected by a preset transmission line, a first signal is sent to the first circuit module through the first general input and output interface before the application processor enters the standby state for a preset time length, the first signal is transmitted to the second circuit module through the preset transmission line, and the first signal is used to prompt the first circuit module and the second circuit module to enter the standby state; and a second signal is sent to the clock frequency module through the second general input and output interface after the preset time length, the second signal is used to make the clock frequency module switch from the first frequency mode to the second frequency mode, so as to adjust the clock frequency of the first circuit module and the second circuit module from the first frequency to the second frequency, and the second frequency is less than the first frequency. The clock frequency of the chip can be adjusted according to the state of the terminal device, so that the performance is guaranteed and the power consumption of the terminal device is greatly reduced.

[0062] It should be noted that the specific implementation of each operation can adopt the corresponding description of the method embodiment shown above, and the clock frequency control device 600 can be used to execute the method embodiment of the present application, and details are not repeated.

[0063] The embodiment of the present application further provides a chip, which comprises a processor, a memory and a computer program or instructions stored in the memory, wherein the processor executes the computer program or instructions to realize the steps described in the above method embodiment.

[0064] The embodiment of the present application further provides a chip module, which comprises a transceiver assembly and a chip, and the chip comprises a processor, a memory and a computer program or instructions stored in the memory, wherein the processor executes the computer program or instructions to realize the steps described in the above method embodiment.

[0065] The embodiment of the present application further provides a computer storage medium, wherein the computer storage medium stores a computer program for electronic data exchange, and the computer program causes a computer to execute part or all of steps of any method described in the above method embodiments, and the computer includes an electronic device.

[0066] The embodiment of the present application further provides a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program, and the computer program is operable to cause a computer to execute part or all of steps of any method described in the above method embodiments. The computer program product can be a software installation package, and the computer includes an electronic device.

[0067] It should be noted that, for the above-mentioned embodiments, in order to simply describe, each embodiment is described as a combination of a series of actions. Those skilled in the art should know that the present application is not limited to the order of actions described, because some steps in the embodiments of the present application can be performed in other order or simultaneously. In addition, those skilled in the art should know that the embodiments described in the specification all belong to preferred embodiments, and the actions, steps, modules or units involved are not necessarily required in the embodiments of the present application.

[0068] In the above embodiments, the description of each embodiment of the present application has its own focus, and the parts not described in detail in an embodiment can be referred to the relevant description of other embodiments.

[0069] The steps of the method or the algorithm described in the embodiments of the present application can be implemented in the form of hardware or by a processor executing software instructions. The software instructions can be composed of corresponding software modules, and the software modules can be stored in a RAM, a flash memory, a ROM, an electrically EPROM (EEPROM), a register, a hard disk, a mobile hard disk, a CD-ROM or any other form of storage medium well known in the art. An exemplary storage medium is coupled to the processor, so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be an integral part of the processor. The processor and the storage medium can be located in an ASIC. In addition, the ASIC can be located in a terminal device or a management device. Of course, the processor and the storage medium can also exist as discrete components in the terminal device or the management device.

[0070] Those skilled in the art should be aware that, in one or more examples described above, the functions described in the embodiments of the present application can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented by software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, the computer program instructions generate, in whole or in part, the processes or functions described in the embodiments of the present application. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center through wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) manner. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. integrated with one or more available media sets. The available medium can be a magnetic medium (such as a floppy disk, a hard disk, a magnetic tape), an optical medium (such as a digital video disc (DVD)), or a semiconductor medium (such as a solid state disk (SSD)), etc.

[0071] The various modules / units included in the various devices and products described in the above embodiments can be software modules / units or hardware modules / units, or partially software modules / units and partially hardware modules / units. For example, for the various devices and products applied to or integrated into a chip, the various modules / units included therein can all be implemented in the form of hardware such as circuitry, or at least some of the modules / units can be implemented in the form of software programs running on a processor integrated in the chip, and the remaining (if any) modules / units can be implemented in the form of hardware such as circuitry; for the various devices and products applied to or integrated into a chip module, the various modules / units included therein can all be implemented in the form of hardware such as circuitry, and different modules / units can be located in the same component (e.g., a chip, a circuit module, etc.) or different components of the chip module, or at least some of the modules / units can be implemented in the form of software programs running on a processor integrated in the chip module, and the remaining (if any) modules / units can be implemented in the form of hardware such as circuitry; for the various devices and products applied to or integrated into a terminal device, the various modules / units included therein can all be implemented in the form of hardware such as circuitry, and different modules / units can be located in the same component (e.g., a chip, a circuit module, etc.) or different components of the terminal device, or at least some of the modules / units can be implemented in the form of software programs running on a processor integrated in the terminal device, and the remaining (if any) modules / units can be implemented in the form of hardware such as circuitry.

[0072] The above detailed description of the specific implementation of the embodiments of the present application has further explained the purposes, technical solutions, and beneficial effects of the embodiments of the present application. It should be understood that the above description is only a specific implementation of the embodiments of the present application and is not intended to limit the protection scope of the embodiments of the present application. Any modification, equivalent replacement, improvement, etc. made on the basis of the technical solutions of the embodiments of the present application shall be included in the protection scope of the embodiments of the present application.

Claims

1. A clock frequency control method, characterized by, The application is applied to an application processor of a terminal device, the terminal device further comprises a first circuit module, a second circuit module and a clock frequency module, a transmission line between the application processor and the first circuit module comprises a first general input / output interface, a transmission line between the application processor and the clock frequency module comprises a second general input / output interface, the clock frequency module is further connected to the first circuit module and the second circuit module respectively, the first circuit module and the second circuit module are connected by a preset transmission line, and the method comprises the following steps: a first signal is sent to the first circuit module through the first general input / output interface before the application processor enters a standby state for a preset time length, the first signal is transmitted to the second circuit module through the preset transmission line, and the first signal is used to prompt the first circuit module and the second circuit module to enter the standby state; after the preset time length, a second signal is sent to the clock frequency module through the second general input / output interface, the second signal is used to make the clock frequency module switch from a first frequency mode to a second frequency mode, so as to adjust the clock frequency of the first circuit module and the second circuit module from a first frequency to a second frequency, and the second frequency is less than the first frequency.

2. The method of claim 1, wherein, The method further comprises the following steps: if the application processor exits the standby state, a third signal is sent to the clock frequency module through the second general input / output interface, the third signal is used to make the clock frequency module switch from the second frequency mode to the first frequency mode; a fourth signal is sent to the first circuit module through the first general input / output interface, the fourth signal is transmitted to the second circuit module through the preset transmission line, and the fourth signal is used to prompt the first circuit module and the second circuit module to exit the standby state.

3. The method of claim 1, wherein, The clock frequency module comprises a clock module and a clock switch module, the clock switch module comprises a first switch and a second switch, and the clock switch module is used to control the first switch to be turned off and the second switch to be turned on when the second signal is received, so as to make the clock frequency module switch from the first frequency mode to the second frequency mode.

4. The method of claim 2, wherein, The clock frequency module comprises a clock module and a clock switch module, the clock switch module comprises a first switch and a second switch, and the clock switch module is used to control the second switch to be turned off and the first switch to be turned on when the third signal is received, so as to make the clock frequency module switch from the second frequency mode to the first frequency mode.

5. The method according to claim 1 or 2, characterized in that, The transmission line between the application processor and the first circuit module further comprises a first serial peripheral interface and a first integrated circuit interface, the transmission line between the second circuit module and a load module comprises a second serial peripheral interface, a second integrated circuit interface and a third general input / output interface, and the preset transmission line comprises a signal sending interface, a signal receiving interface and a control interface.

6. The method of claim 5, wherein, The method further comprises the following steps: if the load triggers an interruption, the application processor exits the standby state.

7. The method according to any one of claims 1 to 6, characterized in that, The terminal device comprises a first shell, a second shell, a connecting assembly arranged between the first shell and the second shell, a first circuit board and a second circuit board, the first circuit module and the application processor are arranged on the first circuit board, the second circuit module and the load module are arranged on the second circuit board, the first circuit board is arranged in the first shell, the second circuit board is arranged in the second shell, part of the preset transmission line is arranged in the connecting assembly, the first shell and the second shell can rotate around the connecting assembly to switch between the folded state and the unfolded state, or the first shell moves away from or relative to the second shell under the guidance of the connecting assembly to switch the first shell and the second shell between the unfolded state and the folded state.

8. A clock frequency control apparatus characterized by comprising: The application processor applied to the terminal device, the terminal device further comprises a first circuit module, a second circuit module and a clock frequency module, the transmission line between the application processor and the first circuit module comprises a first general purpose input / output interface, the transmission line between the application processor and the clock frequency module comprises a second general purpose input / output interface, the clock frequency module is further connected to the first circuit module and the second circuit module respectively, the first circuit module and the second circuit module are connected by a preset transmission line, and the device comprises: A first sending unit is configured to send a first signal to the first circuit module through the first general purpose input / output interface before the application processor enters a standby state for a preset time period, the first signal is transmitted to the second circuit module through the preset transmission line, and the first signal is used to prompt the first circuit module and the second circuit module to enter the standby state. A second sending unit is configured to send a second signal to the clock frequency module through the second general purpose input / output interface after the preset time period, the second signal is used to switch the clock frequency module from a first frequency mode to a second frequency mode, so as to adjust the clock frequency of the first circuit module and the second circuit module from a first frequency to a second frequency, and the second frequency is less than the first frequency.

9. A terminal device, comprising: Comprise: A processor, a memory, and one or more programs; The one or more programs are stored in the memory and configured to be executed by the processor, and the programs comprise instructions for executing steps in the method of any one of claims 1-7.

10. A computer storage medium, characterized in that, The computer storage medium stores a computer program, the computer program comprises program instructions, the program instructions make the processor execute the method of any one of claims 1-7 when executed by the processor. The computer storage medium stores a computer program, the computer program comprises program instructions, the program instructions make the processor execute the method of any one of claims 1-7 when executed by the processor.

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