Modeling isotropy in point clouds using neural networks for three-dimensional object detection and recognition

Abstract

The invention discloses modeling isotropy in point clouds using neural networks for three-dimensional object detection and recognition. In various examples, techniques for modeling isotropy in a point neural network include determining a first partition prediction associated with dividing a plurality of points included in a scene into a first set of portions. The technique further includes generating, using the neural network, a second partition prediction associated with partitioning the plurality of points into a second set of portions based at least on the one or more aggregations associated with the first set of portions. The technique further includes determining a plurality of segmented equivariant regions included in the scene based on the second partition prediction, and generating object recognition results associated with the plurality of points based on the plurality of segmented equivariant regions.

Description

[0001] Cross Reference to Related Applications

[0002] This application claims the benefit of U.S. Provisional Application No. 63 / 544,949, filed October 20, 2023, entitled “Equivariant 3D Object Detection,” the entire contents of which are incorporated herein by reference. BACKGROUND

[0003] Recent developments in machine learning and computer vision have led to the creation of neural networks for performing various types of three-dimensional (3D) recognition tasks. These 3D recognition tasks generally involve recognizing and understanding 3D structures and patterns from an unordered collection of points representing the outer surface of an object. For example, point neural networks can be used to process input point cloud data that includes varying point densities and lacks explicit spatial relationships. The output generated by the point neural networks can be used to perform object detection, which includes recognizing the presence and location of particular objects within a 3D space; segmentation, which includes dividing a point cloud into semantically meaningful parts or regions, often corresponding to individual object components or different objects; and / or classification, which includes classifying an entire point cloud or a segment thereof into a predefined class.

[0004] 3D recognition tasks are integral to various real-world applications. For example, autonomous vehicles can use 3D recognition capabilities to perceive and understand their surroundings, enabling safe navigation by distinguishing between pedestrians, other vehicles, and obstacles. In another example, robots can use 3D recognition to perform tasks such as object manipulation, navigation, and / or interacting with complex environments.

[0005] Generally speaking, 3D recognition tasks should be equivariant or consistent with respect to the rotation, translation, and / or other movement of a scene and / or objects within the scene. More specifically, translation and / or rotation applied to a 3D scene and / or individual objects within the 3D scene should result in corresponding Euclidean motion in the predictions generated by a 3D recognition model from the 3D scene and / or objects. However, existing point neural networks often fail to model equivariance at the per-object level because the objects need to be recognized to generate consistent predictions about the movement of the objects, and vice versa. SUMMARY

[0006] Embodiments of the present disclosure relate to modeling equivariance in point clouds using neural networks for three-dimensional (3D) object detection and recognition. Techniques described herein include determining a first partition prediction associated with partitioning a plurality of points included in a scene into a first set of parts. The techniques also include generating, via execution of one or more equivariant layers included in a neural network, a second partition prediction associated with partitioning the plurality of points into a second set of parts based at least on one or more aggregations associated with the first set of parts. The techniques further include determining a plurality of piecewise equivariant regions included in the scene based on the second partition prediction, and generating an object recognition result associated with the plurality of points based on the plurality of piecewise equivariant regions.

[0007] One technical advantage of the disclosed techniques over existing approaches is the improved ability to handle per-object symmetries in three-dimensional (3D) object detection tasks by using equivariant layers in a neural network that transform from finer partitions of a set of input points representing a 3D scene to coarser partitions of those input points. Another technical advantage of the disclosed techniques is the ability to bound an error associated with approximating piecewise equivariance in a set of input points. As such, the disclosed techniques improve the ability of a neural network to generalize to objects associated with different orientations, positions, configurations, and / or other combinations of Euclidean motions. Further, because the disclosed techniques improve performance and / or reduce error associated with approximating piecewise equivariance in input points, the disclosed techniques improve performance of a neural network on classification, segmentation, and / or other object recognition tasks. BRIEF DESCRIPTION OF DRAWINGS

[0008] The present systems and methods for modeling piecewise equivariance in point neural networks are described in detail below with reference to the various figures of the drawings, wherein:

[0009] Figure 1 A computing device configured to implement one or more aspects of the various embodiments is shown;

[0010] Figure 2 A system for modeling piecewise equivariance in point neural networks in accordance with various embodiments is shown, the system including Figure 1 a training engine and an execution engine of

[0011] Figure 3A A representation of a machine learning model in accordance with various embodiments is shown; Figure 2

[0012] Figure 3B A representation of a machine learning model in accordance with various embodiments is shown;​Figure 2 The process of predicting partitions associated with the equivariant layer of the machine learning model;

[0013] Figure 4A A flowchart is shown, according to various embodiments, of a method for generating object recognition results using partitioning prediction for points included in a scene;

[0014] Figure 4B A flowchart is shown, according to various embodiments, of a method for generating partition predictions using an equivariant layer included in a neural network;

[0015] Figure 5A These are illustrations of example autonomous vehicles according to some embodiments of the present disclosure;

[0016] Figure 5B According to some embodiments of this disclosure Figure 5A Examples of camera positions and fields of view for autonomous vehicles;

[0017] Figure 5C According to some embodiments of this disclosure Figure 5A A block diagram of an example system architecture for an example autonomous vehicle;

[0018] Figure 5D Cloud-based servers and according to some embodiments of this disclosure Figure 5A A system diagram illustrating communication between autonomous vehicles;

[0019] Figure 6 This is a block diagram of an example computing device suitable for implementing some embodiments of the present disclosure; and

[0020] Figure 7 This is a block diagram of an example data center applicable to implementing some embodiments of this disclosure. Detailed Implementation

[0021] Systems and methods related to piecewise equivariance modeling in point neural networks are disclosed. While these may be relative to an exemplary autonomous vehicle or semi-autonomous vehicle or machine 500 (or, herein referred to as "vehicle 500," "ego-vehicle 500," "machine 500," or "ego-machine 500"), relative to... Figures 5A-5DThe present disclosure is described in terms of its examples, but this is not intended to limit. For example, the systems and methods described herein can be used by, without limitation, non-autonomous vehicles or machines, semi-autonomous vehicles or machines (e.g., in one or more adaptive driver assistance systems (ADAS)), autonomous vehicles or machines, driving and non-driving robots or robotic platforms, warehouse vehicles, off-road vehicles, vehicles coupled to one or more trailers, dirigibles, ships, shuttles, emergency response vehicles, motorcycles, electric or motorized bicycles, aircraft, construction vehicles, underwater vehicles, drones, and / or other vehicle types. Moreover, although the present disclosure can be described with respect to three-dimensional (3D) object recognition tasks, this is not intended to be limiting, and the systems and methods described herein can be used for augmented reality, virtual reality, mixed reality, robotics, security and surveillance, generative AI, synthetic data generation and simulation, autonomous or semi-autonomous machine applications, and / or any other technical space in which object recognition can be used.

[0022] As discussed herein, 3D recognition tasks should be equivariant or consistent with respect to rotation, translation, and / or other movement of scenes and / or objects within the scenes. However, existing point neural networks tend to fail to model equivariants at a per-object level because the objects need to be recognized to generate consistent predictions about movement of the objects, and vice versa.

[0023] To address the above limitations, the disclosed technology trains and executes neural networks to generate machine learning predictions that are equivariant with respect to input data segments that include point clouds and / or other collections of 3D points. In this context, segment equivariance refers to the ability of the neural network to perform object detection, classification, segmentation, and / or other tasks consistently with respect to rigid motion of scenes and / or individual objects represented by the input data.

[0024] More specifically, the neural network includes a series of equivariant neural network layers that implement a segment equivariant function for iteratively updating predictions that partition the input data into different moving parts. The equivariant layers include a backbone that extracts features associated with a set of points in the input data and a component that transforms the features into equivariant features. The equivariant features are used to compute parameters that represent partitions and / or parts associated with the points, and the parameters are updated over multiple iterations. The parameters can also be used to merge partitions that are likely to transform together, resulting in gradual coarsening of the partitions across the equivariant layers. The final partitions output by a last equivariant layer of the neural network can then be used to generate a classification, segmentation, object detection, and / or another object recognition result associated with the points.

[0025] One technical advantage of the disclosed technology over existing approaches is improved ability to handle per-object symmetries in three-dimensional (3D) object detection tasks by using an equivariant layer in a neural network that converts from finer partitions of a set of input points representing a 3D scene to coarser partitions of those input points. Another technical advantage of the disclosed technology is the ability to bound errors associated with piecewise equivariance in a set of approximating input points. As such, the disclosed technology improves the ability of a neural network to generalize to objects associated with different orientations, positions, configurations, and / or other combinations of Euclidean motions. Further, because the disclosed technology improves performance and / or reduces errors associated with piecewise equivariance in approximating input points, the disclosed technology improves performance of a neural network on classification, segmentation, and / or other object recognition tasks.

[0026] Figure 1 A computing device 100 configured to implement one or more aspects of the various embodiments is shown. In at least one embodiment, the computing device 100 includes a desktop computer, a laptop computer, a smartphone, a personal digital assistant (PDA), a tablet computer, a server, one or more virtual machines, and / or any other type of computing device configured to receive input, process data, and optionally display images and suitable for practicing one or more embodiments. The computing device 100 is configured to run a training engine 122 and an execution engine 124, which can reside in memory 116. Note that the computing device described herein is illustrative and any other technically feasible configuration falls within the scope of the present disclosure. For example, multiple instances of the training engine 122 and the execution engine 124 can be executed on a set of nodes in a distributed and / or cloud computing system to implement the functionality of the computing device 100.

[0027] In one embodiment, computing device 100 includes, without limitation, an interconnect (bus) 112 connecting one or more processors 102, an input / output (I / O) device interface 104 coupled to one or more input / output (I / O) devices 108, a memory 116, a storage 114, and / or a network interface 106. Processors 102 can include any suitable processor(s) implemented as central processing units (CPUs), graphics processing units (GPUs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), artificial intelligence (AI) accelerators, parallel processing units (PPUs), data processing units (DPUs), any other type of processing unit, or a combination of different processing units (e.g., a CPU configured to operate in conjunction with a GPU). In general, one or more processors 102 can include any technically feasible hardware unit capable of processing data and / or executing software applications. Further, in the context of the present disclosure, computing elements shown in computing device 100 can correspond to physical computing systems (e.g., systems in a data center) and / or can correspond to virtual computing instances executing within a computing cloud.

[0028] In at least one embodiment, I / O devices 108 include devices capable of receiving input, such as a keyboard, mouse, touchpad, VR / MR / AR headset, gesture recognition system, and / or microphone, and devices capable of providing output, such as a display device and / or speaker. Moreover, I / O devices 108 can include devices capable of both receiving input and providing output, such as a touchscreen, a universal serial bus (USB) port, etc. I / O devices 108 can be configured to receive different types of input from an end user (e.g., a designer) of computing device 100 and also provide different types of output to the end user of computing device 100, such as displayed digital images or digital video or text. In some embodiments, one or more I / O devices 108 are configured to couple computing device 100 to a network 110.

[0029] In one embodiment, network 110 is any technically feasible type of communication network that allows for the exchange of data between computing device 100 and internal, local, remote, or external entities or devices, such as a network server or another networked computing device. For example, network 110 can include a wide area network (WAN), a local area network (LAN), a wireless (e.g., WiFi) network, and / or the Internet, etc.

[0030] In at least one embodiment, storage 114 includes non-volatile storage for applications and data, and can include fixed or removable magnetic, optical, or solid-state storage devices, and CD-ROM, DVD-ROM, Blu-Ray, HD-DVD, or other magnetic, optical, or solid-state storage devices. Training engine 122 and execution engine 124 can be stored in storage 114 and loaded into memory 116 when executed by one or more processors 102.

[0031] In one embodiment, memory 116 includes a random access memory (RAM) module, a flash memory unit, and / or any other type of memory unit or combination thereof. Processors 102, I / O device interface 104, and network interface 106 can be configured to read data from and write data to memory 116. Memory 116 can include different software programs that can be executed by processors 102, as well as application data associated with the software programs including training engine 122 and execution engine 124.

[0032] Training engine 122 includes functionality for training a machine learning model to model a segmentation equivariance in a set of input points. In some embodiments, segmentation equivariance refers to the ability of the machine learning model to generate predictions that are consistent with respect to rotation, translation, and / or other rigid motion of a two-dimensional (2D) and / or three-dimensional (3D) scene represented by the set of input points and / or individual objects represented by different subsets of the input points.

[0033] Execution engine 124 includes functionality for executing the trained machine learning model to generate a partition prediction representing a segmentation of a 3D scene represented by a set of points into discrete subsets of points corresponding to segmentation equivariance regions. During execution of the trained machine learning model, execution engine 124 can use a combination of equivariant layers within the trained machine learning model to iteratively generate increasingly coarse partition predictions, where a given partition prediction is generated by a layer from a partition prediction output by a previous layer. Execution engine 124 can additionally use the trained machine learning model to generate a classification, semantic segmentation, and / or another type of object recognition result associated with the set of points. Operations of training engine 122 and execution engine 124 are described in more detail below.

[0034] Figure 2 FIG. 1 illustrates a system for modeling a segmentation equivariance in a set of input points according to various embodiments. Figure 1of the training engine 122 and the execution engine 124. As referred to herein, the training engine 122 and the execution engine 124 include functionality for training and executing a machine learning model 208 to model segmentation equivariance in a set of points 216 representing a scene 214. For example, the training engine 122 and the execution engine 124 can be used to train and execute a point neural network that processes a set of input points 216 included in a point cloud, a mesh, and / or another representation of a 2D and / or 3D scene 214 in a segmentation equivariant manner.

[0035] In some embodiments, the operation of the machine learning model 208 is represented by a function h : U → W, where U and W represent vector spaces of input and output domains, respectively. The input vector space can include the form where n represents the number of points 216 in a given scene 214 (e.g., from a point cloud), d represents the dimension of a point embedding space (e.g., for a 3D space, d = 3), and each point includes two per-point features of spatial position and an oriented normal vector.

[0036] In the case of classification, the output vector space can be or in the case of segmentation, the output vector space can be To incorporate symmetry into the machine learning model 208, the group G can include actions g on the vector spaces U and W. In some embodiments, G includes the Euclidean motion group G = E(d) defined by rotations, reflections, and translations in a d-dimensional space. The group action on a set of input points 216 X e U is defined by g · X = XR T +1t T where g = (R, t) is an element in E(d), and the action on the output Y e W varies depending on the task (e.g., for classification, g · Y = Y).

[0037] In some embodiments, the operation of the machine learning model 208 (e.g., as represented by the function h) is equivariant with respect to G:

[0038]

[0039] That is, the output generated by the machine learning model 208 from an input that includes an action g on the input points 216 X should produce the same result as the action on the output generated by the machine learning model 208 from the input points 216 alone.

[0040] In one or more embodiments, the machine learning model 208 includes an encoder 204 and a decoder 206. The encoder 204 can be represented by e: U→V and transforms an input in U into a learnable latent representation V. For example, V can include an E(3) equivariant latent space up to order 1, in the form where a and b are positive integers. The decoder can be represented by d: V→W and decodes the latent representation generated by the encoder 204 into a desired output response, which can be invariant or equivariant to the input. One or both of the encoder 204 and the decoder 206 can be modeled as a composition of multiple invariant or equivariant layers 232.

[0041] More specifically, the equivariant layers 232 are used to generate partition predictions 230 associated with an input point 216 X e U. Each partition prediction is modeled as a conditional probability distribution Q Z|X ∈(∑ k ) n (where ∑ k represents k probability simplices). Furthermore, (where Z1= 1) represents a partitioning from Q Z|X (i.e., Z ~ Q Z|X ) and Z * represents the unknown true partitioning of X.

[0042] A measure of the probability of drawing a“bad” (i.e., inapt) subpartition of Z * includes the following:

[0043]

[0044] In this context, a reference partition prediction model Q simple can be defined by a uniform drawing of partitions for which Ze j > 0 for each j e [k], where is a standard basis in . An important property of Q simple is that λ(Q simple )→ 0 as k→ n, as larger values of k result in fewer points per part and the probability of a given drawn point producing an incorrect subpartition decreases as k increases.

[0045] Because λ(Q simple ) serves as a bound on the equivariance approximation error of the machine learning model 208 (or equivariant layers in the machine learning model 208), the following can be used to characterize Q:

[0046] δ(Q)→ 0 whenever Q→ Q v (3)

[0047] Q v ∈{0,1} n×k ∩(∑ k ) n and In other words, δ measures the uncertainty of the partition prediction 230 generated by the machine learning model 208.

[0048] Furthermore, machine learning model 208 can be designed to satisfy the following conditions:

[0049] lim infλ(Q)=λ(Q simple (4) When δ(Q)→0

[0050] That is, as the machine learning model 208 becomes more certain in how it draws partitions, the probability of drawing a "bad" partition converges to no greater than Q. simple The probability difference. The uncertainty measured by the function δ can be used to define the error of the isovariant approximation.

[0051] In some embodiments, the segmented E(d) isomorphic layer is described relative to a fixed Z-partition by setting G = E(d) × ... × E(d) to be the product of k copies of the Euclidean motion group. For g = (g1, ..., g k For any given region G, the following definitions apply:

[0052]

[0053] In the above equation, yes The standard base in, 1 d yes The vector containing all 1s, and ⊙ represents the Hadamard product between two matrices.

[0054] In one or more embodiments, an E(d) equivariant backbone (e.g., a feature extractor) ψ shared between parts is used. b ∶U→U′ is an equivariant function of piecewise E(d) ψ∶U×{0,1} n×k →U′ is modeled, and the piecewise E(d) is an isovariant function ψ∶U×{0,1} n×k →U′ also adheres to the symmetry of inheritance order in partial assignment, which takes the following form:

[0055]

[0056] Where ψ∶U×{0,1} n×k →U′, g∈G and σ k (·) permutation on [k]:

[0057] ψ(g · (X, Z)) = g · (ψ(X, Z), Z)

[0058] ψ(X, Z') = ψ(X, Z)

[0059] for any X ∈ U, Z ∈ {0, 1} n×k and Z' = Z ；σ(i) .

[0060] Using the above, Q Z|X can be incorporated into the equivariant layer by marginalizing over possible Z. In some embodiments, this marginalization is performed using where This allows for uniform control of the equivariance approximation error as a function of Q, without relying on a bound on the variation of φ. Further, the equivariance approximation error induced by Q can be explicitly controlled by choosing a hyperparameter in the parameterization of Q.

[0061] More specifically, if φ: U → U' is a bounded function, where |φ| ≤ M and satisfies Equations 3 and 4 with respect to Q, then φ is a (G, Q) equivariant function, provided that for any X ∈ U, for all g ∈ G the following is satisfied:

[0062]

[0063] The set of (G, Q) equivariant functions is denoted by .

[0064] The characterization of the equivariance approximation error in Equation 7 can arise from two sources of properties in the machine learning model 208. The first source includes an intrinsic source captured by δ and measuring the uncertainty of the model Q, and the second source includes an extrinsic source determined by a quantity independent of Q and captured by λ. This characterization also generalizes the notion of the class of exact equivariant functions. For example, if for some fixed j, a given Z * satisfies Z * e j = 1, then setting δ≡0 makes consistent with the class of global E(d) equivariant functions.

[0065] In other words, if φ: U → U' has the form:

[0066]

[0067] where and ψ b : U → U' is an E(d) equivariant trunk, then

[0068] In some embodiments, Q is generated by a given equivariant layer in the machine learning model 208 from the segmented equivariant predictions from a previous equivariant layer in the machine learning model 208. For the first layer, Q = Q simple . A given equivariant layer in the given machine learning model 208 is given an output in the form corresponding to Equation 8, the subsequent partition prediction Q pred can be set to the assigned score resulting from partitioning (i.e., clustering) the per-point predictions of the Q segmented equivariants. This is analogous to an attention layer with a query, key, and value structure, where φ(X) corresponds to the value and query, the part centers correspond to the key, and Q pred is proportional to the matching score between the query and key. Because Q pred is an unordered partition prediction relative to the possible part assignments, the optimization domain associated with the machine learning model 208 is simplified.

[0069] Further, the part centers corresponding to the key can be set to the minimizer of the energy that is invariant to the Q segmented E(d) deformations of the φ(X) values. In some embodiments, when denotes the first equivariant per-point prediction in (X) e U', and denotes the base prediction part center, corresponding to the individual partition prediction 230 of Q pred is defined with this base prediction part center, can be defined as the minimizer of an energy function that includes the negative log-likelihood of a Gaussian Mixture Model (GMM) and a regularization term that constrains the Kullback-Leibler (KL) divergence between all pairs of Gaussians in the GMM to be greater than some threshold. Further, when denotes the distribution of the GMM parameterized by a, the log-likelihood is where denotes the density of an isotropic Gaussian random variable with variance σ j I at the center μ 2 I. In some embodiments, σ is fixed (e.g., as a hyperparameter).

[0070] In view of the above, can be defined as:

[0071]

[0072] The respective partition predictions

[0073]

[0074] The above construction yields that as σ→ 0, (i) λ.Q pred → λ(Q simple ) (as each stochastic partition is a minimizer of the likelihood function) and (ii) δ.Q pred → 0. Furthermore, σ controls the sensitivity of the Gaussian amalgamation (at fixed coefficient τ), where larger values encourage wider distributions of the Gaussian representation values y i . Thus, setting an increasing sequence of σ values across isometric layers 232 supports a stepwise coarsening of partition prediction 230.

[0075] In one or more embodiments, the following representation is used for an isometric backbone ψ b associated with machine learning model 208:

[0076]

[0077] In the above equation, Z is a known partition, and denotes a shared PointNet network that processes an unordered input point set using an input transformation and a feature transformation and aggregates point features using max-pooling. The PointNet network is combined with a frame averaging (FA) technique, where the frame corresponds to a non-empty subset of the group G = E(3) for each element in the vector space. An arbitrary mapping φ : V → W can be made isometric by averaging over isometric frames:

[0078]

[0079] where is the FA symmetrization operator.

[0080] Continuing the discussion of Equation 11, corresponds to a construction of E(d) frames using principal component analysis (PCA). In this PCA-based construction, the frame is defined by setting to the centroid of X and setting to the covariance matrix computed after removing the centroid from X. In this general case, the eigenvalues of C satisfy λ1< λ2<... < λ d d In the case where vi, v2,..., v d denotes the unit length of the corresponding eigenvector, the frame is defined as The size of this frame (when defined) is 2 d which totals 4, 8 for typical dimensions d = 2, 3, respectively. Given this construction, ψ(X, Z) is defined exactly as in Equation 6.

[0081] To support layers with a relatively large number of partial k, ψ b This can be achieved using sparse tensors and / or generalized sparse convolutions. Furthermore, as this paper compares to… Figure 3A As discussed in further detail, encoder 204 and / or decoder 206 can be implemented using a composition of one or more equivariant layers 232.

[0082] Figure 3A The various embodiments are shown. Figure 2 The representation of machine learning model 208. For example... Figure 3A As shown, the operation of the i-th equivariant layer 302 in the machine learning model 208 is determined by φ i (X) represents and corresponds to the partition prediction Q applied to the output of the previous isovariant layer. i-1 One or more isovariant functions. The isovariant features 234 output by the i-th isovariant layer 302 are used to generate the corresponding partition prediction 304Q. pred Furthermore, the machine learning model 208 includes L equivariant layers. The composition 306, thereby enabling the piecewise isovariant prediction based on the previous isovariant layer to generate the partitioned prediction 304 produced by the given isovariant layer and setting the input to φ1 as Q. simple .

[0083] For example, machine learning model 208 may include multiple equivariant layers 232, each of which has the following form:

[0084]

[0085] In this example, encoder 204 may include four equivalent layers 232 of the following series (i.e., L = 4):

[0086] APEN(n,0,2,17,5)→APEN(n,17,5,17,5)→APEN(n,0,2,17,5)→APEN(n,0,2,65,21)

[0087] The decoder 206 used for the segmentation task may include the following equivalent layers:

[0088] APEN(n,65,21,24,0)

[0089] The decoder 206 for the classification task may include the following equivalent layers:

[0090] APEN(1,65,21,9,0)

[0091] Each APEN layer can be built on an equivariant backbone implemented using FA, enabling point network... Symmetrical. A dotted network can include layers of the following forms:

[0092]

[0093]

[0094] where is a learnable parameter, is an all-ones vector, [.] is a concatenation operator, e i is a standard basis in Rm, and v is a ReLU activation.

[0095] The first APEN layer in the encoder 204 can include the following architecture:

[0096]

[0097] The second and third APEN layers in the encoder 204 can include the following architecture:

[0098]

[0099] The fourth APEN layer in the encoder 204 can include the following architecture:

[0100]

[0101] Returning to the discussion of Figure 2 , the execution engine 124 performs a plurality of iterations 228 that transform the points 216 in the scene 214 into object recognition results 240 via partition predictions 230, equivariant features 234 generated by equivariant layers 232 in the machine learning model 208, and merging 236 of portions associated with the partition predictions 230. One or more (e.g., each) of the iterations 228 can involve inputting partition predictions associated with a previous equivariant layer into a current equivariant layer (or inputting Q simple into a first equivariant layer), generating a set of equivariant features 234 via the current equivariant layer, and performing merging 236 of portions associated with the equivariant features 234 into a coarser partition prediction.

[0102] In one or more embodiments, the execution engine 124 uses a modified expectation maximization (EM) technique to perform the merging 236 of portions into the coarse partition predictions 230. This modified EM technique can be performed in a manner that minimizes Equation 9, as described in further detail herein with respect to Figure 3B .

[0103] Figure 3B illustrates a procedure for generating a partition prediction associated with an equivariant layer of the machine learning model 208 of Figure 2 , in accordance with various embodiments. More specifically, Figure 3BThis shows the initial set used to perform the prediction of each point of the isovariate. The procedure to merge 236 into a coarser partition.

[0104] like Figure 3B As shown, the program begins at line 332, which defines its input as Y, the merging threshold τ>0, and the merging frequency f. At line 334, the program sets the variable i to 0. At line 336, the program uses a random farthest point sampling technique to set a set of initial partial centers μ. j At line 338, the initial mixing coefficient π represents the weights of the corresponding part in the GMM. j Set to uniform value

[0105] At line 340, the program enters a while loop, which continues as long as i is less than the maximum number of iterations. At lines 342, 344, and 346, the program calculates the parameter γ, respectively. ij μ j and π j More specifically, line 342 uses μ j and π j The value of γ is used to calculate the value of iteration i. ij Line 344 utilizes γ ij To calculate μ j The updated value, and line 346 uses γ. ij To calculate π j The updated value.

[0106] At line 348, the program determines whether the remainder of the current iteration i divided by the merging frequency f is equal to 0. If this condition is met, the program executes lines 350, 352, 354, 356, 358, 360, 362, 364, and 366. If the condition is not met, the program skips lines 350, 352, 354, 356, 358, 360, 362, 364, and 366. As a result, the condition in line 348 is used to execute lines 350, 352, 354, 356, 358, 360, 362, 364, and 366 in every f-th iteration.

[0107] In lines 350 and 352, the program sets the distance d to the lowest KL divergence between a pair of Gaussians represented by j and j′ in the GMM. In lines 354, 356, 358, 360, 362, and 364, if the corresponding KL divergence falls below the merging threshold τ, the program executes a while loop to merge the pair of Gaussians. Inside the while loop, lines 356 and 358 are used to combine the mixing coefficient π for j′. j The '' is combined into the mixing coefficient π for j. jLine 360 and line 362 are used to update the distance d for the next lowest KL divergence. The while loop repeats for a new pair of Gaussians associated with the updated distance d until d is equal to or greater than τ.

[0108] In line 368, the program increments the iteration i. The program also repeats the while loop of lines 340, 342, 344, 346, 348, 350, 352, 354, 356, 358, 360, 362, 364, 366, 368, and 370 to maximize the likelihood of the partition prediction 230 by updating the parameters γ ij j and π j in each iteration and merging the pairs of Gaussians every fth iteration until i reaches the maximum number of iterations.

[0109] In lines 372, 374, and 376, the program computes the final part centers, mixing coefficients, and partition prediction 230 of the equivariant layer. In line 378, the program outputs the partition prediction 230 as the value of the differential minimization of energy defined in equation 9.

[0110] Returning to the discussion of Figure 2 The training engine 122 trains the machine learning model 208 (e.g., updates one or more parameters of the machine learning model 208) using the training data 202 including one or more sets of training points 210 and one or more corresponding sets of ground truth partitions 212. More specifically, the training engine 122 inputs the training points 210 representing one or more scenes into the encoder 204 of the machine learning model 208. The encoder 204 converts each set of training points 210 into one or more training embeddings 218, and the decoder 206 converts the training embeddings 218 into training decoder outputs 222 corresponding to classification, semantic segmentation, and / or another type of object recognition results associated with the input training points 210.

[0111] The training engine 122 computes one or more losses 220 between the training partition predictions 224 output by the equivariant layer 232 of the encoder 204 and / or the decoder 206 and the corresponding ground truth partitions 212 in the training data 202. In some embodiments, the ground truth partitions 212 The training partition predictions 224 for the lth layer are used to supervise the training of the equivariant layer 232. More specifically, the segmentation information can be used to compute Y GT = ZC T - X, where Z e {0, 1} n×k is the ground truth assignment of ​​The center of the minimum bounding box that encloses each of the input portions is computed. The L1 loss computed between the training partition predictions 224 and the ground truth partition 212 at each layer can then be used to train the machine learning model 208:

[0112]

[0113] The training engine 122 can also or instead compute one or more losses 220 between the training decoder outputs 222 generated by the machine learning model 208 from a given set of training points 210 and respective ground truth classification, semantic segmentation, and / or object recognition results (not shown) that can be separate from the ground truth partition 212. These losses 220 can be used to perform additional supervised training of the machine learning model 208 in combination with and / or separately from the losses 220 computed between the training partition predictions 224 and the ground truth partition 212 associated with the equivariant layer 232 of the machine learning model 208.

[0114] During training, the modified EM technique used to perform the merging 236 of the portions into the coarser partition predictions 230 involves the use of backwards computation of derivatives. To mitigate the increase in the computational graph associated with such back computation during the iterative EM procedure, an implicit differentiation based construction can be used. More specifically, The minimization of equation 9 can be represented as where Further, using the following definition of a:

[0115]

[0116] where is the Fisher information matrix computed at Using this construction, I depends only on s and does not involve second order derivative computation. Thus, a is the minimization of equation 9, and where E(·) represents the energy defined in equation 9.

[0117] After the training of the machine learning model 208 is complete, the execution engine 124 can use the trained machine learning model 208 to generate object recognition results 240 from a set of points 216 in a given scene 214. As described above, the execution engine 124 performs multiple iterations 228 that transform the points 216 in the scene 214 into the object recognition results 240 via partitioned predictions 230, equivariant features 234 generated by the equivariant layers 232 in the encoder 204 and the decoder 206 of the machine learning model 208, and merging 236 of portions associated with the partitioned predictions 230. The execution engine 124 then obtains the object recognition results 240 as an output of the decoder 206.

[0118] It should be appreciated that this and other arrangements described herein are set forth only as examples. Other arrangements and elements (e.g., machines, interfaces, functions, orders, groupings of functions, etc.) can be used in addition to or instead of those shown, and some elements can be wholly omitted or consolidated. Further, many of the elements described herein are functional entities that can be implemented as discrete or distributed components or in conjunction with other components, and in any suitable combination and location of hardware, firmware, and / or software. Various functions described herein as being performed by entities can be carried out by hardware, firmware, and / or software. For instance, various functions can be implemented by a processor executing instructions stored in memory. In some embodiments, the systems, methods, and procedures described herein can be used with any one or combination of the example autonomous vehicles 500, Figures 5A-5D the example computing devices 600, and / or Figure 6 the example data centers 700. Figure 7

[0119] Referring now to Figures 4A-4B each block of the methods 400 and 450 described herein includes a computational procedure that can be performed using any combination of hardware, firmware, and / or software. For example, different functions can be implemented by a processor executing instructions stored in memory. The methods can also be implemented as computer-usable instructions stored on a computer storage medium. The methods can be provided by a standalone application, a service, or a hosted service (standalone or in combination with another hosted service) or a plug-in to another product, to name a few. Further, the methods 400 and 450 are described with respect to the system of Figures 1-2 However, these methods can additionally or alternatively be performed by any one system or any combination of systems, including but not limited to those described herein.

[0120] Figure 4A A flowchart illustrating a method 400 for generating object recognition results using partitioned predictions for points included in a scene is shown in accordance with various embodiments. As Figure 4A ​As shown, the method 400 begins at operation 402, where the training engine 122 determines training data including one or more sets of training points and one or more corresponding sets of ground truth segmentations of the training points. The training points can include point clouds, meshes, and / or 3D points in other representations of real and / or synthetic objects and / or surfaces in one or more scenes. The ground truth segmentations can include segmenting the training points into discrete portions, objects, and / or other units.

[0121] At operation 404, the training engine 122 trains the neural network including the series of equivariant layers based on one or more losses computed between segmentations predicted from the training points by the equivariant layers and the corresponding ground truth segmentations. For example, the training engine 122 can use each equivariant layer to generate a segmentation prediction including centers of portions to which points have been assigned. The training engine 122 can compute an LI loss and / or another type of loss between the segmentation prediction and ground truth centers of the portions computed from the ground truth segmentations. The training engine 122 can then update parameters of the machine learning model in a manner that reduces the loss using a training technique, such as gradient descent and backpropagation. During this training technique, the training engine 122 can compute derivatives associated with a minimization value of an energy function including a log-likelihood of the GMM and / or a regularization term associated with one or more distances computed between pairs of Gaussians included in the GMM. The derivatives can be computed based on a Fisher information matrix and / or a score function associated with the minimization value of the energy function.

[0122] At operation 406, the execution engine 124 determines an initial segmentation prediction including a set of points in a scene. For example, the execution engine 124 can receive a set of points as a point cloud, mesh, and / or another 3D representation of a scene. The execution engine 124 can also generate the initial segmentation prediction as a Q simple .

[0123] At operation 408, the execution engine 124 generates one or more additional segmentation predictions for the set of points via execution of the equivariant layers in the trained neural network. For example, the execution engine 124 can use a combination of the equivariant layers in the trained neural network to generate features associated with each segmentation prediction and / or to merge portions associated with previous segmentation predictions into coarser segmentations, as described in further detail below with respect to FIG. 5. Figure 4B

[0124] ​In operation 410, the execution engine 124 determines a set of piecewise equivariant regions in the scene based on the one or more additional partition predictions. For example, the execution engine 124 can obtain parameters defining a GMM and / or another type of conditional probability distribution representing a piecewise equivariant region to which a point belongs from one or more of the equivariant layers.

[0125] In operation 412, the execution engine 124 generates object recognition results associated with the set of points based on the piecewise equivariant regions. For example, the execution engine 124 can use a decoder in the neural network to convert the piecewise equivariant regions into classification results, segmentation results, and / or object detection results. The execution engine 124 can also or instead generate the object recognition results by sampling from the conditional probability distributions representing the piecewise equivariant regions.

[0126] In operation 414, the execution engine 124 determines whether to continue generating object recognition results. For example, the execution engine 124 can determine that object recognition results should continue to be generated while a set of additional points are received (e.g., during operation of a vision system, an autonomous vehicle, a robot, a cloud computing system, a computing device, a mobile device, and / or another type of environment in which the execution engine 124 operates). While the execution engine 124 determines that generation of object recognition results is to continue, the execution engine 124 repeats operations 406, 408, 410, 412, and 414 for additional sets of points from the same scene and / or different scenes. The execution engine 124 can continue to perform operations 406, 408, 410, 412, and 414 until the trained neural network and / or the execution engine 124 is no longer used to perform an object recognition task.

[0127] Figure 4B A flowchart illustrating a method 450 for generating partition predictions using (at least) equivariant layers of a neural network is shown in accordance with various embodiments. As Figure 4B shown, the method 450 begins at operation 452, where the execution engine 124 generates a set of features associated with a partition prediction of a set of points included in a scene via one or more layers included in a backbone in a neural network. For example, the execution engine 124 can input a representation of the partition prediction and / or the points into a pointnet backbone including one or more fully connected layers and / or max pooling layers. The pointnet backbone can convert the input representation into features associated with the partition prediction and / or the points.

[0128] In operation 454, the execution engine 124 applies one or more transformations included in the frames associated with the points to the features to generate a set of equivariant features. For example, the execution engine 124 can use FA techniques to generate equivariant features by averaging the features over the one or more equivariant frames.

[0129] In operation 456, the execution engine 124 determines a set of parameters associated with the partition prediction based on the equivariant features. For example, the execution engine 124 can initialize a portion of the centers μ j and the initial mixing coefficients π j . The execution engine 124 can also use the initialized portion of the centers and mixing coefficients to compute the parameters represented by γ ij . The execution engine 124 can then update μ ij and π j based on the equivariant features and / or the values of γ ij . The execution engine 124 can repeat the process of updating each of γ j , μ j and π TM based on the values of one or more other parameters over a number of iterations.

[0130] In operation 458, the execution engine 124 periodically merges at least a subset of the portions associated with the partition prediction based on one or more distances computed using the parameters. Continuing the above example, the execution engine 124 can merge the portions at a particular frequency (e.g., every fthiteration). During operation 458, the execution engine 124 can compute another measure of the distance between the KL divergences and / or the distance between the distributions and / or other representations of the portions. The execution engine 124 can also merge two portions when the respective distance falls below a threshold.

[0131] In operation 460, the execution engine 124 determines whether to continue updating the parameters and merging the portions. For example, the execution engine 124 can determine that the parameters and portions are to be updated and merged, respectively, for a number of iterations. The execution engine 124 repeats operations 456, 458 and 460 while the execution engine 124 determines that the parameters and portions should continue to be updated and merged, respectively.

[0132] When the execution engine 124 determines in operation 460 that the update parameters and merge portion are to be interrupted (e.g., after a maximum number of iterations has been reached), the execution engine 124 performs operation 462 in which the execution engine 124 generates an updated partition prediction based on the updated set of parameters. For example, the execution engine 124 can compute updated portion centers and mixing coefficients associated with the updated partition prediction by minimizing an energy function that includes a log-likelihood of the GMM representing the partition and a regularization term that constrains the KL divergence between all pairs of Gaussians in the GMM to be greater than a threshold. The execution engine 124 can then use the updated portion centers, updated mixing coefficients, and / or points to define Gaussians in the updated partition prediction.

[0133] The execution engine 124 can repeat operations 452, 454, 456, 458, 460, and 462 for each equivariant layer in the neural network such that the partition prediction output by a given equivariant layer is input into the next equivariant layer and transformed into a coarser partition prediction by the next equivariant layer. For example, the execution engine 124 can perform operations 452, 454, 456, 458, 460, and 462 using a series of equivariant layers included in an encoder and a decoder within the neural network. The encoder can transform points into latent representations, and the decoder can transform latent representations into object recognition results that are invariant or equivariant to the points.

[0134] The systems and methods described herein can be used by, but are not limited to, non-autonomous vehicles, semi-autonomous vehicles (e.g., in one or more adaptive driver assistance systems (ADAS)), driven and un-driven robots or robotic platforms, warehouse vehicles, off-road vehicles, vehicles coupled to one or more trailers, dirigibles, ships, shuttles, emergency response vehicles, motorcycles, electric or motorized bicycles, aircraft, construction vehicles, underwater vehicles, drones, and / or other vehicle types. Further, the systems and methods described herein can be used for various purposes, such as, by way of example and not limitation, machine control, mechanical motion, mechanical drive, synthetic data generation, model training, perception, augmented reality, virtual reality, mixed reality, robotics, security and surveillance, simulation and digital twin, autonomous or semi-autonomous machine applications, deep learning, environmental simulation, object or actor simulation and / or digital twin, data center processing, conversational AI, generative AI, light transport simulation (e.g., ray tracing, path tracing, etc.), collaborative content creation for 3D assets, systems for performing generative AI operations, systems implementing one or more language models (such as one or more large language models (LLMs) and / or one or more visual language models (VLMs)), cloud computing, and / or any other suitable application.

[0135] The disclosed embodiments can be included in various different systems, such as automotive systems (e.g., control systems for autonomous or semi-autonomous machines, perception systems for autonomous or semi-autonomous machines), systems implemented using robots, aerial systems, medical systems, boating systems, smart area surveillance systems, systems for performing deep learning operations, systems for performing simulation operations, systems for performing digital twin operations, systems implemented using edge devices, systems including one or more virtual machines (VMs), systems for performing synthetic data generation operations, systems implemented at least partially in a data center, systems for performing conversational AI operations, systems for performing optical transport simulation, systems for performing collaborative content creation of 3D assets, systems implemented at least partially using cloud computing resources, and / or other types of systems.

[0136] Example autonomous vehicle

[0137] Figure 5AA diagram of an example autonomous vehicle 500 in accordance with some embodiments of the present disclosure. Autonomous vehicle 500 (alternatively referred to herein as “vehicle 500”) can include, but is not limited to, a passenger vehicle such as a car, truck, bus, ambulance, shuttle, electric or motorized bicycle, motorcycle, fire truck, police car, ambulance, boat, construction vehicle, underwater vessel, robotic vehicle, drone, airplane, vehicle coupled to a trailer (e.g., a semi-tractor-trailer truck for hauling cargo), and / or other types of vehicles (e.g., driverless and / or capable of accommodating one or more passengers). Autonomous vehicles are often described in terms of levels of automation as defined by a division of the United States Department of Transportation, the National Highway Traffic Safety Administration (NHTSA), and the Society of Automotive Engineers (SAE) “Taxonomy and Definitions for Terms Related to Driving Automation Systems for On-Road Motor Vehicles” (Standard No. J3016-201806 published June 15, 2018, Standard No. J3016-201609 published September 30, 2016, and prior and future versions of this standard). Vehicle 500 can be capable of implementing functionality consistent with one or more of Levels 3-5 of autonomous driving. Vehicle 500 can be capable of implementing functionality according to one or more of Levels 1-5 of autonomous driving. For example, depending on the embodiment, vehicle 500 can be capable of implementing driver-assistance (Level 1), partial automation (Level 2), conditional automation (Level 3), high automation (Level 4), and / or full automation (Level 5). The term “autonomous” as used herein can include any and / or all types of autonomy of vehicle 500 or other machines such as fully autonomous, highly autonomous, conditionally autonomous, partially autonomous, providing assisted autonomy, semi-autonomous, primarily autonomous, or other designations.

[0138] Vehicle 500 can include components such as a chassis, a body, wheels (e.g., 2, 4, 6, 8, 18, etc.), tires, axles, and other components of a vehicle. Vehicle 500 can include a propulsion system 550 such as an internal combustion engine, a hybrid power plant, an all-electric motor, and / or another type of propulsion system. Propulsion system 550 can be connected to a drivetrain of vehicle 500 that can include a transmission in order to effectuate propulsion of vehicle 500. Propulsion system 550 can be controlled in response to receiving a signal from a throttle / accelerator 552.

[0139] A steering system 554, which can include a steering wheel, can be used to steer the vehicle 500 (e.g., along a desired path or route) while the propulsion system 550 is operating (e.g., while the vehicle is in motion). The steering system 554 can receive signals from a steering actuator 556. For full automation (level 5) functionality, the steering wheel can be optional.

[0140] A braking sensor system 546 can be used to operate the vehicle brakes in response to receiving signals from a braking actuator 548 and / or a braking sensor.

[0141] One or more controllers 536, which can include one or more system on a chip (SoC) 504 Figure 5C ) and / or one or more GPUs, can provide signals (e.g., representing commands) to one or more components and / or systems of the vehicle 500. For example, the one or more controllers can send signals to operate the vehicle brakes via one or more braking actuators 548, to operate the steering system 554 via one or more steering actuators 556, to operate the propulsion system 550 via one or more throttle / accelerator 552. The one or more controllers 536 can include one or more on-board (e.g., integrated) computing devices (e.g., supercomputers) that process sensor signals and output operational commands (e.g., signals representing commands) to enable autonomous driving and / or to assist a human driver in driving the vehicle 500. The one or more controllers 536 can include a first controller 536 for autonomous driving functionality, a second controller 536 for functional safety functionality, a third controller 536 for artificial intelligence functionality (e.g., computer vision), a fourth controller 536 for infotainment functionality, a fifth controller 536 for redundancy in emergency situations, and / or other controllers. In some examples, a single controller 536 can handle two or more of the above functionalities, two or more controllers 536 can handle a single functionality, and / or any combination thereof.

[0142] One or more controllers 536 can provide signals for controlling one or more components and / or systems of vehicle 500 in response to sensor data (e.g., sensor inputs) received from one or more sensors. Sensor data can be received from, for example and without limitation, a global navigation satellite system (“GNSS”) sensor 558 (e.g., a global positioning system sensor), a RADAR sensor 560, an ultrasonic sensor 562, a LIDAR sensor 564, an inertial measurement unit (IMU) sensor 566 (e.g., an accelerometer, a gyroscope, a magnetic compass, a magnetometer, etc.), a microphone 596, a stereo camera 568, a wide-angle camera 570 (e.g., a fisheye camera), an infrared camera 572, a surround camera 574 (e.g., a 360-degree camera), a long and / or medium range camera 598, a speed sensor 544 (e.g., for measuring the speed of vehicle 500), a vibration sensor 542, a steering sensor 540, a brake sensor (e.g., as part of brake sensor system 546), and / or other sensor types.

[0143] One or more of controllers 536 can receive inputs (e.g., represented by input data) from an instrument cluster 532 of vehicle 500 and provide outputs (e.g., represented by output data, display data, etc.) via a human-machine interface (HMI) display 534, an audible annunciator, a speaker, and / or via other components of vehicle 500. These outputs can include information such as vehicle speed, velocity, time, map data (e.g., a high-definition (“HD”) map 522 of Figure 5C

[0144] ​The vehicle 500 further includes a network interface 524 that can communicate over one or more networks using one or more wireless antennas 526 and / or modems. For example, the network interface 524 can be capable of communicating over Long Term Evolution (“LTE”), Wideband Code Division Multiple Access (“WCDMA”), Universal Mobile Telecommunications System (“UMTS”), Global System for Mobile Communications (“GSM”), IMT-CDMA Multi-Carrier (“CDMA2000”), and / or the like. The one or more wireless antennas 526 can also enable communication between objects (e.g., vehicles, mobile devices, and / or the like) in an implementation environment using one or more local area networks such as Bluetooth, Bluetooth Low Energy (“LE”), Z-Wave, ZigBee, and / or the like and / or one or more low power wide area networks (LPWANs) such as LoRaWAN, SigFox, and / or the like.

[0145] Figure 5B For example autonomous vehicle 500 for Figure 5A An example camera position and field of view of the example autonomous vehicle 500 according to some embodiments of the present disclosure. The cameras and respective fields of view are one example embodiment and are not intended to be limiting. For example, additional and / or alternative cameras can be included and / or these cameras can be located at different positions on the vehicle 500.

[0146] The camera type for the cameras can include, but is not limited to, a digital camera that can be suitable for use with components and / or systems of the vehicle 500. The cameras can operate at Automotive Safety Integrity Level (ASIL) B and / or at another ASIL. The camera type can have any image capture rate, such as 60 frames per second (fps), 120 fps, 240 fps, and / or the like, depending on the embodiment. The cameras can be capable of using a rolling shutter, a global shutter, another type of shutter, or a combination thereof. In some examples, the color filter array can include a Red-White-White-White (RCCC) color filter array, a Red-White-White-Blue (RCCB) color filter array, a Red-Blue-Green-White (RBGC) color filter array, a Foveon X3 color filter array, a Bayer sensor (RGGB) color filter array, a monochrome sensor color filter array, and / or another type of color filter array. In some embodiments, a clear pixel camera such as a camera with a RCCC, RCCB, and / or RBGC color filter array can be used in efforts to improve light sensitivity.

[0147] In some examples, one or more of the cameras can be used to perform advanced driver assistance system (ADAS) functions (e.g., as part of a redundant or fail-safe design). For example, a multi-function monocular camera can be installed to provide functions including lane departure warning, traffic sign assist, and intelligent headlamp control. One or more (e.g., all) of the cameras can simultaneously record and provide image data (e.g., video).

[0148] One or more of the cameras can be mounted in mounting assemblies such as custom designed (three-dimensional ("3D") printed) assemblies in order to cut off stray light and reflections from within the car (such as reflections from the dashboard reflected in the windshield mirror) that can interfere with the image data capture capabilities of the cameras. With respect to wing mirror mounting assemblies, the wing mirror assemblies can be custom 3D printed such that the camera mounting plates match the shape of the wing mirror. In some examples, one or more cameras can be integrated into the wing mirror. For side view cameras, one or more cameras can also be integrated into the four pillars of each corner of the cab.

[0149] Cameras with fields of view that include the portion of the environment in front of the vehicle 500 (e.g., front-facing cameras) can be used for surround view to help identify the forward path and obstacles, and to assist in providing information critical to generating an occupancy grid and / or determining a preferred vehicle path with the help of one or more controllers 536 and / or control SoCs. Front-facing cameras can be used to perform many of the same ADAS functions as LIDAR, including emergency braking, pedestrian detection, and collision avoidance. Front-facing cameras can also be used for ADAS functions and systems, including lane departure warning ("LDW"), adaptive cruise control ("ACC"), and / or other functions such as traffic sign recognition.

[0150] A wide variety of cameras can be used in the front-facing configuration, including, for example, monocular camera platforms including complementary metal-oxide-semiconductor ("CMOS") color imagers. Another example can be a wide-angle camera 570, which can be used to perceive objects (e.g., pedestrians, intersection traffic, or bicycles) entering the field of view from the periphery. Although Figure 5B Although only one wide-angle camera is illustrated in FIG. 5, there can be any number (including zero) of wide-angle cameras 570 on the vehicle 500. In addition, any number of long-range cameras 598 (e.g., long-view stereo camera pairs) can be used for depth-based object detection, especially for objects for which a neural network has not been trained. Long-range cameras 598 can also be used for object detection and classification and basic object tracking.

[0151] Any number of stereo cameras 568 can also be included in the front-facing configuration. In at least one embodiment, one or more stereo cameras 568 can include an integrated control unit that includes a scalable processing unit that can provide a multi-core microprocessor with an integrated Controller Area Network ("CAN") or Ethernet interface and a field programmable gate array ("FPGA") on a single chip. Such a unit can be used to generate a 3D map of the vehicle's environment, including distance estimates for all points in the image. Alternative stereo cameras 568 can include a compact stereo vision sensor that can include two camera lenses (one on the left and one on the right) and an image processing chip that can measure the distance from the vehicle to a target object and use the generated information (e.g., metadata) to activate autonomous emergency braking and lane departure warning functions. Other types of stereo cameras 568 can be used in addition to or instead of those described herein.

[0152] Cameras with fields of view that include portions of the environment to the side of the vehicle 500 (e.g., side-view cameras) can be used for surround view, providing information used to create and update the occupancy grid and to generate side-crash collision warnings. For example, surround cameras 574 (e.g., four surround cameras 574 as shown in FIG. 6B) can be placed on the vehicle 500. The surround cameras 574 can include wide-view cameras 570, fisheye cameras, 360-degree cameras, and / or the like. In one example, four fisheye cameras can be placed on the front, back, and sides of the vehicle. In an alternative arrangement, the vehicle can use three surround cameras 574 (e.g., left, right, and back), and can utilize one or more other cameras (e.g., a forward-facing camera) as a fourth surround view camera. Figure 5B

[0153] Cameras with fields of view that include portions of the environment to the rear of the vehicle 500 (e.g., rear-view cameras) can be used for assist parking, surround view, rear collision warnings, and to create and update the occupancy grid. A wide variety of cameras can be used, including but not limited to cameras that are also suitable as front-facing cameras as described herein (e.g., long- and / or mid-range cameras 598, stereo cameras 568, infrared cameras 572, etc.).

[0154] Figure 5C For use in a vehicle according to some embodiments of the present disclosure Figure 5A ​FIG. 1 is a block diagram of an example system architecture of an example autonomous vehicle 500. It should be understood that this arrangement and other arrangements described herein are set forth merely as examples. Other arrangements and elements (e.g., machines, interfaces, functions, orders, groupings of functions, etc.) can be used in addition to or instead of those shown, and some elements can be wholly omitted. Further, many of the elements described herein are functional entities that can be implemented as discrete or distributed components or in conjunction with other components, and in any suitable combinations and locations. Various functions described herein as being performed by an entity can be implemented in hardware, firmware, and / or software. For instance, various functions can be implemented by a processor executing instructions stored in a memory.

[0155] Figure 5C Each of the components, features, and systems of vehicle 500 are illustrated as being connected via a bus 502. Bus 502 can include a controller area network (CAN) data interface (alternatively referred to herein as a "CAN bus"). The CAN can be a network within vehicle 500 that is used to assist in controlling various features and functions of vehicle 500, such as the actuation of brakes, acceleration, braking, steering, windshield wipers, etc. The CAN bus can be configured to have tens or even hundreds of nodes, each with its own unique identifier (e.g., CAN ID). The CAN bus can be read to find steering wheel angle, ground speed, revolutions per minute (RPM) of the engine, button positions, and / or other vehicle status indicators. The CAN bus can be ASIL B compliant.

[0156] Although bus 502 is described herein as a CAN bus, this is not intended to be limiting. For example, FlexRay and / or Ethernet can be used in addition to or instead of a CAN bus. Further, although bus 502 is represented with a single line, this is not intended to be limiting. For example, there can be any number of buses 502, which can include one or more CAN buses, one or more FlexRay buses, one or more Ethernet buses, and / or one or more other types of buses that use different protocols. In some examples, two or more buses 502 can be used to perform different functions, and / or can be used for redundancy. For example, a first bus 502 can be used for collision avoidance functions, and a second bus 502 can be used for drive control. In any example, each bus 502 can communicate with any component of vehicle 500, and two or more buses 502 can communicate with the same components. In some examples, each SoC 504, each controller 536, and / or each computer within the vehicle can have access to the same input data (e.g., inputs from sensors of vehicle 500), and can be connected to a common bus, such as a CAN bus.

[0157] The vehicle 500 can include one or more controllers 536, such as those described herein with respect to Figure 5A The controllers 536 can be used for a wide variety of functions. The controllers 536 can be coupled to any of the other distinct components and systems of the vehicle 500 and can be used for control of the vehicle 500, artificial intelligence of the vehicle 500, infotainment for the vehicle 500, and / or the like.

[0158] The vehicle 500 can include one or more system on chips (SoCs) 504. The SoCs 504 can include CPUs 506, GPUs 508, processors 510, caches 512, accelerators 514, data stores 516, and / or other components and features not illustrated. The SoCs 504 can be used to control the vehicle 500 in a wide variety of platforms and systems. For example, one or more SoCs 504 can be used in systems, such as systems of the vehicle 500, in conjunction with HD maps 522 that can obtain map refreshes and / or updates from one or more servers (such as the one or more servers 578) via a network interface 524. Figure 5D

[0159] The CPU 506 can include a CPU cluster or CPU complex (alternatively referred to herein as a “CCPLEX”). The CPU 506 can include multiple cores and / or L2 caches. For example, in some embodiments, the CPU 506 can include eight cores in a coherent multi-processor configuration. In some embodiments, the CPU 506 can include four dual-core clusters with each cluster having a dedicated L2 cache (such as a 2 MB L2 cache). The CPU 506 (e.g., the CCPLEX) can be configured to support simultaneous cluster operation such that any combination of clusters of the CPU 506 can be active at any given time.

[0160] The CPU 506 can implement power management capabilities including one or more of the following features: individual hardware blocks can be automatically clock-gated when idle to save dynamic power; each core clock can be gated when the core is not actively executing instructions due to execution of WFI / WFE instructions; each core can be independently power-gated; each core cluster can be independently clock-gated when all cores are clock-gated or power-gated; and / or each core cluster can be independently power-gated when all cores are power-gated. The CPU 506 can further implement an enhanced algorithm for managing power states in which the allowed power states and the desired wake-up time are specified and the hardware / microcode determines the best power state for the core, cluster, and CCPLEX to enter. The processing core can support a simplified power state entry sequence in software, with the work being offloaded to microcode. ​

[0161] GPU 508 can include an integrated GPU (alternatively referred to herein as an “iGPU”). GPU 508 can be programmable and efficient for parallel workloads. In some examples, GPU 508 can use an enhanced tensor instruction set. GPU 508 can include one or more streaming microprocessors, where each streaming microprocessor can include an LI cache (e.g., an LI cache having at least 96 KB of storage capacity), and two or more of the streaming microprocessors can share an L2 cache (e.g., an L2 cache having 512 KB of storage capacity). In some embodiments, GPU 508 can include at least eight streaming microprocessors. GPU 508 can use a compute application programming interface (API). Additionally, GPU 508 can use one or more parallel computing platforms and / or programming models (e.g., NVIDIA’s CUDA).

[0162] In the case of automotive and embedded uses, GPU 508 can be power-optimized for best performance. For example, GPU 508 can be fabricated on a fin field-effect transistor (FinFET). However, this is not intended to be limiting, and GPU 508 can be fabricated using other semiconductor fabrication processes. Each streaming microprocessor can incorporate several mixed-precision processing cores divided into multiple blocks. For example, and without limitation, 64 PF32 cores and 32 PF64 cores can be divided into four processing blocks. In such an example, each processing block can be allocated 16 FP32 cores, 8 FP64 cores, 16 INT32 cores, two mixed-precision NVIDIA Tensor cores for deep learning matrix arithmetic, an L0 instruction cache, a thread warp scheduler, a dispatch unit, and / or a 64 KB register file. Additionally, the streaming microprocessor can include independent parallel integer and floating point data paths to provide efficient execution of workloads with a mix of compute and address compute. The streaming microprocessor can include independent thread scheduling capabilities to allow for more fine-grained synchronization and cooperation between parallel threads. The streaming microprocessor can include a combined LI data cache and shared memory unit to improve performance while simplifying programming.

[0163] GPU 508 can include a high-bandwidth memory (HBM) and / or a 16 GB HBM2 memory subsystem that provides approximately 900 GB / s of peak memory bandwidth in some examples. In some examples, in addition to or alternatively from HBM memory, a synchronous graphics random access memory (SGRAM) can be used, such as a fifth generation graphics double data rate synchronous random access memory (GDDR5).

[0164] GPU 508 can include a unified memory technology that includes access counters to allow memory pages to be migrated more precisely to the processors that access them most frequently, improving efficiency of memory ranges shared between processors. In some examples, address translation services (ATS) support can be used to allow GPU 508 to directly access CPU 506 page tables. In such examples, when a GPU 508 memory management unit (MMU) experiences a miss, an address translation request can be transmitted to CPU 506. In response, CPU 506 can look up a virtual-to-physical mapping for the address in its page tables and transmit the translation back to GPU 508. In this way, the unified memory technology can allow a single unified virtual address space for memory of both CPU 506 and GPU 508, simplifying GPU 508 programming and porting applications to GPU 508.

[0165] Further, GPU 508 can include access counters that can track how frequently GPU 508 accesses other processors’ memory. The access counters can help ensure that memory pages are migrated to the physical memory of the processor that accesses these pages most frequently.

[0166] SoC 504 can include any number of caches 512, including those described herein. For example, caches 512 can include an L3 cache available to both CPU 506 and GPU 508 (e.g., connected to both CPU 506 and GPU 508). Caches 512 can include a write-back cache that can track the state of a line, for example, by using a cache coherency protocol (e.g., MEI, MESI, MSI, etc.). Depending on the embodiment, the L3 cache can include 4 MB or more, although smaller cache sizes can also be used.

[0167] SoC 504 can include one or more arithmetic logic units (ALUs) that can be used to perform processing with respect to any of a variety of tasks or operations of vehicle 500, such as processing a DNN. Further, SoC 504 can include a floating point unit (FPU) or other mathematical co-processor or digital co-processor type for performing mathematical operations within the system. For example, SoC 504 can include one or more FPUs integrated as execution units within CPU 506 and / or GPU 508.

[0168] The SoC 504 can include one or more accelerators 514 (e.g., hardware accelerators, software accelerators, or a combination thereof). For example, the SoC 504 can include a hardware acceleration cluster that can include optimized hardware accelerators and / or a large on-chip memory. This large on-chip memory (e.g., 4MB SRAM) can enable the hardware acceleration cluster to accelerate neural networks and other computations. The hardware acceleration cluster can be used to supplement the GPU 508 and offload some of the tasks of the GPU 508 (e.g., freeing up more cycles of the GPU 508 for performing other tasks). As one example, the accelerators 514 can be used for targeted workloads (e.g., perception, convolutional neural networks (CNNs), etc.) that are stable enough to be easily controlled for acceleration. As used herein, the term “CNN” can include all types of CNNs, including region-based or region convolutional neural networks (RCNNs) and fast RCNNs (e.g., for object detection).

[0169] The accelerators 514 (e.g., hardware acceleration cluster) can include a deep learning accelerator (DLA). The DLA can include one or more tensor processing units (TPUs) that can be configured to provide an additional 100 billion operations per second for deep learning applications and inferencing. The TPUs can be accelerators that are configured to perform and optimized for performing image processing functions (e.g., for CNNs, RCNNs, etc.). The DLA can be further optimized for a specific set of neural network types and floating point operations and inferencing (e.g., equivariant object detection). The design of the DLA can provide higher performance per mm than general purpose GPUs and far exceeds the performance of CPUs. The TPUs can perform several functions, including single instance convolution functions, support for INT8, INT16, and FP16 data types for both features and weights, for example, and post-processor functions.

[0170] The DLA can perform neural networks, especially CNNs, on processed or unprocessed data for any of a wide variety of functions, such as and not limited to: CNNs for object recognition and detection using data from camera sensors; CNNs for distance estimation using data from camera sensors; CNNs for emergency vehicle detection and identification and detection using data from microphones; CNNs for face recognition and vehicle owner identification using data from camera sensors; and / or CNNs for safety and / or safety related events.

[0171] The DLA can perform any of the functions of the GPU 508 and, by using an inferencing accelerator, the designer can target the DLA or the GPU 508 for any function. For example, the designer can focus the processing and floating point operations of the CNNs on the DLA and leave other functions to the GPU 508 and / or other accelerators 514.

[0172] Accelerator 514 (e.g., hardware acceleration cluster) can include a programmable vision accelerator (PVA), which can be alternatively referred to herein as a computer vision accelerator. The PVA can be designed and configured to accelerate computer vision algorithms for advanced driver assistance systems (ADAS), autonomous driving, and / or augmented reality (AR) and / or virtual reality (VR) applications. The PVA can provide a balance between performance and flexibility. For example, each PVA can include, for example and without limitation, any number of reduced instruction set computer (RISC) cores, direct memory access (DMA), and / or any number of vector processors.

[0173] The RISC cores can interact with image sensors (e.g., image sensors of any of the cameras described herein), image signal processors, and / or the like. Each of the RISC cores can include any number of memories. Depending on the embodiment, the RISC cores can use any of several protocols. In some examples, the RISC cores can execute a real-time operating system (RTOS). The RISC cores can be implemented using one or more integrated circuit devices, application specific integrated circuits (ASICs), and / or memory devices. For example, the RISC cores can include instruction caches and / or tightly coupled RAM.

[0174] The DMA can enable components of the PVA to access system memory independently of the CPU 506. The DMA can support any number of features to provide optimizations to the PVA, including, but not limited to, supporting multi-dimensional addressing and / or circular addressing. In some examples, the DMA can support addressing up to six or more dimensions, which can include block width, block height, block depth, horizontal block stride, vertical block stride, and / or depth stride.

[0175] The vector processors can be programmable processors that can be designed to efficiently and flexibly execute programming for computer vision algorithms and provide signal processing capabilities. In some examples, the PVA can include a PVA core and two vector processing subsystem partitions. The PVA core can include a processor subsystem, one or more DMA engines (e.g., two DMA engines), and / or other peripherals. The vector processing subsystems can operate as the main processing engines of the PVA and can include vector processing units (VPUs), instruction caches, and / or vector memories (e.g., VMEM). The VPU cores can include digital signal processors, such as, for example, single instruction multiple data (SIMD), very long instruction word (VLIW) digital signal processors. The combination of SIMD and VLIW can enhance throughput and rate.

[0176] Each of the vector processors can include an instruction cache and can be coupled to a dedicated memory. As a result, in some examples, each of the vector processors can be configured to execute independently of the other vector processors. In other examples, the vector processors included in a particular PVA can be configured to employ data parallelization. For example, in some embodiments, multiple vector processors included in a single PVA can execute the same computer vision algorithm, but on different regions of an image. In other examples, the vector processors included in a particular PVA can execute different computer vision algorithms on the same image simultaneously, or even different algorithms on a sequence of images or portions of an image. Any number of PVAs can be included in the hardware acceleration cluster, and any number of vector processors can be included in each of the PVAs, among other things. Furthermore, the PVAs can include additional error-correcting code (ECC) memory to enhance overall system security.

[0177] The accelerator 514 (e.g., hardware acceleration cluster) can include an on-chip computer vision network and SRAM to provide high bandwidth, low latency SRAM for the accelerator 514. In some examples, the on-chip memory can include at least 4 MB of SRAM composed of, for example and without limitation, eight field-programmable memory blocks, which can be accessed by both the PVA and the DLA. Each pair of memory blocks can include an advanced peripheral bus (APB) interface, configuration circuitry, a controller, and a multiplexer. Any type of memory can be used. The PVA and the DLA can access the memory via a backbone that provides high-speed memory access to the PVA and the DLA. The backbone can include an on-chip computer vision network that interconnects the PVA and the DLA to the memory, for example using an APB.

[0178] The on-chip computer vision network can include an interface that determines that both the PVA and the DLA provide ready and valid signals before transmitting any control signals / addresses / data. Such an interface can provide separate phases and separate channels for transmitting control signals / addresses / data, as well as burst communications for continuous data transmission. This type of interface can comply with ISO 26262 or IEC 61508 standards, but other standards and protocols can also be used.

[0179] In some examples, the SoC 504 can include a real-time ray tracing hardware accelerator, such as described in U.S. Patent Application No. 16 / 101,232, filed August 10, 2018. The real-time ray tracing hardware accelerator can be used to quickly and efficiently determine locations and extents of objects (e.g., within a world model) in order to generate real-time visualizations simulations for RADAR signal interpretation, for sound propagation synthesis and / or analysis, for SONAR system simulation, for general wave propagation simulation, for comparison with LIDAR data for purposes of localization and / or other functionality, and / or for other uses. In some embodiments, one or more tree traversal units (TTUs) can be used to perform one or more ray tracing related operations.

[0180] The accelerator 514 (e.g., a hardware accelerator cluster) has a wide range of autonomous driving uses. The PVA can be a programmable vision accelerator that can be used for key processing stages in ADAS and autonomous vehicles. The PVA’s capabilities are a good match for algorithm domains that require predictable processing, low power, and low latency. In other words, the PVA performs well on semi-dense or dense regular computations, and even on small data sets that require predictable runtimes with low latency and low power. Thus, in the context of a platform for autonomous vehicles, the PVA is designed to run classical computer vision algorithms because they are effective at object detection and integer math operations.

[0181] For example, according to one embodiment of the technology, the PVA is used to perform computer stereo vision. In some examples, a semi-global matching based algorithm can be used, although this is not intended to be limiting. Many applications for level 3-5 autonomous driving require instant motion estimation / stereo matching (e.g., structure from motion, pedestrian recognition, lane detection, etc.). The PVA can perform computer stereo vision functions on input from two monocular cameras.

[0182] In some examples, the PVA can be used to perform dense optical flow. Raw RADAR data is processed according to a process (e.g., using a 4D fast Fourier transform) to provide processed RADAR. In other examples, the PVA is used for time-of-flight depth processing, such as by processing raw time-of-flight data to provide processed time-of-flight data.

[0183] The DLA can be used to run any type of network to enhance control and driving safety, including, for example, a neural network that outputs a confidence metric for each object detection. Such a confidence value can be interpreted as a probability, or as providing a relative "weight" for each detection compared to other detections. The confidence value enables the system to make further decisions about which detections should be considered true positive detections and not false positive detections. For example, the system can set a threshold for confidence, and only consider detections that exceed the threshold as true positive detections. In an automatic emergency braking (AEB) system, false positive detections would cause the vehicle to automatically perform an emergency brake, which is obviously undesirable. Thus, only the most confident detections should be considered a trigger for AEB. The DLA can run a neural network for regression of a confidence value. The neural network can take as its input at least some subset of parameters, such as bounding box dimensions, a ground plane estimate obtained (e.g., from another subsystem), inertial measurement unit (IMU) sensor 566 outputs related to vehicle 500 orientation, distance, 3D position estimates of objects obtained from the neural network and / or other sensors (e.g., LIDAR sensor 564 or RADAR sensor 560), etc.

[0184] SoC 504 can include one or more data stores 516 (e.g., memory). Data stores 516 can be on-chip memory of SoC 504, which can store neural networks to be executed on the GPU and / or DLA. In some examples, for redundancy and safety, data stores 516 can be large enough in capacity to store multiple instances of a neural network. Data stores 512 can include L2 or L3 cache 512. References to data stores 516 can include references to memory associated with PVAs, DLAs, and / or other accelerators 514 as described herein.

[0185] The SoC 504 can include one or more processors 510 (e.g., embedded processors). The processors 510 can include a boot and power management processor, which can be a specialized processor and subsystem for handling boot power and management functions and related security implementations. The boot and power management processor can be part of the SoC 504 boot sequence and can provide run-time power management services. The boot power and management processor can provide clock and voltage programming, auxiliary system low power state transitions, SoC 504 thermal and temperature sensor management, and / or SoC 504 power state management. Each temperature sensor can be implemented as a ring oscillator whose output frequency is proportional to temperature, and the SoC 504 can use the ring oscillator to detect the temperature of the CPU 506, GPU 508, and / or accelerator 514. If it is determined that the temperature exceeds a threshold, the boot and power management processor can enter a temperature fault routine and place the SoC 504 in a lower power state and / or place the vehicle 500 in a driver safe park mode (e.g., safely park the vehicle 500).

[0186] The processors 510 can further include a set of embedded processors that can be used as an audio processing engine. The audio processing engine can be an audio subsystem that allows for full hardware support for multi-channel audio over multiple interfaces and a range of widely flexible audio I / O interfaces. In some examples, the audio processing engine is a specialized processor core with a digital signal processor with dedicated RAM.

[0187] The processors 510 can further include an always-on processor engine, which can provide the necessary hardware features to support low-power sensor management and wake-up use cases. The always-on processor engine can include a processor core, tightly coupled RAM, supporting peripherals (e.g., timers and interrupt controllers), various I / O controller peripherals, and routing logic.

[0188] The processors 510 can further include a security cluster engine, which includes a specialized processor subsystem that handles security management for automotive applications. The security cluster engine can include two or more processor cores, tightly coupled RAM, supporting peripherals (e.g., timers, interrupt controllers, etc.), and / or routing logic. In a secure mode, the two or more cores can operate in a lockstep mode and act as a single core with comparison logic that detects any differences between their operations.

[0189] The processors 510 can further include a real-time camera engine, which can include a specialized processor subsystem for handling real-time camera management.

[0190] The processor 510 can further include a high dynamic range signal processor, which can include an image signal processor, which is a hardware engine that is part of the camera processing pipeline.

[0191] The processor 510 can include a video image compositor, which can be a processing block (e.g., implemented on a microprocessor), that implements video post-processing functions needed by the video playback application to produce the final image for the player window. The video image compositor can perform lens distortion correction on the wide-angle camera 570, surround camera 574, and / or on the cab-in monitor camera sensors. The cab-in monitor camera sensors are preferably monitored by a neural network running on another instance of the advanced SoC, configured to recognize cab-in events and respond accordingly. The cab-in system can perform lip reading to activate mobile phone services and place a call, dictate an email, change the vehicle destination, activate or change the vehicle's infotainment system and settings, or provide voice-activated web surfing. Certain functions are only available to the driver when the vehicle is operating in autonomous mode, and are disabled otherwise.

[0192] The video image compositor can include enhanced temporal noise reduction for spatial and temporal noise reduction. For example, where motion is present in the video, the noise reduction appropriately weights the spatial information, reducing the weight of information provided by neighboring frames. Where the image or portions of the image do not include motion, the temporal noise reduction performed by the video image compositor can use information from previous images to reduce noise in the current image.

[0193] The video image compositor can also be configured to perform stereo correction on input stereo lens frames. The video image compositor can further be used for user interface composition when the operating system desktop is in use and the GPU 508 does not need to continuously render new surfaces. Even when the GPU 508 is powered on and active, doing 3D rendering, the video image compositor can be used to offload the GPU 508 to improve performance and responsiveness.

[0194] The SoC 504 can further include a Mobile Industry Processor Interface (MIPI) camera serial interface for receiving video and input from the cameras, a high-speed interface, and / or a video input block that can be used for camera and related pixel input functions. The SoC 504 can further include an input / output controller that can be controlled by software and can be used to receive I / O signals that are not committed to a particular role.

[0195] SoC 504 can further include a wide range of peripheral device interfaces to enable communication with peripherals, audio codecs, power management, and / or other devices. SoC 504 can be used to process data from cameras (connected over Gigabit Multimedia Serial Link and Ethernet), sensors (e.g., LIDAR sensor 564, RADAR sensor 560, etc. that can be connected over Ethernet), data from bus 502 (e.g., speed of vehicle 500, steering wheel position, etc.), data from GNSS sensor 558 (connected over Ethernet or CAN bus). SoC 504 can further include a dedicated high-performance mass storage controller, which can include their own DMA engine, and which can be used to free up CPU 506 from routine data management tasks.

[0196] SoC 504 can be an end-to-end platform with a flexible architecture that spans automation levels 3-5, providing an integrated functional safety architecture for a platform that leverages and efficiently uses computer vision and ADAS technology to achieve diversity and redundancy, along with deep learning tools. SoC 504 can be faster, more reliable, and even more energy and space efficient than conventional systems. For example, accelerators 514, when combined with CPU 506, GPU 508, and data storage 516, can provide a fast and efficient platform for level 3-5 autonomous vehicles.

[0197] The technology thus provides capabilities and functionality that cannot be achieved by conventional systems. For example, computer vision algorithms can be executed on CPUs that can be configured using high-level programming languages such as the C programming language to perform a wide variety of processing algorithms across a wide variety of visual data. However, CPUs often cannot meet the performance requirements of many computer vision applications, such as those related to, for example, execution time and power consumption. In particular, many CPUs cannot execute complex object detection algorithms in real time, which is a requirement for on-board ADAS applications and for practical level 3-5 autonomous vehicles.

[0198] In contrast to conventional systems, by providing a CPU complex, a GPU complex, and a hardware acceleration cluster, the technology described herein allows multiple neural networks to be executed simultaneously and / or sequentially, and the results to be combined together to achieve level 3-5 autonomous driving functionality. For example, a CNN executed on a DLA or dGPU (e.g., GPU 520) can include text and word recognition, allowing a supercomputer to read and understand traffic signs, including signs for which a neural network has not been specifically trained. The DLA can further include a neural network that is able to recognize, interpret, and provide a semantic understanding of the sign, and pass that semantic understanding to a path planning module running on the CPU complex.

[0199] As another example, multiple neural networks can be run simultaneously as required for level 3, 4, or 5 driving. For example, a warning sign consisting of the words "Caution: flashing lights indicate icy conditions" along with electric lights can be interpreted by several neural networks independently or collectively. The sign itself can be recognized by a first deployed neural network (e.g., a trained neural network) as a traffic sign, the text "flashing lights indicate icy conditions" can be interpreted by a second deployed neural network that informs the vehicle's path planning software (preferably executing on the CPU complex) that icy conditions exist when flashing lights are detected. The flashing lights can be recognized by a third deployed neural network operating over multiple frames that informs the vehicle's path planning software of the presence (or absence) of flashing lights. All three neural networks can be run simultaneously, for example, within the DLA and / or on the GPU 508. As described herein, some or all of the neural networks can generate partitions and / or predictions that are equivariant or invariant to the input.

[0200] In some examples, a CNN for face recognition and owner recognition can use data from the camera sensors to recognize the presence of an authorized driver and / or owner of the vehicle 500. A processing engine always on the sensors can be used to unlock the vehicle and turn on the lights when the owner approaches the driver's door, and in a safe mode, disable the vehicle when the owner leaves the vehicle. In this way, the SoC 504 provides security against theft and / or carjacking.

[0201] In another example, a CNN for emergency vehicle detection and recognition can use data from the microphones 596 to detect and recognize emergency vehicle sirens. In contrast to conventional systems that use a general classifier to detect sirens and manually extract features, the SoC 504 uses a CNN to classify ambient and urban sounds as well as to classify visual data. In a preferred embodiment, a CNN running on the DLA is trained to recognize the relative closing speed of an emergency vehicle (e.g., by using the Doppler effect). The CNN can also be trained to recognize emergency vehicles specific to the local area in which the vehicle is operating as recognized by the GNSS sensor 558. Thus, for example, when operating in Europe, the CNN will seek to detect European sirens, and when in the United States, the CNN will seek to recognize sirens that are only North American. Once an emergency vehicle is detected, a control program can be used to execute an emergency vehicle safety routine, slowing the vehicle, pulling over to the side of the road, stopping the vehicle, and / or idling the vehicle until the emergency vehicle passes, with the assistance of the ultrasonic sensors 562.

[0202] The vehicle can include a CPU 518 (e.g., a discrete CPU or dCPU) that can be coupled to the SoC 504 via a high-speed interconnect (e.g., PCIe). The CPU 518 can include, for example, an X86 processor. The CPU 518 can be used to perform any of a wide variety of functions, including, for example, arbitrating potentially inconsistent results between ADAS sensors and the SoC 504, and / or monitoring the status and health of the controller 536 and / or infotainment SoC 530.

[0203] The vehicle 500 can include a GPU 520 (e.g., a discrete GPU or dGPU) that can be coupled to the SoC 504 via a high-speed interconnect (e.g., NVIDIA’s NVLINK). The GPU 520 can provide additional artificial intelligence functionality, for example, by executing redundant and / or different neural networks, and can be used to train and / or update neural networks based on input (e.g., sensor data) from sensors of the vehicle 500.

[0204] The vehicle 500 can further include a network interface 524 that can include one or more wireless antennas 526 (e.g., one or more wireless antennas for different communication protocols, such as cellular antennas, Bluetooth antennas, etc.). The network interface 524 can be used to enable wireless connections through the Internet with a cloud (e.g., with the server 578 and / or other network devices), with other vehicles, and / or with computing devices (e.g., client devices of passengers). For communication with other vehicles, a direct link can be established between the two vehicles, and / or an indirect link can be established (e.g., across a network and through the Internet). The direct link can be provided using a car-to-car communication link. The car-to-car communication link can provide the vehicle 500 with information about vehicles that are approaching the vehicle 500 (e.g., vehicles in front of, to the side of, and / or behind the vehicle 500). This functionality can be part of a cooperative adaptive cruise control functionality of the vehicle 500.

[0205] The network interface 524 can include a SoC that provides modulation and demodulation functionality and enables the controller 536 to communicate over a wireless network. The network interface 524 can include a radio frequency front end for up-conversion from baseband to radio frequency and down-conversion from radio frequency to baseband. The frequency conversion can be performed through well-known processes, and / or can be performed using a super-heterodyne process. In some examples, the radio frequency front end functionality can be provided by a separate chip. The network interface can include wireless functionality for communication over LTE, WCDMA, UMTS, GSM, CDMA2000, Bluetooth, Bluetooth LE, Wi-Fi, Z-Wave, ZigBee, LoRaWAN, and / or other wireless protocols.

[0206] The vehicle 500 can further include a data store 528, which can include off-chip (e.g., off-SoC 504) storage. The data store 528 can include one or more storage elements, including RAM, SRAM, DRAM, VRAM, flash memory, hard disks, and / or other components and / or devices that can store data for at least one bit.

[0207] The vehicle 500 can further include a GNSS sensor 558. The GNSS sensor 558 (e.g., GPS, assisted GPS sensor, differential GPS (DGPS) sensor, etc.) is used to assist in mapping, perception, occupancy grid generation, and / or path planning functions. Any number of GNSS sensors 558 can be used, including, for example and without limitation, a GPS using a USB connector with an Ethernet-to-serial (RS-232) bridge.

[0208] The vehicle 500 can further include a RADAR sensor 560. The RADAR sensor 560 can be used by the vehicle 500 for long-range vehicle detection, even in darkness and / or adverse weather conditions. The RADAR functional safety level can be ASIL B. The RADAR sensor 560 can use the CAN and / or bus 502 (e.g., to transmit data generated by the RADAR sensor 560) for control as well as access to object tracking data, in some examples, Ethernet for access to raw data. A wide variety of RADAR sensor types can be used. For example and without limitation, the RADAR sensor 560 can be suitable for front, rear, and side RADAR use. In some examples, a pulsed Doppler RADAR sensor is used.

[0209] The RADAR sensor 560 can include different configurations, such as long-range with narrow field of view, short-range with wide field of view, short-range side coverage, and so on. In some examples, long-range RADAR can be used for adaptive cruise control functionality. Long-range RADAR systems can provide a wide field of view (e.g., 250 m range) implemented through two or more independent scans. The RADAR sensor 560 can help distinguish between static and moving objects, and can be used by the ADAS system for emergency brake assist and forward collision warning. The long-range RADAR sensor can include a single-station multi-mode RADAR with multiple (e.g., six or more) fixed RADAR antennas, as well as high-speed CAN and FlexRay interfaces. In examples with six antennas, the central four antennas can create focused beam patterns designed to record the surroundings of the vehicle 500 at higher speed with minimal traffic interference from adjacent lanes. The other two antennas can extend the field of view, making it possible to quickly detect vehicles entering or leaving the lane of the vehicle 500.

[0210] As one example, a mid-range RADAR system can include a range of up to 560 m (front) or 80 m (rear) and a field of view of up to 42 degrees (front) or 550 degrees (rear). A short-range RADAR system can include, but is not limited to, RADAR sensors designed to be mounted at both ends of the rear bumper. When mounted at both ends of the rear bumper, such a RADAR sensor system can create two beams that continuously monitor the rear and blind spots to the sides of the vehicle.

[0211] A short-range RADAR system can be used in an ADAS system for blind spot detection and / or lane change assist.

[0212] The vehicle 500 can further include ultrasonic sensors 562. The ultrasonic sensors 562, which can be placed on the front, rear, and / or sides of the vehicle 500, can be used for parking assist and / or to create and update an occupancy grid. A wide variety of ultrasonic sensors 562 can be used, and different ultrasonic sensors 562 can be used for different detection ranges (e.g., 2.5 m, 4 m). The ultrasonic sensors 562 can operate at an ASIL B functional safety level.

[0213] The vehicle 500 can include LIDAR sensors 564. The LIDAR sensors 564 can be used for object and pedestrian detection, emergency braking, collision avoidance, and / or other functions. The LIDAR sensors 564 can be at an ASIL B functional safety level. In some examples, the vehicle 500 can include multiple LIDAR sensors 564 (e.g., two, four, six, etc.) that can use Ethernet (e.g., to provide data to a Gigabit Ethernet switch).

[0214] In some examples, the LIDAR sensors 564 can be capable of providing a list of objects and their distances for a 360-degree field of view. A commercially available LIDAR sensor 564 can have, for example, an advertised range of approximately 500 m, a precision of 2 cm - 3 cm, and support for a 500 Mbps Ethernet connection. In some examples, one or more flush-mounted LIDAR sensors 564 can be used. In such examples, the LIDAR sensors 564 can be implemented as small devices that can be embedded into the front, rear, sides, and / or corners of the vehicle 500. In such examples, the LIDAR sensors 564 can provide a field of view of up to 120 degrees horizontal and 35 degrees vertical with a range of 200 m, even for low reflectivity objects. Front-mounted LIDAR sensors 564 can be configured for a horizontal field of view between 45 degrees and 135 degrees.

[0215] In some examples, LIDAR technology such as 3D Flash LIDAR can also be used. 3D Flash LIDAR uses a flash of laser light as a source of emission to illuminate the vehicle’s surroundings up to about 200 m. The flash LIDAR unit includes a receptor that records the laser pulse transmission time and reflected light on each pixel, which in turn corresponds to the range from the vehicle to the object. Flash LIDAR can allow for the generation of highly accurate and distortion-free images of the surroundings with each laser flash. In some examples, four flash LIDAR sensors can be deployed, one on each side of the vehicle 500. Available 3D flash LIDAR systems include solid-state 3D staring array LIDAR cameras (e.g., non-scanning LIDAR devices) that have no moving parts other than a fan. The flash LIDAR device can use 5 nanosecond Class I (eye-safe) laser pulses per frame and can capture the reflected laser light in the form of a 3D range point cloud and co-registered intensity data. By using flash LIDAR, and because flash LIDAR is a solid-state device with no moving parts, the LIDAR sensor 564 can be less susceptible to motion blur, vibration, and / or jostling.

[0216] The vehicle can further include an IMU sensor 566. In some examples, the IMU sensor 566 can be located at the center of the rear axle of the vehicle 500. The IMU sensor 566 can include, for example and without limitation, an accelerometer, a magnetometer, a gyroscope, a magnetic compass, and / or other sensor types. In some examples, the IMU sensor 566 can include an accelerometer and a gyroscope, for example in a six-axis application, while in a nine-axis application, the IMU sensor 566 can include an accelerometer, a gyroscope, and a magnetometer.

[0217] In some embodiments, the IMU sensor 566 can be implemented as a microelectromechanical systems (MEMS) based high-performance GPS-aided inertial navigation system (GPS / INS) that combines MEMS inertial sensors, high-sensitivity GPS receivers, and advanced Kalman filtering algorithms to provide estimates of position, velocity, and attitude. As such, in some examples, the IMU sensor 566 can enable the vehicle 500 to estimate heading without input from a magnetic sensor by directly observing the change in velocity from GPS to the IMU sensor 566 and correlating it. In some examples, the IMU sensor 566 and the GNSS sensor 558 can be combined into a single integrated unit.

[0218] The vehicle can include a microphone 596 placed in and / or around the vehicle 500. The microphone 596 can be used for emergency vehicle detection and identification, among other things.

[0219] The vehicle can further include any number of camera types, including stereo cameras 568, wide-view cameras 570, infrared cameras 572, surround-view cameras 574, long and / or mid-range cameras 598, and / or other camera types. These cameras can be used to capture image data around the entire periphery of the vehicle 500. The types of cameras used depend on the embodiment and requirements of the vehicle 500, and any combination of camera types can be used to provide the necessary coverage around the vehicle 500. Further, the number of cameras can vary depending on the embodiment. For example, the vehicle can include six cameras, seven cameras, ten cameras, twelve cameras, and / or another number of cameras. As one example and without limitation, the cameras can support Gigabit Multimedia Serial Link (GMSL) and / or Gigabit Ethernet. Each of the cameras is described in more detail herein with respect to Figure 5A and Figure 5B are described in more detail.

[0220] The vehicle 500 can further include vibration sensors 542. The vibration sensors 542 can measure vibrations of components of the vehicle, such as axles. For example, changes in vibration can indicate changes in the road surface. In another example, when two or more vibration sensors 542 are used, differences between the vibrations can be used to determine the friction or slip of the road surface (e.g., when there is a difference in vibration between a power driven axle and a free spinning axle).

[0221] The vehicle 500 can include an ADAS system 538. In some examples, the ADAS system 538 can include a SoC. The ADAS system 538 can include adaptive / automatic / autonomous cruise control (ACC), cooperative adaptive cruise control (CACC), forward collision warning (FCW), automatic emergency braking (AEB), lane departure warning (LDW), lane keeping assist (LKA), blind spot warning (BSW), rear cross-traffic warning (RCTW), collision warning system (CWS), lane centering (LC), and / or other features and functionality.

[0222] The ACC system can use RADAR sensors 560, LIDAR sensors 564, and / or cameras. The ACC system can include longitudinal ACC and / or lateral ACC. Longitudinal ACC monitors and controls the distance to the vehicle immediately ahead of the vehicle 500 and automatically adjusts the vehicle speed to maintain a safe distance from the vehicle ahead. Lateral ACC performs distance keeping and, if necessary, suggests a lane change for the vehicle 500. Lateral ACC is related to other ADAS applications such as LCA and CWS.

[0223] CACC uses information from other vehicles, which can be received from other vehicles via a wireless link via the network interface 524 and / or wireless antenna 526 or indirectly through a network connection, such as through the Internet. Direct links can be provided by vehicle-to-vehicle (V2V) communication links, while indirect links can be infrastructure-to-vehicle (I2V) communication links. Generally, V2V communication concepts provide information about the immediately preceding vehicles, such as vehicles immediately ahead of and in the same lane as the vehicle 500, while I2V communication concepts provide information about traffic further ahead. A CACC system can include either or both of I2V and V2V information sources. Given information about vehicles ahead of the vehicle 500, CACC can be more reliable, and it has the potential to improve traffic flow and reduce road congestion.

[0224] FCW systems are designed to alert the driver to a hazard so that the driver can take corrective action. FCW systems use a front-facing camera and / or RADAR sensor 560 coupled to a dedicated processor, DSP, FPGA, and / or ASIC that is electrically coupled to driver feedback such as displays, speakers, and / or vibrating components. FCW systems can provide warnings in the form of, for example, sound, visual warnings, vibrations, and / or quick brake pulses.

[0225] AEB systems detect an impending forward collision with another vehicle or other object and can automatically apply the brakes if the driver does not take corrective action within specified time or distance parameters. AEB systems can use a front-facing camera and / or RADAR sensor 560 coupled to a dedicated processor, DSP, FPGA, and / or ASIC. When an AEB system detects a hazard, it typically first alerts the driver to take corrective action to avoid a collision, and if the driver does not take corrective action, the AEB system can automatically apply the brakes in an effort to prevent or at least mitigate the effects of a predicted collision. AEB systems can include technologies such as dynamic brake support and / or crash imminent braking.

[0226] LDW systems provide visual, audible, and / or tactile warnings, such as steering wheel or seat vibrations, to alert the driver when the vehicle 500 is crossing lane markers. The LDW system is not activated when the driver indicates an intentional lane departure by activating a turn signal. LDW systems can use a front-side facing camera coupled to a dedicated processor, DSP, FPGA, and / or ASIC that is electrically coupled to driver feedback such as displays, speakers, and / or vibrating components.

[0227] An LKA system is a variation of the LDW system. If the vehicle 500 begins to leave the lane, the LKA system provides a steering input or brake to correct the vehicle 500.

[0228] A BSW system detects and warns the driver of vehicles in the car's blind spot. The BSW system can provide visual, audible, and / or tactile alerts to indicate that merging or changing lanes is unsafe. The system can provide additional warnings when the driver uses a turn signal. The BSW system can use rear side-facing cameras and / or RADAR sensors 560 coupled to a dedicated processor, DSP, FPGA, and / or ASIC that is electrically coupled to driver feedback such as a display, speaker, and / or vibrating component.

[0229] A RCTW system can provide visual, audible, and / or tactile notifications when objects are detected outside the range of the rear-facing camera while the vehicle 500 is backing up. Some RCTW systems include AEB to ensure vehicle brakes are applied to avoid a collision. The RCTW system can use one or more rear-facing RADAR sensors 560 coupled to a dedicated processor, DSP, FPGA, and / or ASIC that is electrically coupled to driver feedback such as a display, speaker, and / or vibrating component.

[0230] Conventional ADAS systems can be prone to false positive results, which can annoy and distract the driver, but typically are not catastrophic because the ADAS system alerts the driver and allows the driver to decide whether the safety condition is truly present and act accordingly. However, in an autonomous vehicle 500, in the case of conflicting results, the vehicle 500 itself must decide whether to heed the results from the primary computer or the secondary computer (e.g., the first controller 536 or the second controller 536). For example, in some embodiments, the ADAS system 538 can be a secondary and / or auxiliary computer for providing perception information to a backup computer plausibility module. The backup computer plausibility monitor can run redundant diverse software on hardware components to detect faults in perception and dynamic driving tasks. The output from the ADAS system 538 can be provided to a supervisory MCU. If the outputs from the primary computer and the secondary computer conflict, the supervisory MCU must determine how to reconcile the conflict to ensure safe operation.

[0231] In some examples, the host computer can be configured to provide a confidence score to the supervisory MCU indicating the host computer's confidence in the selected result. If the confidence score exceeds a threshold, then the supervisory MCU can follow the host computer's direction, regardless of whether the secondary computer provides conflicting or inconsistent results. In the event that the confidence score does not satisfy the threshold and in the event that the host computer and the secondary computer indicate different results (e.g., a conflict), the supervisory MCU can arbitrate between the computers to determine the appropriate result.

[0232] The supervisory MCU can be configured to run a neural network that is trained and configured to determine conditions under which the secondary computer provides false alarms based on the output from the host computer and the secondary computer. Thus, the neural network in the supervisory MCU can learn when the output of the secondary computer can be trusted and when it cannot. For example, when the secondary computer is a RADAR-based FCW system, the neural network in the supervisory MCU can learn when the FCW system is identifying metal objects that are not in fact dangerous, such as drain grates or manhole covers that trigger false alarms. Similarly, when the secondary computer is a camera-based LDW system, the neural network in the supervisory MCU can learn to disregard the LDW when a cyclist or pedestrian is present and lane departure is in fact the safest strategy. In embodiments that include a neural network running on the supervisory MCU, the supervisory MCU can include at least one of a DLA or a GPU suitable for running a neural network with associated memory. In preferred embodiments, the supervisory MCU can include and / or be included as a component of the SoC 504.

[0233] In other examples, the ADAS system 538 can include a secondary computer that performs ADAS functions using traditional computer vision rules. In this way, the secondary computer can use classic computer vision rules (if-then), and the presence of a neural network in the supervisory MCU can improve reliability, safety, and performance. For example, the diverse implementation and intentional non-identity make the overall system more fault-tolerant, especially with respect to faults caused by software (or software-hardware interface) functions. For example, if there is a software bug or error in the software running on the host computer and the non-identical software code running on the secondary computer provides the same overall result, then the supervisory MCU can be more confident that the overall result is correct and that the bug in the software or hardware on the host computer did not cause a substantial error.

[0234] In some examples, the output of the ADAS system 538 can be fed to a perception block of the host computer and / or a dynamic driving task block of the host computer. For example, if the ADAS system 538 indicates a forward collision warning due to an object immediately ahead, the perception block can use this information in identifying the object. In other examples, the secondary computer can have its own neural network that is trained and thus reduces the risk of false positives as described herein.

[0235] The vehicle 500 can further include an infotainment SoC 530 (e.g., an in-vehicle infotainment system (IVI)). Although illustrated and described as a SoC, the infotainment system can not be a SoC and can include two or more discrete components. The infotainment SoC 530 can include a combination of hardware and software that can be used to provide audio (e.g., music, personal digital assistant, navigation instructions, news, radio, etc.), video (e.g., TV, movies, streaming, etc.), telephony (e.g., hands-free calling), network connectivity (e.g., LTE, Wi-Fi, etc.), and / or information services (e.g., navigation system, park assist, radio data system, vehicle related information such as fuel level, total distance covered, brake fuel level, oil level, doors open / closed, air filter information, etc.) to the vehicle 500. For example, the infotainment SoC 530 can include a radio, a disc player, a navigation system, a video player, USB and Bluetooth connectivity, an in-car computer, in-car entertainment, Wi-Fi, steering wheel audio controls, hands-free voice controls, a heads-up display (HUD), the HMI display 534, a telematics device, a control panel (e.g., for controlling and / or interacting with various components, features, and / or systems), and / or other components. The infotainment SoC 530 can further be used to provide information (e.g., visual and / or audible) to a user of the vehicle, such as information from the ADAS system 538, autonomous driving information such as planned vehicle maneuvers, trajectories, surrounding environment information (e.g., intersection information, vehicle information, road information, etc.), and / or other information.

[0236] The infotainment SoC 530 can include GPU functionality. The infotainment SoC 530 can communicate with other devices, systems, and / or components of the vehicle 500 over the bus 502 (e.g., a CAN bus, Ethernet, etc.). In some examples, the infotainment SoC 530 can be coupled to a supervisory MCU such that, in the event of a failure of the host controller 536 (e.g., a primary and / or backup computer of the vehicle 500), the GPU of the infotainment system can perform some autonomous driving functions. In such examples, the infotainment SoC 530 can place the vehicle 500 in a driver safe park mode as described herein.

[0237] The vehicle 500 can further include an instrument cluster 532 (e.g., a digital dashboard, an electronic instrument cluster, a digital instrument panel, etc.). The instrument cluster 532 can include a controller and / or supercomputer (e.g., a discrete controller or supercomputer). The instrument cluster 532 can include a set of instruments, such as a speedometer, fuel level, oil pressure, tachometer, odometer, turn indicator, shift position indicator, seat belt warning light, parking brake warning light, engine malfunction light, supplemental restraint system (SRS) system information, lighting controls, safety system controls, navigation information, etc. In some examples, information can be displayed and / or shared between the infotainment SoC 530 and the instrument cluster 532. In other words, the instrument cluster 532 can be included as part of the infotainment SoC 530, or vice versa.

[0238] Figure 5D FIG. 5 illustrates a system diagram of communication between a cloud-based server and an example autonomous vehicle 500 in accordance with some embodiments of the present disclosure. Figure 5A FIG. 5 illustrates a system diagram of communication between a cloud-based server and an example autonomous vehicle 500 in accordance with some embodiments of the present disclosure. The system 576 can include servers 578, a network 590, and vehicles including the vehicle 500. The servers 578 can include a plurality of GPUs 584(A)-584(H) (collectively referred to herein as GPUs 584), PCIe switches 582(A)-582(H) (collectively referred to herein as PCIe switches 582), and / or CPUs 580(A)-580(B) (collectively referred to herein as CPUs 580). The GPUs 584, CPUs 580, and PCIe switches can be interconnected with high-speed interconnects such as, for example and without limitation, NVLink interfaces 588 developed by NVIDIA and / or PCIe connections 586. In some examples, the GPUs 584 are connected via NVLink and / or NVSwitch SoC, and the GPUs 584 and PCIe switches 582 are connected via PCIe interconnects. Although eight GPUs 584, two CPUs 580, and two PCIe switches are illustrated, this is not intended to be limiting. Depending on the embodiment, each of the servers 578 can include any number of GPUs 584, CPUs 580, and / or PCIe switches. For example, each of the servers 578 can include eight, sixteen, thirty-two, and / or more GPUs 584.

[0239] The server 578 can receive image data from vehicles over the network 590 and from vehicles representing images showing unexpected or changing road conditions such as a road work that has recently started. The server 578 can transmit neural networks 592, updated neural networks 592, and / or map information 594, including information about traffic and road conditions, to vehicles over the network 590. Updates to the map information 594 can include updates to the HD map 522, such as information about construction sites, potholes, curves, flooding, or other obstacles. In some examples, the neural networks 592, updated neural networks 592, and / or map information 594 can have been generated from new training and / or experience based on training performed at a data center (e.g., using the server 578 and / or other servers) from data received from any number of vehicles in the environment.

[0240] The server 578 can be used to train machine learning models (e.g., neural networks) based on training data. The training data can be generated by vehicles and / or can be generated in simulations (e.g., using game engines). In some examples, the training data is labeled (e.g., in cases where the neural network benefits from supervised learning) and / or undergoes other pre-processing, while in other examples, the training data is not labeled and / or pre-processed (e.g., in cases where the neural network does not require supervised learning). The training can be performed according to any class or more classes of machine learning techniques, including but not limited to the following classes: supervised training, semi-supervised training, unsupervised training, self-learning, reinforcement learning, federated learning, transfer learning, feature learning (including principal component and cluster analysis), multilinear subspace learning, manifold learning, representation learning (including spare dictionary learning), rule-based machine learning, anomaly detection, and any variants or combinations thereof. Once the machine learning models are trained, the machine learning models can be used by vehicles (e.g., transmitted to vehicles over the network 590), and / or the machine learning models can be used by the server 578 to remotely monitor vehicles.

[0241] In some examples, the server 578 can receive data from vehicles and apply the data to the latest real-time neural network (e.g., an equivariant object detection neural network) for real-time intelligent inference. The server 578 can include a deep learning supercomputer and / or a specialized AI computer powered by GPUs 584, such as the DGX and DGX Station machines developed by NVIDIA. However, in some examples, the server 578 can include deep learning infrastructure of a data center that is powered by CPUs only.

[0242] The deep learning infrastructure of the server 578 can be capable of fast real-time inference, and can use this capability to assess and validate the health of the processors, software, and / or associated hardware in the vehicle 500. For example, the deep learning infrastructure can receive periodic updates from the vehicle 500, such as a sequence of images and / or objects located in the sequence of images that the vehicle 500 has located (e.g., via computer vision and / or other machine learning object classification techniques). The deep learning infrastructure can run its own neural network to identify the objects and compare them to the objects identified by the vehicle 500, and if the results do not match and the infrastructure concludes that the AI in the vehicle 500 is malfunctioning, the server 578 can transmit a signal to the vehicle 500 instructing the fail-safe computer of the vehicle 500 to take control, notify the passengers, and complete a safe parking operation.

[0243] For inference, the server 578 can include GPUs 584 and one or more programmable inference accelerators (such as NVIDIA’s TensorRT 3). The combination of GPU-powered servers and inference-accelerated can make real-time responses possible. In other examples, such as where performance is less important, CPU-, FPGA-, and other processor-powered servers can be used for inference.

[0244] Example Computing Device

[0245] Figure 6 A block diagram of an example computing device 600 suitable for implementing some embodiments of the present disclosure is shown. The computing device 600 can include an interconnection system 602 that directly or indirectly couples the following devices: memory 604, one or more central processing units (CPUs) 606, one or more graphics processing units (GPUs) 608, a communication interface 610, input / output (I / O) ports 612, I / O components 614, a power supply 616, one or more presentation components 618 (e.g., a display), and one or more logic units 620. In at least one embodiment, the computing device 600 can include one or more virtual machines (VMs), and / or any component thereof can include virtual components (e.g., virtual hardware components). For non-limiting examples, the one or more GPUs 608 can include one or more vGPUs, the one or more CPUs 606 can include one or more vCPUs, and / or the one or more logic units 620 can include one or more virtual logic units. Thus, the computing device 600 can include discrete components (e.g., a full GPU dedicated to the computing device 600), virtual components (e.g., a portion of a GPU dedicated to the computing device 600), or a combination thereof.

[0246] Although Figure 6various blocks are shown as being connected via the interconnection system 602 having a line, but this is intended to be a simplified representation of a more complex connection that can be present. For example, in some embodiments, a rendering component 618, such as a display device, can be considered an I / O component 614 (e.g., if the display is a touchscreen). As another example, the CPU 606 and / or GPU 608 can include memory (e.g., the memory 604 can represent a storage device in addition to the memory of the GPU 608, CPU 606, and / or other components). In other words, Figure 6 The computing device of FIG. 6 is merely illustrative. Distinctions are not made between “workstation,” “server,” “laptop,” “desktop,” “tablet,” “client device,” “mobile device,” “hand-held device,” “game console,” “electronic control unit (ECU),” “virtual reality system,” and / or other device or system types, as all are contemplated Figure 6 within the scope of the computing device of FIG. 6.

[0247] The interconnection system 602 can represent one or more links or buses, such as an address bus, a data bus, a control bus, or a combination thereof. The interconnection system 602 can include one or more link or bus types, such as an industry standard architecture (ISA) bus, an extended industry standard architecture (EISA) bus, a video electronics standards board (VESA) bus, a peripheral component interconnect (PCI) bus, a peripheral component interconnect express (PCIe) bus, and / or another type of bus or link. In some embodiments, there are direct connections between components. As an example, the CPU 606 can be directly connected to the memory 604. Also, the CPU 606 can be directly connected to the GPU 608. Where there are direct or point-to-point connections between components, the interconnection system 602 can include a PCIe link to perform the connection. In these examples, a PCI bus need not be included in the computing device 600.

[0248] The memory 604 can include any of a wide variety of computer-readable media. Computer-readable media can be any available media that can be accessed by the computing device 600. Computer-readable media can include volatile and nonvolatile media, removable and non-removable media. By way of example, and not limitation, computer-readable media can comprise computer storage media and communication media.

[0249] Computer storage media can include volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules, and / or other data types. For example, memory 604 can store computer readable instructions (e.g., representing a program and / or program elements, such as an operating system). Computer storage media can include, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by computing device 600. When information is here said to be "stored on" a computer storage medium, such as memory 604, it is meant that the information is stored in memory 604, or in another computer storage medium accessible by computing device 600.

[0250] Computer storage media can include computer readable instructions, data structures, program modules, and / or other data types in a modulated data signal, such as a carrier wave or other transport mechanism, and includes any information delivery media. The term "modulated data signal" can refer to a signal that has one or more of its characteristics set or changed in such a manner as to encode information in the signal. By way of example, and not limitation, computer storage media can include wired media such as a wired network or direct-wired connection, and wireless media such as acoustic, RF, infrared, and other wireless media. Combinations of the any of the above should also be included within the scope of computer readable media.

[0251] CPUs 606 can be configured to execute at least some of the computer readable instructions in order to control one or more components of computing device 600 to perform one or more of the methods and / or processes described herein. Each of CPUs 606 can include one or more cores (e.g., one, two, four, eight, twenty-eight, seventy-two, etc.) capable of processing a large number of software threads simultaneously. CPUs 606 can include any type of processors and can include different types of processors depending on the type of computing device 600 being implemented (e.g., processors with fewer cores for mobile devices and processors with more cores for servers). For example, depending on the type of computing device 600, the processors can be Advanced RISC Machines (ARM) processors implemented using reduced instruction set computing (RISC) or x86 processors implemented using complex instruction set computing (CISC). Computing device 600 can include one or more CPUs 606 in addition to one or more microprocessors or supplemental co-processors such as math co-processors.

[0252] In addition or alternatively to CPU 606, GPU 608 can be configured to execute at least some computer-readable instructions to control one or more components of computing device 600 to perform one or more methods and / or processes described herein. GPU(s) 608 can be integrated GPUs (e.g., with CPU(s) 606) and / or GPU(s) 608 can be discrete GPUs. In embodiments, GPU(s) 608 can be co-processors to CPU(s) 606. Computing device 600 can use GPU(s) 608 to render graphics (e.g., 3D graphics) or perform general-purpose computing. For example, GPU(s) 608 can be used for general-purpose computing on GPUs (GPGPU). GPU(s) 608 can include hundreds or thousands of cores capable of processing hundreds or thousands of software threads concurrently. GPU(s) 608 can generate pixel data for output images in response to rendering commands (e.g., rendering commands from CPU(s) 606 received via a host interface). GPU(s) 608 can include graphics memory, such as display memory, for storing pixel data or any other suitable data (e.g., GPGPU data). Display memory can be included as part of memory 604. GPU(s) 608 can include two or more GPUs operating in parallel (e.g., via a link). The link can connect the GPUs directly (e.g., using NVLINK) or through a switch (e.g., using NVSwitch). When combined together, each GPU 608 can generate pixel data or GPGPU data for different portions of an output or for different outputs (e.g., a first GPU for a first image and a second GPU for a second image). Each GPU can include its own memory or can share memory with other GPUs.

[0253] In addition or alternatively to CPU 606 and / or GPU 608, logic unit(s) 620 can be configured to execute at least some computer-readable instructions to control one or more components of computing device 600 to perform one or more methods and / or processes described herein. In embodiments, CPU(s) 606, GPU(s) 608, and / or logic unit(s) 620 can execute any combination of methods, processes, and / or portions thereof discretely or jointly. Logic unit(s) 620 can be part of and / or integrated with CPU(s) 606 and / or GPU(s) 608 and / or logic unit(s) 620 can be discrete components of or otherwise external to CPU(s) 606 and / or GPU(s) 608. In embodiments, logic unit(s) 620 can be processors of CPU(s) 606 and / or GPU(s) 608.

[0254] Examples of logic units 620 include one or more processing cores and / or components thereof, such as data processing units (DPUs), tensor cores (TCs), tensor processing units (TPUs), pixel visual cores (PVCs), visual processing units (VPUs), graphics processing clusters (GPCs), texture processing clusters (TPCs), streaming multi-processors (SMs), tree traversal units (TTUs), artificial intelligence accelerators (AIAs), deep learning accelerators (DLAs), arithmetic logic units (ALUs), application specific integrated circuits (ASICs), floating point units (FPUs), input / output (I / O) elements, peripheral component interconnects (PCI) or peripheral component interconnect express (PCIe) elements, and the like.

[0255] Communication interface 610 can include one or more receivers, transmitters, and / or transceivers that enable computing device 600 to communicate with other computing devices via electronic communication networks, including wired and / or wireless communication. Communication interface 610 can include components and functionality enabling communication over any of a number of different networks, such as wireless networks (e.g., Wi-Fi, Z-Wave, Bluetooth, Bluetooth LE, ZigBee, and the like), wired networks (e.g., communication over Ethernet or InfiniBand), low power wide area networks (e.g., LoRaWAN, SigFox, and the like), and / or the Internet. In one or more embodiments, one or more logic units 620 and / or communication interface 610 can include one or more data processing units (DPUs) for transferring data received over a network and / or over interconnect system 602 directly to one or more GPUs 608 (e.g., memory thereof).

[0256] I / O ports 612 can enable the computing device 600 to logically couple to other devices including I / O components 614, presentation components 618, and / or other components, some of which can be built in to (e.g., integrated in) the computing device 600. Illustrative I / O components 614 include a microphone, mouse, keyboard, joystick, game pad, game controller, satellite dish, scanner, printer, wireless device, etc. The I / O components 614 can provide a natural user interface (NUI) that processes air gestures, voice, or other physiological inputs generated by a user. In some instances, inputs can be transmitted to an appropriate network element for further processing. A NUI can implement any combination of speech recognition, stylus recognition, facial recognition, biometric recognition, gesture recognition both on screen and adjacent to the screen, air gestures, head and eye tracking, and touch recognition (as described in more detail below) associated with a display of the computing device 600. The computing device 600 can include depth cameras, infrared cameras, RGB cameras, touch screens, and combinations of these, such as a stereoscopic camera system to provide a depth map.

[0257] A power supply 616 can include a hard-wired power supply, a battery power supply, or a combination thereof. The power supply 616 can supply power to the computing device 600 to enable the components of the computing device 600 to operate.

[0258] The presentation components 618 can include a display (e.g., a monitor, a touch screen, a television, a heads-up display (HUD), other display types, or combinations thereof), speakers, and / or other presentation components. The presentation components 618 can receive data from other components (e.g., the GPU 608, the CPU 606, the DPU, etc.) and output that data (e.g., as images, video, sound, etc.).

[0259] Example data center

[0260] Figure 7 An example data center 700 is shown, which can be used in at least one embodiment of the present disclosure. The data center 700 can include a data center infrastructure layer 710, a framework layer 720, a software layer 730, and an application layer 740.

[0261] As Figure 7As shown, the data center infrastructure layer 710 can include a resource orchestrator 712, grouped computing resources 714, and node computing resources (“node C.R.”) 716(1)-716(N), where “N” represents any whole, positive integer. In at least one embodiment, the node C.R.s 716(1)-716(N) can include, but are not limited to, any number of central processing units (CPUs) or other processors (including DPUs, accelerators, field programmable gate arrays (FPGAs), graphics processors or graphics processing units (GPUs), etc.), memory devices (such as dynamic read-only memory), storage devices (such as solid state drives or disk drives), network input / output (NW I / O) devices, network switches, virtual machines (VMs), power modules, and cooling modules, etc. In some embodiments, one or more of the node C.R.s 716(1)-716(N) can correspond to a server having one or more of the above-described computing resources. Further, in some embodiments, the node C.R.s 716(1)-716(N) can include one or more virtual components, such as a vGPU, a vCPU, etc., and / or one or more of the node C.R.s 716(1)-716(N) can correspond to a virtual machine (VM).

[0262] In at least one embodiment, the grouped computing resources 714 can include separate groupings of node C.R.s 716 housed within one or more racks (not shown), or housed within a number of racks (also not shown) within various geographic locations of a data center. The separate groupings of node C.R.s 716 within the grouped computing resources 714 can include groupings of computing, network, memory, or storage resources that can be configured or allocated to support one or more workloads. In at least one embodiment, several node C.R.s 716 including CPUs, GPUs, DPUs, and / or other processors can be grouped within one or more racks to provide computing resources to support one or more workloads. The one or more racks can also include any number of power modules, cooling modules, and / or network switches in any combination.

[0263] The resource orchestrator 712 can configure or otherwise control the one or more node C.R.s 716(1)-716(N) and / or the grouped computing resources 714. In at least one embodiment, the resource orchestrator 712 can include a software design infrastructure (“SDI”) management entity for the data center 700. The resource orchestrator 712 can include hardware, software, or some combination thereof.

[0264] In at least one embodiment, as Figure 7As shown, framework layer 720 may include a job scheduler 733, a configuration manager 734, a resource manager 736, and a distributed file system 738. Framework layer 720 may include a framework for software 732 supporting software layer 730 and / or one or more applications 742 of application layer 740. Software 732 or application 742 may respectively include web-based service software or applications, such as service software or applications provided by Amazon Web Services, Google Cloud, and Microsoft Azure. Framework layer 720 may be, but is not limited to, a free and open-source software web application framework, such as Apache Spark, which can utilize distributed file system 738 for large-scale data processing (e.g., "big data"). TM (Hereinafter referred to as "Spark"). In at least one embodiment, the job scheduler 733 may include a Spark driver for facilitating the scheduling of workloads supported by various layers of data center 700. In at least one embodiment, the configuration manager 734 may be able to configure different layers, such as software layer 730 and framework layer 720 including Spark and a distributed file system 738 for supporting large-scale data processing. The resource manager 736 is able to manage cluster or grouped computing resources mapped to or allocated to support the distributed file system 738 and the job scheduler 733. In at least one embodiment, the cluster or grouped computing resources may include grouped computing resources 714 at data center infrastructure layer 710. The resource manager 736 may coordinate with the resource coordinator 712 to manage these mapped or allocated computing resources.

[0265] In at least one embodiment, the software 732 included in the software layer 730 may include software used by at least a portion of the nodes CR716(1)-716(N), the grouped computing resources 714, and / or the distributed file system 738 of the framework layer 720. One or more types of software may include, but are not limited to, Internet web page search software, email virus browsing software, database software, and streaming video content software.

[0266] In at least one embodiment, one or more application programs 742 included in application layer 740 can include one or more types of application programs used by at least portions of node C.R.s 716(1)-716(N), grouped computing resources 714, and / or distributed file system 738 of framework layer 720. One or more types of application programs can include, but are not limited to, any number of genomics applications, cognitive computing and machine learning applications, including training or inferencing software, machine learning framework software (e.g., PyTorch, TensorFlow, Caffe, etc.), and / or other machine learning applications used in conjunction with one or more embodiments.

[0267] In at least one embodiment, any of configuration manager 734, resource manager 736, and resource orchestrator 712 can implement any number and type of self-modification actions based on any number and type of data acquired in any technically feasible manner. Self-modification actions can relieve data center operators of data center 700 from making possibly poor configuration decisions and can avoid underutilized and / or poorly performing portions of a data center.

[0268] Data center 700 can include tools, services, software, or other resources for training one or more machine learning models or using one or more machine learning models to predict or infer information in accordance with one or more embodiments described herein. For example, a machine learning model can be trained in accordance with a neural network architecture computing weight parameters by using software and computing resources described above with respect to data center 700. In at least one embodiment, using weight parameters computed through one or more training techniques, a trained machine learning model corresponding to one or more neural networks can be used to infer or predict information using resources described above with respect to data center 700, such as but not limited to those described herein. In some embodiments, predicted information includes object detection results that are equivariant or invariant to a piecewise deformation of a set of input points in a scene.

[0269] In at least one embodiment, data center 700 can use CPUs, application specific integrated circuits (ASICs), GPUs, FPGAs, and / or other hardware (or virtual computing resources corresponding thereto) to perform training and / or inference using resources described above. Moreover, one or more software and / or hardware resources described above can be configured as a service to allow users to train or perform information inference, such as image recognition, speech recognition, or other artificial intelligence services.

[0270] Example Network Environment

[0271] Network environments suitable for implementing embodiments of the present disclosure can include one or more client devices, servers, network-attached storage (NAS), other backend devices, and / or other device types. The client devices, servers, and / or other device types (e.g., each device) can be implemented on one or more instances of the computing device 600— e.g., each device can include similar components, features, and / or functionality of the computing device 600. Moreover, where backend devices (e.g., servers, NAS, etc.) are implemented, the backend devices can be included as part of the data center 700, an example of which is described in more detail herein with respect to FIG. 7. Figure 6 Figure 7 are implemented in more detail.

[0272] Components of the network environment can communicate with each other over a network, which can be wired, wireless, or both. The network can include multiple networks, or a network of multiple networks. By way of example, the network can include one or more wide area networks (WANs), one or more local area networks (LANs), one or more public networks (such as the Internet and / or the public switched telephone network (PSTN)), and / or one or more private networks. Where the network includes a wireless telecommunications network, components such as base stations, communication towers, or even access points (among other components) can provide wireless connectivity.

[0273] Compatible network environments can include one or more peer-to-peer network environments (in which case servers can not be included in the network environment), as well as one or more client-server network environments (in which case one or more servers can be included in the network environment). In a peer-to-peer network environment, functionality described herein with respect to servers can be implemented on any number of client devices.

[0274] In at least one embodiment, the network environment can include one or more cloud-based network environments, distributed computing environments, combinations thereof, and the like. A cloud-based network environment can include a framework layer, a job scheduler, a resource manager, and a distributed file system implemented on one or more servers, which can include one or more core network servers and / or edge servers. The framework layer can include a framework for supporting one or more applications of a software layer and / or an application layer. The software or applications can include network-based service software or applications, respectively. In embodiments, the one or more client devices can use the network-based service software or applications (e.g., by accessing the service software and / or applications via one or more application programming interfaces (APIs)). The framework layer can be, without limitation, a type of free and open-source software web application framework, such as can be used for large-scale data processing (e.g., “big data”) using the distributed file system. ​

[0275] The cloud-based network environment can provide cloud computing and / or cloud storage that performs any combination of the computing and / or data storage functions described herein (or one or more portions thereof). Any of these various functions can be distributed across multiple locations from a central or core server (e.g., across one or more data centers in a state, region, country, globally, etc.). The core server can designate at least a portion of the functions to an edge server if the connection to the user (e.g., client device) is relatively close to the edge server. The cloud-based network environment can be private (e.g., limited to a single organization), public (e.g., available to many organizations), and / or a combination thereof (e.g., a hybrid cloud environment).

[0276] The client device can include at least some components, features, and functionality of the example computing device 600 described herein with respect to Figure 6 As examples and not by way of limitation, the client device can embody a personal computer (PC), a laptop computer, a mobile device, a smartphone, a tablet computer, a smartwatch, a wearable computer, a personal digital assistant (PDA), an MP3 player, a virtual reality headset, a global positioning system (GPS) or device, a video player, a video camera, a surveillance device or system, a vehicle, a watercraft, an aircraft, a virtual machine, a drone, a robot, a handheld communication device, a hospital device, a gaming device or system, an entertainment system, an in-vehicle computer system, an embedded system controller, a remote control, an appliance, a consumer electronic device, a workstation, an edge device, any combination of these described devices, or any other suitable device.

[0277] In summary, the disclosed technology trains and executes a neural network to generate machine learning predictions that are invariant with respect to segmentation of input data including point clouds and / or other collections of 3D points, among other things. In this context, segmentation invariance refers to the ability of the neural network to perform object detection, classification, segmentation, and / or other tasks that are consistent with respect to rigid motion of individual objects and / or scenes represented by the input data.

[0278] More specifically, the neural network includes a series of equivariant neural network layers that implement a segmentation-invariant function for iteratively updating a prediction that partitions the input data into different moving parts. The equivariant layers include a backbone that extracts features associated with a set of points in the input data and a component that transforms the features into equivariant features. The equivariant features are used to compute parameters that represent partitions associated with the points, and the parameters are updated over multiple iterations. The parameters can also be used to merge parts that are likely to transform together, resulting in a gradual coarsening of the partitions across the equivariant layers. The partitions output by a final equivariant layer of the neural network can then be used to generate a classification, segmentation, object detection, and / or another object recognition result associated with the points.

[0279] One technical advantage of the disclosed technology over existing approaches is the ability to handle per-object symmetries in three-dimensional (3D) object detection tasks by using equivariant layers in a neural network that transform from finer partitions of a set of input points representing a 3D scene to coarser partitions of the input points. Another technical advantage of the disclosed technology is the ability to bound errors associated with piecewise equivariances in a set of approximated input points. As such, the disclosed technology improves the ability of a neural network to generalize to objects associated with different orientations, positions, configurations, and / or other combinations of Euclidean motions. Further, because the disclosed technology improves performance and / or reduces errors associated with piecewise equivariances in approximated input points, the disclosed technology improves performance of a neural network on classification, segmentation, and / or other object recognition tasks.

[0280] 1. In some embodiments, a method comprises: determining a first prediction associated with partitioning a plurality of points in a representation of a scene into a first set of parts; generating, using a neural network, a second prediction associated with partitioning the plurality of points into a second set of parts based on at least one or more aggregates associated with the first set of parts; determining a plurality of piecewise equivariant regions in the scene based on the second prediction; and generating an object recognition result associated with the plurality of points based on the plurality of piecewise equivariant regions.

[0281] 2. The method of clause 1, wherein determining the first prediction comprises: randomly assigning at least one point included in the plurality of points to a part included in the first set of parts.

[0282] 3. The method of any one of clauses 1-2, wherein the first prediction is generated via execution of one or more equivariant layers of the neural network.

[0283] 4. The method of any one of clauses 1-3, wherein the second prediction comprises a conditional probability distribution over a plurality of partitions associated with the plurality of points.

[0284] 5. The method of any one of clauses 1-4, wherein determining the second prediction comprises: determining a plurality of centers associated with the plurality of piecewise equivariant regions based on at least an energy function comprising a log-likelihood of the conditional probability distribution.

[0285] 6. The method of any one of clauses 1-5, wherein the conditional probability distribution comprises a mixture of Gaussian distributions.

[0286] 7. The method of any one of clauses 1-6, further comprising: updating one or more parameters of the neural network based on one or more losses computed between the second prediction and a set of ground truth partition assignments associated with the plurality of points.

[0287] 8. The method of any one of clauses 1-7, wherein the one or more losses comprise a LI loss.

[0288] 9. The method of any one of clauses 1-8, wherein the object recognition result comprises at least one of a classification result, a segmentation result, or an object detection result.

[0289] 10. The method of any one of clauses 1-9, wherein the plurality of points are included in a point cloud.

[0290] 11. In some embodiments, a processor comprising: one or more processing units to perform operations comprising: determining a first prediction associated with partitioning a plurality of points included in a representation of a scene into a first set of parts; generating, using a neural network, a second prediction associated with partitioning the plurality of points into a second set of parts based at least on one or more aggregations associated with the first set of parts; determining a plurality of piecewise isometric regions in the scene based on the second prediction; and generating an object recognition result associated with the plurality of points based on the plurality of piecewise isometric regions.

[0291] 12. The processor of clause 11, wherein the operations further comprise: updating one or more parameters of the neural network based on a LI loss computed using at least one of the first prediction, the second prediction, or a set of ground truth partitions associated with the plurality of points.

[0292] 13. The processor of any one of clauses 11-12, wherein generating the second prediction comprises: generating, via execution of a first isometric layer of the neural network, a third prediction associated with the plurality of points based at least on an input comprising the first prediction; and generating, via execution of a second isometric layer of the neural network, the second prediction based at least on an input comprising the third prediction.

[0293] 14. The processor of any one of clauses 11-13, wherein generating the second prediction comprises: generating, using the neural network, one or more sets of isometric features associated with the first prediction; and generating the second prediction based on the one or more sets of isometric features.

[0294] 15. The processor of any one of clauses 11-14, wherein the first set of parts is greater than the second set of parts.

[0295] 16. The processor of any one of clauses 11-15, wherein the neural network comprises one or more isometric layers in an encoder that transforms the plurality of points into a latent representation.

[0296] 17. The processor of any of clauses 11-16, wherein the one or more isometric layers further comprise a decoder to generate the object recognition results based at least on the latent representation.

[0297] 18. The processor of any of clauses 11-17, wherein the processor is included in at least one of: a control system for an autonomous or semi-autonomous machine; a perception system for an autonomous or semi-autonomous machine; a system to perform one or more simulation operations; a system to perform one or more digital twin operations; a system to perform optical transport simulation; a system to perform 3D asset collaborative content creation; a system to perform one or more deep learning operations; a system implemented using an edge device; a system to generate or present at least one of virtual reality content, augmented reality content, or mixed reality content; a system implemented using a robot; a system to perform one or more conversational AI operations; a system to perform one or more generative AI operations; a system implementing one or more large language models (LLMs); a system implementing one or more visual language models (VLMs); a system to generate synthetic data; a system incorporating one or more virtual machines (VMs); a system implemented at least partially in a data center; or a system implemented at least partially using cloud computing resources.

[0298] 19. In some embodiments, a system comprising: one or more processing units; and one or more memory units storing instructions that, when executed by the one or more processing units, cause the one or more processing units to perform operations comprising: determining a first prediction associated with partitioning a plurality of points included in a representation of a scene into a first set of portions; generating, via a neural network, a second prediction associated with partitioning the plurality of points into a second set of portions based at least on one or more aggregations associated with the first set of portions; determining a plurality of segmented isometric regions included in the scene based on the second prediction; and generating object recognition results associated with the plurality of points based on the plurality of segmented isometric regions.

[0299] 20. The system of clause 19, wherein the system is included in at least one of: a control system for an autonomous or semi-autonomous machine; a perception system for an autonomous or semi-autonomous machine; a system for performing one or more simulation operations; a system for performing one or more digital twin operations; a system for performing optical transport simulation; a system for performing 3D asset collaborative content creation; a system for performing one or more deep learning operations; a system implemented using an edge device; a system for generating or presenting at least one of virtual reality content, augmented reality content, or mixed reality content; a system implemented using a robot; a system for performing one or more conversational AI operations; a system for performing one or more generative AI operations; a system implemented using one or more large language models (LLMs); a system implemented using one or more visual language models (VLMs); a system for generating synthetic data; a system incorporating one or more virtual machines (VMs); a system implemented at least partially in a data center; or a system implemented at least partially using cloud computing resources.

[0300] The present disclosure can be described in the general context of machine-usable instructions or computer code, including computer-executable instructions such as program modules, being executed by a computer or other machine, such as a personal data assistant or other handheld device. Generally, program modules include routines, programs, objects, components, data structures, and the like, that perform particular tasks or implement particular abstract data types. The present disclosure can be practiced in a variety of system configurations, including hand-held devices, consumer electronics, general- purpose computers, more specialty computing devices, and the like. The present disclosure can also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network.

[0301] As used herein, the term “and / or,” with respect to two or more elements, means that only one of the elements need be present or that the elements can be combined in any manner. For example, “element A, element B, and / or element C” can include only element A, only element B, only element C, element A and element B, element A and element C, element B and element C, or element A, B, and C. Further, “at least one of element A or element B” can include at least one of element A, at least one of element B, or at least one of element A and at least one of element B. Further still, “at least one of element A and element B” can include at least one of element A, at least one of element B, or at least one of element A and at least one of element B.

[0302] The subject matter of the present disclosure is described with specificity herein to meet statutory requirements. However, the description itself is not intended to limit the scope of this disclosure. Rather, the inventors have contemplated that the claimed subject matter might also be embodied in other ways, to include different steps or combinations of steps similar to the ones described in this document, in conjunction with other present or future technologies. Moreover, although the terms "step" and / or "block" might be used herein to connote different elements of methods employed, the terms should not be interpreted as implying any particular order among or between various steps herein disclosed unless and except when the order of individual steps is explicitly described.

Claims

1. A method comprising: Determine the first prediction associated with dividing multiple points in the representation of the scene into a first group of parts; Using a neural network, at least based on one or more aggregations associated with the first group of parts, a second prediction is generated that is associated with dividing the plurality of points into a second group of parts; Based on the second prediction, multiple segmented isotropic regions in the scenario are determined; as well as Based on the multiple segmented isotropic regions, object recognition results associated with the multiple points are generated.

2. The method of claim 1, wherein determining the first prediction comprises: At least one of the multiple points is randomly assigned to a portion of the first group.

3. The method of claim 1, wherein the first prediction is generated via the execution of one or more equivariant layers of the neural network.

4. The method of claim 1, wherein the second prediction comprises conditional probability distributions on a plurality of partitions associated with the plurality of points.

5. The method of claim 4, wherein determining the second prediction comprises: Multiple centers associated with the multiple piecewise isotropic regions are determined based at least on an energy function that includes the log-likelihood of the conditional probability distribution.

6. The method of claim 4, wherein the conditional probability distribution comprises a mixture of Gaussian distributions.

7. The method of claim 1, further comprising: One or more parameters of the neural network are updated based on one or more losses calculated between the second prediction and a set of truth partition assignments associated with the plurality of points.

8. The method of claim 7, wherein the one or more losses include L1 loss.

9. The method of claim 1, wherein the object recognition result includes at least one of classification result, segmentation result, or object detection result.

10. The method of claim 1, wherein the plurality of points are included in a point cloud.

11. A processor, comprising: One or more processing units, said one or more processing units being configured to perform operations including the following: Determine the first prediction associated with dividing multiple points included in the representation of the scene into a first group of parts; Using a neural network, at least based on one or more aggregations associated with the first group of parts, a second prediction is generated that is associated with dividing the plurality of points into a second group of parts; Based on the second prediction, multiple segmented isotropic regions in the scenario are determined; as well as Based on the multiple segmented isotropic regions, object recognition results associated with the multiple points are generated.

12. The processor of claim 11, wherein the operation further comprises: One or more parameters of the neural network are updated based on an L1 loss calculated using at least one of the first prediction, the second prediction, or a set of truth partitions associated with the plurality of points.

13. The processor of claim 11, wherein generating the second prediction comprises: A third prediction associated with the plurality of points is generated, at least based on the input including the first prediction, via the execution of the first equivariant layer of the neural network; as well as The second prediction is generated, at least based on the input including the third prediction, via the execution of the second equivariant layer of the neural network.

14. The processor of claim 11, wherein generating the second prediction comprises: The neural network is used to generate one or more sets of equivariant features associated with the first prediction; as well as The second prediction is generated based on one or more sets of equivalent features.

15. The processor of claim 11, wherein the first group of portions is larger than the second group of portions.

16. The processor of claim 11, wherein the neural network includes one or more equivariant layers in an encoder that transforms the plurality of points into latent representations.

17. The processor of claim 16, wherein the one or more equivariant layers are further included in a decoder that generates the object recognition result based at least on the latent representation.

18. The processor of claim 11, wherein the processor is included in at least one of the following: Control systems for autonomous or semi-autonomous machines; Sensing systems for autonomous or semi-autonomous machines; A system for performing one or more simulation operations; A system for performing one or more digital twin operations; A system for performing optical transmission simulation; A system for performing collaborative content creation for 3D assets; A system for performing one or more deep learning operations; Systems implemented using edge devices; A system for generating or presenting at least one of virtual reality content, augmented reality content, or mixed reality content; Systems implemented using robots; A system for performing one or more session AI operations; A system for performing one or more generative AI operations; A system that implements one or more large language model LLMs; A system that implements one or more Visual Language Models (VLMs); A system for generating synthetic data; A system that combines one or more virtual machines (VMs); A system that is at least partially implemented in a data center; or A system that utilizes cloud computing resources at least in part.

19. A system comprising: One or more processing units; as well as One or more memory cells storing instructions that, when executed by the one or more processing units, cause the one or more processing units to perform operations, the operations including: Determine the first prediction associated with dividing multiple points included in the representation of the scene into a first group of parts; A second prediction is generated via a neural network based at least on one or more aggregations associated with the first group of parts, which is associated with dividing the plurality of points into a second group of parts. Based on the second prediction, multiple segmented isotropic regions are determined, including those in the scenario; and Based on the multiple segmented isotropic regions, object recognition results associated with the multiple points are generated.

20. The system of claim 19, wherein the system is included in at least one of the following: Control systems for autonomous or semi-autonomous machines; Sensing systems for autonomous or semi-autonomous machines; A system for performing one or more simulation operations; A system for performing one or more digital twin operations; A system for performing optical transmission simulation; A system for performing collaborative content creation for 3D assets; A system for performing one or more deep learning operations; Systems implemented using edge devices; A system for generating or presenting at least one of virtual reality content, augmented reality content, or mixed reality content; Systems implemented using robots; A system for performing one or more session AI operations; A system for performing one or more generative AI operations; A system implemented using one or more large language model LLMs; A system implemented using one or more Visual Language Models (VLMs); A system for generating synthetic data; A system that combines one or more virtual machines (VMs); A system that is at least partially implemented in a data center; or A system that utilizes cloud computing resources at least in part.

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