LED driving current control circuit
By introducing a reference voltage generation circuit and transistor structure into the LED driver circuit, the problem of low accuracy in the low current dimming region of traditional LED driver circuits is solved, achieving high linearity and high precision current control, which is suitable for high-end display devices.
Patent Information
- Application Number
- CN202511439128.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-10
- Publication Date
- 2025-11-21
AI Technical Summary
Traditional LED driver circuits have low output current accuracy and poor linearity in the low current dimming region, which cannot meet the fine dimming and high uniformity requirements of high-end display devices.
By employing a combination of a reference voltage generation circuit, a first driving unit, a second driving unit, and a decoding control unit, a fixed reference voltage is generated through a reference current source and a reference resistor. Combined with a driving circuit composed of an operational amplifier and a transistor, high-precision current control is achieved.
Throughout the entire code range, especially at small code values, the linearity and accuracy of the output current are significantly improved, the influence of operational amplifier common-mode voltage variations on the current is eliminated, and high-precision dimming is achieved.
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Figure CN120998149A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of LED driving, in particular to an LED driving current control circuit. BACKGROUND
[0002] In the field of LED backlight driving chip, the traditional architecture controls the output current by the code outputted by digital analog converter (DAC) to realize the dimming function. The core structure is mainly divided into two kinds: the control circuit driving the cathode of LED lamp (such as shown in Figure 1 ) and the control circuit driving the anode of LED lamp (such as shown in Figure 2 ).
[0003] The traditional scheme is usually composed of reference current source (i), resistance string (r), data selector (MUX), operational amplifier (op), driving tube (M) and load resistance (r0) (wherein r=r0 or r / r0=k, k is a constant). Its working principle is: the reference current (i) flows through n series resistances (r) to generate n equal difference voltage taps. The digital Code outputted by DAC controls MUX to select a voltage tap to be connected to the positive input terminal (Vp) of op. In the traditional cathode driving circuit structure of Figure 1 : Vp=i*code*r; in the traditional anode driving circuit structure of Figure 2 : Vp=V pwer -i*code*r. By using the "virtual short" principle of operational amplifier, the voltage at the inverting input terminal Vn is approximately equal to Vp. The theoretical value of output current is: iled=i*code*r / r0.
[0004] The circuit structure in the above prior art has an inherent defect: the common mode input voltage (Vp) of operational amplifier will change dramatically with the change of Code outputted by DAC. In the cathode driving circuit, when the Code value (dimming current value) is very small, Vp is close to 0V. In the anode driving circuit, when the Code value is very small, Vp is close to Vpwer (power supply voltage).
[0005] Most operational amplifiers have a sharp performance degradation when the common-mode input voltage is close to the power rail (0V or Vpwer), which is manifested by a significant increase in the influence of the offset voltage (Vos), an increase in the influence of noise interference on the power and ground terminals, and a decrease in the gain and response speed of some operational amplifiers. Therefore, in actual circuits, the actual voltage difference across the operational amplifier is (Vp - Vos) ≈ Vn. This results in the actual output current becoming: LED actual driving current Iled_actual = (i * Code * r - Vos) / r0; since the offset voltage Vos accounts for a large proportion of (i * Code * r) when the Code value is small, a large deviation between the actual value and the theoretical value of the output current occurs in the small-current dimming region (low Code value), the linearity is poor, and the requirements of high-end display devices for fine dimming and high uniformity cannot be met.
[0006] Therefore, it is necessary to provide a new LED driving current control circuit to solve the problem of low precision of the LED driving current in the low-current dimming region in the prior art. SUMMARY
[0007] The technical problem to be solved by the present application is to provide a new LED driving current control circuit and a control method to solve the problem of an increase in the influence of the offset voltage (Vos) and a decrease in the output current precision caused by the change of the DAC Code in the traditional architecture. The purpose of the present application is to significantly improve the linearity and precision of the output current (iled) in the full Code range, especially when the Code value is small.
[0008] To achieve the above technical purpose, the present application provides an LED driving current control circuit, which comprises a reference voltage generation circuit, a first driving unit, a second driving unit and a decoding control unit.
[0009] The reference voltage generation circuit is composed of a reference current source and a reference resistor in series and generates a fixed reference voltage.
[0010] The first driving unit comprises an operational amplifier, a main driving transistor and a first load resistor; the reference voltage is connected to the non-inverting input terminal of the operational amplifier; the inverting input terminal of the operational amplifier is connected to the source of the main driving transistor; the output terminal of the operational amplifier is connected to the gate of the main driving transistor; the drain of the main driving transistor is connected to the LED light-emitting element; one end of the first load resistor is connected to the source of the main driving transistor, and the other end is connected to the ground or the power supply.
[0011] The second driving unit is composed of n parallel sub-driving channels with the same structure, each of which comprises a slave driving transistor, a two-alternative selector and a second load resistor; the drain of the slave driving transistor is connected to the LED light emitting element, the source of the slave driving transistor is connected to the second load resistor; the gate of the slave driving transistor is connected to the output of the two-alternative selector; the first input of the two-alternative selector is connected to the output of the operational amplifier op; the second input of the two-alternative selector is connected to an external power supply voltage or ground;
[0012] The decoding control unit converts the input driving current Iset code value into n-bit thermometer decoding, and each bit of the n-bit thermometer decoding is connected to the control end of the two-alternative selector in the n sub-driving channels one by one.
[0013] In one embodiment, the master driving transistor and the slave driving transistor are both NMOS transistors, and the LED driving current control circuit is a cathode control circuit of the LED light emitting element.
[0014] In one embodiment, the master driving transistor and the slave driving transistor are both PMOS transistors, and the LED driving current control circuit is an anode control circuit of the LED light emitting element.
[0015] In one embodiment, the minimum current accuracy of the LED driving current control circuit is set by adjusting the resistance ratio of the reference resistor and the first load resistor.
[0016] In one embodiment, when the driving current Iset is a high-bit code value, the decoding control unit adopts binary decoding to output the control signal, and when the driving current Iset is a low-bit code value, the decoding control unit adopts thermometer decoding to output the control signal.
[0017] Other features and advantages of the present application will be set forth in the following description, and in part will become apparent to those skilled in the art upon examination of the following or can be learned by practice of the present application. The objects and other advantages of the present application can be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings. BRIEF DESCRIPTION OF DRAWINGS
[0018] The accompanying drawings are included to provide a further understanding of the present application and are incorporated in and constitute a part of the specification, illustrate embodiments of the present application and together with the description serve to explain the present application, but are not intended to limit the present application in any manner. In the drawings:
[0019] Figure 1 is a schematic diagram of the LED cathode driving circuit structure in the prior art;
[0020] Figure 2 is a schematic diagram of a prior art LED anode driving circuit structure;
[0021] Figure 3 is a schematic diagram of a LED cathode driving circuit structure of the present application;
[0022] Figure 4 is a schematic diagram of a LED anode driving circuit structure of the present application. DETAILED DESCRIPTION
[0023] In order to make the objects, technical solutions, and advantages of the present application clearer, the following further describes the present application with reference to the accompanying drawings.
[0024] It should be understood that when an element or layer is referred to as being "on", "adjacent", "connected" or "coupled" to another element or layer, it can be directly on, adjacent, connected or coupled to the other element or layer, or intervening elements or layers can be present. In contrast, when an element is referred to as being "directly on", "directly adjacent", "directly connected" or "directly coupled" to another element or layer, then there are no intervening elements or layers present. It will be appreciated that, although terms such as first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. As a result, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present application. Conversely, a second element, component, region, layer or section discussed below could be termed a first element, component, region, layer or section without departing from the teachings of the present application.
[0025] Spatially relative terms, such as "beneath", "below", "lower", "under", "above", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if a device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" or "over" the other elements or features. Thus, the exemplary term "below" can encompass both an orientation of above and below. The device can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
[0026] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising” and / or “including,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.
[0027] Example 1
[0028] like Figure 3 As shown, the LED driving current control circuit of the present invention includes a reference voltage generation circuit 1, a first driving unit 2, a second driving unit 3, and a decoding control unit 4.
[0029] The reference voltage generation circuit 1 consists of a reference current source i and a reference resistor r connected in series, and generates a fixed reference voltage Vp, where Vp = i * r.
[0030] The first driving unit 2 includes an operational amplifier op, a main driving transistor M0, and a first load resistor R0 (with a resistance value of r0). A reference voltage Vp is connected to the non-inverting input of the operational amplifier op. By setting the values of i and r, the reference voltage Vp can be stably set within the common-mode voltage range where the op-amp's performance is optimal (e.g., 500mV, or an offset voltage Vos of 2mV), thus becoming independent of the DAC's input code. The inverting input of the operational amplifier op is connected to the feedback node, i.e., the source of the main driving transistor M0. The output of the operational amplifier op is connected to the gate of the main driving transistor M0, forming a negative feedback loop. This forces the voltage at the feedback node to equal the fixed reference voltage Vp and generates an adjustment voltage at the gate of the main driving transistor M0. The drain of the main driving transistor M0 is connected to an LED light-emitting element, and the source of the main driving transistor M0 is connected to one end of the first load resistor R0, with the other end of the first load resistor R0 grounded.
[0031] The second driving unit 3 is composed of n parallel sub-driving channels with the same structure, each of which includes a slave driving transistor (M1, …, Mn), a two-input selector (MUX1, …, MUXn) and a second load resistor (R1, …, Rn). The drain of the slave driving transistor is connected to the LED light-emitting element, the source of the slave driving transistor is connected to one end of the second load resistor, and the other end of the second load resistor is grounded. The first input of the two-input selector is connected to the output of the operational amplifier op, i.e., to the gate of the master driving transistor. The second input of the two-input selector is grounded. Meanwhile, the first load resistor and the second load resistor are resistive elements with the same resistance value.
[0032] In this embodiment, the master driving transistor and the slave driving transistor are both NMOS transistors.
[0033] The decoding control unit 4 is a thermometer code decoder, which converts the input driving current Iset code value into an n-bit binary code, and each bit of the n-bit binary code is connected to the control end of the two-input selector in the n sub-driving channels one by one.
[0034] In this embodiment, since the gate voltages of all the turned-on driving transistors (the master driving transistor M0 and the K slave driving transistors) are the same (all controlled by the output of the same operational amplifier), and their sizes are exactly the same, and the load resistors are also exactly the same (all being r0), the current of each branch is equal, denoted as I_unit.
[0035] The feedback node voltage is clamped by the operational amplifier at the reference voltage Vp, so the current of each branch I_unit = Vp / r0 = (i * r) / r0. The total output current is the sum of the currents of all the turned-on branches. The master driving transistor M0 is always turned on to provide one I_unit, and the K slave driving transistors are turned on to provide K I_units. Therefore, the total current is: iled = (K + 1) * I_unit = (Code + 1) * i * r / r0
[0036] As can be seen, the LSB (the smallest current unit) of the driving current control circuit in this embodiment is i * r / r0, which can be set by adjusting the ratio of r to r0 in this application. Most importantly, the voltage Vp at the non-inverting input of the operational amplifier is always a fixed value i * r, which does not change with Code, thereby completely eliminating the defects of the traditional structure and achieving high-precision dimming.
[0037] Example 2
[0038] AsFigure 4 As shown in the figure, the LED driving current control circuit of the present application comprises a reference voltage generating circuit 10, a first driving unit 20, a second driving unit 30 and a decoding control unit 40.
[0039] The reference voltage generating circuit 10 is composed of a reference current source i and a reference resistance r in series, and generates a fixed reference voltage Vp, and Vp = Vpwer - i * r.
[0040] The first driving unit 20 comprises an operational amplifier op, a main driving transistor M0 and a first load resistance R0 (with resistance value r0). The reference voltage Vp is connected to the positive input terminal of the operational amplifier op. By setting the values of i and r, the reference voltage Vp can be stably set within the common-mode voltage range of the operational amplifier op (such as 500 mV, etc., with an offset voltage Vos of 2 mv), thus being irrelevant to the input Code of the DAC. The inverting input terminal of the operational amplifier op is connected to the feedback node, i.e. the source of the main driving transistor M0 or the low potential end of the first load resistance R0. The output of the operational amplifier op is connected to the gate of the main driving transistor M0, forming a negative feedback loop, which forces the voltage of the feedback node to be equal to the fixed reference voltage Vp, and generates the adjustment voltage of the gate of the main driving transistor M0. The drain of the main driving transistor M0 is connected to the high potential end of the LED light emitting element, the source of the main driving transistor M0 is connected to the low potential end of the first load resistance R0, and the high potential end of the first load resistance R0 is connected to the power supply Vpwer.
[0041] The second driving unit 30 is composed of n parallel sub-driving channels with the same structure, each of which comprises a slave driving transistor (M1, …, Mn), a two-input selector (MUX1, …, MUXn) and a second load resistance (R1, …, Rn). The drain of the slave driving transistor is connected to the high potential end of the LED light emitting element, the source of the slave driving transistor is connected to the low potential end of the second load resistance, and the high potential end of the second load resistance is connected to the power supply Vpwer. The first input terminal of the two-input selector is connected to the output of the operational amplifier op, i.e. to the gate of the main driving transistor. The second input terminal of the two-input selector is connected to the power supply Vpwer. Meanwhile, the first load resistance and the second load resistance are resistance elements with the same resistance value.
[0042] In this embodiment, the main driving transistor and the slave driving transistor are both PMOS transistors.
[0043] The decoding control unit 40 is a thermometer code decoder, which converts the input drive current Iset code value into n-bit binary code, and each bit of the n-bit binary code is connected to the control end of the two-way selector in the n sub-drive channels one by one.
[0044] In this embodiment, since the gate voltages of all the turned-on drive tubes (the main drive transistor M0 and the K slave drive transistors) are the same (all controlled by the same op-amp output), their sizes are completely the same, and the load resistances are also completely the same (all r0), the current of each branch is equal, denoted as I_unit.
[0045] The feedback node voltage is clamped by the op-amp at the reference voltage Vp, so each current I_unit = Vp / r0 = (i * r) / r0. The total output current is the sum of the currents of all the turned-on branches. The main drive tube M0 is always turned on to provide one I_unit, and the K turned-on slave drive tubes provide K I_units. Therefore, the total current is: Iled = (K + 1) * I_unit = (Code + 1) * i * r / r0
[0046] Therefore, the LSB (minimum current precision) of the drive current control circuit in this embodiment is i * r / r0, which can be set by adjusting the ratio of r to r0 in this application. Most importantly, the positive input voltage Vp of the op-amp is always a fixed value i * r, which does not change with Code, thereby completely eliminating the defects of the traditional structure and achieving high-precision dimming.
[0047] Example 3
[0048] In this embodiment, on the basis of Embodiments 1 and 2, the electrical characteristics of the slave drive transistors in the n sub-drive channels and the ratio of the second load resistances (r1...rn) to the size of the main drive tube (M0) and the main load resistance (r0) are further improved in this embodiment, so that the drive currents generated by the n sub-drive channels are no longer the same as the drive current generated by the first drive channel, but the parallel array of the output currents presents a binary proportionally increasing (such as: I_unit / 2 I_unit / 4 I_unit...); at the same time, the decoding control unit uses the binary decoding output signal to control the turn-on and turn-off of the drive tube array through the two-way MUX.
[0049] Example 4
[0050] In this embodiment, on the basis of the above-mentioned embodiments 1 and 2, the coding control unit is further improved in this embodiment, and a segmented coding structure is adopted. That is, when the driving current Iset is a high-bit Code value, a binary coding control coarse tuning current source is adopted, and when the driving current Iset is a low-bit Code value, a thermometer coding control fine tuning array is adopted.
[0051] The above-described embodiments are only used to illustrate the technical solutions of the present application, but not limit the present application; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still make modifications to the technical solutions recorded in the foregoing embodiments, or make equivalent replacements to some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims
1. An LED drive current control circuit, characterized in that: The LED driving current control circuit includes a reference voltage generation circuit, a first driving unit, a second driving unit, and a decoding control unit. The reference voltage generation circuit consists of a reference current source and a reference resistor connected in series, and generates a fixed reference voltage. The first driving unit includes an operational amplifier, a main driving transistor, and a first load resistor; a reference voltage is connected to the non-inverting input terminal of the operational amplifier; the inverting input terminal of the operational amplifier is connected to the source of the main driving transistor; the output terminal of the operational amplifier is connected to the gate of the main driving transistor; the drain of the main driving transistor is connected to the LED light-emitting element; one end of the first load resistor is connected to the source of the main driving transistor, and the other end is grounded or powered. The second driving unit consists of n parallel sub-driving channels with the same structure. Each sub-driving channel includes a slave driving transistor, a 2-to-1 selector, and a second load resistor. The drain of the slave driving transistor is connected to the LED light-emitting element, and the source of the slave driving transistor is connected to the second load resistor. The gate of the slave driving transistor is connected to the output terminal of the 2-to-1 selector. The first input terminal of the 2-to-1 selector is connected to the output terminal of the operational amplifier op. The second input terminal of the 2-to-1 selector is connected to an external power supply voltage or ground. The decoding control unit converts the input drive current Iset code value into an n-bit thermometer decoder, and each bit of the binary code of the n-bit thermometer decoder is connected to the control terminal of the two-to-one selector in the n sub-drive channels.
2. The LED drive current control circuit according to claim 1, characterized in that, Both the master driving transistor and the slave driving transistor are NMOS transistors, and the LED driving current control circuit is the cathode control circuit of the LED light-emitting element.
3. The LED drive current control circuit according to claim 1, characterized in that, Both the master driving transistor and the slave driving transistor are PMOS transistors, and the LED driving current control circuit is the anode control circuit of the LED light-emitting element.
4. The LED drive current control circuit according to claim 1, characterized in that, The minimum current accuracy of the LED drive current control circuit is set by adjusting the resistance ratio of the reference resistor to the first load resistor.
5. The LED drive current control circuit according to claim 1, characterized in that, When the drive current Iset is a high-order code value, the decoding control unit uses binary decoding to output the control signal; when the drive current Iset is a low-order code value, the decoding control unit uses thermometer decoding to output the control signal.
Citation Information
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