Semiconductor module, integrated module, controller and vehicle

Abstract

The invention discloses a semiconductor module, an integrated module, a controller and a vehicle, the semiconductor module comprises at least two semiconductor devices, a control signal input part and a control signal output part, and each semiconductor device comprises a first electrode and a second electrode; a first electrode of each semiconductor device is electrically connected with the control signal input part, and a second electrode of each semiconductor device is electrically connected with the control signal output part; and from the control signal input part to the control signal output part, the conductive path lengths of signals flowing through each semiconductor device are equal. For any semiconductor device, the switching delay of the semiconductor device can be reduced, the current loop stray inductance is reduced, and the working reliability of the semiconductor module can be improved.

Description

Technical Field

[0001] This application belongs to the field of power electronics technology, specifically relating to a semiconductor module, integrated module, controller, and vehicle. Background Technology

[0002] With the increasing development of new energy vehicles, power modules are widely used in the field of new energy vehicle technology. Currently, power modules have become an important component in motor controllers, inverters, and new energy charging piles in new energy vehicles.

[0003] In related technologies, the complex circuit connection design of multiple chips in a power module extends the response time of the chipset and affects the performance of the power module. Summary of the Invention

[0004] This application aims to provide a semiconductor module, integrated module, controller, and vehicle that can solve the problem in related technologies where the complex circuit connection design of multiple chips in a power module leads to an extended response time of the chipset, affecting the performance of the power module.

[0005] To solve the above-mentioned technical problems, this application is implemented as follows:

[0006] In a first aspect, this application proposes a semiconductor module, which includes at least two semiconductor devices, a control signal input section and a control signal output section, wherein the semiconductor devices include a first electrode and a second electrode;

[0007] The first electrode of each semiconductor device is electrically connected to the control signal input section, and the second electrode of each semiconductor device is electrically connected to the control signal output section;

[0008] From the control signal input section to the control signal output section, the conductive path length of the signal flowing through each of the semiconductor devices is equal.

[0009] Optionally, the semiconductor device further includes a third electrode;

[0010] The first electrode and the second electrode are disposed on a first side of the semiconductor device, and the third electrode is disposed on a second side of the semiconductor device. The first side and the second side are opposite sides of the semiconductor device along a first direction.

[0011] At least two of the semiconductor devices are arranged along a second direction, and the first and second directions are perpendicular.

[0012] Optionally, the semiconductor module is a module corresponding to the upper bridge circuit or the lower bridge circuit, and the first side of the semiconductor device located at different positions has the same orientation.

[0013] Secondly, this application proposes an integrated module, the outer surface of which is provided with DC terminals, AC terminals, voltage detection terminals and multiple control terminals;

[0014] The distance between the plurality of control terminals and / or the voltage detection terminals and the DC terminals is less than the distance between them and the AC terminals.

[0015] Optionally, at least three of the DC terminal, the AC terminal, the voltage detection terminal, and the plurality of control terminals are arranged on the same straight line.

[0016] Optionally, the outer surface of the integrated module is further provided with a temperature detection terminal, which is used to connect a temperature sensor;

[0017] Along the thickness direction of the integrated module, the orthographic projection of the temperature sensing terminal is at least partially located within the orthographic projection of any semiconductor device inside the integrated module.

[0018] Optionally, along the thickness direction of the integrated module, the orthographic projection of the temperature sensor is located inside the orthographic projection of any of the semiconductor devices.

[0019] Optionally, it includes two of the aforementioned semiconductor modules, which are electrically connected.

[0020] Optionally, the two semiconductor modules include a first semiconductor module and a second semiconductor module arranged at intervals along a first direction, and the first semiconductor module and the second semiconductor module are arranged symmetrically along a second direction, wherein the first direction intersects the second direction.

[0021] Optionally, the DC terminal includes a positive DC terminal and a negative DC terminal;

[0022] The DC positive terminal is electrically connected to the back electrode of the semiconductor device in the first semiconductor module;

[0023] The DC negative terminal is electrically connected to the third electrode of the semiconductor device in the second semiconductor module.

[0024] Optionally, the plurality of control terminals include a first control terminal, a second control terminal, a third control terminal, and a fourth control terminal;

[0025] The first control terminal is electrically connected to the second electrode of the first semiconductor module, and the third control terminal is electrically connected to the first electrode of the first semiconductor module.

[0026] The second control terminal is electrically connected to the second electrode of the second semiconductor module, and the fourth control terminal is electrically connected to the first electrode of the second semiconductor module.

[0027] Optionally, the first control terminal, the second control terminal, the third control terminal, the fourth control terminal, and the voltage detection terminal are arranged on the same straight line.

[0028] Optionally, the integrated module further includes a first control trace, a second control trace, a third control trace, and a fourth control trace;

[0029] The third control trace is used to connect the second electrode of the semiconductor device in the first semiconductor module to the first control terminal, and the third control trace is used to connect the first electrode of the semiconductor device in the first semiconductor module. The length of the third control trace is greater than the length of the first control trace.

[0030] The second control trace is used to connect the second control terminal and the second electrode of the second semiconductor module, and the fourth control trace is connected to the fourth control terminal and the first electrode of the second semiconductor module. The length of the fourth control trace is greater than the length of the second control trace.

[0031] Optionally, the first control trace, the second control trace, the third control trace, and the fourth control trace are metal structures located on the same layer; and / or,

[0032] The integrated module also includes a solder mask layer disposed on the outer surface of the integrated module, wherein the first control trace, the second control trace, the third control trace, and the fourth control trace are the same metal structure closest to the solder mask layer.

[0033] Optionally, the integrated module further includes a substrate, the substrate comprising a first conductive layer, a ceramic layer and a second conductive layer stacked sequentially;

[0034] The second conductive layer includes a first sub-conductive layer and a second sub-conductive layer that are insulated from each other;

[0035] The first semiconductor module is disposed on the first sub-conductive layer, and the back electrode of the semiconductor device in the first semiconductor module is electrically connected to the first sub-conductive layer;

[0036] The second semiconductor module is disposed on the second sub-conductive layer, and the back electrode of the semiconductor device in the second semiconductor module is electrically connected to the second sub-conductive layer.

[0037] Optionally, the integrated module further includes a first metal layer, a second metal layer, a third metal layer, a first connector, a second connector, and a third connector;

[0038] The first metal layer, the second metal layer, and the third metal layer are stacked sequentially on the side of the semiconductor module away from the substrate, and an insulating layer is provided between adjacent layers of the substrate, the first metal layer, the second metal layer, and the third metal layer.

[0039] The first connector passes through the insulating layer between the substrate and the first metal layer, electrically connecting the first metal layer to the semiconductor device.

[0040] The second connector passes through the insulating layer between the first metal layer and the second metal layer, and electrically connects the second metal layer to the first metal layer;

[0041] The third connector passes through the insulating layer between the second metal layer and the third metal layer, electrically connecting the third metal layer to the second metal layer; wherein, the third metal layer includes the DC terminal, the AC terminal, the voltage detection terminal, and a plurality of the control terminals.

[0042] Optionally, the first conductive element is fixed and electrically connected to the semiconductor module and / or the second conductive layer via a conductive medium.

[0043] Thirdly, this application also proposes an integrated module, which includes a substrate and any of the aforementioned semiconductor modules, as well as a first conductive element;

[0044] The semiconductor module is fixed on the substrate and electrically connected to the substrate to form a package core;

[0045] The first conductive element is fixed and electrically connected to the package core through a conductive medium.

[0046] Fourthly, this application also proposes a controller, which includes any of the aforementioned semiconductor modules or any of the aforementioned integrated modules.

[0047] Fifthly, this application also proposes a vehicle comprising any of the aforementioned semiconductor modules, or any of the aforementioned integrated modules, or any of the aforementioned controllers.

[0048] In embodiments of this application, a semiconductor module includes at least two electrically connected semiconductor devices, a control signal input section adapted to receive external control signals, and a control signal output section to output control signals to the outside. Each semiconductor device includes a first electrode and a second electrode. In this semiconductor module, the first electrode of each semiconductor device is electrically connected to the control signal input section, and the second electrode of each semiconductor device is electrically connected to the control signal output section. External signals enter the semiconductor module from the control signal input section and flow out from the control signal output section. For each semiconductor device, the conductive path length from the control signal input section to the control signal output section is equal. Therefore, since the conductive path length of the external control signal flowing through each semiconductor device is equal, the switching delay of the semiconductor devices can be reduced, current loop noise inductance can be lowered, and the operational reliability of the semiconductor module can be improved.

[0049] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0050] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:

[0051] Figure 1 This is a schematic diagram of the arrangement and connection of various semiconductor devices in a semiconductor module according to an embodiment of this application;

[0052] Figure 2a This is an embodiment of the present application. Figure 1 A schematic diagram of the control signal transmission path of the first semiconductor device in a semiconductor module;

[0053] Figure 2b This is an embodiment of the present application. Figure 1 A schematic diagram of the control signal transmission path for the second semiconductor device in a semiconductor module;

[0054] Figure 2c This is an embodiment of the present application. Figure 1 A schematic diagram of the control signal transmission path for the third semiconductor device in a semiconductor module;

[0055] Figure 2d This is an embodiment of the present application. Figure 1 A schematic diagram of the control signal transmission path for the fourth semiconductor device in a semiconductor module;

[0056] Figure 2e This is an embodiment of the present application. Figure 1 A schematic diagram of the control signal transmission path for the fifth semiconductor device in a semiconductor module;

[0057] Figure 2f This is an embodiment of the present application. Figure 1 A schematic diagram of the control signal transmission path for the sixth semiconductor device in a semiconductor module;

[0058] Figure 3 This is a schematic diagram of the electrode distribution of semiconductor devices in a semiconductor module according to an embodiment of this application;

[0059] Figure 4 This is a schematic diagram of the terminal distribution on the outer surface of an integrated module according to an embodiment of this application;

[0060] Figure 5 This is a schematic diagram illustrating the composition and arrangement of an integrated module according to an embodiment of this application;

[0061] Figure 6 This is a schematic diagram of the shape of a third metal layer according to an embodiment of this application;

[0062] Figure 7 This is a cross-sectional view along the thickness direction of an integrated module according to an embodiment of this application;

[0063] Figure 8 This is a schematic diagram of the shape of a first metal layer according to an embodiment of this application;

[0064] Figure 9 This is a schematic diagram of the shape of a second metal layer according to an embodiment of this application;

[0065] Figure 10 This is a flowchart illustrating a method for manufacturing an integrated module according to an embodiment of this application;

[0066] Figure 11 This is a cross-sectional schematic diagram of the fixed connection between the semiconductor device and the substrate according to an embodiment of this application;

[0067] Figure 12 This is a cross-sectional schematic diagram showing the connection between the metal block and the semiconductor device and substrate in an embodiment of this application;

[0068] Figure 13 This is a cross-sectional schematic diagram of the potting and encapsulation of the first component according to an embodiment of this application;

[0069] Figure 14 This is a cross-sectional schematic diagram of the connection between the metal block and the first metal layer in an embodiment of this application;

[0070] Figure 15 This is a cross-sectional schematic diagram of the connection between the first metal layer and the third metal layer in an embodiment of this application;

[0071] Figure 16 This is a cross-sectional schematic diagram of an integrated module with a solder resist layer according to an embodiment of this application.

[0072] Figure label:

[0073] 100, Substrate; 110, First conductive layer; 111, Ceramic layer; 112, Second conductive layer; 112a, First sub-conductive layer; 112b, Second sub-conductive layer;

[0074] 20. Semiconductor module; 20a. First semiconductor module; 20b. Second semiconductor module; 21. Semiconductor device; 21a. First electrode; 21b. Second electrode; 21c. Third electrode; 22. Control signal input unit; 23. Control signal output unit;

[0075] 300. First metal layer; 310. First conductive foil; 311. Second conductive foil; 312. Third conductive foil; 313. Fourth conductive foil; 314. Fifth conductive foil;

[0076] 400, First connector; 410, First sub-connector; 411, Second sub-connector; 412, Third sub-connector; 413, Fourth sub-connector; 414, Fifth sub-connector; 415, Sixth sub-connector; 420, Metal block; 420a, First metal block; 420b, Second metal block; 420c, Third metal block; 420d, Fourth metal block; 420e, Fifth metal block; 420f, Sixth metal block;

[0077] 500. Second metal layer; 510. Sixth conductive foil; 511. Seventh conductive foil; 512. Eighth conductive foil; 513. Ninth conductive foil; 514. Tenth conductive foil;

[0078] 600. Second connector; 610. Seventh sub-connector; 611. Eighth sub-connector; 612. Ninth sub-connector; 613. Tenth sub-connector; 614. Eleventh sub-connector;

[0079] 700, Third metal layer; 710, DC terminal; 710a, DC positive terminal; 710b, DC negative terminal; 711, AC terminal; 712, Voltage detection terminal; 713, Control terminal; 713a, First control terminal; 713b, Second control terminal; 713c, Third control terminal; 713d, Fourth control terminal; 714, First control trace; 715, Second control trace; 716, Third control trace; 717, Fourth control trace; 718, Temperature detection terminal;

[0080] 800. Third connector; 810. Twelfth sub-connector; 811. Thirteenth sub-connector; 812. Fourteenth sub-connector; 813. Fifteenth sub-connector; 814. Sixteenth sub-connector;

[0081] 900. Insulation layer. Detailed Implementation

[0082] The embodiments of this application will now be described in detail. Examples of these embodiments are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0083] The terms "first" and "second" in the specification and claims of this application may explicitly or implicitly include one or more of the features. In the description of this application, unless otherwise stated, "multiple" means two or more. Furthermore, "and / or" in the specification and claims indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0084] In the description of this application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0085] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0086] The following description, in conjunction with the accompanying drawings, details a semiconductor module, integrated module, controller, and vehicle provided in this application through specific embodiments and application scenarios.

[0087] like Figure 1 The diagram shown is a simplified schematic of the arrangement and electrical connection of the semiconductor module 20 according to an embodiment of this application. The semiconductor module 20 includes at least two semiconductor devices 21, a control signal input section 22, and a control signal output section 23.

[0088] exist Figure 1 In this application, each semiconductor device 21 includes a first electrode 21a and a second electrode 21b. The first electrode 21a serves as the electrode for receiving control signals, and the second electrode 21b serves as the electrode for outputting control signals. It should be noted that the semiconductor device 21 can specifically refer to an electronic component that utilizes the electrical properties of semiconductor materials (such as silicon, silicon carbide, etc.) to achieve a specific function. In this application, the semiconductor device 21 refers to an electronic device having a semiconductor substrate on which a trench gate is formed to achieve a certain function. For example, when the semiconductor device 21 is an IGBT chip, the first electrode 21a can be its gate, and the second electrode 21b can be its Kelvin source. In addition, the semiconductor device 21 can also be other switching chips with a structure similar to that of an IGBT chip and at least some of the same functions, such as any one of MOSFETs, transistors, thyristors, etc. Those skilled in the art can choose the specific device type according to actual needs, and this application does not impose any restrictions on this. To facilitate the introduction of the technical solutions of the embodiments of this application, the following text will also use an IGBT chip as an example to describe the structure of the semiconductor module 20 and the integrated module and controller described below.

[0089] Figure 1 In the illustration, Figure 1 In each semiconductor device 21, the first electrode 21a is electrically connected to the control signal input section 22, and the second electrode 21b of each semiconductor device 21 is electrically connected to the control signal output section 23.

[0090] When an external control signal is input to the semiconductor module 20 from the control signal input unit 22, it enters the corresponding semiconductor device 21 through each first electrode 21a, and then is output from the second electrode 21b of the corresponding semiconductor device 21 to the control signal output unit 23, and finally output from the control signal output unit 23.

[0091] Figures 2a to 2f The diagrams show the paths of the control signals flowing through each semiconductor device 21. Figure 2a Taking the control signal flowing through the first semiconductor device 21 on the left as an example, after the control signal input unit 22 receives the signal, it enters the semiconductor device 21 through the first electrode 21a, and then is transmitted from the second electrode 21b of the semiconductor device 21 to the control signal output unit 23, which outputs the signal to the outside. Figures 2b to 2f The path of the control signal flowing through other semiconductor devices 21 is shown. Figure 2a The analysis process is similar and will not be repeated here.

[0092] Combination Figures 2a to 2fAs can be seen from the diagram, the structure of this semiconductor module 20 and the electrical connection of each semiconductor device 21 therein can make the path length of the control signal flowing through each semiconductor device 21 equal. This path refers to the signal transmission path between the control signal input section 22 and the control signal output section 23.

[0093] For the semiconductor module 20 formed by arranging and connecting multiple IGBT chips, the signal transmission path in this embodiment is also referred to as the gate drive circuit. The semiconductor module 20 can be a module corresponding to a half-bridge circuit, such as the upper or lower bridge in a full-bridge circuit. Therefore, when the semiconductor device 21 is an IGBT chip, the gate drive circuit length of each parallel chip in the semiconductor module 20 of this embodiment is equal, and the current path through each chip is equal. This reduces the switching delay of chips at different distances from the control signal input section 22, reduces current loop noise, and improves the operational reliability of the half-bridge circuit.

[0094] Optionally, such as Figure 3 As shown, the semiconductor device 21 in this embodiment further includes a third electrode 21c. The first electrode 21a and the second electrode 21b are disposed on a first side of the semiconductor device 21, and the third electrode 21c is disposed on a second side of the semiconductor device 21. The first side and the second side are opposite sides of the semiconductor device, and the first side and the second side are opposite sides of the semiconductor device 21 along the first direction Y. At least two semiconductor devices 21 are arranged along the second direction X, and the first direction Y and the second direction X are perpendicular.

[0095] Taking the IGBT chip as an example of semiconductor device 21, the third electrode 21c of semiconductor device 21 can be the source of the IGBT chip. (Refer to...) Figure 3 As shown in the diagram, the first electrode 21a and the second electrode 21b are both located on the lower side of the semiconductor device 21, and the third electrode 21c is located on the upper side of the semiconductor device 21.

[0096] When multiple semiconductor devices 21 are pressed Figure 3 After the schematic rules are arranged in a straight line and connected in parallel, the control signal input unit 22 can be located at any part of the semiconductor module 20 connected to the first electrode 21a, and the control signal output unit 23 can be located at any part of the semiconductor module 20 connected to the second electrode 21b, satisfying the requirement that the control signal is input from the control signal input unit 22 and output from the control signal output unit 23. For example, in Figure 3 In the schematic semiconductor module 20, the control signal input unit 22 can be located near the first semiconductor device 21 on the left along the first direction X, and the control signal output unit 23 can be located near the last semiconductor device 21 on the right along the first direction X.

[0097] The arrangement of the semiconductor devices 21 in the semiconductor module 20 is more regular and orderly, which can reduce the complexity of the metal traces that arrange the semiconductor devices 21 in parallel.

[0098] Alternatively, in one implementation, such as Figure 3 As shown, the semiconductor module 20 formed by multiple semiconductor devices 21 connected in parallel is a module corresponding to a half-bridge circuit, such as a module corresponding to the upper bridge circuit or the lower bridge circuit in a full-bridge circuit.

[0099] Regardless of whether it's the upper bridge circuit or the lower bridge circuit, in the semiconductor module 20, the first side of the semiconductor devices 21 located at different positions all face the same direction. Combined with... Figure 3 As shown in the diagram, along the X direction from left to right, the first electrode 21a and the second electrode 21b of each semiconductor device 21 face downwards. It can be understood that at this time, the third electrode 21c of each semiconductor device 21 located at different positions also faces the same direction, which is upwards.

[0100] This more regular and uniform arrangement makes it easier to design the drive circuit and signal circuit of the semiconductor module in the same layer, which can reduce the number of conductive layers in the semiconductor module packaging, reducing process difficulty and cost. At the same time, power traces and signal traces can be spaced a certain distance, which helps to reduce signal interference.

[0101] like Figure 4 The diagram shows the external surface structure of an integrated module according to an embodiment of this application. The external surface of the integrated module in this embodiment exposes a DC terminal 710, an AC terminal 711, a voltage detection terminal 712, and multiple control terminals 713. The DC terminal 710 can be connected to a DC power supply, for example, to a power battery pack of an electric vehicle. The AC terminal 711 can be connected to a load device, for example, to a drive motor of an electric vehicle. The voltage detection terminal 712 can be used to output the voltage signal of the semiconductor device 21 inside the integrated module to the outside to analyze the operating state of the integrated module. The multiple control terminals 713 can be connected to an external main control device, for example, to the ECU of an electric vehicle, to receive control signals from the ECU, thereby changing the operating state of the semiconductor device 21 inside the integrated module to achieve signal conversion control between the DC terminal 710 and the AC terminal 711. It is understood that these DC terminals 710, AC terminals 711, voltage detection terminals 712 and multiple control terminals 713 are all terminal structures that extend outward after the semiconductor devices 21 inside the integrated module are electrically connected. For their specific connection structure, please refer to the detailed description of the embodiments below.

[0102] In this embodiment, the exposed terminals have the following characteristics: at least some of the multiple control terminals 713 and voltage detection terminals 712 are spaced closer to the DC terminal 710 than they are spaced closer to the AC terminal 711. That is, the multiple control terminals 713 and / or voltage detection terminals 712 are closer to the DC terminal 710. Arranging the terminals according to this rule, such that the DC terminal 710, voltage detection terminal 712, and control terminal 713 transmitting low-voltage signals are concentrated close together and far away from the AC terminal 711 transmitting high-voltage signals, is more conducive to high-voltage and low-voltage wiring when connecting to external main control equipment. This reduces wiring length and complexity, and helps to reduce the size of the external main control equipment.

[0103] Optionally, such as Figure 4 As shown, in one embodiment, at least three of the DC terminal 710, AC terminal 711, voltage detection terminal 712, and multiple control terminals 713 exposed on the outer surface of the integrated module can be arranged on the same straight line. This facilitates the arrangement of external low-voltage control signal lines electrically connected to these terminals.

[0104] It should be noted that the terminals in the embodiments of this application are arranged on the same straight line. The straight line can be a standard straight line with high straightness, or it can be a line with a certain error, and its trajectory is approximately straight.

[0105] Optionally, such as Figure 4 As shown in the embodiment of this application, the outer surface of the integrated module is further provided with a temperature detection terminal 718, which is used to connect a temperature sensor. Furthermore, along the thickness direction Z of the integrated module, the orthographic projection of the temperature detection terminal 718 is at least partially located within the orthographic projection of any semiconductor device 21 inside the integrated module. That is, when viewed along the thickness direction Z of the integrated module, the temperature detection terminal 718 at least partially overlaps with one of the semiconductor devices 21 inside the integrated module.

[0106] Since the thickness of the integrated module is already relatively thin during actual processing and packaging, that is, the distance between the temperature detection terminal 718 and the top of the semiconductor device 21 inside the integrated module is small, by exposing the temperature detection terminal 718 and then installing the temperature sensor on the outside of the integrated module and above the semiconductor device 21, a shorter heat transfer path can be provided, and the temperature detection result is more accurate.

[0107] Optionally, in one embodiment, with the temperature sensing terminal 718 exposed, after the temperature sensor is connected to the temperature sensing terminal 718, the orthographic projection of the temperature sensor is located inside the orthographic projection of any semiconductor device 21 along the thickness direction of the integrated module. In this structure, the temperature sensor is positioned directly above the corresponding semiconductor device 21, resulting in the shortest heat transfer path and further improving the accuracy of the temperature detection results.

[0108] Optionally, in one embodiment, the integrated module of this application may include the two semiconductor modules 20 described in the foregoing embodiments, and the two semiconductor modules 20 are electrically connected. After electrically connecting the two semiconductor modules 20, they can be packaged into an integrated module with richer electrical control functions. Specifically, taking an IGBT chip as the semiconductor device 21 as an example, one semiconductor module 20 may be the module corresponding to the upper bridge circuit, and the other semiconductor module 20 may be the module corresponding to the lower bridge circuit. In this case, the integrated module is a power module corresponding to a full-bridge circuit.

[0109] Optionally, in one embodiment, in the integrated module of this application, two semiconductor modules 20

[0110] Optionally, such as Figure 5 As shown, in one embodiment, the two semiconductor modules 20 include a first semiconductor module 20a and a second semiconductor module 20b. The two semiconductor modules 20 are arranged at intervals along a first direction Y, and are symmetrically arranged about a second direction X as an axis of symmetry. That is, as... Figure 5 As illustrated, in the first semiconductor module 20a, the first electrodes 21a and second electrodes 21b of all semiconductor devices 21 face downwards, while in the second semiconductor module 20b, the first electrodes 21a and second electrodes 21b of all semiconductor devices 21 face upwards. It should be noted that the first direction X and the second direction Y mentioned above are intersecting directions. In some embodiments, the first direction X and the second direction Y can be perpendicular to each other to reduce the complexity of the packaging structure.

[0111] Understandably, taking the IGBT chip as the semiconductor device 21 as an example, if the first semiconductor module 20a is the module corresponding to the upper bridge circuit of the integrated module, the second semiconductor module 20b can be the module corresponding to the lower bridge circuit of the integrated module. Arranging the two semiconductor modules as shown in the diagram makes it easier to design the driving circuit and signal circuit of the semiconductor module in the same layer, reducing the number of conductive layers during semiconductor module packaging and lowering process difficulty and cost. At the same time, power traces and signal traces can be spaced a certain distance, which helps reduce signal interference.

[0112] Alternatively, in one implementation, such as Figure 4 As shown, in the integrated module of this application embodiment, the exposed DC terminal 710 includes a DC positive terminal 710a and a DC negative terminal 710b. The DC positive terminal 710a is electrically connected to the back electrode of the semiconductor device 21 in the first semiconductor module 20a. The DC negative terminal 710b is electrically connected to the third electrode of the semiconductor device 21 in the second semiconductor module 20b. Specifically, the electrical connection between the DC terminal 710 on the exterior of the integrated module and the semiconductor device 21 inside the integrated module can be achieved through a conductive layer disposed inside the integrated module, as described in the following embodiments.

[0113] Taking the IGBT chip as the semiconductor device 21 as an example, the DC positive terminal 710a can be electrically connected to the drain on the back of the semiconductor device 21 in the first semiconductor module 20a through the conductive layer inside the integrated module, and the DC negative terminal 710b can be electrically connected to the source of the semiconductor device 21 in the second semiconductor module 20a through the conductive layer inside the integrated module.

[0114] When the first semiconductor module 20a corresponds to the upper bridge circuit and the second semiconductor module 20b corresponds to the lower bridge circuit, for this integrated module, DC current can flow from the DC positive terminal 710a through the drain of the IGBT chip in the upper bridge circuit to enter the upper bridge circuit, and then flow through the lower bridge circuit, and from the source of the IGBT chip in the lower bridge circuit to the DC negative terminal 710b. Thus, the DC current passes through the complete full-bridge circuit, and the full-bridge circuit processes the DC current.

[0115] Alternatively, in one implementation, such as Figure 4 As shown, in the integrated module of this application embodiment, when the integrated module includes a first semiconductor module 20a and a second semiconductor module 20b, each semiconductor device 21 in each semiconductor module 20 has two electrodes for transmitting low-voltage control signals (as described in the previous embodiment, the first electrode 21a and the second electrode 21b), and in each semiconductor module 20, each first electrode 21a is electrically connected together, and each second electrode 21b is electrically connected together. Therefore, four control terminals 713 are exposed on the outer surface of the integrated module, namely the first control terminal 713a, the second control terminal 713b, the third control terminal 713c, and the fourth control terminal 713d.

[0116] The first control terminal 713a is electrically connected to the second electrode 21b of the first semiconductor module 20a, and the third control terminal 713c is electrically connected to the first electrode 21a of the first semiconductor module 20a. External control signals can flow into the first semiconductor module 20a through the third control terminal 713c and flow out of the first semiconductor module 20a through the first control terminal 713a, thereby controlling the operating state of the first semiconductor module 20a.

[0117] The second control terminal 713b is electrically connected to the second electrode 21b of the second semiconductor module 20b, and the fourth control terminal 713d is electrically connected to the first electrode 21a of the second semiconductor module 20b. External control signals can flow into the second semiconductor module 20b through the fourth control terminal 713d and out of the second semiconductor module 20b through the second control terminal 713b, thereby controlling the operating state of the second semiconductor module 20b.

[0118] Taking the IGBT chip as the semiconductor device 21 as an example, the first control terminal 713a can be electrically connected to the Kelvin source of the semiconductor device 21 in the first semiconductor module 20a through the conductive layer inside the integrated module. The third control terminal 713c can be electrically connected to the gate of the first semiconductor module 20a through the conductive layer inside the integrated module. The second control terminal 713b can be electrically connected to the Kelvin source of the semiconductor device 21 in the second semiconductor module 20b through the conductive layer inside the integrated module. The fourth control terminal 713d can be electrically connected to the gate of the second semiconductor module 20b through the conductive layer inside the integrated module. For details on the conductive layer inside the integrated module, please refer to the description of some embodiments below.

[0119] Alternatively, in one implementation, such as Figure 4 As shown, when the control terminal 713 includes the first control terminal 713a, the second control terminal 713b, the third control terminal 713c, and the fourth control terminal 713d, these four control terminals 713 and the voltage detection terminal 712, a total of five low-voltage signal terminals, can be arranged on the same straight line. This allows the low-voltage control signal lines corresponding to the two semiconductor modules 20 to be more concentrated and closer together, reducing the wiring difficulty of the low-voltage control signal lines.

[0120] It should also be noted that, similar to the aforementioned embodiments, the five terminals defined in this application embodiment are arranged on the same straight line, wherein the straight line can be a standard straight line with high straightness, or it can be a line with a certain error, and its trajectory is approximately straight.

[0121] Alternatively, in one implementation, such as Figure 6 As shown, in order to achieve the arrangement of multiple control terminals 713 and voltage detection terminals 712 on the same straight line, the integrated module of this application embodiment also includes a first control line 714, a second control line 715, a third control line 716, and a fourth control line 717.

[0122] The first control trace 714 is used to electrically connect the first control terminal 713a and the second electrode 21b of the semiconductor device 21 in the first semiconductor module 20a. The third control trace 716 is used to electrically connect the third control terminal 713c and the first electrode 21a of the semiconductor device 21 in the first semiconductor module 20a. The length of the third control trace 716 is greater than the length of the first control trace 714.

[0123] The second control trace 715 is used to electrically connect the second control terminal 713b and the second electrode 21b of the semiconductor device 21 in the second semiconductor module 20b. The fourth control trace 717 is used to electrically connect the fourth control terminal 713d and the first electrode 21a of the semiconductor device 21 in the second semiconductor module 20b. The length of the fourth control trace 717 is greater than the length of the second control trace 715.

[0124] In specific implementations, the first control trace 714, the second control trace 715, the third control trace 716, and the fourth control trace 717 can be a metal layer independent of other structures in the integrated module. These four control traces included in this metal layer can be electrically connected to the corresponding semiconductor module 20 through a conductive layer inside the integrated module. For details on the conductive layer inside the integrated module, please refer to the descriptions of some embodiments below.

[0125] Optionally, in one embodiment, the first control trace 714, the second control trace 715, the third control trace 716, and the fourth control trace 717 of this application embodiment can be metal structures located on the same layer along the thickness direction of the integrated module. Designing these traces within the same layer helps reduce the number of trace layers and facilitates a thinner design of the integrated module. In other embodiments, when the integrated module also includes a solder mask layer disposed on the outer surface of the integrated module, the first control trace 714, the second control trace 715, the third control trace 716, and the fourth control trace 717 can be metal structures on the same layer closest to the solder mask layer. That is, from the direction of the solder mask layer to the interior of the integrated module, the inner side of the solder mask layer is where these control traces are located. It is understandable that in the actual packaging and manufacturing of integrated modules, these control traces and control terminals electrically connected to the corresponding control traces can be processed first. Then, the solder mask layer on the surface of the integrated module can be prepared. The solder mask layer can be an insulating material such as resin, located above these control traces, and avoiding the DC terminal 710, AC terminal 711, voltage detection terminal 712 and multiple control terminals 713 described in the aforementioned embodiments, so that these terminals can be exposed on the surface of the integrated module.

[0126] Understandably, when preparing the solder mask layer on the surface of the integrated module, although the solder mask layer is located above these control traces and forms an insulating protective structure that is not on the same layer as these control traces, the solder mask layer can still adhere to these control traces and cover all control traces by means of the adhesive properties of its own material.

[0127] Alternatively, in one implementation, such as Figure 7 The diagram shows a cross-sectional view of a portion of an integrated module according to an embodiment of this application. The integrated module also includes a substrate 100, which supports and fixes various semiconductor devices 21. The substrate 100 can be a double-sided copper-clad ceramic substrate, comprising a central ceramic layer 111 and first conductive layers 110 and second conductive layers 112 on either side of the ceramic layer 111. The central ceramic layer 111 can be made of materials such as alumina, silicon nitride, and aluminum nitride. Both the first conductive layer 110 and the second conductive layer 112 can be copper layers. The first conductive layer 110, as the lower copper layer, can be used to connect to a heat sink to improve heat dissipation performance, while the second conductive layer 112, as the upper copper layer, can be used to solder and fix the semiconductor devices 21.

[0128] Combination Figure 7 As illustrated, the second conductive layer 112 includes a first sub-conductive layer 112a and a second sub-conductive layer 112b. The first sub-conductive layer 112a and the second sub-conductive layer 112b are located on the same side surface of the ceramic layer 111 and are insulated from each other. A groove can be formed in the first sub-conductive layer 112a to embed each semiconductor device 21 in the first semiconductor module 20a, and the back electrode of each semiconductor device 21 in the first semiconductor module 20a can be soldered to the first sub-conductive layer 112a. Similarly, a groove can be formed in the second sub-conductive layer 112b to embed each semiconductor device 21 in the second semiconductor module 20b, and the back electrode of each semiconductor device 21 in the second semiconductor module 20b can be soldered to the second sub-conductive layer 112b. It is understood that when the semiconductor device 21 is an IGBT chip, the back electrode of the semiconductor device 21 is the drain of the IGBT chip. When the semiconductor device 21 is embedded in the groove, it has a certain distance from the groove wall. The surface of the semiconductor device 21 is flush with the second conductive layer 112. This is beneficial to prevent the semiconductor device 21 from being crushed during pressing.

[0129] Optionally, such as Figure 7 As shown, the integrated module in this embodiment further includes a first metal layer 300, a second metal layer 500, a third metal layer 700, a first connector 400, a second connector 600, and a third connector 800. Combined with... Figure 7The diagram illustrates that the first metal layer 300, the second metal layer 500, and the third metal layer 700 are all conductive structures parallel to the planes formed by the X and Y directions. Along the thickness direction Z of the integrated module, the first metal layer 300, the second metal layer 500, and the third metal layer 700 are located at different layer heights, electrically connecting different semiconductor devices 21 at their respective layer heights. The first connector 400, the second connector 600, and the third connector 800 extend along the thickness direction Z of the integrated module, electrically connecting the metal layers at different levels. For example, the first metal layer 300, the second metal layer 500, and the third metal layer 700 can be copper layers sequentially stacked on the side of the semiconductor module 20 away from the substrate 100, and the first connector 400, the second connector 600, and the third connector 800 can be vias filled with conductive dielectric material disposed along the thickness direction Z of the integrated module.

[0130] like Figure 7 As shown, in order to prevent short circuits, an insulating layer 900 is provided between adjacent two layers in the substrate 100, the first metal layer 300, the second metal layer 500 and the third metal layer 700. The insulating layer 900 can be an insulating film formed after the insulating adhesive coated between the adjacent two layers has been cured.

[0131] Combination Figure 7 The diagram illustrates the specific setup of each metal layer and each connector as follows:

[0132] The first connector 400 is provided with an insulating layer 900 that penetrates between the substrate 100 and the first metal layer 300 along the Z direction shown in the figure. The upper part of the first connector 400 is connected to the first metal layer 300, and the lower part of the first connector 400 is connected to the second conductive layer 112 in the substrate 100. Since the semiconductor device 21 is also soldered on the second conductive layer 112, the first metal layer 300 is also indirectly connected to the semiconductor device 21.

[0133] The second connector 600 is provided along the Z direction as shown in the figure, through the insulating layer 900 between the first metal layer 300 and the second metal layer 500. The upper part of the second connector 600 is connected to the second metal layer 500, and the lower part of the second connector 600 is connected to the first metal layer 300.

[0134] The third connector 800 is provided with an insulating layer 900 that penetrates between the third metal layer 700 and the second metal layer 500 along the Z direction shown in the figure. The upper part of the third connector 800 is connected to the third metal layer 700, and the lower part of the third connector 800 is connected to the second metal layer 500.

[0135] The third metal layer 700 is the top conductive connection structure of the integrated module. The aforementioned DC terminal 710, AC terminal 711, voltage detection terminal 712 and multiple control terminals 713 can be set in the third metal layer 700 to form external connection terminals.

[0136] Alternatively, in one implementation, such as Figure 8 As illustrated in the diagram, embodiments of this application also demonstrate the pattern shape of the first metal layer 300. Specifically, the first metal layer 300 includes a first conductive foil 310, a second conductive foil 311, and a third conductive foil 312 located within the same planar layer, and these three are separated and disconnected within the layer. (In conjunction with...) Figure 7 As illustrated, the first connector 400 includes a first sub-connector 410, a second sub-connector 411, a third sub-connector 412, and a fourth sub-connector 413.

[0137] Combination Figure 7 and Figure 8 As illustrated, the first sub-connector 410 passes through the insulating layer 900 between the substrate 100 and the first metal layer 300 along the Z direction shown in the figure, electrically connecting the first conductive foil 310 to the first sub-conductive layer 112a. Of course, the first conductive foil 310 is also indirectly connected to the DC terminal 710 on the surface of the integrated module through other structures, as detailed in the specific description of the embodiments below.

[0138] Combination Figure 7 and Figure 8 As illustrated, the second sub-connector 411 passes through the insulating layer 900 between the substrate 100 and the first metal layer 300 along the Z direction shown in the figure, electrically connecting the second conductive foil 311 to the third electrode of the semiconductor device 21 in the first semiconductor module 20a. Of course, the second conductive foil 311 is also indirectly connected to the AC terminal 711 on the surface of the integrated module through other structures, as detailed in the specific description of the embodiments below.

[0139] Combination Figure 7 and Figure 8 As illustrated, the third sub-connector 412 passes through the insulating layer 900 between the substrate 100 and the first metal layer 300 along the Z direction shown in the figure, electrically connecting the first metal layer 311 and the second sub-conductive layer 112b. Thus, the electrical connection between the first semiconductor module 20a and the second semiconductor module 20b is achieved.

[0140] Combination Figure 7 and Figure 8As illustrated, the fourth sub-connector 413 passes through the insulating layer 900 between the substrate 100 and the first metal layer 300 along the Z direction shown in the figure, electrically connecting the third conductive foil 312 to the third electrode of the semiconductor device 21 in the second semiconductor module 20b. Of course, the third conductive foil 312 is also indirectly connected to the DC terminal 710 on the surface of the power module through other structures, as detailed in the specific description of the embodiments below.

[0141] Taking the semiconductor device 21 using an IGBT chip as an example, the current sequentially passes through the first conductive foil 310, the first sub-connector 410, and the first sub-conductive layer 112a to reach the drain of the corresponding semiconductor device 21. Then, from the third electrode of the semiconductor device 21 (i.e., the source of the IGBT chip), it flows through the second sub-connector 411 to the second conductive foil 311, and then through other conductive structures to the AC terminal 711 for output to the load. The current returning from the load flows to the second conductive foil 311, then through the third sub-connector 412 to the second sub-conductive layer 112b, and then to the drain of the corresponding semiconductor device 21. From the third electrode of the semiconductor device 21 (i.e., the source of the IGBT chip), it flows through the fourth sub-connector 413 to the third conductive foil 312, and then through other conductive structures to the DC terminal 710.

[0142] Therefore, the first conductive foil 310, the second conductive foil 311, and the third conductive foil 312, as well as the first sub-connector 410, the second sub-connector 411, the third sub-connector 412, and the fourth sub-connector 413, together connect to form the drive circuit of the first layer of the integrated module.

[0143] Optionally, such as Figure 7 and Figure 8 As illustrated, the first metal layer 300 further includes a fourth conductive foil 313 and a fifth conductive foil 314, which are disposed in the same layer as the first conductive foil 310, and are separated and disconnected within this layer. Correspondingly, the first connector 400 also includes a fifth sub-connector 414 and a sixth sub-connector 415.

[0144] Combination Figure 7 and Figure 8 As illustrated, the number of the fourth conductive foil 313, the fifth conductive foil 314, the fifth sub-connector 414, and the sixth sub-connector 415 are all the same as the total number of semiconductor devices 21 included in the integrated module.

[0145] A portion of the fifth sub-connector 414 passes through the insulating layer 900 between the substrate 100 and the first metal layer 300, electrically connecting the second electrode 10b of the semiconductor device 21 in the first semiconductor module 20a to the fourth conductive foil 313 at the corresponding position. A portion of the sixth sub-connector 415 passes through the insulating layer 900 between the substrate 100 and the first metal layer 300, electrically connecting the first electrode 10a of the semiconductor device 21 in the first semiconductor module 20a to the fifth conductive foil 314 at the corresponding position.

[0146] Another portion, the fifth sub-connector 414, passes through the insulating layer 900 between the substrate 100 and the first metal layer 300, electrically connecting the second electrode 10b of the semiconductor device 21 in the second semiconductor module 20b to the fourth conductive foil 313 at the corresponding position. Another portion, the sixth sub-connector 415, passes through the insulating layer 900 between the substrate 100 and the first metal layer 300, electrically connecting the first electrode 10a of the semiconductor device 21 in the second semiconductor module 20b to the fifth conductive foil 314 at the corresponding position.

[0147] For example, in the case of an IGBT chip, the fifth sub-connector 414 connects its Kelvin source to the corresponding fourth conductive foil 313, and the sixth sub-connector 415 connects its gate to the corresponding fifth conductive foil 314. It should be noted that the corresponding fourth conductive foil 313 refers to the fourth conductive foil 313 whose projected position coincides with the second electrode 10b along the Z direction. The corresponding fifth conductive foil 314 refers to the fifth conductive foil 314 whose projected position coincides with the first electrode 10a along the Z direction.

[0148] Therefore, some of the fifth sub-connectors 414 and the sixth sub-connector 415 can lead the two control electrodes of each semiconductor device 21 in the first semiconductor module 20a upwards to the corresponding fourth conductive foil 313 and fifth conductive foil 314, so as to receive external control signals to control the working state of each semiconductor device 21 in the first semiconductor module 20a. Other parts of the fifth sub-connectors 414 and the sixth sub-connector 415 can lead the two control electrodes of each semiconductor device 21 in the second semiconductor module 20b upwards to the corresponding fourth conductive foil 313 and fifth conductive foil 314, so as to receive external control signals to control the working state of each semiconductor device 21 in the second semiconductor module 20b.

[0149] Optionally, such as Figure 9 As illustrated, the second metal layer 500 includes a sixth conductive foil 510, a seventh conductive foil 511, and an eighth conductive foil 512 located in the same planar layer, and these three are separated and disconnected within the layer. Figure 7As illustrated, the second connector 600 includes a seventh sub-connector 610, an eighth sub-connector 611, and a ninth sub-connector 612.

[0150] Combination Figures 7 to 9 As illustrated, the seventh sub-connector 610 passes through the insulating layer 900 between the first metal layer 300 and the second metal layer 500 along the Z direction shown in the figure, electrically connecting the first conductive foil 310 and the sixth conductive foil 510. That is, the sixth conductive foil 510 is connected above the first conductive foil 310. The sixth conductive foil 510 is also indirectly connected to the DC terminal 710 on the surface of the integrated module through other structures, as detailed in the specific description of the embodiments below.

[0151] Combination Figures 7 to 9 As illustrated, the eighth sub-connector 611 passes through the insulating layer 900 between the first metal layer 300 and the second metal layer 500 along the Z direction shown in the figure, electrically connecting the second conductive foil 311 and the seventh conductive foil 511. That is, the seventh conductive foil 511 is connected above the second conductive foil 311. The seventh conductive foil 511 is also indirectly connected to the AC terminal 711 on the surface of the integrated module through other structures, as detailed in the specific description of the embodiments below.

[0152] Combination Figures 7 to 9 As illustrated, the ninth sub-connector 612 passes through the insulating layer 900 between the first metal layer 300 and the second metal layer 500 along the Z direction shown in the figure, electrically connecting the third conductive foil 312 and the eighth conductive foil 512. That is, the eighth conductive foil 512 is connected above the third conductive foil 312. The eighth conductive foil 512 is also indirectly connected to the DC terminal 710 on the surface of the integrated module through other structures, as detailed in the specific description of the embodiments below.

[0153] Taking the semiconductor device 21 using an IGBT chip as an example, the current sequentially flows through the sixth conductive foil 510, the seventh sub-connector 610, the first conductive foil 310, the first sub-connector 410, and the first sub-conductive layer 112a to reach the drain of the corresponding semiconductor device 21. Then, from the third electrode of the semiconductor device 21 (i.e., the source of the IGBT chip), it flows through the second sub-connector 411 to the second conductive foil 311, and then through the eighth sub-connector 611, the seventh conductive foil 511, and other conductive structures to the AC terminal 711 for output to the load. The current returning from the load flows to the second conductive foil 311, then through the third sub-connector 412 to the second sub-conductive layer 112b, and then to the drain of the corresponding semiconductor device 21. From the third electrode of the semiconductor device 21 (i.e., the source of the IGBT chip), it flows through the fourth sub-connector 413 to the third conductive foil 312, and then through the ninth sub-connector 612, the eighth conductive foil 512, and other conductive structures to the DC terminal 710.

[0154] Therefore, the sixth conductive foil 510, the seventh conductive foil 511, and the eighth conductive foil 512, as well as the seventh sub-connector 610, the eighth sub-connector 611, and the ninth sub-connector 612, together form the driving circuit of the second layer of the integrated module. Since the current in the driving circuit is relatively large, it is difficult to carry such a large current if only thin conductive elements are placed along the Z direction. The larger-area sixth conductive foil 510, the seventh conductive foil 511, and the eighth conductive foil 512 can act as a transition in the middle of the integrated module, which is beneficial for transmitting large currents. Furthermore, it should be noted that, regardless of which connector's metal layer, when different parts of the metal layer are misaligned and cannot be aligned, the connection transition part can be designed with a chamfered connection structure, for example... Figure 9 The eighth conductive foil 512 has a parallelogram connection structure. This increases the width of the connection transition area, which is beneficial for carrying a larger current.

[0155] Optionally, such as Figures 7 to 9 As illustrated, the second metal layer 500 further includes a ninth conductive foil 513 and a tenth conductive foil 514. The ninth conductive foil 513, the tenth conductive foil 514, and the sixth conductive foil 510 are disposed in the same layer, and the ninth conductive foil 513 and the tenth conductive foil 514 are separated and disconnected within this layer. Correspondingly, the second connector 600 also includes a tenth sub-connector 613 and an eleventh sub-connector 614.

[0156] Combination Figures 6 to 9 As illustrated, the ninth conductive foil 513 and the tenth conductive foil 514 are both long strip-shaped metal traces, and there are two of each. The number of the tenth sub-connector 613 and the eleventh sub-connector 614 is the same as the total number of semiconductor devices 11 included in the integrated module.

[0157] A portion of the tenth sub-connector 613 passes through the insulating layer 900 between the first metal layer 300 and the second metal layer 500, electrically connecting the ninth conductive foil 513 corresponding to the first semiconductor module 20a to the fourth conductive foil 313 at the corresponding position. A portion of the eleventh sub-connector 614 passes through the insulating layer 900 between the first metal layer 300 and the second metal layer 500, electrically connecting the tenth conductive foil 514 corresponding to the first semiconductor module 20a to the fifth conductive foil 314 at the corresponding position.

[0158] Another portion, the tenth sub-connector 613, passes through the insulating layer 900 between the first metal layer 300 and the second metal layer 500, electrically connecting the ninth conductive foil 513 corresponding to the second semiconductor module 20b to the fourth conductive foil 313 at the corresponding position. Another portion, the eleventh sub-connector 614, passes through the insulating layer 900 between the first metal layer 300 and the second metal layer 500, electrically connecting the tenth conductive foil 514 corresponding to the second semiconductor module 20b to the fifth conductive foil 314 at the corresponding position.

[0159] For example, in the case of an IGBT chip, the tenth sub-connector 613 connects the ninth conductive foil 513 to the fourth conductive foil 313 at the corresponding position, and the eleventh sub-connector 614 connects the tenth conductive foil 514 to the fifth conductive foil 314 at the corresponding position. It should be noted that the fourth conductive foil 313 at the corresponding position refers to the fourth conductive foil 313 whose projected position coincides with the ninth conductive foil 513 along the Z direction. Similarly, the fifth conductive foil 314 at the corresponding position refers to the fifth conductive foil 314 whose projected position coincides with the tenth conductive foil 514 along the Z direction.

[0160] Therefore, some of the tenth sub-connectors 613 and eleventh sub-connectors 614 can lead the two control electrodes of each semiconductor device 21 in the first semiconductor module 20a upwards to the corresponding ninth conductive foil 513 and tenth conductive foil 514, so as to receive external control signals to control the working state of each semiconductor device 21 in the first semiconductor module 20a. Other parts of the tenth sub-connectors 613 and eleventh sub-connectors 614 can lead the two control electrodes of each semiconductor device 21 in the second semiconductor module 20b upwards to the corresponding ninth conductive foil 513 and tenth conductive foil 514, so as to receive external control signals to control the working state of each semiconductor device 21 in the second semiconductor module 20b.

[0161] Optionally, such as Figure 6 As shown, the third connector 800 in this embodiment includes a twelfth sub-connector 810, a thirteenth sub-connector 811, and a fourteenth sub-connector 812.

[0162] Combination Figure 6 and Figure 7As illustrated, the twelfth sub-connector 810 passes through the insulating layer 900 between the second metal layer 500 and the third metal layer 700 along the Z direction, electrically connecting both the DC positive terminal 710a and the voltage detection terminal 712 to the sixth conductive foil 510. For example, if the semiconductor device 21 uses an IGBT chip, the voltage detection terminal 712 is connected to the drain of the corresponding semiconductor device 21 in the first semiconductor module 20a through the sixth conductive foil 510 and the connection structure below it. In addition, the sixth conductive foil 510 also achieves a cross-layer connection with the DC positive terminal 710a through the twelfth sub-connector 810.

[0163] Combination Figure 6 and Figure 7 As illustrated, the thirteenth sub-connector 811 passes through the insulating layer 900 between the second metal layer 500 and the third metal layer 700, electrically connecting the DC negative terminal 710b to the eighth conductive foil 512. The eighth conductive foil 512 achieves a cross-layer connection with the DC negative terminal 710b through the thirteenth sub-connector 811.

[0164] Combination Figure 6 and Figure 7 As illustrated, the fourteenth sub-connector 812 passes through the insulating layer 900 between the second metal layer 500 and the third metal layer 700, electrically connecting the AC terminal 711 to the seventh conductive foil 511. The seventh conductive foil 511 achieves a cross-layer connection with the AC terminal 711 through the fourteenth sub-connector 812.

[0165] Taking the semiconductor device 21 using an IGBT chip as an example, the current flows sequentially through the DC positive terminal 710a, the twelfth sub-connector 810, the sixth conductive foil 510, the seventh sub-connector 610, the first conductive foil 310, the first sub-connector 410, and the first sub-conductive layer 112a to the drain of the corresponding semiconductor device 21. Then, it flows from the third electrode of the semiconductor device 21 (i.e., the source of the IGBT chip) through the second sub-connector 411 to the second conductive foil 311, and then through the eighth sub-connector 611, the seventh conductive foil 511, and the fourteenth sub-connector 812 to the AC terminal 711 for output to the load. The current returning from the load flows to the second conductive foil 311, then through the third sub-connector 412 to the second sub-conductive layer 112b, and then to the drain of the corresponding semiconductor device 21. From the third electrode of the semiconductor device 21 (i.e., the source of the IGBT chip), it flows through the fourth sub-connector 413 to the third conductive foil 312, and then through the ninth sub-connector 612, the eighth conductive foil 512, and the thirteenth sub-connector 811 to the DC negative terminal 710b.

[0166] Optionally, such as Figures 6 to 7As illustrated, in one embodiment, when the plurality of control terminals 713 include a first control terminal 713a, a second control terminal 713b, a third control terminal 713c, and a fourth control terminal 713d, the third connector 800 correspondingly also includes a fifteenth sub-connector 813 and a sixteenth sub-connector 814. Combined with... Figure 6 and Figure 7 As shown in the diagram, the first control terminal 713a, the second control terminal 713b, the third control terminal 713c, and the fourth control terminal 713d can be raised columnar connection structures or planar pad structures, etc. The number of the fifteenth sub-connector 813 and the sixteenth sub-connector 814 can each be two.

[0167] A fifteenth sub-connector 813 passes through the insulating layer 900 between the second metal layer 500 and the third metal layer 700, electrically connecting the ninth conductive foil 513 corresponding to the first semiconductor module 20a to the first control terminal 713a. A sixteenth sub-connector 814 passes through the insulating layer 900 between the second metal layer 500 and the third metal layer 700, electrically connecting the tenth conductive foil 514 corresponding to the first semiconductor module 20a to the third control terminal 713c.

[0168] Another fifteenth sub-connector 813 passes through the insulating layer 900 between the second metal layer 500 and the third metal layer 700, electrically connecting the ninth conductive foil 513 corresponding to the second semiconductor module 20b to the second control terminal 713b. Another sixteenth sub-connector 814 passes through the insulating layer 900 between the second metal layer 500 and the third metal layer 700, electrically connecting the tenth conductive foil 514 corresponding to the second semiconductor module 20b to the fourth control terminal 713d.

[0169] Taking the semiconductor device 21 using an IGBT chip as an example, the first control terminal 713a is the terminal connected to the Kelvin source of all semiconductor devices 21 in the first semiconductor module 20a, the third control terminal 713c is the terminal connected to the gate of all semiconductor devices 21 in the first semiconductor module 20a, the second control terminal 713b is the terminal connected to the Kelvin source of all semiconductor devices 21 in the second semiconductor module 20b, and the fourth control terminal 713d is the terminal connected to the gate of all semiconductor devices 21 in the second semiconductor module 20b.

[0170] It is understood that, for the semiconductor module described in the foregoing embodiments, when its control signal input section 22 is connected to the third control terminal 713c, the control signal output section 23 is connected to the first control terminal 713a. When its control signal input section 22 is connected to the fourth control terminal 713d, the control signal output section 23 is connected to the second control terminal 713b.

[0171] Therefore, under the connection of the fifteenth sub-connector 813 and the sixteenth sub-connector 814, the first semiconductor module 20a and the second semiconductor module 20b inside the integrated module can be connected to the various control terminals outside.

[0172] Optionally, in one embodiment, a conductive medium is provided between the first connector 400 and the first electrode 21a and / or the second electrode 21b on the top of the semiconductor device 21 in the semiconductor module 20, or a conductive medium is provided between the first connector 400 and the second conductive layer 112, or a conductive medium is provided in all of the above locations.

[0173] Compared to conventional integrated modules, the first connector 400 in this embodiment differs from the copper paste solidification structure poured into vias; it can be a mechanically machined metal block with a stable physical form. Therefore, to connect the metal block to the semiconductor module 20 and / or the second conductive layer 112, a conductive medium needs to be provided at the corresponding location. This conductive medium, in addition to being conductive, also serves a connecting function. For example, the conductive medium can be a conductive layer formed by conductive adhesive or welding material. This connection method avoids the risk of damage caused by opening holes and pouring paste above the semiconductor module 20 or substrate 100.

[0174] Furthermore, this application also provides an integrated module, which includes a substrate 100 for carrying a semiconductor module. The specific structure of the substrate 100 can be found in the description of the foregoing embodiments, and will not be repeated here. The integrated module also includes the semiconductor module 20 described in the foregoing embodiments, and a first connector 400 disposed inside the integrated module and located above the semiconductor module 20.

[0175] In manufacturing this integrated module, the first connector 400 can be a metal block with a stable physical form. The semiconductor module 20 is pre-fixed to the substrate 100 and electrically connected to the substrate 100 to form a package core. Then, a conductive medium is placed between the package core and the first connector 400. The conductive medium not only fixes the package core and the first connector 400 together but also achieves their electrical connection. For example, the conductive medium can be a conductive layer formed by conductive adhesive or welding material. This connection method can avoid the risk of damage caused by opening holes and pouring grout above the semiconductor module 20 or the substrate 100.

[0176] In some embodiments of this application, a controller is also proposed, including a semiconductor module 20 as described in any of the above embodiments, or an integrated module as described in any of the above embodiments.

[0177] By applying the above-mentioned integrated modules to the controller, the controller's response speed can be improved and its performance can be enhanced.

[0178] In specific applications, the controller can be at least one of an inverter, a motor controller, a DC-DC converter, etc. Those skilled in the art can configure it according to actual needs, and this application does not impose any restrictions on it.

[0179] In some embodiments of this application, a vehicle is also proposed, including a semiconductor module as described in any of the above embodiments, or an integrated module as described in any of the above embodiments, or a controller as described in any of the above embodiments.

[0180] In specific applications, the vehicle can be a motor vehicle, such as a passenger car, a truck, or a derivative thereof; it can also be a special vehicle, such as a tractor, an excavator, a fire truck, or an ambulance; it can also be a water vehicle, such as an amphibious vehicle; or it can be a rail transit vehicle, such as a train, a subway, or a tram. Those skilled in the art can configure it according to actual needs, and this application does not impose any restrictions on it.

[0181] Furthermore, this application also proposes a manufacturing method for the integrated module of the aforementioned embodiments. The purpose of this manufacturing method is to prepare metal layers located in different layers of the integrated module and connectors passing through different positions of the insulating layer 900. The metal layers include a first metal layer 300, a second metal layer 500, and a third metal layer 700, and the connectors include a first connector 400, a second connector 600, and a third connector 800.

[0182] Specifically, such as Figure 10 As shown, the manufacturing method is as follows:

[0183] In step S101, at least two semiconductor devices 21 are fixed on the substrate 100, and the first electrode 21a of each semiconductor device 21 is electrically connected together as a signal input terminal suitable for receiving external control signals, and the second electrode 21b of each semiconductor device 21 is electrically connected together as a signal output terminal suitable for outputting control signals to the outside.

[0184] This step involves pre-arranging and fixing each semiconductor device 21 onto the substrate 100 according to a predetermined rule and then electrically connecting them to form a... Figure 11 The structure shown in the cross-sectional diagram provides a structural basis for the subsequent processing of the connection patterns of the layers above it. It is understood that the electrodes at the bottom of the semiconductor device 21 (such as the drain of an IGBT chip) can be connected to the second conductive layer 112 of the substrate 100 by soldering or sintering.

[0185] In step S102, a metal block is welded and fixed above the semiconductor device 21 and the substrate 100 to obtain the first component.

[0186] After the semiconductor device 21 is arranged and fixed, conductive components along the Z-direction can be fabricated. In this embodiment, corresponding metal blocks 420 can be fixed on the second conductive layer 112 of the substrate 100 and the electrodes on the top of the semiconductor device 21 by welding or sintering. The metal blocks can be conductive metals or alloys such as copper and aluminum. The drain and source corresponding to the driving circuit of the semiconductor device 21 are led upward using the block-shaped metal, and the gate and Kelvin source corresponding to the signal circuit of the semiconductor device 21 are led upward.

[0187] For example, the cross-sectional structure of the first component is as follows: Figure 12 As shown, the metal block 420 may include a first metal block 420a located above the first sub-conductive layer 112a, a second metal block 420b and a third metal block 420c located above the first semiconductor module 20a, a fourth metal block 420d located above the second sub-conductive layer 112b, and a fifth metal block 420e and a sixth metal block 420f located above the second semiconductor module 20b. The first metal block 420a and the fourth metal block 420d are slightly larger in size and are connected to the substrate 100, that is, to the back electrode of the semiconductor device 21 (e.g., the drain of an IGBT chip), for carrying large currents. The second metal block 420b and the fifth metal block 420e are slightly smaller in size and are connected to one electrode on the front side of the semiconductor device 21 (e.g., the gate of an IGBT chip) for transmitting control signals. The third metal block 420c and the sixth metal block 420f have moderate sizes, falling between the first two types, and are connected to another electrode on the front side of the semiconductor device 21 (e.g., the source of an IGBT chip) to transmit high-power current and low-power control signals.

[0188] Step S103: The first component is embedded into the insulating frame and encapsulated with glue so that the top of the metal block 420 is exposed.

[0189] like Figure 13 As shown, the first component obtained above is embedded into an insulating frame with a receiving cavity, and a removable adhesive film is laid at the bottom. Then, insulating adhesive is poured into the insulating frame until the liquid level of the insulating adhesive is flush with the upper surface of each metal block. After the insulating adhesive cures, the first component is covered by the insulating adhesive, and the top of the metal block 420 is exposed and can contact and connect with the connector above. In actual processing, the insulating adhesive may include thermosetting plastics such as epoxy resin and polyurethane, and its height is 0.1mm to 5mm above the upper surface of the semiconductor device 21. That is, the distance from the upper surface of the semiconductor device 21 to the top of the insulating frame is 0.1mm to 5mm, or the height of the second metal block 420b, the third metal block 420c, the fifth metal block 420e, and the sixth metal block 420f is 0.1mm to 5mm.

[0190] Step S104: Each layer of connectors, each layer of insulating components, and each conductive component inserted in the insulating components are sequentially prepared above the metal block 420.

[0191] Next, the first metal layer 300, the second metal layer 500, the third metal layer 700, the first connector 400, the second connector 600, and the third connector 800 described in the previous embodiment can be sequentially prepared on the metal block 420, and insulating materials can be filled between the connectors of different layers and between different metal layers of the same connector.

[0192] like Figure 14 As shown, a first metal layer 300 is depicted above the metal block 420. The first metal layer 300 can be formed by electroplating copper and etching processes, such as... Figure 8 The metal pattern shown. (As shown) Figure 15 The diagram shows an insulating layer above the first metal layer 300 above the metal block 420 and a schematic of the topmost third metal layer 700. It should be noted that, as... Figure 14 As shown, in some embodiments, the second metal layer 500 in the middle layer of the aforementioned embodiments can be omitted according to actual design requirements.

[0193] Understandably, it can be prepared using traditional processes, such as Figure 6 The third metal layer 700 shown is pre-provided with a core board, which is a combination of insulating material and a copper layer, the copper layer having, for example, the following characteristics. Figure 6 The pattern shown is then applied. The core board, prepreg, and the cured sample obtained in step S103 are then pressed together. After pressing, the insulating material of the core board and the prepreg combine to form an insulating component, which is located between the third metal layer 700 and the first metal layer 300. Simultaneously, the insulating component also fills the pattern gaps in the first metal layer 300. Next, through holes are drilled along the Z-direction at the edge of the pressed sample. Partial insulating resin is filled into the through holes, with the filling height not exceeding the first metal layer 300. Then, conductive slurry is poured into the through holes, with the upper surface of the conductive slurry flush with the top third metal layer 700, to achieve electrical connection between the first metal layer 300 and the third metal layer 700. This means that the electrodes corresponding to the driving circuit and signal circuit of the semiconductor device are led out and placed on the surface of the integrated module to form connection terminals. Finally, a solder resist layer is laid to protect the area outside the connection terminals, resulting in the desired effect. Figure 16 The integrated module with the cross-sectional structure shown.

[0194] The integrated module manufacturing method provided in this application uses metal blocks of different sizes as conductive components along the Z direction above the substrate and semiconductor devices. This avoids the need for drilling holes and plating copper above the semiconductor devices for connection in traditional processes, which can prevent damage to the semiconductor devices, improve process yield, simplify the manufacturing process, reduce the process cost of the integrated module, and improve manufacturing efficiency.

[0195] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0196] Although embodiments of this application have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of this application, the scope of which is defined by the claims and their equivalents.

Claims

1. A semiconductor module, characterized in that, The semiconductor module (20) includes at least two semiconductor devices (21), a control signal input section (22), and a control signal output section (23). The semiconductor device (21) includes a first electrode (21a) and a second electrode (21b). The first electrode (21a) of each semiconductor device (21) is electrically connected to the control signal input section (22), and the second electrode (21b) of each semiconductor device (21) is electrically connected to the control signal output section (23); From the control signal input section (22) to the control signal output section (23), the conductive path length of the signal flowing through each of the semiconductor devices (21) is equal.

2. The semiconductor module according to claim 1, characterized in that, The semiconductor device (21) further includes a third electrode (21c); The first electrode (21a) and the second electrode (21b) are disposed on the first side of the semiconductor device (21), and the third electrode (21c) is disposed on the second side of the semiconductor device (21). The first side and the second side are opposite sides of the semiconductor device (21) along the first direction (Y). At least two of the semiconductor devices (21) are arranged along a second direction (X), which is perpendicular to the first direction (Y) and the second direction (X).

3. The semiconductor module according to claim 2, characterized in that, The semiconductor module is a module corresponding to the upper bridge circuit or the lower bridge circuit, and the first side of the semiconductor device (21) located in different positions has the same orientation.

4. An integrated module, characterized in that, The outer surface of the integrated module is provided with a DC terminal (710), an AC terminal (711), a voltage detection terminal (712), and multiple control terminals (713); The distance between the plurality of control terminals (713) and / or the voltage detection terminals (712) and the DC terminals (710) is less than the distance between them and the AC terminals (711).

5. The integrated module according to claim 4, characterized in that, At least three of the DC terminal (710), the AC terminal (711), the voltage detection terminal (712), and the plurality of control terminals (713) are arranged on the same straight line.

6. The integrated module according to any one of claims 4-5, characterized in that, The outer surface of the integrated module is also provided with a temperature detection terminal (718), which is used to connect a temperature sensor; Along the thickness direction of the integrated module, the orthographic projection of the temperature sensing terminal (718) is at least partially located inside the orthographic projection of any semiconductor device (21) inside the integrated module.

7. The integrated module according to claim 6, characterized in that, Along the thickness direction of the integrated module, the orthographic projection of the temperature sensor is located inside the orthographic projection of any of the semiconductor devices (21).

8. The integrated module according to any one of claims 4-7, characterized in that, It includes two semiconductor modules (20) as described in any one of claims 1-3, and the two semiconductor modules (20) are electrically connected.

9. The integrated module according to claim 8, characterized in that, The two semiconductor modules (20) include a first semiconductor module (20a) and a second semiconductor module (20b) arranged at intervals along a first direction (Y), and the first semiconductor module (20a) and the second semiconductor module (20b) are arranged symmetrically along a second direction (X), and the first direction (Y) intersects the second direction (X).

10. The integrated module according to claim 9, characterized in that, The DC terminal (710) includes a DC positive terminal (710a) and a DC negative terminal (710b); The DC positive terminal (710a) is electrically connected to the back electrode of the semiconductor device (21) in the first semiconductor module (20a); The DC negative terminal (710b) is electrically connected to the third electrode of the semiconductor device (21) in the second semiconductor module (20b).

11. The integrated module according to claim 9 or 10, characterized in that, The plurality of control terminals (713) include a first control terminal (713a), a second control terminal (713b), a third control terminal (713c), and a fourth control terminal (713d); The first control terminal (713a) is electrically connected to the second electrode of the first semiconductor module (20a), and the third control terminal (713c) is electrically connected to the first electrode of the first semiconductor module (20a). The second control terminal (713b) is electrically connected to the second electrode of the second semiconductor module (20b), and the fourth control terminal (713d) is electrically connected to the first electrode of the second semiconductor module (20a).

12. The integrated module according to claim 11, characterized in that, The first control terminal (713a), the second control terminal (713b), the third control terminal (713c), the fourth control terminal (713d), and the voltage detection terminal (712) are arranged on the same straight line.

13. The integrated module according to claim 12, characterized in that, The integrated module also includes a first control trace (714), a second control trace (715), a third control trace (716), and a fourth control trace (717); The first control trace (714) is used to connect to the first control terminal (713a) and the second electrode of the semiconductor device (21) in the first semiconductor module (20a), and the third control trace (716) is used to connect to the third control terminal (713c) and the first electrode of the semiconductor device (21) in the first semiconductor module (20a). The length of the third control trace (716) is greater than the length of the first control trace (714). The second control trace (715) is used to connect to the second control terminal (713b) and the second electrode of the second semiconductor module (20b), and the fourth control trace (717) is connected to the fourth control terminal (713d) and the first electrode of the second semiconductor module (20b). The length of the fourth control trace (717) is greater than the length of the second control trace (715).

14. The integrated module according to claim 13, characterized in that, The first control trace (714), the second control trace (715), the third control trace (716), and the fourth control trace (717) are metal structures located on the same layer; and / or, The integrated module also includes a solder mask layer disposed on the outer surface of the integrated module, wherein the first control trace (714), the second control trace (715), the third control trace (716), and the fourth control trace (717) are the same metal structure closest to the solder mask layer.

15. The integrated module according to claim 13, characterized in that, The integrated module further includes a substrate (100), which includes a first conductive layer (110), a ceramic layer (111), and a second conductive layer (112) stacked sequentially. The second conductive layer (112) includes a first sub-conductive layer (112a) and a second sub-conductive layer (112b) that are insulated from each other; The first semiconductor module (20a) is disposed on the first sub-conductive layer (112a), and the back electrode of the semiconductor device (21) in the first semiconductor module (20a) is electrically connected to the first sub-conductive layer (112a). The second semiconductor module (20b) is disposed on the second sub-conductive layer (112b), and the back electrode of the semiconductor device (21) in the second semiconductor module (20b) is electrically connected to the second sub-conductive layer (112b).

16. The integrated module according to claim 15, characterized in that, The integrated module further includes a first metal layer (300), a second metal layer (500), a third metal layer (700), a first connector (400), a second connector (600), and a third connector (800); The first metal layer (300), the second metal layer (500) and the third metal layer (700) are stacked sequentially on the side of the semiconductor module (20) away from the substrate (100), and an insulating layer (900) is provided between adjacent layers of the substrate (100), the first metal layer (300), the second metal layer (500) and the third metal layer (700); The first connector (400) passes through the insulating layer (900) between the substrate (100) and the first metal layer (300) to electrically connect the first metal layer (300) to the semiconductor device (21); The second connector (600) passes through the insulating layer (900) between the first metal layer (300) and the second metal layer (500) to electrically connect the second metal layer (500) to the first metal layer (300); The third connector (800) passes through the insulating layer (900) between the second metal layer (500) and the third metal layer (700), electrically connecting the third metal layer (700) and the second metal layer (500); wherein the third metal layer (700) includes the DC terminal (710), the AC terminal (711), the voltage detection terminal (712) and a plurality of the control terminals (713).

17. The integrated module according to claim 16, characterized in that, The first conductive element (400) is fixed and electrically connected to the semiconductor module (20) and / or the second conductive layer (112) through a conductive medium.

18. An integrated module, characterized in that, The integrated module includes a substrate (100) and a semiconductor module (20) according to any one of claims 1-3, as well as a first conductive element (400); The semiconductor module (20) is fixed on the substrate (100) and electrically connected to the substrate (100) to form a package core; The first conductive element (400) is fixed and electrically connected to the encapsulation core through a conductive medium.

19. A controller, characterized in that, The controller includes the semiconductor module (20) according to any one of claims 1 to 3, or the integrated module according to any one of claims 4 to 18.

20. A vehicle, characterized in that, The vehicle includes a semiconductor module (20) as described in any one of claims 1 to 3, an integrated module as described in any one of claims 4 to 18, or a controller as described in claim 19.

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