Method for suppressing fault current of ac receiving end, storage medium and hybrid dc system

Abstract

The application provides a method for inhibiting an AC fault current at a receiving end, a storage medium and a hybrid DC system. The method comprises: obtaining a current voltage parameter of an AC bus voltage at the receiving end, the current voltage parameter comprising a current vector sum, the current vector sum being a vector sum of three-phase AC voltages at the receiving end in a two-phase orthogonal stationary coordinate system at a current time; determining whether an AC fault occurs at the receiving end based on a size relationship between the current voltage parameter and a reference voltage parameter, the reference voltage parameter comprising a reference vector sum, the reference vector sum being a vector sum of the three-phase AC voltages at the receiving end in the two-phase orthogonal stationary coordinate system when the receiving end is in a steady state; in the case where the AC fault occurs at the receiving end, calculating a compensation trigger angle according to the current voltage parameter; increasing a DC voltage at the receiving end and decreasing a DC voltage at a sending end according to the compensation trigger angle, so as to inhibit an AC fault current at the receiving end. The method realizes the inhibition of a system fault current by decreasing a voltage difference between the sending end and the receiving end.

Description

Technical Field

[0001] This application relates to the field of high voltage direct current transmission technology, and more specifically, to a method for suppressing AC fault current at the receiving end of a hybrid DC system, a computer-readable storage medium, and a hybrid DC system. Background Technology

[0002] In traditional high-voltage direct current (HVDC) transmission systems, when an AC short-circuit fault occurs at the receiving end, the fault current will rise significantly, leading to commutation failure and overcurrent problems in the equipment. Summary of the Invention

[0003] The main objective of this application is to provide a method for suppressing AC fault current at the receiving end of a hybrid DC system, a computer-readable storage medium, and a hybrid DC system, so as to at least solve the problem in the prior art that when an AC short-circuit fault occurs at the receiving end of a converter, the fault current will rise significantly, which will lead to commutation failure and device overcurrent.

[0004] To achieve the above objectives, according to one aspect of this application, a method for suppressing AC fault current at the receiving end of a hybrid DC system is provided, comprising: acquiring current voltage parameters of the AC bus voltage at the receiving end, the current voltage parameters including a current vector sum, the current vector sum being the vector sum of the three-phase AC voltages at the receiving end in a two-phase orthogonal stationary coordinate system at the current moment; determining whether an AC fault has occurred at the receiving end based on the magnitude relationship between the current voltage parameters and a reference voltage parameter, the reference voltage parameter including a reference vector sum, the reference vector sum being the vector sum of the three-phase AC voltages at the receiving end in a steady state in a two-phase orthogonal stationary coordinate system; calculating a compensation firing angle based on the current voltage parameters when an AC fault has occurred at the receiving end; increasing the DC voltage at the receiving end and decreasing the DC voltage setpoint at the sending end based on the compensation firing angle, thereby suppressing the AC fault current at the receiving end.

[0005] Optionally, determining whether an AC fault has occurred at the receiving end based on the relationship between the current voltage parameter and the reference voltage parameter includes: determining the amplitude of the current vector sum and the amplitude of the reference vector sum, respectively obtaining the amplitude of the current quadrature component and the amplitude of the reference quadrature component; calculating the difference between the amplitude of the current quadrature component and the amplitude of the reference quadrature component at the receiving end, obtaining the amplitude difference, wherein the amplitude of the reference quadrature component is the quadrature component amplitude of the AC voltage at the receiving end in the pre-fault steady state in a two-phase orthogonal stationary coordinate system; and determining whether an AC fault has occurred at the receiving end based on the magnitude of the amplitude difference.

[0006] Optionally, determining whether the receiving end has experienced an AC fault based on the magnitude of the amplitude difference includes: determining a maximum detection period and a minimum detection period, and determining the maximum value of the amplitude difference detected in the maximum detection period as the maximum amplitude difference, and determining the minimum value of the amplitude difference detected in the minimum detection period as the minimum amplitude difference; comparing the magnitude of the maximum amplitude difference with a first threshold to obtain a first comparison result, and comparing the magnitude of the minimum amplitude difference with a second threshold to obtain a second comparison result; determining that the receiving end has experienced an AC fault when the first comparison result is that the maximum amplitude difference is greater than or equal to the first threshold, and the second comparison result is that the minimum amplitude difference is greater than or equal to the second threshold; and determining that the receiving end has not experienced an AC fault when the first comparison result is that the maximum amplitude difference is less than the first threshold, and / or the second comparison result is that the minimum amplitude difference is less than the second threshold.

[0007] Optionally, calculating the compensation trigger angle based on the current voltage parameters includes: determining the compensation trigger angle by multiplying the maximum amplitude difference by a first gain coefficient, wherein the maximum amplitude difference is the maximum value of the amplitude difference detected in the maximum detection period, the amplitude difference is the difference between the current quadrature component amplitude and the reference quadrature component amplitude at the receiving end, the current quadrature component amplitude is the amplitude of the current vector sum, and the reference quadrature component amplitude is the amplitude of the reference vector sum.

[0008] Optionally, increasing the DC voltage of the receiving end according to the compensated firing angle includes: obtaining an initial firing angle; determining the sum of the compensated firing angle and the initial firing angle as a target firing angle; determining the target DC voltage of the receiving end based at least on the target firing angle, and increasing the DC voltage of the receiving end from the initial DC voltage to the target DC voltage.

[0009] Optionally, after determining whether an AC fault has occurred at the receiving end, the method further includes: determining that a three-phase symmetrical fault has occurred at the receiving end if the three-phase vector sum of the AC bus voltage at the receiving end is zero; and determining that a single-phase or two-phase asymmetrical fault has occurred at the receiving end if the three-phase vector sum of the AC bus voltage at the receiving end is not zero.

[0010] Optionally, reducing the DC voltage at the transmitting end includes: acquiring a DC voltage setpoint at the transmitting end and a DC current detection value at the transmitting end at the current moment; determining the DC voltage reduction value as the product of the DC current detection value and a preset proportional coefficient; determining the difference between the DC voltage setpoint and the DC voltage reduction value as the target DC voltage at the transmitting end, and controlling the DC voltage at the transmitting end to decrease from the DC voltage setpoint to the target DC voltage.

[0011] Optionally, after reducing the DC voltage at the sending end, the method further includes: determining the d-axis component of the AC voltage modulation wave reference value at the sending end based on the target DC voltage; obtaining the q-axis component of the AC voltage modulation wave reference value at the sending end; determining the AC voltage modulation wave reference value component in the two-phase synchronous rotating coordinate system of the sending end based on the d-axis component and the q-axis component of the AC voltage modulation wave reference value; performing coordinate transformation on the AC voltage modulation wave reference value component in the two-phase synchronous rotating coordinate system of the sending end to obtain the AC modulation wave reference value in the three-phase AC coordinate system; and generating a control signal for the fully controlled device in the converter at the sending end based on the AC voltage modulation wave reference value to control the fully controlled device to turn on or off.

[0012] Optionally, determining the d-axis component of the voltage modulation wave reference value of the transmitting end based on the target DC voltage includes: inputting the difference between the target DC voltage and the actual DC voltage value into a first proportional-integral controller for proportional-integral calculation to obtain the d-axis component of the current reference value of the inner loop of the transmitting end; and inputting the difference between the d-axis component of the current reference value and the d-axis component of the actual current value into a second proportional-integral controller for proportional-integral calculation to obtain the d-axis component of the voltage modulation wave reference value of the transmitting end.

[0013] Optionally, obtaining the q-axis component of the voltage modulation wave reference value at the transmitting end includes: determining the difference between the AC voltage amplitude reference value and the actual AC voltage value at the transmitting end to obtain a voltage difference value, or determining the difference between the reactive power reference value and the actual reactive power at the transmitting end to obtain a power difference value; inputting the voltage difference value or the power difference value into a third proportional-integral controller for proportional-integral operation to generate the q-axis component of the current reference value of the inner loop at the transmitting end; inputting the difference between the q-axis component of the current reference value and the q-axis component of the actual current value into a fourth proportional-integral controller for proportional-integral operation to obtain the q-axis component of the voltage modulation wave reference value at the transmitting end.

[0014] According to another aspect of this application, a computer-readable storage medium is provided, the computer-readable storage medium including a stored program, wherein, when the program is executed, it controls the device where the computer-readable storage medium is located to perform any of the methods for suppressing AC fault current at the receiving end of a hybrid DC system.

[0015] According to another aspect of this application, a hybrid DC system is provided, comprising: a controller for executing a method for suppressing AC fault current at the receiving end of any of the hybrid DC systems described herein; a receiving end, including a receiving-end converter electrically connected to the controller; and a sending end, including a sending-end converter electrically connected to both the controller and the receiving-end converter.

[0016] Applying the technical solution of this application, the above-mentioned method for suppressing AC fault current at the receiving end of a hybrid DC system first obtains the current voltage parameters of the AC bus voltage at the receiving end. The current voltage parameters include the current vector sum, which is the vector sum of the three-phase AC voltage at the receiving end in a two-phase orthogonal stationary coordinate system at the current moment. Then, based on the relationship between the current voltage parameters and the reference voltage parameters, it is determined whether an AC fault has occurred at the receiving end. The reference voltage parameters include the reference vector sum, which is the vector sum of the three-phase AC voltage at the receiving end in a steady state in a two-phase orthogonal stationary coordinate system. Finally, in the case of an AC fault at the receiving end, a compensation firing angle is calculated based on the current voltage parameters. The DC voltage at the receiving end is increased according to the compensation firing angle, and the DC voltage at the sending end is decreased according to the current voltage parameters to suppress the AC fault current at the receiving end. This method suppresses the system fault current by reducing the voltage difference between the sending and receiving ends, thereby improving the converter's operational safety and fault ride-through capability. It solves the problem in the prior art where, when an AC short-circuit fault occurs at the receiving end of the converter, the fault current will significantly increase, leading to commutation failure and device overcurrent. Attached Figure Description

[0017] The accompanying drawings, which form part of this application, are used to provide a further understanding of this application. The illustrative embodiments and descriptions of this application are used to explain this application and do not constitute an undue limitation of this application. In the drawings:

[0018] Figure 1 A schematic diagram of a hybrid DC system according to an embodiment of this application is shown;

[0019] Figure 2 A flowchart illustrating a method for suppressing AC fault current at the receiving end of a hybrid DC system according to an embodiment of this application is shown.

[0020] Figure 3 A schematic flowchart of another method for suppressing AC fault current at the receiving end of a hybrid DC system according to an embodiment of this application is shown.

[0021] Figure 4 A flowchart illustrating another method for suppressing AC fault current at the receiving end of a hybrid DC system according to an embodiment of this application is shown.

[0022] Figure 5 A schematic diagram of a hybrid DC system provided according to an embodiment of this application is shown.

[0023] The above figures include the following reference numerals:

[0024] 10. Controller; 20. Receiving-end converter; 30. Sending-end converter. Detailed Implementation

[0025] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.

[0026] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0027] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of this application described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0028] For ease of description, the following explains some of the nouns or terms used in the embodiments of this application:

[0029] The sending end refers to the starting station or area in a power system where electricity is transmitted to distant locations. At this station, the electricity is typically converted into a form suitable for long-distance transmission. For example, in a high-voltage direct current (HVDC) transmission system, the sending-end converter station converts alternating current (AC) into direct current (DC) for efficient transmission through DC transmission lines.

[0030] The receiving end refers to the terminal station or area that receives, uses, or re-converts electricity. In an HVDC system, the receiving-end converter station converts the DC power transmitted from the sending end back into AC power before supplying it to the local power grid or electricity users.

[0031] As described in the background section, in traditional HVDC systems, when an AC short-circuit fault occurs on the inverter side, the fault current will rise significantly, potentially causing commutation failure, device overcurrent, and other problems. Although the HCC has a certain ability to withstand commutation failure, its actual performance is still limited by the turn-off capability of the IGCT device. If the turn-off current exceeds the limit, it will cause the HCC valve-controlled inactive protection to activate, leading to a commutation failure accident.

[0032] To address the problem that in the prior art, when an AC short-circuit fault occurs at the receiving end of a converter, the fault current will rise significantly, leading to commutation failure and device overcurrent, embodiments of this application provide a method for suppressing AC fault current at the receiving end of a hybrid DC system, a computer-readable storage medium, and a hybrid DC system.

[0033] Figure 1 This is a schematic diagram of a hybrid DC system, such as... Figure 1 As shown, the hybrid DC system includes the HCC inverter side (receiving end) and the MMC rectifier side (sending end).

[0034] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

[0035] This embodiment provides a method for suppressing AC fault current at the receiving end of a hybrid DC system, such as... Figure 2 As shown, the method includes the following steps:

[0036] Step S101: Obtain the current voltage parameters of the AC bus voltage at the receiving end. The current voltage parameters include the current vector sum, which is the vector sum of the three-phase AC voltage at the receiving end at the current moment in a two-phase orthogonal stationary coordinate system.

[0037] Step S102: Based on the relationship between the current voltage parameters and the reference voltage parameters, determine whether an AC fault has occurred at the receiving end. The reference voltage parameters include a reference vector sum, which is the vector sum of the three-phase AC voltages at the receiving end in a steady state in a two-phase orthogonal stationary coordinate system.

[0038] Step S103: In the event of an AC fault at the receiving end, the compensation firing angle is calculated based on the current voltage parameters.

[0039] Step S104: Increase the DC voltage at the receiving end according to the compensation firing angle, and decrease the DC voltage at the sending end according to the current voltage parameters, so as to suppress the AC fault current at the receiving end.

[0040] Specifically, the current vector sum is calculated by real-time monitoring of the three-phase AC voltage of the receiving-end converter and converting it to a two-phase orthogonal stationary coordinate system (αβ coordinate system). The current vector sum is compared with the reference vector sum at steady state; if the former deviates significantly from the latter, an AC side fault is considered to have occurred at the receiving end. This reference vector sum is recorded during normal system operation and serves as a comparison to determine the fault state.

[0041] After confirming the AC fault at the receiving end, the compensation firing angle is calculated based on the current vector sum value. This is to extend the conduction time of the HCC converter on the inverter side. Increasing the firing angle increases the conduction time of the converter in each cycle, increases the DC voltage on the inverter side, reduces the peak value of the fault current, and thus improves the inverter's resistance to fault current.

[0042] When the receiving end detects an AC fault and calculates the compensation firing angle, the DC voltage of the inverter-side HCC rises. Simultaneously, the rectifier-side MMC actively reduces its DC voltage setpoint based on the fault signal from the receiving end. This control strategy causes the DC voltage at the sending end to decrease and the DC voltage at the receiving end to increase, reducing the voltage difference between the sending and receiving ends and thus suppressing the fault current flowing to the receiving end.

[0043] The method for suppressing AC fault current at the receiving end of the hybrid DC system described in this application first obtains the current voltage parameters of the AC bus voltage at the receiving end. These current voltage parameters include a current vector sum, which is the vector sum of the three-phase AC voltages at the receiving end in a two-phase orthogonal stationary coordinate system at the current moment. Then, based on the relationship between the current voltage parameters and a reference voltage parameter, it is determined whether an AC fault has occurred at the receiving end. The reference voltage parameter includes a reference vector sum, which is the vector sum of the three-phase AC voltages at the receiving end in a steady state in a two-phase orthogonal stationary coordinate system. Finally, in the case of an AC fault at the receiving end, a compensation firing angle is calculated based on the current voltage parameters. The DC voltage at the receiving end is increased according to the compensation firing angle, and the DC voltage at the sending end is decreased according to the current voltage parameters to suppress the AC fault current at the receiving end. This method suppresses the system fault current by reducing the voltage difference between the sending and receiving ends, thereby improving the converter's operational safety and fault ride-through capability. It solves the problem in the prior art where a significant increase in fault current occurs when an AC short-circuit fault occurs at the receiving end of the converter, leading to commutation failure and device overcurrent.

[0044] The above embodiments effectively suppress fault current by switching and coordinating control strategies between the MMC and HCC converters, thereby improving converter operational safety and fault ride-through capability. Addressing the issue that existing DC transmission technologies fail to fully exploit the collaborative control potential between MMC and HCC, a collaborative suppression method for AC fault current at the receiving end of a hybrid DC system is proposed. Based on the mechanism of fault current rise in a hybrid DC system during AC faults at the receiving end, the voltage difference between the sending and receiving ends of the DC system during a fault is the main factor affecting DC current changes. Therefore, a method is proposed that the MMC switch to buck control, while simultaneously increasing the firing angle control on the HCC side to reduce the voltage difference between the sending and receiving ends, thus forming a collaborative current suppression strategy at both ends to achieve system fault current suppression and reliable fault ride-through.

[0045] In some embodiments, after determining whether an AC fault has occurred at the receiving end, the method further includes the following steps:

[0046] Step S1021: If the three-phase vector sum of the AC bus voltage at the receiving end is zero, it is determined that a three-phase symmetrical fault has occurred at the receiving end.

[0047] Step S1022: If the three-phase vector sum of the AC bus voltage at the receiving end is not zero, determine that a single-phase or two-phase asymmetrical fault has occurred at the receiving end.

[0048] Specifically, by detecting the sum of the three-phase phasors of the AC bus voltage, an asymmetrical fault is considered to have occurred when it is not zero; based on the α / β transformation of the three-phase voltage, when a three-phase AC voltage fault occurs, the vector sum of its α / β will decrease compared to the steady state.

[0049] A three-phase symmetrical fault can be identified when the three-phase vector sum of the AC bus voltage at the receiving end is zero, and the current vector sum (i.e., the vector sum of voltages in the αβ coordinate system) is significantly less than the reference vector sum. Symmetrical faults, such as three-phase short circuits, typically cause the vector sum of the AC bus voltage to approach zero because the voltage of the faulty phase will decrease, sometimes even to zero, while the voltages of other phases may also be affected, leading to a significant reduction in the overall vector sum.

[0050] If the three-phase vector sum of the AC bus voltage at the receiving end is not zero, but the current vector sum is still less than the reference vector sum, then an asymmetrical fault can be identified. An asymmetrical fault, such as a single-phase ground fault, only affects the voltage of one phase, while the voltages of the other two phases remain relatively stable. Therefore, the three-phase vector sum of the AC bus voltage will not be completely zero, but the voltage drop of the faulty phase will cause the overall vector sum to decrease, although a non-zero vector sum can still be observed.

[0051] Specifically, by comparing the current vector sum with the reference vector sum and detecting whether the three-phase vector sum of the AC bus voltage is zero, this method can quickly and accurately identify the type of AC fault, facilitating timely implementation of appropriate protective measures. At the fault detection level, it can distinguish between symmetrical and asymmetrical faults, which is crucial for developing post-fault recovery strategies. Different fault types may require different recovery steps; for example, asymmetrical faults may require a more urgent system response and a longer recovery period. Once the fault type is determined, the control system can adjust parameters accordingly, such as increasing the firing angle or enabling low-voltage limiting control. Optimizing these strategies can effectively suppress fault currents, reduce equipment stress, and prevent further system damage. Accurately identifying and quickly responding to AC faults can reduce the impact of faults on the overall system operation and improve system stability. This stability is particularly critical for hybrid DC systems, ensuring power transmission efficiency and safety.

[0052] In some embodiments, determining whether an AC fault has occurred at the receiving end based on the relationship between the current voltage parameter and the reference voltage parameter includes the following steps:

[0053] Step S201: Determine the magnitude of the current vector sum and the magnitude of the reference vector sum, and obtain the magnitude of the current orthogonal component and the magnitude of the reference orthogonal component respectively;

[0054] Step S202: Calculate the difference between the current quadrature component amplitude and the reference quadrature component amplitude of the receiving end to obtain the amplitude difference. The reference quadrature component amplitude is the quadrature component amplitude of the AC voltage in the two-phase quadrature stationary coordinate system when the receiving end is in the steady state before the fault.

[0055] Step S203: Determine whether an AC fault has occurred at the receiving end based on the magnitude of the amplitude difference.

[0056] In this process, the amplitude of the three-phase AC voltage at the receiving end is measured in the αβ coordinate system, and the magnitude of its vector sum is calculated to obtain the current quadrature component amplitude. Simultaneously, for comparison, a reference value for this amplitude in steady state is needed, i.e., the reference quadrature component amplitude. This comparison reflects the changing state of the AC voltage at the receiving end and is the basis for fault detection and firing angle adjustment. By comparing the current quadrature component amplitude with the reference quadrature component amplitude, the difference between the two is calculated to obtain the amplitude difference. The magnitude of the amplitude difference directly reflects the depth of the fault, i.e., the degree to which the AC voltage at the receiving end deviates from the normal state. Based on the amplitude difference calculated above, a compensation firing angle can be determined to adjust the firing angle of the HCC converter at the receiving end. Increasing the firing angle will lead to a longer converter conduction time, thereby raising the DC voltage at the receiving end and reducing the amplitude of the fault current.

[0057] Specifically, by dynamically adjusting the firing angle, this method effectively suppresses fault current caused by AC faults at the receiving end. The size of the compensation firing angle is directly related to the fault depth, meaning that different levels of current suppression can be provided according to different fault conditions, avoiding over-suppression or under-suppression and improving the system's response efficiency. During a fault, by raising the DC voltage at the receiving end, the voltage difference between the sending and receiving ends is reduced, which helps maintain the system's stability under fault conditions and avoids system oscillations or commutation failures caused by excessive fault current. Current suppression and voltage regulation during a fault help the system recover from the fault state to normal operation more quickly. By reducing the impact of faults, the continuity and reliability of power transmission are ensured.

[0058] Determining whether an AC fault has occurred at the receiving end based on the magnitude of the amplitude difference includes the following steps:

[0059] Step S2031: Determine the maximum detection period and the minimum detection period, and determine the maximum value of the amplitude difference detected in the maximum detection period as the maximum amplitude difference, and determine the minimum value of the amplitude difference detected in the minimum detection period as the minimum amplitude difference.

[0060] Step S2032, compare the maximum difference in amplitude with the first threshold (e.g.) Figure 3 The magnitude of k1 is used to obtain the first comparison result, and then the minimum amplitude difference and the second threshold (as mentioned above) are compared. Figure 3 The second comparison result is obtained by determining the value of k2.

[0061] Step S2033: If the first comparison result is that the maximum amplitude difference is greater than or equal to the first threshold, and the second comparison result is that the minimum amplitude difference is greater than or equal to the second threshold, it is determined that an AC fault has occurred at the receiving end.

[0062] Step S2034: If the first comparison result is that the maximum amplitude difference is less than the first threshold, and / or the second comparison result is that the minimum amplitude difference is less than the second threshold, it is determined that no AC fault has occurred at the receiving end.

[0063] Specifically, when both the maximum and minimum amplitude differences meet specific conditions (i.e., greater than or equal to the first and second thresholds), it indicates that the AC voltage fluctuation at the receiving end is very significant, meaning the fault depth is high. In this case, the maximum amplitude difference is multiplied by a first gain coefficient to calculate the compensation firing angle. This gain coefficient is designed to convert the amplitude difference into a firing angle change, thereby adjusting the DC voltage and current. An increased firing angle helps to raise the DC voltage on the inverter side, reduce the voltage difference between the sending and receiving ends, and suppress fault current. If the maximum or minimum amplitude difference does not meet the above conditions, it means that the current fault depth is low or the system has not yet entered a fault state. In this case, no additional firing angle adjustment is needed, and the compensation firing angle remains at zero. The purpose of this is to avoid unnecessary control actions and maintain the stability of the system under normal operating conditions.

[0064] Specifically, by setting first and second thresholds as threshold values, this method enables accurate detection of different fault occurrence and clearance times. When a fault occurs, rapid adjustment of the firing angle helps suppress fault current and protect power electronic equipment. When the fault is cleared, the firing angle promptly returns to its pre-fault setting, ensuring rapid system recovery. The introduction of the gain coefficient makes the firing angle adjustment directly related to the fault depth, achieving adaptive control of the system. This adjustment mechanism can flexibly control the fault current according to actual conditions, improving the overall response quality and efficiency of the system. By dynamically optimizing the firing angle, this control strategy effectively reduces the stress on power electronic equipment under fault conditions, especially for IGCT devices in the inverter-side HCC, avoiding overcurrent protection actions, enhancing system safety and reliability, and improving fault ride-through capability. When the fault is cleared and the system naturally returns to normal, the firing angle returns to zero without manual intervention, simplifying the fault recovery process and accelerating system restart and stable operation.

[0065] The method further includes: determining a minimum detection period, and defining the minimum amplitude difference detected within the minimum detection period as the minimum amplitude difference; using the maximum amplitude difference as a first input quantity, comparing it with a first threshold, and determining the minimum amplitude difference when the first input quantity is greater than or equal to the first threshold (e.g., ...). Figure 3 When k1), output the first logic signal; use the minimum amplitude difference as the second input quantity and compare it with the second threshold. When the second input quantity is greater than or equal to the second threshold (e.g., k1), output the first logic signal; use the minimum amplitude difference as the second input quantity and compare it with the second threshold. Figure 3 When k2), the second logic signal is output; the first logic signal and the second logic signal are input into a logic NAND gate, and a control signal is obtained through logic operation. The control signal is used to indicate the occurrence or clearing of AC faults at the receiving end; the control signal further drives the activation or deactivation of the compensation trigger angle to realize the dynamic adjustment and recovery of the trigger angle under fault conditions.

[0066] Specifically, a maximum and a minimum detection period are set, the lengths of which are chosen based on the specific operating characteristics of the power system, such as the fundamental frequency and fault response time. The maximum detection period is used to capture the moment of a positive abrupt change in the difference between the steady-state voltage vector and the current voltage vector, while the minimum detection period captures the moment of a negative abrupt change in the difference between the steady-state voltage vector and the current voltage vector. This helps to accurately identify the occurrence and clearance of faults. Within the maximum detection period, the system continuously monitors and records the amplitude difference data of the received-end voltage change, ultimately determining whether an AC voltage drop (a positive abrupt change in the difference between the steady-state voltage vector and the current voltage vector) has occurred within this period. Similarly, within the minimum detection period, the amplitude difference is monitored and recorded to determine whether an AC voltage jump (a negative abrupt change in the difference between the steady-state voltage vector and the current voltage vector) has occurred within the period. Through periodic monitoring and recording, extreme voltage fluctuations during faults can be captured.

[0067] The maximum detection period is generally set to 12ms. This is because the fundamental frequency of the power system is 50Hz, and one cycle is 20ms. 12ms is close to half a cycle, which is sufficient to cover the process from voltage zero point to peak, ensuring that voltage surges or current peaks can be detected, thus avoiding missed alarms. The minimum detection period is also generally set to 12ms.

[0068] Specifically, by acquiring the maximum and minimum amplitude differences within a set period, the system can accurately identify the occurrence and clearance times of faults. This evaluation method is more comprehensive and accurate than single threshold judgment, which helps to take appropriate control measures. Due to the use of periodic monitoring and recording, the system can quickly respond to sudden changes in the receiving-end voltage and adjust the firing angle in a timely manner to suppress current. Simultaneously, by monitoring the minimum amplitude difference, it ensures that the compensation firing angle is removed in a timely manner at the fault clearance time, avoiding DC overvoltage during the fault recovery phase and improving the fault recovery speed.

[0069] The calculation of the compensation trigger angle based on the current voltage parameters includes: determining the compensation trigger angle by multiplying the maximum amplitude difference by the first gain coefficient, wherein the maximum amplitude difference is the maximum value of the amplitude difference detected in the maximum detection period, the amplitude difference is the difference between the current quadrature component amplitude and the reference quadrature component amplitude at the receiving end, the current quadrature component amplitude is the amplitude of the current vector sum, and the reference quadrature component amplitude is the amplitude of the reference vector sum.

[0070] Specifically, the compensation firing angle is calculated by multiplying the maximum amplitude difference by a first gain coefficient. This gain coefficient is designed to convert the amplitude difference into a firing angle change, thereby adjusting the DC voltage and current. An increased firing angle helps to raise the DC voltage on the inverter side, reduce the voltage difference between the sending and receiving ends, and suppress fault current.

[0071] The process of increasing the DC voltage at the receiving end based on the aforementioned compensation firing angle includes the following steps:

[0072] Step S301, obtain the initial trigger angle (e.g. Figure 3 α c );

[0073] Step S302, adjust the above-mentioned compensation trigger angle (e.g.) Figure 3 The sum of Δα and the initial trigger angle is used to determine the target trigger angle (e.g., Δα). Figure 3 α ord );

[0074] Step S303: Determine the target DC voltage of the receiving end based at least on the target firing angle, and increase the DC voltage of the receiving end from the initial DC voltage to the target DC voltage.

[0075] Specifically, by increasing the firing angle, the on-time of the inverter-side HCC converter is prolonged, which directly leads to an increase in the receiving-end DC voltage. Under fault conditions, the difference between the sending and receiving-end DC voltages is the main factor affecting the change in DC current. Increasing the receiving-end DC voltage reduces this voltage difference, thereby effectively suppressing the rise in DC current during faults and preventing problems such as commutation failure and equipment overload.

[0076] However, when a fault exists, a compensation trigger angle Δα is generated. ATPR This is also included in the HCC trigger angle instruction generation logic. Specifically, the final HCC trigger angle instruction α ord (i.e., the target firing angle) is the reference firing angle α generated by the constant current controller. c (i.e., initial firing angle) and Δα ATPR (Compensation trigger angle) superposition is generated, such as Figure 3 As shown: The effect after taking this into account is α. ord The increase compared to before the calculation prolongs the valve's on-time and delays the zero-crossing point of the bridge arm current.

[0077] Specifically, by increasing the firing angle, the conduction time of the HCC converter on the inverter side is prolonged, directly leading to an increase in the receiving-end DC voltage. Under fault conditions, the difference between the sending and receiving-end DC voltages is the main factor affecting DC current changes. Increasing the receiving-end DC voltage reduces this voltage difference, effectively suppressing the rise in DC current during faults and preventing commutation failures, equipment overloads, and other problems. During faults, traditional control strategies may be insufficient to cope with rapid current changes. By dynamically adjusting the firing angle to increase the DC voltage, the system can more effectively maintain DC current stability, enhance overall system stability, and reduce the risk of system oscillations. Increasing the receiving-end DC voltage means that the system can still maintain a certain level of operational capability under AC fault conditions at the receiving end, helping the system maintain partial power transmission during faults and improving the system's fault ride-through capability.

[0078] The expression for the DC voltage of the inverter-side HCC is as follows: .

[0079] Where N is the number of six-pulse converters per pole in the inverter station (the number of six-pulse converters at the receiving end), typically 4. U LI It is the effective value of the no-load line voltage on the valve side of the converter transformer at the inverter station (the effective value of the no-load line voltage on the valve side of the converter transformer at the receiving end), X rI It is the inverter station commutation reactance (the receiving end commutation reactance), I d This is the average DC current (the initial average DC current at the receiving end). Due to the target firing angle α... ord The range is between 90° and 180°. From the above formula, it can be seen that in α... ord For ∈(90°, 180°), we have: That is, U dI With α ord The equivalent DC impedance of the line increases with the increase of the current (which is even more unfavorable for current to continue flowing into the inverter side). Z is denoted as the line's equivalent DC impedance. dc The DC current is approximately: Due to Δα ATPR >0 makes U dI Increase, that is, U dI =U dI0 +ΔU dI U dI0 It is included in Δα ATPR The DC voltage value before. Therefore, Δα is taken into account. ATPR The resulting change in DC current is: This means that the DC current during the fault period is suppressed. Overall, from a time-domain perspective, this process is accompanied by an extended HCC converter valve turn-on time, a delayed zero-crossing point of the bridge arm commutation current, and an increase in the inverter-side DC voltage, thereby reducing the amplitude of the turn-off transient current and the stress on the valve components.

[0080] Specifically, the system first acquires key parameters on the receiving end AC side, including the number of six-pulse converters, the effective value of the no-load line voltage on the valve side of the converter transformer, the commutation reactance, and the average value of the initial DC current. These parameters directly determine the operating state of the HCC converter on the inverter side. Subsequently, these parameters are used in conjunction with the target firing angle to perform mathematical model calculations to obtain the target DC voltage value. This method ensures that the DC voltage adjustment is closely related to the actual operating state of the system, improving the accuracy of regulation. Increasing the target firing angle will directly lead to an increase in the receiving end DC voltage, thereby reducing the DC voltage difference between the sending and receiving ends. During AC faults, this reduction in voltage difference can effectively suppress the rise of fault current, prevent overcurrent in power electronic equipment in the DC system, and ensure the safe operation of the system.

[0081] Reducing the DC voltage at the sending end includes the following steps:

[0082] Step S401: Obtain the DC voltage setting value of the aforementioned sending end (e.g., Figure 3 Middle U dc_ref ) and the DC current detection value of the aforementioned sending end at the current moment (e.g. Figure 3 Middle I dc );

[0083] Step S402, compare the above DC current detection value with a preset proportional coefficient (e.g., Figure 3 The product of k4 and k is determined as the DC voltage drop (e.g., k4). Figure 3 Middle U dc_ds );

[0084] Step S403, set the above DC voltage setting value (e.g.) Figure 3 Middle U dc_ref ) and the aforementioned DC voltage drop value (such as Figure 3 Middle U dc_ds The difference between the two values ​​is determined as the target DC voltage of the aforementioned sending end, and the DC voltage of the aforementioned sending end is controlled to decrease from the aforementioned DC voltage setting value to the aforementioned target DC voltage.

[0085] In this system, the sending-end converter station control system, upon receiving a signal indicating an AC fault at the receiving end, acquires the current DC current detection value at the sending end. It can then control the sending-end converter station to reduce the DC voltage drop value based on the original DC voltage setpoint. The DC voltage drop value is calculated by multiplying the current detection value by a preset proportional coefficient, allowing for differentiated adjustment based on the degree of DC current increase. By reducing the DC voltage setpoint, the increasing trend of DC current is suppressed, thereby maintaining the system's DC current within a safe range during AC faults at the receiving end. Furthermore, this process only requires sending the fault occurrence signal or fault recovery signal to the sending end after the AC fault occurs or is resolved at the receiving end. This reduces the number of communications between the sending and receiving ends, avoiding frequent communication and mitigating the adverse effects of communication failures or delays, thus improving system reliability.

[0086] After reducing the DC voltage at the sending end, the above method further includes the following steps:

[0087] Step S501: Based on the target DC voltage, determine the d-axis component of the AC voltage modulation wave reference value at the sending end (e.g., ...). Figure 3 middle u d );

[0088] Step S502, obtain the q-axis component of the AC voltage modulation wave reference value of the above-mentioned sending end (e.g., Figure 3 middle u q );

[0089] Step S503: Based on the d-axis component and the q-axis component of the AC voltage modulation wave reference value, determine the AC voltage modulation wave reference value component in the two-phase synchronous rotating coordinate system of the sending end.

[0090] Step S504: The reference value components of the AC voltage modulation wave in the two-phase synchronous rotating coordinate system of the sending end are transformed to obtain the reference value of the AC voltage modulation wave in the three-phase AC coordinate system. Based on the reference value of the AC voltage modulation wave, a control signal is generated for the fully controlled device in the converter of the sending end to control the fully controlled device to turn on or off.

[0091] This method utilizes space vector modulation (SVM), sinusoidal pulse width modulation (SPWM), or other modulation techniques to compare an AC voltage modulation reference value with a high-frequency carrier signal. The carrier signal is typically in the form of a triangular or sawtooth wave, with a frequency much higher than that of the modulation signal. When the amplitude of the modulation signal exceeds that of the carrier signal, a high-level pulse is generated, indicating that the fully controllable device is turned on; conversely, a low-level pulse is generated, indicating that the fully controllable device is turned off. This PWM generation method, based on the comparison of the modulation and carrier signals, can precisely control the switching timing of the fully controllable device, generating the desired voltage or current waveform.

[0092] Specifically, based on the measured DC current value, the system dynamically adjusts the d-axis component of the sending-end voltage modulation wave reference value. This adjustment method accurately reflects the receiving-end fault state, ensuring that the adjustment of the sending-end voltage better meets the requirements of fault suppression, and improving the control accuracy and response speed of the DC voltage. By coordinating the q-axis component, the system can maintain reactive power balance, avoiding the impact of abnormal reactive power fluctuations on system stability. Based on the adjusted d-axis and q-axis components, the AC voltage components of the sending-end MMC converter in a two-phase orthogonal stationary coordinate system are calculated. This conversion simplifies the complex three-phase voltage information into easily processed two-phase components, facilitating the implementation of effective control strategies and ensuring the stability and controllability of the sending-end voltage. The obtained two-phase orthogonal stationary coordinate AC voltage components are converted back to the three-phase AC coordinate system for direct driving of the sending-end MMC converter for control. This coordinate transformation not only considers the fault depth but also ensures the matching of the control signal with the converter's physical structure, improving the execution efficiency and accuracy of the control strategy. Through these steps, the system can finely adjust the sending-end voltage modulation wave reference value during receiving-end AC faults, achieving fault current suppression in coordination with the receiving end. Meanwhile, once the fault is cleared, this dynamic adjustment mechanism based on vectors and amplitude helps the system to smoothly and quickly return to normal operation, reduces voltage fluctuations during the recovery process, and enhances fault ride-through capability and recovery stability.

[0093] The process of determining the d-axis component of the voltage modulation wave reference value at the sending end based on the target DC voltage includes the following steps:

[0094] Step S5011, the target DC voltage and the actual DC voltage value (e.g., Figure 3 Middle U dc The difference between the two values ​​is input to the first proportional-integral controller for proportional-integral calculation, to obtain the d-axis component of the inner loop current reference value of the aforementioned sending end (e.g., Figure 3 in i dref );

[0095] Step S5012, the d-axis component of the above current reference value (e.g.) Figure 3 in idref ) and the d-axis component of the actual current value (e.g. Figure 3 in i d The difference is input to the second proportional-integral controller for proportional-integral calculation to obtain the d-axis component of the voltage modulation wave reference value of the above-mentioned sending end.

[0096] Specifically, by dynamically adjusting the gain value to change the reference value of the sending-end voltage modulation wave, this modulation method directly responds to the depth of the receiving-end AC fault, ensuring more precise and adaptable adjustment of the sending-end voltage. When the receiving-end voltage drops, the sending-end voltage is moderately reduced, which helps to reduce the voltage difference between the two ends and suppress fault current.

[0097] In other embodiments, such as Figure 4 As shown, the DC voltage at the sending end can also be reduced based on the current voltage parameters mentioned above, specifically including the following steps: determining the gain value of the DC voltage setting value at the sending end based on the amplitude of the current vector sum; reducing the DC voltage setting value (e.g., ...) to the current voltage parameters. Figure 4 Middle U dc_ref The product of the above-mentioned gain value and the above-mentioned DC voltage reference value of the sending end is determined; the DC voltage of the sending end is determined according to the above-mentioned DC voltage reference value in order to reduce the DC voltage of the sending end.

[0098] Specifically, firstly, the gain value of the DC voltage setpoint at the sending end is calculated based on the current amplitude of the quadrature components of the three-phase AC voltage at the receiving end (i.e., the amplitude of the current vector sum). This gain value reflects the degree of voltage fluctuation at the receiving end and is a key parameter determining the adjustment range of the sending end voltage. Based on the calculated gain value, the DC voltage setpoint at the sending end is dynamically adjusted. Specifically, the original DC voltage setpoint at the sending end is multiplied by the gain value to obtain a new DC voltage reference value. This new reference value is smaller than the original setpoint, aiming to reduce the DC voltage at the sending end and thus decrease the voltage difference between the sending and receiving ends. Based on the new DC voltage reference value, the converter control strategy at the sending end is adjusted to ensure that the DC voltage at the sending end can smoothly drop to the reference value. This control strategy typically involves adjusting the converter's firing angle and resetting the current control loop.

[0099] By reducing the DC voltage at the sending end in conjunction with raising the DC voltage at the receiving end, the voltage difference between the sending and receiving ends is reduced. This synergistic effect effectively suppresses the rise of fault current, preventing excessive current stress on power electronic equipment (such as IGCTs) and preventing faults such as commutation failure and equipment overheating. The reduction in the DC voltage at the sending end helps the system remain stable during AC faults at the receiving end, avoiding drastic voltage and current fluctuations, reducing the risk of system oscillations, and enhancing the system's resistance to external disturbances. The proactive reduction of the sending-end voltage, combined with the rise in the receiving-end voltage, enables the hybrid DC system to maintain a certain level of operational capability during AC faults at the receiving end, improving the system's fault ride-through capability, reducing system downtime caused by faults, and ensuring the continuity and reliability of power transmission.

[0100] Based on this, such as Figure 4 As shown, the d-axis component of the voltage modulation wave reference value at the transmitting end can also be determined based on the amplitude of the current vector sum mentioned above. The specific determination steps are as follows: Based on the amplitude of the current vector sum mentioned above, determine the gain value of the DC voltage setting value at the transmitting end using the VDVOL algorithm; set the DC voltage setting value (such as...) to... Figure 4 Middle U dc_ref The product of the above-mentioned gain value and the above-mentioned DC voltage reference value at the sending end is determined; based on the above-mentioned DC voltage reference value and the actual DC voltage value (such as...), the DC voltage reference value at the sending end is determined. Figure 4 Middle U dc The difference between the two is used to generate the d-axis component of the current reference value of the inner loop at the sending end (e.g., using a proportional-integral algorithm). Figure 4 in i dref ); based on the d-axis component of the above current reference value (such as Figure 4 in i dref ) and the d-axis component of the actual current value (e.g. Figure 4 in i d The difference between the two values ​​is calculated using a proportional-integral algorithm to obtain the d-axis component of the voltage modulation wave reference value at the sending end.

[0101] Based on the difference between the DC voltage reference value and the actual DC voltage value at the sending end, the d-axis component of the current reference value in the inner loop is generated using a proportional-integral (PI) algorithm. This algorithm eliminates static errors, improves the stability and response speed of the control system, and thus controls the sending end current more precisely, avoiding excessive current fluctuations and enhancing the system's operational stability. Similarly, using the PI algorithm, the difference between the current reference value and the actual current value based on the d-axis component is calculated to obtain the d-axis component of the voltage modulation wave reference value at the sending end. This closed-loop control strategy can finely adjust the sending end voltage, ensuring stable operation around the specified reference value and further optimizing the system's voltage management. By dynamically adjusting the d-axis component of the voltage modulation wave reference value at the sending end, a synergistic effect is formed with the control strategy at the receiving end, jointly suppressing the rise of fault current. This synergistic control not only reduces the impact of faults on the system but also avoids system imbalances that may result from unilateral control, enhancing the overall control performance of the hybrid DC system.

[0102] The process of obtaining the q-axis component of the voltage modulation wave reference value at the aforementioned sending end includes the following steps:

[0103] Step S5021, determine the reference value of the AC voltage amplitude at the sending end (e.g., Figure 3 and Figure 4 U in ac1_ref ) and the actual AC voltage value (e.g. Figure 3 and Figure 4 U in ac1 The difference between the two values ​​is used to obtain the voltage difference, or to determine the reference value of reactive power at the sending end (such as...). Figure 3 and Figure 4 Q in ac1_ref ) and actual reactive power (such as Figure 3 and Figure 4 Q in ac1 The power difference is obtained by taking the difference between the two values.

[0104] Step S5022: The voltage difference or power difference is input to the third proportional-integral controller for proportional-integral calculation to generate the q-axis component of the inner loop current reference value of the sending end (e.g., Figure 3 and Figure 4 i in qref );

[0105] Step S5023, the q-axis component of the above current reference value (e.g. Figure 3 and Figure 4 i in qref ) and the q-axis component of the actual current value (e.g. Figure 3 and Figure 4 i in qThe difference is input to the fourth proportional-integral controller for proportional-integral calculation to obtain the q-axis component of the voltage modulation wave reference value of the above-mentioned sending end.

[0106] Specifically, the system generates voltage or power differences by comparing the difference between the sending-end AC voltage modulation wave reference value and the actual AC voltage value, or the reactive power reference value and the actual reactive power value. This real-time difference monitoring mechanism ensures timely adjustment of the sending-end reactive power, meeting the system's reactive power support needs during receiving-end AC faults. Based on the voltage or power difference, the sending end uses a proportional-integral (PI) algorithm to calculate the q-axis component of the inner-loop current reference value. This process improves the control accuracy of the sending-end current, especially the reactive current, helping to maintain the stability of the sending-end AC system and avoiding large voltage fluctuations. Using the PI algorithm, the q-axis component of the sending-end voltage modulation wave reference value is generated based on the difference between the q-axis component of the current reference value and the q-axis component of the actual current value. This closed-loop control strategy precisely adjusts the sending-end voltage, especially the reactive voltage component, ensuring the stability of the sending-end voltage near the specified reference value and optimizing the voltage management at the sending end. Precise control of the sending-end reactive power and optimized voltage regulation help enhance the overall stability of the system under receiving-end AC fault conditions. When the receiving end voltage drops or reactive power is insufficient, the sending end can provide necessary reactive power support to prevent system voltage collapse and improve the system's disturbance rejection capability and fault ride-through capability.

[0107] To enable those skilled in the art to better understand the technical solution of this application, the implementation process of the method for suppressing AC fault current at the receiving end of the hybrid DC system of this application will be described in detail below with reference to specific embodiments.

[0108] This embodiment relates to a specific method for suppressing AC fault current at the receiving end of a hybrid DC system, such as... Figure 3 As shown. I d2 Given the DC current measurement value on the inverter side, the first filter can be expressed as: Where G1 and T1 are preset parameters of the first filter, G1 is the gain of the first filter, s is a complex frequency domain variable used to describe the behavior of the first filter in the frequency domain, and T1 is the time constant, which is a key parameter used to describe the response speed of the first filter. The current value is input into the first filter for filtering processing to obtain the first filtered value of the DC current measurement. d2_ref The system uses the desired DC current reference value I on the inverter side. d2_ref The error between the measured DC current and the first filtered value is used by the PI controller (proportional-integral controller) to generate a reference firing angle command α. c Then, the limiting phase begins to ensure that the output reference firing angle command α is accurate. cNot exceeding the given upper and lower limits; U ac2_a U ac2_b U ac2_c These are the instantaneous values ​​of the three-phase voltages a, b, and c on the AC side of the inverter station, respectively. The abc-αβ module realizes the transformation of the instantaneous values ​​of the three-phase AC voltages from the three-phase stationary coordinate system to the two-phase orthogonal stationary coordinate system (Clarke transformation). The first module is for calculating the vector amplitude of the orthogonal components. This module outputs the current amplitude of the orthogonal components of the inverter-side AC voltage αβ. After that, it enters a first-order inertial loop with a time constant of 2s. This module outputs the steady-state amplitude of the orthogonal components of the inverter-side AC voltage αβ. The second module is for summing. The input value at the upper port is inverted. The output of the summing module is the difference between the steady-state amplitude of the orthogonal components of the inverter-side AC voltage αβ and the current amplitude of the orthogonal components of the inverter-side AC voltage αβ. This reflects the error between the instantaneous amplitude and the steady-state amplitude of the AC voltage. When the output of this module is not 0, it means that an AC fault has occurred. The larger the output, the more serious the fault (the greater the fault depth). The maximum detection period is set to 12ms. This is because the fundamental frequency of the power system is 50Hz, and one period is 20ms. 12ms is close to half a period, which is enough to cover the process from zero voltage to peak, ensuring that voltage change can be detected and thus avoiding missed alarms. The "a≥b" module connected to the output port of the maximum value hold module represents the first comparison module. When the input at port a is greater than the input at port b, this module outputs 1; otherwise, it outputs 0. This first comparison module works in conjunction with the maximum detection period to detect the moment a fault occurs; at the moment a fault occurs, the first comparison module outputs 1. The minimum detection period hold time is set to 12ms. The "a≥b" module connected to the output port of the minimum value hold module represents the second comparison module. When the input at port a is greater than the input at port b, this module outputs 1; otherwise, it outputs 0. This second comparison module works in conjunction with the minimum detection period. The first comparison module is used to detect the end time of the fault. At the end time of the fault, the output of the second comparison module is 0. The outputs of the first comparison module and the second comparison module are connected to the AND gate to control the trigger angle increment switching switch. When the AND gate output is 1, the switching switch is connected to the upper port input signal of the barrier gate. When the AND gate output is 0, the switching switch is switched to the lower port input signal. This switching switch introduces the trigger angle increment during the fault and removes the trigger angle increment at the moment the fault is cleared. k1 and k2 are the fixed parameters of the comparison module, and k3 is the gain module, which is used to output the trigger angle increment command that is linearly related to the fault depth.

[0109] like Figure 4As shown in the diagram, the function and principle of the sending-end MMC converter control block diagram are as follows: This control system is used for voltage and power control of the sending-end MMC converter. VDVOL is a low-voltage limiting control loop. Based on the current amplitude of the αβ quadrature components of the inverter-side AC voltage, it changes the gain of the sending-end DC voltage setpoint, thereby reducing the sending-end DC voltage and decreasing the voltage difference between the sending and receiving ends during AC faults at the receiving end, thus suppressing the fault current. The second filter can be represented as... Where G2 and T2 are preset parameters of the second filter. The second filter is connected to the current amplitude of the quadrature component αβ of the inverter-side AC voltage, and outputs the filtered value of the current amplitude of the quadrature component αβ of the inverter-side AC voltage, which is transmitted to the sending-end MMC converter control system through a communication link (usually optical fiber); the third filter can be represented as... G3 and T3 are the preset parameters of the third filter. The fourth filter can be expressed as... G4 and T4 are the preset parameters of the fourth filter; the system uses the desired DC voltage reference value U. dc_ref With actual DC voltage U dc The error between them, combined with the third filter, is used to generate the inner loop d-axis current reference value i through a PI controller (proportional-integral controller). dref and compared with the measured value of the d-axis current i d Subtraction is performed, and a reference value u for the d-axis voltage modulation wave on the AC side of the MMC is generated by the PI controller. d Simultaneously, the system modulates the reference value U of the desired rectified AC voltage reference value. ac1_ref Or reactive power reference value Q ac1_ref , and the actual AC voltage U ac1 Or reactive power Q ac1 The error between them, combined with the fourth filter, generates the inner loop q-axis current reference value i through a PI controller (proportional-integral controller). qref and compared with the measured value of the q-axis current i q Subtraction is performed, and a reference value u for the q-axis voltage modulation wave on the AC side of the MMC is generated by the PI controller. q u d and u q The voltage is fed into the dq-abc conversion module (inverse Park transformation), which converts the AC voltage component in the dq coordinate system back to the three-phase AC coordinate system (abc component) and drives the MMC converter output to maintain the DC voltage U of the MMC. dc Stable tracking reference value U dc_ref Meanwhile, the MMC AC voltage U ac1 Or reactive power Q ac1 Stable tracking reference value U ac1_ref Or Q ac1_ref .

[0110] The above embodiments, by introducing VDVOL control, achieve the limitation of DC current on the rectifier side. Active turn-off predictive control enhances the HCC's ability to suppress fault currents, increasing the system's safety margin. It achieves control coordination between the sending and receiving end converters, improving the system's recovery capability and stability under receiving-end faults. This is the first time that VDVOL and active turn-off predictive control have been integrated into an MMC-HCC system, achieving dual-end coordination. It enables active regulation of device turn-off current at the control level, effectively improving the valve-controlled safety of the HCC.

[0111] in, Figure 3 and Figure 4 The only difference lies in the calculation of the DC voltage at the sending end, specifically in the case of a fault at the receiving end. Figure 3 The DC voltage at the sending end is calculated directly from the current value measured at the sending end. Figure 4 This is determined based on the magnitude of the current vector sum of the voltages detected at the receiving end. Figure 3 This method reduces the number of communications between the receiving and sending ends, improving system reliability. Figure 4 This method results in a high degree of synchronization between the sending and receiving ends.

[0112] Embodiments of this application also provide a hybrid DC system, such as Figure 5 As shown, it includes: a controller 10 for executing any of the above-described methods for suppressing AC fault current at the receiving end of the hybrid DC system; a receiving end, including a receiving-end converter 20, electrically connected to the controller 10; and a sending end, including a sending-end converter 30, electrically connected to the controller 10 and the receiving-end converter 20, respectively.

[0113] This hybrid DC system reduces the voltage difference between the sending and receiving ends to suppress system fault current, thereby improving the converter's operational safety and fault ride-through capability. It solves the problem in existing technologies where the fault current rises significantly when an AC short-circuit fault occurs at the receiving end of the converter, leading to commutation failure and device overcurrent.

[0114] It is obvious to those skilled in the art that the modules or steps of the present invention described above can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. They can be implemented using computer-executable program code, and thus can be stored in a storage device for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those described herein, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, the present invention is not limited to any particular combination of hardware and software.

[0115] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0116] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0117] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0118] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0119] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0120] Memory may include non-persistent memory in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, like read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0121] Computer-readable media includes both permanent and non-permanent, removable and non-removable media that can store information using any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.

[0122] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0123] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0124] As can be seen from the above description, the embodiments of this application achieve the following technical effects:

[0125] The method for suppressing AC fault current at the receiving end of the hybrid DC system described in this application first obtains the current voltage parameters of the AC bus voltage at the receiving end. These current voltage parameters include a current vector sum, which is the vector sum of the three-phase AC voltages at the receiving end in a two-phase orthogonal stationary coordinate system at the current moment. Then, based on the relationship between the current voltage parameters and the reference voltage parameters, it is determined whether an AC fault has occurred at the receiving end. The reference voltage parameters include a reference vector sum, which is the vector sum of the three-phase AC voltages at the receiving end in a steady state in a two-phase orthogonal stationary coordinate system. Finally, in the case of an AC fault at the receiving end, a compensation firing angle is calculated based on the current voltage parameters. The DC voltage at the receiving end is increased according to the compensation firing angle, and the DC voltage at the sending end is decreased according to the current DC current measurement value to suppress the AC fault current at the receiving end. This method suppresses the system fault current by reducing the voltage difference between the sending and receiving ends, thereby improving the converter's operational safety and fault ride-through capability. It solves the problem in the prior art where, when an AC short-circuit fault occurs at the receiving end of the converter, the fault current will significantly increase, leading to commutation failure and device overcurrent.

[0126] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A method for suppressing AC fault current at the receiving end of a hybrid DC system, characterized in that, include: Obtain the current voltage parameters of the AC bus voltage at the receiving end. The current voltage parameters include the current vector sum, which is the vector sum of the three-phase AC voltage at the receiving end in a two-phase orthogonal stationary coordinate system at the current moment. Based on the relationship between the current voltage parameter and the reference voltage parameter, it is determined whether an AC fault has occurred at the receiving end. The reference voltage parameter includes a reference vector sum, which is the vector sum of the three-phase AC voltages at the receiving end in a steady state in a two-phase orthogonal stationary coordinate system. In the event of an AC fault at the receiving end, the compensation firing angle is calculated based on the current voltage parameters; The DC voltage at the receiving end is increased and the DC voltage at the sending end is decreased according to the compensation firing angle, so as to suppress the AC fault current at the receiving end.

2. The method according to claim 1, characterized in that, Based on the relationship between the current voltage parameter and the reference voltage parameter, determining whether an AC fault has occurred at the receiving end includes: Determine the magnitude of the current vector sum and the magnitude of the reference vector sum to obtain the magnitude of the current orthogonal component and the magnitude of the reference orthogonal component, respectively; Calculate the difference between the current quadrature component amplitude and the reference quadrature component amplitude at the receiving end to obtain the amplitude difference. The reference quadrature component amplitude is the quadrature component amplitude of the AC voltage at the receiving end in the pre-fault steady state in the two-phase quadrature stationary coordinate system. The magnitude of the amplitude difference determines whether an AC fault has occurred at the receiving end.

3. The method according to claim 2, characterized in that, Determining whether an AC fault has occurred at the receiving end based on the magnitude of the amplitude difference includes: Determine the maximum detection period and the minimum detection period, and determine the maximum value of the amplitude difference detected in the maximum detection period as the maximum amplitude difference, and determine the minimum value of the amplitude difference detected in the minimum detection period as the minimum amplitude difference; The magnitudes of the maximum amplitude difference and the first threshold are compared to obtain a first comparison result, and the magnitudes of the minimum amplitude difference and the second threshold are compared to obtain a second comparison result. If the first comparison result is that the maximum amplitude difference is greater than or equal to the first threshold, and the second comparison result is that the minimum amplitude difference is greater than or equal to the second threshold, it is determined that the receiving end has an AC fault. If the first comparison result is that the maximum amplitude difference is less than the first threshold, and / or the second comparison result is that the minimum amplitude difference is less than the second threshold, it is determined that no AC fault has occurred at the receiving end.

4. The method according to claim 1, characterized in that, The compensation firing angle is calculated based on the current voltage parameters, including: The product of the maximum amplitude difference and the first gain coefficient is determined as the compensation trigger angle, wherein the maximum amplitude difference is the maximum value of the amplitude difference detected in the maximum detection period, the amplitude difference is the difference between the current quadrature component amplitude and the reference quadrature component amplitude at the receiving end, the current quadrature component amplitude is the amplitude of the current vector sum, and the reference quadrature component amplitude is the amplitude of the reference vector sum.

5. The method according to claim 1, characterized in that, Increasing the DC voltage at the receiving end according to the compensation firing angle includes: Obtain the initial trigger angle; The sum of the compensated trigger angle and the initial trigger angle is determined as the target trigger angle; The target DC voltage of the receiving end is determined at least based on the target firing angle, and the DC voltage of the receiving end is increased from the initial DC voltage to the target DC voltage.

6. The method according to claim 1, characterized in that, After determining whether an AC fault has occurred at the receiving end, the method further includes: If the three-phase vector sum of the AC bus voltage at the receiving end is zero, it is determined that a three-phase symmetrical fault has occurred at the receiving end. If the three-phase vector sum of the AC bus voltage at the receiving end is not zero, it is determined that a single-phase or two-phase asymmetrical fault has occurred at the receiving end.

7. The method according to claim 1, characterized in that, Reducing the DC voltage at the sending end includes: Obtain the DC voltage setting value of the sending end and the DC current detection value of the sending end at the current moment; The product of the detected DC current value and a preset proportional coefficient is determined as the DC voltage drop value; The difference between the DC voltage setpoint and the DC voltage reduction value is determined as the target DC voltage of the sending end, and the DC voltage of the sending end is controlled to decrease from the DC voltage setpoint to the target DC voltage.

8. The method according to claim 7, characterized in that, After reducing the DC voltage at the sending end, the method further includes: Based on the target DC voltage, determine the d-axis component of the AC voltage modulation wave reference value at the sending end; Obtain the q-axis component of the AC voltage modulation wave reference value at the sending end; Based on the d-axis component and the q-axis component of the AC voltage modulation wave reference value, the AC voltage modulation wave reference value components in the two-phase synchronous rotating coordinate system of the sending end are determined. The reference value components of the AC voltage modulation wave in the two-phase synchronous rotating coordinate system of the sending end are transformed to obtain the reference value of the AC voltage modulation wave in the three-phase AC coordinate system. Based on the reference value of the AC voltage modulation wave, control signals are generated for the fully controlled devices in the converter of the sending end to control the fully controlled devices to turn on or off.

9. The method according to claim 8, characterized in that, Based on the target DC voltage, determine the d-axis component of the voltage modulation wave reference value at the transmitting end, including: The difference between the target DC voltage and the actual DC voltage value is input to the first proportional-integral controller for proportional-integral calculation to obtain the d-axis component of the current reference value of the inner loop of the sending end. The difference between the d-axis component of the current reference value and the d-axis component of the actual current value is input to the second proportional-integral controller for proportional-integral calculation to obtain the d-axis component of the voltage modulation wave reference value of the sending end.

10. The method according to claim 8, characterized in that, Obtaining the q-axis component of the voltage modulation wave reference value at the sending end includes: The voltage difference is obtained by determining the difference between the reference value of the AC voltage amplitude at the sending end and the actual AC voltage value, or the power difference is obtained by determining the difference between the reference value of the reactive power at the sending end and the actual reactive power. The voltage difference or the power difference is input to the third proportional-integral controller for proportional-integral calculation to generate the q-axis component of the current reference value of the inner loop of the sending end; The difference between the q-axis component of the current reference value and the q-axis component of the actual current value is input to the fourth proportional-integral controller for proportional-integral calculation to obtain the q-axis component of the voltage modulation wave reference value of the sending end.

11. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes a stored program, wherein, when the program is executed, it controls the device in which the computer-readable storage medium is located to perform the method for suppressing AC fault current at the receiving end of a hybrid DC system as described in any one of claims 1 to 10.

12. A hybrid DC system, characterized in that, include: A controller for performing the method for suppressing AC fault current at the receiving end of a hybrid DC system as described in any one of claims 1 to 10; The receiving end includes a receiving-end converter, which is electrically connected to the controller; The sending end includes a sending-end converter, which is electrically connected to the controller and the receiving-end converter, respectively.

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