Coordinated sensing of gate oxide condition and gate high frequency oscillation suppression for power devices

Abstract

The application discloses a kind of power device gate high-frequency oscillation inhibition and the synergic perception method of gate oxide state, in the drive side non-contacting sleeve interface resonator coil of power device gate, at start, resonator coil is connected with perception loop, drive side injects pulse excitation signal to power device gate, obtains gate oscillation current by perception loop, and gate oscillation current amplitude is used as gate oxide aging sensitive parameter to evaluate power device gate oxide state;Pre-configuration inhibition loop parameter is carried out based on resonance matching relationship;Then resonator coil is switched to connect with inhibition loop, and power device is operated in the state of gate oscillation current inhibition;The application constructs the synergic control of gate oxide degradation state and inhibition loop parameter adjustment, realizes adaptive efficient gate oscillation current inhibition effect according to gate oxide health state, flexible and reliable, universally applicable to existing power device.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of power semiconductor device health management, and particularly relates to a power device gate high-frequency oscillation suppression and gate oxide state cooperative sensing method. BACKGROUND

[0002] Power modules can efficiently convert alternating current or direct current power into a specific voltage form, and play an important role in the fields of automotive electronics, rail transportation, data communication, industrial automation, relay protection, etc., and their safety and reliability are very important. Power devices (usually mainly MOS tubes) are the core components responsible for power conversion in power modules, and their reliability is directly related to the safe operation of power modules. Aging and failure of power devices have become an important factor restricting the reliability of power modules.

[0003] At present, SiC MOSFET is accelerating the replacement of traditional power devices in various fields due to its excellent performance, but the large number of near-interface defects of its gate oxide layer makes the gate oxide layer a weak link of reliability. In addition, the extremely high dv / dt and di / dt caused by the high-speed switching process of SiC MOSFET can excite parasitic parameter resonance, resulting in high-frequency oscillation of the gate. Such oscillation not only increases switching loss and electromagnetic interference, but also accelerates the accumulation of near-interface defects of the gate oxide layer through gate current overshoot, causing threshold voltage drift and even gate oxide breakdown, which seriously reduces the reliability of the device.

[0004] The article named "Effect of Gate-Oxide Degradation on Electrical Parameters of Silicon Carbide MOSFETs" (IEEE Transactions on Electron Devices, vol. 67, no. 6, pp. 2544-2552, June 2020) published by Ujjwal Karki et al. verifies the feasibility of taking threshold voltage, gate platform voltage and gate platform time as precursor parameters of gate oxide degradation, but these dynamic parameters need to be measured by precise instruments, and are easily affected by many factors such as working conditions, making it difficult to conveniently and accurately evaluate the gate oxide degradation.

[0005] The article entitled "Current Injection Type SiC MOSFET Active Drive Method for Suppressing Transient Voltage and Current Spikes and Oscillations" (Proceedings of the CSEE, 2019, 39(19): 5666-5673 and 5894) published by Feng Chao et al. proposes to use a current injection type active drive circuit to inject a reverse current to suppress the transient voltage and current spikes and oscillations in the switching process. This method can suppress voltage and current spikes and high-frequency oscillations, but the drive circuit introduced will slow down the switching speed and cause additional switching loss.

[0006] The patent application with the publication number CN118800661A discloses a SiC MOSFET device and a preparation method for reducing gate oscillation. In the preparation process of the SiC MOSFET, the thickness of the dielectric resistance layer is adjusted to change the gate resistance value, thereby weakening the oscillation energy and reducing the gate oscillation. However, the method of suppressing gate oscillation from the preparation level lacks flexibility and cannot be universally applied to existing devices.

[0007] On the one hand, the existing technology for monitoring the SiC MOSFET gate oxide state is mainly achieved by detecting the precursor parameters of gate oxide degradation. However, the detection of precursor parameters often relies on precise measuring instruments, which is cumbersome to operate and is easily disturbed by factors such as working conditions and switching noise during the measurement process, resulting in a significant decrease in measurement accuracy. On the other hand, in terms of suppressing SiC MOSFET gate oscillation, the existing technology generally needs to change the gate drive circuit, such as adjusting the drive resistance or adding a buffer circuit, to slow down the switching speed and introduce additional loss, which disturbs the original circuit. Or starting from the device preparation level, optimizing the device gate oxide layer preparation process to reduce gate oscillation, but this will significantly increase the manufacturing cost and lack flexibility. SUMMARY

[0008] Therefore, the purpose of the present application is to provide a power device gate high-frequency oscillation suppression and gate oxide state cooperative sensing method, which can achieve adaptive and efficient gate oscillation current suppression effect according to the gate oxide health state without causing electrical disturbance to the original circuit, is flexible and reliable, and is universally applicable to existing power devices.

[0009] The technical solutions adopted by the present application are as follows:

[0010] A power device gate high-frequency oscillation suppression and gate oxide state cooperative sensing method, a non-contact sleeve external resonator coil is arranged on the drive side of the gate of the power device, and a selectable sensing loop and a suppression loop are arranged between the positive and negative output ends of the external resonator coil.

[0011] During startup, the external resonator coil is connected to the sensing circuit, driving the side-mounted power device gate to inject a pulse excitation signal, and the gate oscillation current i is obtained through the sensing circuit. g_sw The frequency f of the gate oscillation current is extracted. g_sw Damping ratio ζ and gate oscillation current amplitude I g_sw(pk) The gate oscillation current amplitude I g_sw(pk) As a gate oxide aging sensitive parameter, the gate oxide state of power devices is evaluated;

[0012] Based on the information extracted from the sensing loop and the suppression loop's natural frequency equal to the frequency f of the gate oscillation current. g_sw The resonant matching relationship is pre-configured to suppress the circuit parameters: then the external resonator coil is switched to be connected to the suppression circuit, and the power device is in response to the gate oscillation current i g_sw It operates under a suppressed state.

[0013] Preferably, when the change in the state of the power device is considered to be within the expected range, the original parameter settings of the suppression loop are maintained during the pre-configuration of the suppression loop parameters;

[0014] When the state change of the power device is considered to exceed the expected range, the parameter configuration of the suppression loop is dynamically adjusted during the pre-configuration of the suppression loop parameters to adapt to the current state of the power device and achieve the target suppression configuration effect of the suppression loop.

[0015] Whether the power device state change exceeds the expected range includes: the frequency f of the gate oscillation current. g_sw Does the change exceed the expected threshold?

[0016] Preferably, the inductance L of the external resonator coil is determined by the following formula:

[0017] ;

[0018] Where L is the inductance of the external resonator coil; a is the inner diameter of the coil; b is the outer diameter of the coil; μ0 is the permeability of the coil frame; N is the number of turns of the coil winding; and h is the winding radius.

[0019] Preferably, the damping ratio ζ is determined by the following formula:

[0020] ;

[0021] ;

[0022] Where ζ is the damping ratio; R g C is the gate resistor; gs Gate-source capacitance; L gs For gate stray inductance; f g_sw The frequency of the gate oscillation current.

[0023] Preferably, the sensing loop comprises a terminal resistance R2 connected between the positive and negative output terminals of the outer resonator coil, forming a sensing loop, wherein the gate oscillation current i g_sw The voltage waveform is generated across the terminal resistance R2 of the sensing loop by the electromagnetic induction coupling effect of the outer resonator coil, and the gate oscillation current i g_sw is obtained by collecting the voltage waveform. The suppression loop comprises a damping resistance R1 and a resonance capacitor C1 connected between the positive and negative output terminals of the outer resonator coil, forming a suppression loop, wherein during the operation of the suppression loop, the oscillation energy generated in the gate resonance loop is transferred to the suppression loop by the electromagnetic induction coupling effect of the outer resonator coil, realizing the attenuation suppression of the gate oscillation current amplitude I g_sw(pk) .

[0024] Preferably, when configuring the sensing loop and the suppression loop, the gate oscillation current i g_sw is collected by a high-frequency current probe, and the frequency f g_sw of the gate oscillation current is extracted. The sensing loop and the suppression loop are configured based on the frequency (f g_sw ) of the gate oscillation current.

[0025] Preferably, when configuring the sensing loop, the terminal resistance R2 needs to meet the requirement that the bandwidth of the outer resonator coil covers the high-frequency oscillation frequency of the gate of the power device:

[0026] BW= f H to f L ;

[0027] ;

[0028] ;

[0029] Wherein, BW represents the bandwidth of the outer resonator coil, f H and f L are the high and low cutoff frequencies of the bandwidth of the outer resonator coil, respectively; L is the inductance of the outer resonator coil; R0 and C0 represent the self-resistance and self-capacitance of the outer resonator coil, respectively; R2 is the terminal resistance.

[0030] Preferably, when configuring the sensing loop, the sensing loop is configured as follows:

[0031] ;

[0032] ω=2πf g_sw ;

[0033] Wherein, R2 is a terminal resistance; ω is an angular frequency of the gate oscillation current; L is an inductance of the outer resonator coil; f g_sw is a frequency of the gate oscillation current;

[0034] So that the sensing loop works in a self-integration mode, wherein, when the sensing loop works, a voltage waveform across the terminal resistance R2 in the sensing loop is in linear relationship with the gate oscillation current i g_sw ; a frequency f of the gate oscillation current g_sw is equal to an oscillation frequency of the voltage waveform across the terminal resistance R2, and an amplitude I of the gate oscillation current g_sw(pk) is obtained through linear relationship based on an amplitude of the voltage waveform across the terminal resistance R2.

[0035] Preferably, when configuring or dynamically adjusting the suppression loop, the damping resistance R1 and the resonant capacitor C1 need to be configured according to the following resonance matching relationship:

[0036] ;

[0037] ;

[0038] M = L / N;

[0039] ;

[0040] ;

[0041] Wherein, f ext is an inherent frequency of the suppression loop; f g_sw is a frequency of the gate oscillation current; C1 is a resonant capacitor; L is an inductance of the outer resonator coil; μ is a coil coupling coefficient; M is a coil mutual inductance; N is a coil winding number; R1 is a damping resistance.

[0042] Preferably, when configuring the suppression loop, a frequency f of the gate oscillation current g_sw is obtained through acquisition and extraction of the high-frequency current probe; when dynamically adjusting the suppression loop, a frequency f of the gate oscillation current g_sw is obtained through acquisition and extraction of the sensing loop.

[0043] Preferably, the power device is a SiC MOSFET.

[0044] The application is characterized in that: the outer resonator coil is arranged on the driving side of the gate of the power device in a non-contacting sleeve joint mode, and a selectively switchable sensing loop and a suppression loop are arranged between the positive and negative output terminals of the outer resonator coil, thereby forming the outer resonator arranged on the driving side of the gate of the power device in a magnetic coupling access mode, the outer resonator integrates the functions of gate oxide state sensing and high-frequency oscillation suppression, and switches the gate oxide state sensing and high-frequency oscillation suppression according to the time sequence changes of the starting and working states of the power device; when the application is implemented, the gate oxide state can be accurately sensed through the sensing loop when the power device starts, without causing electrical interference to the original circuit, and is not affected by the working conditions (such as temperature, load current, etc.) of the power device, thereby providing an effective basis for the health state evaluation of the power device and avoiding accidents; then, the parameters of the suppression loop are pre-configured based on the sensing result of the gate oxide state and the resonance matching relationship that the inherent frequency of the suppression loop is equal to the frequency f g_sw of the gate oscillation current, the suppression loop introduces the damping characteristics of the outer resonator into the resonance loop corresponding to the high-frequency oscillation current of the device based on the coupling damping mode, so as to realize the suppression of the efficient gate oscillation current; the application constructs the cooperative control of the gate oxide degradation state and the adjustment of the parameters of the suppression loop, realizes the adaptive efficient gate oscillation current suppression effect according to the health state of the gate oxide, is flexible and reliable, and is universally applicable to existing power devices. BRIEF DESCRIPTION OF DRAWINGS

[0045] Figure 1 is a flowchart of the cooperative sensing method of the high-frequency oscillation suppression of the gate of the power device and the gate oxide state in the specific embodiment of the application;

[0046] Figure 2 is an equivalent circuit diagram of the gate of the SiC MOSFET;

[0047] Figure 3 is a schematic diagram of the experimental platform adopted in the embodiment of the application;

[0048] Figure 4 is a comparison diagram of the voltage waveform at the terminal resistor R2 measured by the embodiment of the application (i.e., the "self-made outer resonator" marked in the figure) and the gate switch oscillation current waveform measured by a commercial current probe;

[0049] Figure 5 is a comparison diagram of the sensing effects at different aging times in the accelerated aging test in the embodiment of the application.

[0050] Figure 6 is a time domain comparison diagram before and after the gate oscillation current suppression in the embodiment of the application;

[0051] Figure 7 is a frequency domain comparison diagram before and after the gate oscillation current suppression in the embodiment of the application. DETAILED DESCRIPTION

[0052] Referring to Figure 1 The embodiment provides a power device gate high-frequency oscillation suppression and gate oxide state cooperative sensing method. An external resonator coil is non-contactedly sleeved on the driving side of the gate of the power device. A sensing loop and a suppression loop which are selectively switched through a switch S are arranged between the positive and negative output ends of the external resonator coil. The external resonator coil, the sensing loop and the suppression loop form an external resonator. Preferably, in the embodiment, the power device is a SiC MOSFET, and the driving side of the power device is connected with a gate drive device (used for outputting a pulse excitation signal used for driving). Of course, a power device with the same or similar requirement can also be used, and the embodiment does not particularly limit this. Preferably, in the embodiment, for the convenience of installation, the coil can be designed as an open coil or a PCB coil.

[0053] In the embodiment, at the start, the external resonator coil (i.e., the "coil" shown in Figure 1 ) is connected with the sensing loop (i.e., "switched to the sensing loop" shown in Figure 1 ), and the switch S is located at position 2 at this time), the driving side injects a plurality of pulse excitation signals into the gate of the power device (i.e., "the gate drive device injects pulses" shown in Figure 1 ), and the gate oscillation current i g_sw (i.e., "the high-frequency switching oscillation current i g_sw obtained" shown in Figure 1 ) is obtained through the sensing loop. The frequency f g_sw , the damping ratio ζ and the gate oscillation current amplitude I g_sw(pk) (i.e., "the frequency f g_sw , the amplitude I g_sw(pk) and the damping ratio ζ" shown in Figure 1 ) of the gate oscillation current are extracted, the gate oscillation current amplitude I g_sw(pk) is taken as a gate oxide aging sensitive parameter to evaluate the gate oxide state of the power device (i.e., "the gate oxide health state evaluation" shown in Figure 1 ), and a gate oxide state self-checking process performed by the sensing loop is formed. Specifically, as the power device ages (the gate oxide health state deteriorates), the gate oscillation current amplitude I g_sw(pk) will gradually decrease, so that the gate oxide state of the power device can be evaluated according to the change of the gate oscillation current amplitude I g_sw(pk) .

[0054] The sensing loop extracts information, and the inherent frequency of the suppression loop is equal to the frequency f g_sw of the gate oscillation current, so that the suppression loop parameters are preconfigured (i.e.,Figure 1 "preconfigured external resonator parameters") is then switched to the suppression loop by switch S (i.e. to position 1 of switch S as shown in "switched to suppression loop"), the power device operates in the state of suppression of the gate oscillation current i Figure 1 "switched to suppression loop", at which time switch S is switched to position 1), the power device operates in the state of suppression of the gate oscillation current i g_sw to form the suppression process of the gate oscillation current i

[0055] In the implementation, the SiC MOSFET is switched to the suppression process of the gate oscillation current i

[0056] Preferably, in the embodiment, the sensing loop includes a terminal resistor R2 connected between the positive and negative output terminals of the external resonator coil to form the sensing loop, and the gate oscillation current i g_sw The electromagnetic induction coupling of the external resonator coil generates a voltage waveform across the terminal resistor R2 of the sensing loop, and the gate oscillation current i g_sw The suppression loop includes a damping resistor R1 and a resonant capacitor C1 connected between the positive and negative output terminals of the external resonator coil to form the suppression loop, and in the operation of the suppression loop, the oscillation energy generated in the gate oscillation loop is transferred to the suppression loop by the electromagnetic induction coupling of the external resonator coil (the suppression loop is equivalent to a damping structure design), so as to realize the damping suppression of the gate oscillation current i g_sw(pk) .

[0057] Preferably, in the embodiment, when it is considered that the state change of the power device is within the expected range, the original parameter setting of the suppression loop is maintained in the preconfigured suppression loop parameter process.

[0058] When it is considered that the state change of the power device exceeds the expected range, the parameter configuration of the suppression loop is dynamically adjusted in the preconfigured suppression loop parameter process to adapt to the current state of the power device and realize the target suppression configuration effect of the suppression loop.

[0059] Preferably, in the embodiment, whether the state change of the power device exceeds the expected range includes whether the change of the frequency f g_sw of the gate oscillation current i g_swIf the offset value of the (change acquired through the perception loop) is greater than 5%, it is considered that the parameter configuration of the suppression loop needs to be dynamically adjusted; in specific implementation, a person skilled in the art can select a corresponding appropriate actual expected threshold according to actual needs, and the present application does not make special limitations in implementation.

[0060] Preferably, in the present embodiment, the outer resonator coil inductance L is determined by the following formula:

[0061] ;

[0062] Wherein, L is the outer resonator coil inductance; a is the inner diameter of the coil; b is the outer diameter of the coil; μ0 is the magnetic permeability of the coil framework; N is the number of turns of the coil winding; h is the winding radius.

[0063] Preferably, in the present embodiment, the SiC MOSFET gate equivalent circuit is shown in Figure 2 , wherein R g is the gate resistance; C gs is the gate-source capacitance; L gs is the gate stray inductance; V G,ON represents the gate drive voltage source, that is, the gate drive voltage provided for the SiC MOSFET; V ds is the power side power supply, which provides voltage for the power measurement, C gd , C ds , and C gs are the parasitic capacitances between the gate G and the drain D, the drain D and the source S, and the gate G and the source S of the SiC MOSFET, respectively; the SiC MOSFET gate drive side generates a gate oscillation current i g_sw .

[0064] In the present embodiment, the damping ratio ζ is determined by the following formula:

[0065] ;

[0066] ;

[0067] Wherein, ζ is the damping ratio; R g is the gate resistance; C gs is the gate-source capacitance; L gs is the gate stray inductance; f g_sw is the frequency of the gate oscillation current; it should be noted that the gate resistance R g and the gate-source capacitance C gs are directly given by the SiC MOSFET data manual.

[0068] Preferably, in the present embodiment, when configuring the perception loop and the suppression loop, the gate oscillation current i g_swThe frequency f of the gate oscillation current is obtained by a high-frequency current probe g_sw The sensing loop and the suppression loop are configured based on the frequency (f g_sw ) of the gate oscillation current.

[0069] Preferably, in the embodiment, when the sensing loop is configured, the terminal resistance R2 needs to meet the requirement that the outer resonator coil bandwidth covers the high-frequency oscillation frequency of the gate of the power device:

[0070] BW= f H to f L ;

[0071] ;

[0072] ;

[0073] wherein, BW represents the outer resonator coil bandwidth, f H and f L are the high and low cutoff frequencies of the outer resonator coil bandwidth respectively; L is the inductance of the outer resonator coil; R0 and C0 represent the self-resistance and self-capacitance of the outer resonator coil respectively, which can be directly measured by an instrument; and R2 is the terminal resistance.

[0074] Preferably, in the embodiment, when the sensing loop is configured, the sensing loop is configured as follows:

[0075] ;

[0076] ω=2πf g_sw ;

[0077] wherein, R2 is the terminal resistance; ω is the angular frequency of the gate oscillation current; L is the inductance of the outer resonator coil; and f g_sw is the frequency of the gate oscillation current.

[0078] So that the sensing loop works in the self-integration mode, wherein, when the sensing loop works, the voltage waveform across the terminal resistance R2 in the sensing loop is linearly related to the gate oscillation current i g_sw ; the frequency f g_sw of the gate oscillation current is equal to the oscillation frequency of the voltage waveform across the terminal resistance R2; and the amplitude I g_sw(pk) of the gate oscillation current is obtained by linear conversion based on the amplitude of the voltage waveform across the terminal resistance R2.

[0079] Preferably, in the embodiment, when the suppression loop is configured or dynamically adjusted, the damping resistance R1 and the resonance capacitance C1 need to be configured according to the following resonance matching relationship:

[0080] ;

[0081] ;

[0082] M=L / N;

[0083] ;

[0084] ;

[0085] wherein, f ext is the inherent frequency of the suppression loop; f g_sw is the frequency of the grid oscillation current; C1 is the resonance capacitor; L is the external resonator coil inductance; N is the coil winding number; M is the coil mutual inductance coefficient; μ is the coil coupling coefficient; R1 is the damping resistance; it is worth noting that when the suppression loop is configured, the frequency f g_sw of the grid oscillation current is obtained by high-frequency current probe acquisition and extraction; when the suppression loop is dynamically adjusted, the frequency f g_sw of the grid oscillation current is obtained by acquisition and extraction when the sensing loop works in the self-integration mode.

[0086] It is particularly worth noting that the application involves extracting the frequency of the oscillation current, and calculating the grid oscillation current i g_sw that is linearly related to it through the voltage waveform across the terminal resistance R2 in the sensing loop.

[0087] In order to make the person in the art better understand the technical solutions in the present application, the technical solutions in the embodiments of the present application will be described clearly and completely below in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all. Based on the embodiments in the present application, all other embodiments obtained by the person skilled in the art without creative labor should belong to the scope of protection of the present application.

[0088] On the basis of the above-described embodiments, the present application further proposes the following specific embodiments:

[0089] The experimental platform shown in Figure 3 is built, in which the DC side voltage V dc is 600V, the input capacitor C in is 4.74uF, the load inductance L LOAD is 4mH, the load resistance R LOAD is 100Ω, and the model of SiC MOSFET power device Q2 is CREE C3M0075120K.

[0090] The outer resonator coil parameters are designed (the coil winding turns N=35, the coil inner diameter a=2 mm, the coil outer diameter b=4.5 mm, the winding radius h=1.6 mm, μ0=4π×10^-7H / m; the outer resonator coil inductance L=28nH is calculated according to the formula;

[0091] The frequency f of the gate oscillation current in the experimental platform is measured by using a high-frequency current probe g_sw 25MHz, based on the collected information and according to the resonance matching relationship (the inherent frequency f of the suppression loop is equal to the frequency f of the gate oscillation current ext ) g_sw to design the related working parameters of the outer resonator:

[0092] The terminal resistance R2=30Ω, the resonance capacitance C1=62pF, and the damping resistance R1=203Ω;

[0093] In order to verify the effectiveness of the sensing loop of the outer resonator designed in the embodiment, the voltage waveform across the terminal resistance R2 in the sensing loop is compared with the waveform of a commercial current probe. The comparison effect is shown in Figure 4 It should be noted that, in the waveform shown in Figure 4 , since the waveform corresponding to the embodiment (i.e., the "self-made outer resonator" marked in the figure) is the voltage waveform across the terminal resistance R2 in the sensing circuit, it is not converted into a current value, so the unit used is V / div, while the output signal of the commercial current probe is current, so the unit is A / div;

[0094] Among them, each horizontal division (div) represents 0.1 microsecond, that is, the time span of each grid on the horizontal coordinate is 0.1μs;

[0095] For the red waveform output by the commercial current probe, each vertical division (div) represents 1 ampere, that is, the amplitude span of each grid on the vertical coordinate is 1A;

[0096] For the blue waveform output by the "self-made outer resonator" in the embodiment, each vertical division (div) represents 0.25 volts, that is, the amplitude span of each grid on the vertical coordinate is 0.25V;

[0097] Therefore, it can be proved that the sensing loop of the outer resonator designed in the embodiment can accurately sense the gate oxide state of the gate;

[0098] Enter the gate oxide state self-checking process described above in the embodiment:

[0099] When the power device starts, the outer resonator is switched to the sensing loop (i.e., the switch S is located at position 2), and the gate drive device injects a pulse excitation signal into the gate of the power device;

[0100] Measure the waveforms across the terminating resistor R2 in the sensing circuit, and calculate the peak gate oscillation current I based on the linear relationship. g_sw(pk) Simultaneously, the frequency f of the gate oscillation current can be extracted. g_sw (The oscillation frequency is equal to that of the voltage waveform across the terminating resistor R2); based on the peak value of the gate oscillation current I... g_sw(pk) The degree of decline is used to assess the health status of grid oxygen.

[0101] To further verify the self-test effectiveness of the external resonator sensing circuit provided in this embodiment, accelerated aging tests were conducted. The peak gate oscillation current at different aging times was acquired using the external resonator sensing circuit provided in this embodiment. A comparison chart can be found in the provided image. Figure 5 As shown, Figure 5 Each horizontal division (div) in the graph represents 0.1 microseconds, meaning that each grid on the horizontal axis spans 0.1 μs. Figure 5 Each vertical division (div) in the diagram represents 1 ampere; it can be seen that the external resonator sensing circuit designed in this embodiment can make an accurate and effective assessment of the gate oxide health status during the sensing self-test process.

[0102] Proceed to the gate oscillation suppression process described above in this embodiment:

[0103] After the power device starts up and completes its sensing operation, the external resonator is switched to the suppression circuit (i.e., switch S is in position 1) to suppress the gate oscillation current; please refer to [reference needed]. Figure 6 and Figure 7 As shown, the gate oscillation current amplitude decreased by 22.7% after suppression; among which, Figure 6 Each horizontal division (div) in the graph represents 0.1 microseconds, meaning that each grid on the horizontal axis spans 0.1 μs. Figure 6 Each vertical division (div) in the diagram represents 1 ampere; Figure 7 The horizontal axis represents the gate oscillation current frequency. Figure 7 The vertical axis represents the gate oscillation current amplitude, in amperes;

[0104] If the gate oscillation current frequency f is detected during the gate oxide state self-test sensing process... g_sw If a change occurs, then the frequency f of the new gate oscillation current will be used. g_sw (Obtained through sensing and extraction) to dynamically adjust the suppression circuit parameters, so that the frequency f of the gate oscillation current is... g_sw With the natural frequency f of the suppression circuit ext Rematch (i.e.: This is to achieve the best dynamic inhibition effect.

[0105] It will be obvious to a person skilled in the art that the application is not limited to the details of the foregoing exemplary embodiments and can be implemented in other concrete forms without departing from the spirit or essential characteristics of the application. The embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. No reference signs in the claims should be considered as limiting the scope of the claims to the identity of the reference signs therein.

[0106] Furthermore, it should be understood that although the description is made on the basis of the embodiments, not every embodiment contains only one independent technical solution, and the description of the specification is only for the sake of clarity, and those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that those skilled in the art can understand.

Claims

1. A method for concurrent sensing of gate high frequency oscillation suppression and gate oxide condition of a power device, the method comprising: applying a high frequency signal to a gate of the power device; measuring a gate current of the power device; and determining a gate high frequency oscillation suppression condition of the power device based on the measured gate current. The application relates to a non-contact sleeve joint outer resonator coil on the driving side of a power device gate, wherein a selectively switchable sensing loop and a suppression loop are arranged between the positive and negative output ends of the outer resonator coil. At the start, the outer resonator coil is connected with the sensing loop, the gate of the lateral power device is injected with a pulse excitation signal, the gate oscillation current (i g_sw ) is obtained through the sensing loop, the frequency (f g_sw ), the damping ratio ζ and the amplitude (I g_sw(pk) ) of the gate oscillation current are extracted, and the amplitude (I g_sw(pk) ) of the gate oscillation current is taken as the gate oxide aging sensitive parameter to evaluate the gate oxide state of the power device. The pre-configuration of the suppression loop parameters is based on the extraction of information from the perception loop and the resonance matching relationship that the suppression loop intrinsic frequency is equal to the frequency (f g_sw ) of the grid oscillation current g_sw ). Then the external resonator coil is switched to be connected with the suppression loop, and the power device operates in the state of suppressing the grid oscillation current (i When the power device state change is considered to be within an expected range, the original parameter setting of the suppression loop is maintained in the pre-configuration of the suppression loop parameters. When the power device state change is considered to be beyond the expected range, the parameter configuration of the suppression loop is dynamically adjusted to adapt to the current power device state, so that the target suppression configuration effect of the suppression loop is achieved. wherein whether the power device state change exceeds an expected range includes whether a frequency (f g_sw ) of the gate oscillating current exceeds an expected threshold.

2. The method of claim 1, wherein the method further comprises: The inductance (L) of the outer resonator coil is determined by the following formula: ； Wherein, L is the inductance of the outer resonator coil; a is the inner diameter of the coil; b is the outer diameter of the coil; mu0 is the magnetic permeability of the coil framework; N is the number of coil turns; and h is the winding radius.

3. The method of claim 1, wherein the method further comprises: determining a gate voltage of the power device; and determining a gate oxide state of the power device based on the determined gate voltage. The damping ratio (zeta) is determined by the following formula: ； ； where ζ is the damping ratio; R g is the gate resistance; C gs is the gate-source capacitance; L gs is the gate stray inductance; f g_sw is the frequency of the gate oscillating current.

4. The method of claim 1 or 2 or 3, wherein the method further comprises: determining a gate voltage of the power device; and determining a gate oxide state of the power device based on the determined gate voltage. The sensing loop comprises a terminal resistor (R2) connected between the positive and negative output terminals of the outer resonator coil, forming a sensing loop, wherein the gate oscillation current (i g_sw ) generates a voltage waveform across the terminal resistor (R2) of the sensing loop through electromagnetic induction coupling of the outer resonator coil, and the gate oscillation current (i g_sw ) is obtained by collecting the voltage waveform; the suppression loop comprises a damping resistor (R1) and a resonance capacitor (C1) connected between the positive and negative output terminals of the outer resonator coil, forming a suppression loop, wherein during operation of the suppression loop, the oscillation energy generated in the gate resonance loop is transferred to the suppression loop through electromagnetic induction coupling of the outer resonator coil, achieving attenuation and suppression of the gate oscillation current amplitude (I g_sw(pk) ).

5. The method of claim 4, wherein the method further comprises: determining a gate voltage of the power device; and determining a gate oxide state of the power device based on the determined gate voltage. In configuring the sensing loop and the suppression loop, the gate oscillation current (i g_sw ) is acquired by a high-frequency current probe, the frequency (f g_sw ) of the gate oscillation current is extracted, and the sensing loop and the suppression loop are configured based on the frequency (f g_sw ) of the gate oscillation current.

6. The method of claim 4, wherein the method further comprises: determining a gate voltage of the power device; and determining a gate oxide state of the power device. When the sensing loop is configured, the terminal resistance (R2) needs to meet the requirement that the bandwidth of the outer resonator coil covers the high-frequency oscillation frequency of the power device gate: BW = f H to f L ; ； ； where BW represents the bandwidth of the outer resonator coil, f H , f L are the high and low cutoff frequencies of the outer resonator coil, respectively; L is the inductance of the outer resonator coil; R0, C0represent the self-resistance and self-capacitance of the outer resonator coil, respectively; and R2is the termination resistance.

7. The method of claim 4, wherein the method further comprises: determining a gate voltage of the power device; and determining a gate oxide state of the power device. When the sensing loop is configured, the sensing loop is set according to the following configuration: ； ω = 2πf g_sw ; where R2 is the terminal resistance; ω is the angular frequency of the gate oscillating current; L is the inductance of the external resonator coil; f g_sw is the frequency of the gate oscillating current; The sensing loop is made to work in a self-integrating mode, in which, when the sensing loop works, the voltage waveform across the terminal resistance (R2) in the sensing loop is linearly related to the grid oscillation current (i g_sw ); the frequency (f g_sw ) of the grid oscillation current is equal to the oscillation frequency of the voltage waveform across the terminal resistance (R2), and the amplitude (I g_sw(pk) ) of the grid oscillation current is obtained by linear conversion based on the amplitude of the voltage waveform across the terminal resistance (R2).

8. The method of claim 4, wherein the method further comprises: determining a gate voltage of the power device; and determining a gate oxide state of the power device. When the suppression loop is configured or dynamically adjusted, the damping resistance R1 and the resonance capacitance C1 are configured according to the following resonance matching relationship: ； ； M=L / N; ； ； wherein f ext is the damping resistance; f g_sw is the frequency of the gate oscillating current; C1 is the resonance capacitance; L is the external resonator coil inductance; L gs is the gate stray inductance; μ is the coil coupling coefficient; M is the coil mutual inductance; N is the number of turns of the coil; and R1 is the damping resistance.

9. The method for co-sensing gate high-frequency oscillation suppression and gate oxide state of power devices according to claim 8, characterized in that, When the suppression circuit is configured, the frequency (f g_sw ) of the grid oscillation current is acquired and extracted by a high-frequency current probe; when the dynamic adjustment suppression circuit is configured, the frequency (f g_sw ) of the grid oscillation current is acquired and extracted by a sensing circuit.

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