Multi-branch circuitry, method, controller and program product for multi-branch circuitry

Abstract

The invention provides a multi-branch circuit system, a method for the multi-branch circuit system and a controller. The invention provides a multi-branch circuit system. The multi-branch circuit system comprises a plurality of branches, the controller is used for controlling each branch circuit in the plurality of branch circuits to be connected in an ith period Ti of a signal period so as to enable the plurality of branch circuits to output a first total output signal Sout, and disconnecting the branch circuits to be tested in the plurality of branch circuits in an adjacent period Tiadj of the ith period Ti so as to enable the remaining branch circuits to output a second total output signal Soutmain; the amplifier is used for receiving and amplifying the first total output signal Sout and the second total output signal Soutmain, and transmitting the amplified first total output signal Sout and the amplified second total output signal Soutmain to the controller; and the controller determines the signal of the branch circuit to be tested according to the amplified first total output signal Sout and the amplified second total output signal Soutmain. Systems, methods, or controllers according to the present application may cancel electrical signal offsets in circuitry.

Description

Technical Field

[0001] This application relates to electronic circuit signal processing, and more specifically, to techniques related to multi-branch circuit systems. Background Technology

[0002] When processing signals from electronic circuits or the devices and systems containing those circuits, signal amplification is often required. During signal amplification, electrical signal offsets, such as voltage offsets, are often unavoidable. Voltage offsets are difficult to remove from the signal, leading to inaccuracies in subsequent electrical signal-based processing. Therefore, it is necessary to improve the removal of electrical signal offsets to obtain more accurate acquired signals. Summary of the Invention

[0003] One aspect of this application involves providing a multi-branch circuit system to eliminate deviations caused by electrical signal offsets during the sampling process of the multi-branch circuit system, thereby providing more accurate control.

[0004] According to one aspect of this application, a multi-branch circuit system includes multiple branches; a controller is configured to operate during the i-th period T of a signal cycle. i Control each of the plurality of branches to turn on so that the plurality of branches output a first total output signal S. out In the i-th period T i Adjacent period T i_adjacent Disconnect the branch under test from the plurality of branches so that the remaining branches output the second total output signal S. out_remain Amplifier, used to receive and amplify the first total output signal S out and the second total output signal S out_remain and the amplified first total output signal S out and the second total output signal S out_remain The signal is transmitted to the controller; the controller, based on the amplified first total output signal S... out and the second total output signal S out_remain Determine the signal of the branch under test.

[0005] In the multi-branch circuit system, optionally, the controller is configured to determine the amplified first total output signal S. out and the second total output signal S out_remain The difference determines the signal of the branch under test.

[0006] In the multi-branch circuit system, optionally, the first total output signal S out and the second total output signal S out_remainAll are voltage signals. Furthermore, the system also includes a sampling resistor, through which the plurality of branches are connected to the input terminal of the amplifier, and the first total output signal S... out The voltage signal is obtained by the total current of the multiple branches flowing through the sampling resistor, and the second total output signal S out_remain The voltage signal is obtained by passing the total current of the remaining branches through the sampling resistor.

[0007] In the multi-branch circuit system, optionally, the i-th period T i and the adjacent period T i_adjacent The period during which the current of the multi-way valve rises to a stable state is the period of the pulse width modulation (PWM) signal.

[0008] In the multi-branch circuit system, optionally, the adjacent period T i_adjacent It is the period T mentioned above i The next cycle; and the controller is configured in the i-th cycle T i This causes the duty cycle of the PWM signal used for the valve under test to increase. Optionally, the duty cycle of the PWM signal for the valve under test is changed to twice the original duty cycle.

[0009] According to another aspect of this application, a method for a multi-branch circuit system is also provided. This method is performed by the multi-branch circuit system and includes: during the i-th period T of a signal period... i Control each of the multiple branches in the multi-branch circuit system to turn on so that the multiple branches output a first total output signal S. out ; in the i-th period T i Adjacent period T i_adjacent Disconnect the branch under test from the plurality of branches so that the remaining branches output the second total output signal S. out_remain ; Receive and amplify the first total output signal S out and the second total output signal S out_remain ; the amplified first total output signal S out and the second total output signal S out_remain Determine the signal of the branch under test.

[0010] Optionally, in the method for a multi-branch circuit system, the amplified first total output signal S... out and the second total output signal S out_remain Determining the signal of the branch under test includes: the amplified first total output signal S out and the second total output signal S out_remain The difference determines the signal of the branch under test.

[0011] Optionally, in the method for a multi-branch circuit system, the first total output signal S out and the second total output signal S out_remain Both are voltage signals, and the first total output signal S out The voltage signal is obtained by passing the total current of the multiple branches through the sampling resistor, and the second total output signal S out_remain The voltage signal is obtained by passing the total current of the remaining branches through the sampling resistor.

[0012] The method for a multi-branch circuit system, optionally, wherein the plurality of branches are multi-way valves, each of the plurality of branches is a valve in the multi-way valves, and the branch under test is a valve under test; each valve includes a coil and a low-side drive unit connected in series; wherein, the branch under test in the plurality of branches is disconnected to allow the remaining branches to output a second total output signal S. out_remain The opening and closing of each valve in the multi-way valve is controlled by controlling the lower side drive unit of each valve.

[0013] Optionally, in the method for a multi-branch circuit system, the i-th period T i and the adjacent period T i_adjacent The signal period is the period of the pulse width modulation (PWM) signal when the current of the multi-way valve rises to a stable stage.

[0014] Optionally, in the method for a multi-branch circuit system, the adjacent period T i_adjacent It is the period T mentioned above i The next period; and, in the i-th period T i This causes the duty cycle of the PWM signal used for the valve under test to increase, thereby controlling the low-side drive of the valve under test to disconnect. Optionally, the duty cycle of the PWM signal for the valve under test is changed to twice the original duty cycle.

[0015] According to another aspect of this application, a controller for a multi-branch circuit system is also provided, the controller being connected to multiple branches of the multi-branch circuit system for controlling them, the controller comprising: a memory for storing instructions; and a processor for executing the instructions and implementing any one of the methods described above in the process of executing the instructions.

[0016] According to the examples in this application, when determining the signal of the branch under test, the electrical signal deviation generated at the amplifier input and output is eliminated, thereby obtaining a more accurate signal for the branch under test. Based on this more accurate signal, the controller can provide a current that better reflects the actual situation of the circuit system. Attached Figure Description

[0017] This application will be more fully understood by referring to the following detailed description of specific embodiments in conjunction with the accompanying drawings, in which the same reference numerals throughout refer to the same elements in the views. Wherein:

[0018] Figure 1 This is a schematic diagram of the structure of a multi-branch circuit system according to the example of this application;

[0019] Figure 2 The signal period and sampling period according to the example of this application are illustrated;

[0020] Figure 3 This is a schematic diagram of a multi-way valve circuit system based on some specific examples of this application;

[0021] Figure 4 This is a flowchart of a method for a multi-branch circuit system according to some examples of this application;

[0022] Figure 5 This is a schematic diagram of the controller structure based on some examples of this application. Detailed Implementation

[0023] To help those skilled in the art to accurately understand the subject matter claimed in this application, specific embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0024] Figure 1 This is a schematic diagram of a multi-branch circuit system according to an example of this application. For example... Figure 1 As shown, the system includes a controller 10, a branch section 12, and an amplifier 14. System power is supplied by a power supply module 20, including power to the controller 10 and branch section 12. Branch section 12 may include multiple branches; this example will use three branches 121, 122, and 123, which are illustrative and not limiting. The controller 10 is connected to branch section 12 to control the switching on and off of each branch in branch section 12. Amplifier 14 amplifies the output signal from branch section 12 and feeds the amplified signal back to controller 10. Controller 10 processes this feedback signal to generate a signal that eliminates current acquisition offset, thereby further controlling branch section 12.

[0025] As an example, the three branches 121, 122, and 123 are all connected to the power supply module 20 via switch 11 to obtain power. In a more specific example, switch 11 may include a separate switch for each branch; that is, the three branches 121, 122, and 123 are each connected to the power supply module 20 via their respective switches. Alternatively, the three branches 121, 122, and 123 may be connected to the power supply module 20 via the same switch. The configuration of switch 11 can be adjusted as needed and is not limited to what is shown herein.

[0026] Based on some specific examples, controller 10 in the i-th period T of the signal cycle i The signal controls the activation of each of the three branches 121, 122, and 123 to obtain the total output of the three branches 121, 122, and 123, which is referred to as the first total output signal S in this example. out During this period T i Adjacent period T i_adjacent Disconnect the branch under test from the plurality of branches to obtain the output of the remaining branches, which is referred to as the second total output signal S in this example. out_remain According to the example of this application, the switching on and off of each branch 121, 122 and 123 is achieved by controlling the components in the branch that act as switches, as will be described below with specific examples.

[0027] First total output signal S out Second total output signal S out_remain The signal is transmitted to amplifier 14, amplified by amplifier 14, and then transmitted to controller 10. Controller 10 then outputs the amplified first total output signal S. out Second total output signal S out_remain The signal to be determined is the electrical signal applied to the branch under test. According to some specific examples of this application, the controller 10 is determined by the first total output signal S. out Second total output signal S out_remain The difference determines the signal of the branch under test.

[0028] According to an example of this application, the system for eliminating current acquisition offset may further include a sampling resistor 13. Multiple branches are connected to the input of amplifier 14 via the sampling resistor 13. Thus, the first total output signal S... out The voltage signal obtained by the total current flowing through the sampling resistor 13 of multiple branches 12 is the second total output signal S. out_remain The voltage signal obtained by the sampling resistor 13 is the total current flowing through the sampling resistor 13 of the remaining branches 12 excluding the branch under test. This is the first total output signal S of the voltage signal. out Second total output signal S out_remain The signal is transmitted as an input signal to amplifier 14, and after being amplified by the amplifier, it is fed to controller 10.

[0029] Figure 2 The illustration shows the signal period and sampling period according to an example of this application. In this specific example, the signal is a pulse width modulation (PWM) signal, and one signal period is also one PWM signal period. The PWM signal is generated by the controller 10. Alternatively, it can be generated by other components.

[0030] The first PWM signal 221 is used for the first branch 121, the second PWM signal 222 is used for the second branch 122, and the third PWM signal 223 is used for the third branch 123. The sampling signal 224 is a sampling signal for the branch under test.

[0031] In the third cycle T3, the first voltage sampling is performed on the sampling resistor 13, as shown by sampling pulse T224-1 of sampling signal 224. During the first voltage sampling, the first branch, the second branch, and the third branch are all in the on state, and current flows through each of them. The sampled signal is the first total output signal S representing the voltage of the sampling resistor 13. out In this example, the third branch is the branch under test. In the next cycle T4 adjacent to the third cycle T3, the branch under test 123 is disconnected, and a second voltage sampling is performed on the sampling resistor 13, as shown by sampling pulse T224-2 of sampling signal 224. It can be understood that the voltage sampled at sampling pulse T224-1 is the sum of the voltages of the three branches, and the voltage sampled at sampling pulse T224-2 is the sum of the voltages of the two remaining branches excluding the third branch. This represents the second total output signal S, which indicates the voltage of sampling resistor 13 under this condition. out_remain Therefore, the voltage of the third branch can be calculated from these two output signals. The controller 10 can then calculate the current of the third branch based on this voltage. The process of calculating the current of the third branch will be described below with an example. The calculated current is used to adjust the output pulse width of the controller 10 in real time, i.e., the pulse width of the PWM signal output by the controller 10, thereby adjusting the output current of the branch.

[0032] According to some examples of this application, multiple branches are multi-way valves, each branch is a valve in the multi-way valve, and the branch under test is the valve under test. It should be understood that each valve includes a valve body and an electronic control section. The electronic control section of each valve may include a coil section and a low-side drive section connected in series. The coil section includes a valve coil and a freewheeling circuit connected in parallel with the valve coil. The low-side drive section can be used as a drive switch. The controller 10 can control the low-side drive section to turn on or off the electronic control section of the valve, thereby turning on or off the valve body. In the examples of this application, the controller 10 obtains a first total output signal and a second total output signal by controlling the low-side drive section.

[0033] The multi-way valve is, for example, a three-way valve. For instance, the three-way valve may include a simulator disconnect valve and two plunger disconnect valves. This system for eliminating current acquisition offset is used, for example, in a vehicle's intelligent braking system. In the embodiments described below, when applied to a real-world scenario, the first valve of the first branch may be, for example, a simulator disconnect valve; the second valve of the second branch may be, for example, a first plunger disconnect valve; and the third valve of the third branch may be, for example, a second plunger disconnect valve.

[0034] Figure 3 This is a schematic diagram of a multi-way valve circuit system based on some specific examples of this application. For example... Figure 3 As shown, the system power is supplied by power supply module 20, which can be the vehicle's power source, supplying power to controller 30 and to multiplex valve 32 via switch 31. Multiplex valve 32 includes a first valve 321, a second valve 322, and a third valve 323. Each of the first valve 321, second valve 322, and third valve 323 includes a coil connected in series and a low-side drive unit. The low-side drive units of each of the first valve 321, second valve 322, and third valve 323 are connected to sampling resistor 33, which is connected to amplifier 34. Amplifier 34 outputs a feedback signal to controller 30.

[0035] Also refer to Figure 3 and Figure 2 . Figure 2 The first PWM signal 221 is used for the first valve 321, the second PWM signal 222 is used for the second valve 322, and the third PWM signal 223 is used for the third valve 323. The sampling signal 224 is a sampling signal generated by the controller 30 for the valve under test. In this example, and not as a limitation, the third valve 323 is the valve under test.

[0036] In the third cycle T3, the voltage value of all three valves in the multi-way valve 32 is sampled first, that is, the voltage of the sampling resistor 33 when all three valves (first valve 321, second valve 322, and third valve 323) are closed. It should be noted that the voltage value generated across the sampling resistor 33 is relatively small. In this embodiment, the voltage generated across the sampling resistor 33 is amplified by the amplifier 34 and sent to the controller 30. In cycle T3, the controller 30 reads the amplified voltage U of the sampling resistor 33. A1_ADC That is, the amplified first total output signal S out .

[0037] U A1_ADC Alternatively, it can be calculated using formula (1):

[0038] U A1_ADC = [(I SSV +I PSV1 +I PSV2 )×R shunt +U offset_in ]×Gain+U offset_out (1)

[0039] Among them, U A1_ADC It is the amplified value of the voltage across the sampling resistor 33 when all three valves of the multi-way valve 32 are closed. ssv It is the current flowing through the first valve 321, I psv1 It is the current flowing through the second valve 322, I psv2It is the current flowing through the third valve 323, R shunt This is the resistance value of sampling resistor 33, U offset_in It is the voltage offset generated at the input terminal of amplifier 34, Gain is the amplification factor of amplifier 34, and U offset_out It is the voltage offset generated at the output of amplifier 34.

[0040] In the fourth cycle T4, adjacent to the third cycle T3, under the control of the controller 30, the low-side drive of the third valve 323 is cut off, so that the voltage of the sampling resistor 13 sampled in the fourth cycle T4 includes only the voltages of the first valve 321 and the second valve 322. The controller 30 can thus obtain the amplified second total output signal S. out_remain For example, the controller 30 cuts off the low-side drive of the third valve 323 by adjusting the duty cycle of the third PWM signal 223 in the third cycle T3, thereby making the third valve 323 inactive in the fourth cycle T4. For example, the duty cycle in the third cycle T3 is adjusted to twice the original duty cycle, and then returns to the original duty cycle after the fourth cycle. In this application, inactive state refers to a state in which no current flows.

[0041] The amplified value U of the voltage across sampling resistor 33 during the 4th cycle. A2_ADC It can be calculated according to formula (2):

[0042] U A2_ADC = [(I SSV +I PSV1 )×R shunt +U offset_in ]×Gain+U offset_out (2)

[0043] Among them, U A2_ADC It is the amplified value of the voltage across the sampling resistor 33 when only the first valve 321 and the second valve 322 of the three valves in the multi-way valve 32 are closed, that is, the sampling voltage that the controller 30 collects from the amplifier 34 in the fourth cycle, I. ssv It is the current flowing through the first valve 321, I psv1 It is the current flowing through the second valve 322, R shunt This is the resistance value of sampling resistor 33, U offset_in It is the voltage offset generated at the input terminal of amplifier 34, Gain is the amplification factor of amplifier 34, and U offset_out It is the voltage offset generated at the output of amplifier 34.

[0044] The controller 30 can determine the amplified value U of the voltage of the third valve 323 in the fourth cycle T4 according to formulas (1) and (2). PSV2_ADCThat is, the sampling voltage of amplifier 34 in this period T4, or the output voltage of amplifier 34 in this period T4, as shown in formula (3):

[0045] U PSV2_ADC = U A1_ADC - U A2_ADC =I PSV2 ×Gain×R shunt (3)

[0046] Thus, in U PSV2_ADC It can be determined by the first total output signal S out Second total output signal S out_remain Given a fixed calculation, controller 30 can calculate I according to formula (3). PSV2 .

[0047] For circuits with inductive loads such as coils, their impedance can vary significantly under different operating conditions and temperatures. This can be achieved through methods such as I... PSV2 With the current feedback, the controller 30 can control the pulse width of the PWM signal used for the drive circuit to adjust the current to be output to the multi-way valve. If the feedback current obtained by the controller 30 deviates from the actual current, the control will be inaccurate.

[0048] In the conventional way, for example Figure 3 In the multi-branch system shown, when determining the voltage of valves such as the third valve 323, the first valve 321 and the second valve 322 are disconnected, and the amplified voltage of the sampling resistor 33 is acquired, denoted as S. con_out On the other hand, the voltage of the third valve 323, after being amplified by amplifier 34, can be expressed by formula (4):

[0049] U PSV2_ADC = (I PSV2 ×R shunt )×Gain (4)

[0050] In the conventional way, in U PSV2_ADC The value has been obtained by the controller sampling (i.e., S). con_out In the case of ), I is calculated according to formula (4). PSV2 However, in reality, during the operation of this system, voltage offsets will occur at both the input and output terminals of amplifier 34. The formula (5) accurately expresses the amplified voltage of the third valve 323 (i.e., the voltage sampled by controller 30 from amplifier 34):

[0051] U PSV2_ADC = (I PSV2 ×R shunt +U offset_in )×Gain+U offset_out (5)

[0052] Therefore, I calculated using formula (4) in the conventional way... PSV2 Inaccurate. However, when calculating according to formula (5), the voltage offset value cannot be determined, and its influence cannot be eliminated, making the calculated I... PSV2 That's not accurate either.

[0053] Therefore, the current with poor accuracy determined in the conventional way is fed back to the controller 30, so that the control pulse adjusted by the controller accordingly also has poor accuracy.

[0054] However, according to the example of this application, in the process of determining the current of the valve under test, the controller 30 eliminates the voltage deviation between the amplifier input and output terminals, obtains the accurate current flowing through the valve under test, and obtains accurate feedback. Based on this, the controller 30 can provide accurate pulses and thus output a current that is more in line with the circuit system.

[0055] Figure 4 This is a flowchart illustrating a method for a multi-branch circuit system according to some examples of this application. The method, for example, is... Figure 1 or Figure 3 The multi-branch circuit system shown is executed. For example... Figure 4 As shown, in step S400, during the i-th period T of the period... i To control each branch in a multi-branch circuit system to turn on so that the multiple branches output a first total output signal S. out In step S402, during the i-th period T i Adjacent period T i_adjacent Disconnect the branch under test from multiple branches so that the remaining branches output the second total output signal S. out_remain In step S404, the first total output signal S is received and amplified. out Second total output signal S out_remain In step S406, the amplified first total output signal S... out Second total output signal S out_remain The signal of the branch under test is determined. According to an example of this application, it is determined by the amplified first total output signal S. ou t Second total output signal S out_remain The difference determines the signal of the branch under test. Furthermore, in this application, the first total output signal S... out Second total output signal S out_remain All are voltage signals, and the first total output signal S out The voltage signal is obtained by passing the total current of multiple branches through the sampling resistor, and the second total output signal S out_remain The voltage signal is obtained by passing the total current of the remaining branches through the sampling resistor.

[0056] by Figure 4 The method shown is applied in Figure 3 The system shown is briefly described below as an example. (See also...) Figure 4 and Figure 3 In the third cycle T3, controller 30 controls each valve in the multi-way valve to turn on, as the first total output signal S. out As shown in step S400, in the subsequent fourth cycle T4, the controller 30 disconnects the low-side drive of the valve under test to obtain the outputs of the first valve 321 and the second valve 322, i.e., the second total output signal S. out_remain As shown in step S402. The first total output signal S out The voltage generated by the sampling resistor 33 is the total current flowing through the first valve 321, the second valve 322, and the third valve 323; the second total output signal S out_remain The voltage generated by the combined current flowing through the sampling resistor 33 from both the first valve 321 and the second valve 322 is called the voltage. Amplifier 34 receives and amplifies the first total output signal S. out and the second total output signal S out_remain As shown in step S404, the controller 30 outputs the amplified first total output signal S. out and the second total output signal S out_remain Determine the voltage of the valve under test, as shown in step S406.

[0057] The method for multi-branch circuit systems according to the example of this application can be applied to... Figure 1 or Figure 3 Description, to achieve the combination of the above text Figure 1 , Figure 2 and Figure 3 The examples described will not be repeated here.

[0058] This application also provides a controller. Figure 5 This is a structural diagram of controller 5 based on the example in this application. For example... Figure 5 As shown, the controller 5 includes a memory 50 and a processor 52. The memory stores instructions, and the processor 52 executes these instructions, implementing the above-described process during execution. Figure 4 The described method. Controller 5 can be implemented, for example, as follows: Figure 1 Controller 10 in the middle, or Figure 3 The controller 30 in the middle.

[0059] This application also provides a computer program product comprising instructions that, when executed by a processor, implement any of the methods described herein. The program product may, for example, be implemented as an application program executed by a vehicle or a terminal communicating with a vehicle.

[0060] In the examples of this application, during the i-th period T of the signal period controlling the on / off state of the branch... i Typically, this refers to the period during which the current in a multi-branch circuit of a multi-way valve changes from zero to a steady state. The choice of the third period in this paper is merely an example, not a limitation. Additionally, in T... i Adjacent periods T i_adjacent In the example in this article, the period after the i-th period is selected, but the period before the i-th period can also be selected as needed. In this case, the controller first obtains the second total output signal and then obtains the first total output signal.

[0061] Although specific embodiments of this application have been shown and described in detail to illustrate the principles of this application, it should be understood that this application may be implemented in other ways without departing from such principles.

Claims

1. A multi-branch circuit system, characterized in that, The system includes: Multiple branch roads; Controller, used in the i-th period T of the signal period i Control each of the plurality of branches to turn on so that the plurality of branches output a first total output signal S. out In the i-th period T i Adjacent period T i_adjacent Disconnect the branch under test from the plurality of branches so that the remaining branches output the second total output signal S. out_remain ; Amplifier, used to receive and amplify the first total output signal S out and the second total output signal S out_remain and the amplified first total output signal S out and the second total output signal S out_remain Transmitted to the controller; The controller is based on the amplified first total output signal S out and the second total output signal S out_remain Determine the signal of the branch under test.

2. The system according to claim 1, characterized in that, The controller is configured to, based on the amplified first total output signal S out and the second total output signal S out_remain The difference determines the signal of the branch under test.

3. The system according to claim 2, characterized in that, The first total output signal S out and the second total output signal S out_remain All are voltage signals.

4. The system according to any one of claims 1 to 3, characterized in that, The system also includes a sampling resistor, through which the plurality of branches are connected to the input terminal of the amplifier, and the first total output signal S out The voltage signal is obtained by the total current of the multiple branches flowing through the sampling resistor, and the second total output signal S out_remain The voltage signal is obtained by passing the total current of the remaining branches through the sampling resistor.

5. The system according to any one of claims 1 to 4, characterized in that, The plurality of branches are multi-way valves, each of the plurality of branches is a valve in the multi-way valve, and the branch under test is the valve under test; each valve includes a coil part and a low-side drive part connected in series; wherein, the controller is configured to control the opening and closing of the valve by controlling the low-side drive part of each valve in the multi-way valve.

6. The system according to claim 5, characterized in that, The i-th period T i and the adjacent period T i_adjacent The period during which the current of the multi-way valve rises to a stable state is the period of the pulse width modulation (PWM) signal.

7. The system according to claim 6, characterized in that, The adjacent period T i_adjacent It is the period T mentioned above i The next cycle; and the controller is configured in the i-th cycle T i This increases the duty cycle of the PWM signal used for the valve under test.

8. The system according to claim 7, characterized in that, The duty cycle of the PWM signal of the valve under test changes to twice the original duty cycle.

9. A method for a multi-branch circuit system, characterized in that, The method is performed by the multi-branch circuit system, and the method includes: In the i-th period T of the signal period i Control each of the multiple branches in the multi-branch circuit system to turn on so that the multiple branches output a first total output signal S. out ; In the i-th period T i Adjacent period T i_adjacent Disconnect the branch under test from the plurality of branches so that the remaining branches output the second total output signal S. out_remain ; Receive and amplify the first total output signal S out and the second total output signal S out_remain ; The amplified first total output signal S out and the second total output signal S out_remain Determine the signal of the branch under test.

10. The method according to claim 9, characterized in that, The amplified first total output signal S out and the second total output signal S out_remain Determining the signal of the branch under test includes: The amplified first total output signal S out and the second total output signal S out_remain The difference determines the signal of the branch under test.

11. The method according to claim 10, characterized in that, The first total output signal S out and the second total output signal S out_remain Both are voltage signals, and the first total output signal S out The voltage signal is obtained by passing the total current of the multiple branches through the sampling resistor, and the second total output signal S out_remain The voltage signal is obtained by passing the total current of the remaining branches through the sampling resistor.

12. The method according to any one of claims 9 to 11, characterized in that, The plurality of branches are multi-way valves, each of the plurality of branches is a valve in the multi-way valve, and the branch under test is the valve under test; each valve includes a coil portion and a low-side drive portion connected in series; wherein, the branch under test in the plurality of branches is disconnected so that the remaining branches output a second total output signal S. out_remain The opening and closing of each valve in the multi-way valve is controlled by controlling the lower side drive unit of each valve.

13. The method according to claim 12, characterized in that, The i-th period T i and the adjacent period T i_adjacent The period during which the current of the multi-way valve rises to a stable state is the period of the pulse width modulation (PWM) signal.

14. The method according to claim 13, characterized in that, The adjacent period T i_adjacent It is the period T mentioned above i The next period; and, in the i-th period T i This increases the duty cycle of the PWM signal used for the valve under test, thereby controlling the low-side drive section of the valve under test to disconnect.

15. The method according to claim 14, characterized in that, The duty cycle of the PWM signal of the valve under test changes to twice the original duty cycle.

16. A controller for a multi-branch circuit system, characterized in that, The controller is connected to multiple branches of the multi-branch circuit system to control them, and the controller includes: Memory, used to store instructions; A processor for executing the instructions and, in the process of executing the instructions, implementing the method according to any one of claims 9 to 15.

17. A computer program product, characterized in that, The program product includes instructions that, when executed by a processor, implement the method according to any one of claims 9 to 15.

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