System and method for selective metal-containing hard mask removal

Abstract

An exemplary semiconductor processing method may include flowing an etchant precursor into a processing region of a semiconductor processing chamber. A substrate may be received within the processing region. The substrate may define exposed regions of a metal-containing hard mask material and exposed regions of a material characterized by a dielectric constant of less than or about 4.0. A method may include contacting a substrate with an etchant precursor. The method may include removing at least a portion of the metal-containing hard mask material.

Description

[0001] Cross-reference to related applications

[0002] This application claims the benefit and priority of U.S. Patent Application No. 18 / 244,583, filed September 11, 2023, entitled "Systems and methods for selective metal-containing hard mask removal," the entire contents of which are incorporated herein by reference. Technical Field

[0003] This technology relates to semiconductor processes and equipment. More specifically, this technology relates to the selective etching of metal-containing hard masks. Background Technology

[0004] Integrated circuits are made possible by processes that create complexly patterned material layers on a substrate surface. Creating patterned materials on a substrate requires controlled methods for removing exposed materials. Chemical etching is used for various purposes, including transferring patterns from photoresist to underlying layers, thinning layers, or reducing the lateral dimensions of features already present on a surface. It is often desirable to enable etching processes to etch one material faster than another, thereby facilitating, for example, pattern transfer processes. Such etching processes are referred to as selective for the first material. Due to the diversity of materials, circuits, and processes, etching processes have been developed to exhibit selectivity for a wide range of materials.

[0005] Depending on the materials used in the process, etching processes can be referred to as wet or dry. For example, wet etching preferentially removes some oxide dielectrics rather than other dielectrics and materials. However, wet processes may struggle to penetrate some confined trenches and can sometimes deform the remaining material. Dry etching, generated in localized plasmas formed within the substrate processing area, can penetrate more confined trenches and exhibits less deformation of the fragile remaining structure. However, localized plasmas can damage the substrate by generating arcs when they discharge.

[0006] Therefore, there is a need for improved systems and methods that can be used to produce high-quality devices and structures. These and other needs are met by this technology. Summary of the Invention

[0007] An exemplary semiconductor processing method may include introducing an etchant precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region. The substrate may define an exposed region containing a metal hard mask material and an exposed region of a material characterized by a dielectric constant of less than or about 4.0. The method may include contacting the substrate with the etchant precursor. The method may include removing at least a portion of the metal hard mask material.

[0008] In some embodiments, the etchant precursor may be or include a halogen-containing precursor. The etchant precursor may be or include nitrogen trifluoride (NF3), diatomic fluorine (F2), diatomic chlorine (Cl2), thionyl chloride (SOCl2), carbon tetrafluoride (CF4), hexafluoroethane (C2F6), sulfur hexafluoride (SF6), carbon tetrachloride (CCl4), dichloromethane (CH2Cl2), chloroform (CHCl3), or combinations thereof. The method may include flowing a hydrogen-containing precursor or an oxygen-containing precursor along with the etchant precursor to a processing region of a semiconductor processing chamber. Removal of portions containing metal hard mask material may be performed without plasma. Removal of portions containing metal hard mask material may be performed at a temperature greater than or about 350°C. Removal of portions containing metal hard mask material may be performed at a pressure greater than or about 2 Torr. The method may include removing oxidized portions of the metal hard mask material before allowing the etchant precursor to flow into the processing region of the semiconductor processing chamber. The method may include contacting the substrate with a second etchant precursor after removing portions containing metal hard mask material to remove fluorine residues or oxidized portions containing metal hard mask material from the substrate.

[0009] Some embodiments of the present invention may cover semiconductor processing methods. The methods may include introducing a pre-etch precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region. The substrate may define an exposed region containing a metal hard mask material and an exposed region of material characterized by a dielectric constant less than or about 4.0. The methods may include contacting the substrate with the pre-etch precursor. The methods may include stopping the delivery of the pre-etch precursor. The methods may include introducing an etchant precursor into a processing region of a semiconductor processing chamber. The methods may include contacting the substrate with an etchant precursor. The methods may include selectively removing at least a portion of the metal hard mask material relative to the material characterized by a dielectric constant less than or about 4.0.

[0010] In some embodiments, the pre-etch precursor may be or include nitrogen trifluoride (NF3), tungsten hexafluoride (WF6), or boron trichloride (BCl3). The method may include forming a plasma effluent of the pre-etch precursor. The etchant precursor may be or include nitrogen trifluoride (NF3), diatomic fluorine (F2), diatomic chlorine (Cl2), thionyl chloride (SOCl2), carbon tetrafluoride (CF4), hexafluoroethane (C2F6), sulfur hexafluoride (SF6), carbon tetrachloride (CCl4), dichloromethane (CH2Cl2), chloroform (CHCl3), or combinations thereof. Removal of portions containing the metal hard mask material may be performed without plasma. The substrate may include exposed areas of metal material. The method may include oxidizing the metal material before allowing the pre-etch precursor to flow into a processing region of a semiconductor processing chamber.

[0011] Some embodiments of the present invention may cover semiconductor processing methods. The methods may include introducing an etchant precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region. The substrate may define an exposed area containing a metal hard mask material. The methods may include contacting the substrate with the etchant precursor. The methods may include removing at least a portion of the metal hard mask material relative to one or more other materials on the substrate. The methods may include stopping the delivery of the etchant precursor. The methods may include introducing a post-etch precursor into a processing region of a semiconductor processing chamber. The methods may include contacting the substrate with the post-etch precursor. The methods may include removing fluorine-containing residues or oxidized portions of the metal hard mask material from the substrate.

[0012] In some embodiments, the etchant precursor may be or include a halogen-containing precursor. One or more other materials on the substrate may be or include a dielectric constant of less than or about 4.0, a metallic material, a silicon-containing material, or a material containing both metal and oxygen. Removal of portions containing metallic hard mask material may be performed at a temperature greater than or about 350°C and a pressure greater than or about 2 Torr.

[0013] This technology offers numerous advantages over conventional systems and techniques. For example, the process allows for dry etching, which protects the features of the substrate. Furthermore, the process can selectively remove metal-containing hard mask material relative to other exposed material on the substrate. These and other embodiments, along with their many advantages and features, are described in more detail in conjunction with the following description and accompanying drawings. Attached Figure Description

[0014] A further understanding of the nature and advantages of the disclosed technology can be achieved by referring to the remainder of the specification and the accompanying drawings.

[0015] Figure 1 A top plan view of one embodiment of an exemplary processing system according to some embodiments of the present technology is shown.

[0016] Figure 2A A schematic cross-sectional view of an exemplary processing chamber according to some embodiments of the present technology is shown.

[0017] Figure 2B Some embodiments according to the present technology are shown. Figure 2A The diagram shows a detailed view of a portion of the processing chamber.

[0018] Figure 3 A bottom plan view of an exemplary nozzle according to some embodiments of the present technology is shown.

[0019] Figure 4 Exemplary operations in methods according to some embodiments of the present technology are shown.

[0020] Figures 5A-5BA schematic cross-sectional view of etched material according to some embodiments of the present technology is shown.

[0021] Several accompanying drawings are included as schematic diagrams. It will be understood that the drawings are for illustrative purposes and should not be considered to be to scale unless explicitly stated otherwise. Furthermore, as schematic diagrams, the drawings are provided to aid understanding and may not include all aspects or information compared to a realistic representation, and may include additional or exaggerated material for illustrative purposes.

[0022] In the accompanying drawings, similar parts and / or features may have the same reference numerals. Furthermore, various parts of the same type may be distinguished by a letter following the reference numerals, which differentiates similar parts. If only the first reference numeral is used in the description, the description applies to any of the similar parts having the same first reference numeral, regardless of the letter. Detailed Implementation

[0023] Diluted acids can be used in many different semiconductor processes for cleaning substrates and removing materials from them. For example, diluted hydrofluoric acid (“dHF”) can be an effective etchant for silicon oxide, aluminum oxide, titanium dioxide, and other materials, and can be used to remove these materials from the substrate surface. After the etching or cleaning operation is complete, the acid can be dried from the wafer or substrate surface. Using dHF can be referred to as “wet” etching, where the diluent is typically water. Additional etching processes can be used that utilize precursors delivered to the substrate. For example, plasma-enhanced processes can also perform dry etching by selectively etching materials using plasma-enhanced precursors.

[0024] While wet etchants using aqueous solutions or water-based processes can be effective on certain substrate structures, water can also pose challenges in various situations. For example, the use of water during etching processes can lead to problems when the substrate is being treated with metallic materials. For instance, after a certain amount of metallization has been formed on the substrate, certain subsequent manufacturing processes can be performed, such as creating gap recesses, removing oxide dielectrics, or other processes for removing oxygen-containing materials. If water is used in some way during etching, electrolytes can be generated, which can cause galvanic corrosion between different metals when in contact with metallic materials, and the metal can be corroded or replaced in various processes. Furthermore, due to the surface tension of the water diluent, pattern distortion and collapse of microstructures may occur. Water-based materials may also be unable to penetrate some high aspect ratio features due to surface tension. Plasma etching can overcome the problems associated with water-based etching; however, additional problems may arise. For example, reactive ion etching processes can expose the substrate to ionic activity, which can damage the structure and affect electrical properties through bombardment.

[0025] This technology overcomes these problems by performing a dry etching process, which can passivate some materials relative to the material being etched, and in some embodiments, the process can be plasma-free during etching. By utilizing specific precursors that promote halogen dissociation to provide etchant materials, an etching process that protects the surrounding structure can be performed. Furthermore, the materials and conditions used allow for improved etching compared to conventional techniques.

[0026] While the remainder of the disclosure will routinely describe specific etching processes utilizing the disclosed techniques, it will be readily understood that these systems and methods can be equivalently applied to deposition and cleaning processes that can be performed in the described chambers, as well as other etching techniques and etching processes that can be performed using a variety of exposed materials that can be held or substantially held. Therefore, this technique should not be considered limited to use only with the exemplary etching processes or chambers. Furthermore, while exemplary chambers are described to provide the basis for this technique, it will be understood that this technique is applicable to virtually any semiconductor processing chamber that allows the described operations.

[0027] Figure 1 This figure shows a top plan view of one embodiment of a processing system 100 comprising deposition, etching, baking, and curing chambers according to an embodiment. In the figure, a pair of front-opening standard chambers (FOUPs) 102 supply substrates of various sizes, which are received by robotic arms 104 and placed in low-pressure holding regions 106 before being placed into one of the substrate processing chambers 108a-108f, which are positioned in series segments 109a-109c. A second robotic arm 110 is used to transfer substrate wafers from the holding regions 106 to and from the substrate processing chambers 108a-108f. Each substrate processing chamber 108a-108f can be equipped to perform several substrate processing operations, including the dry etching processes described herein, as well as cyclic layer deposition (CLD), atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), etching, pre-cleaning, degassing, orientation, and other substrate processes.

[0028] The substrate processing chambers 108a-108f may include one or more system components for depositing, annealing, curing, and / or etching dielectric films on a substrate wafer. In one configuration, two pairs of processing chambers (e.g., 108c-108d and 108e-108f) may be used to deposit dielectric material on the substrate, and a third pair of processing chambers (e.g., 108a-108b) may be used to etch the deposited dielectric material. In another configuration, all three pairs of chambers (e.g., 108a-108f) may be configured for etching dielectric films on the substrate. Any or more of the described processes may be performed in chambers(s) separate from the manufacturing systems shown in the different embodiments. It will be understood that additional configurations for the deposition, etching, annealing, and curing chambers for dielectric films are contemplated through system 100.

[0029] Figure 2A A cross-sectional view of an exemplary processing chamber system 200 having plasma generation regions separated within a processing chamber is shown. During film etching, for example, titanium nitride (TiN), tungsten-doped carbide (WDC), tantalum nitride (TaN), tungsten (W), silicon, polysilicon, silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, etc., a process gas can flow into a first plasma region 215 through a gas inlet assembly 205. A remote plasma system (RPS) 201 may optionally be included in this system and can process the first gas, which then travels through the gas inlet assembly 205. The inlet assembly 205 may include two or more distinct gas supply channels, wherein a second channel (not shown) may bypass the RPS 201 (if included).

[0030] Cooling plate 203, panel 217, ion suppressor 223, nozzle 225, and base 265 or substrate support having a substrate 255 disposed thereon are shown and may be included according to embodiments. Base 265 may have heat exchange channels through which heat exchange fluid flows to control the temperature of the substrate, and may be operable to heat and / or cool the substrate or wafer during processing operations. The wafer support pad of base 265 (which may include aluminum, ceramic, or a combination thereof) may also be resistively heated using embedded resistance heater elements to achieve relatively high temperatures, such as from up to or about 100°C to above or about 1100°C.

[0031] Panel 217 can be pyramidal, conical, or other similar structures with a narrow top extending to a wide bottom. Panel 217 may additionally be flat, as shown, and include multiple through-channels for distributing the process gas. Depending on the use of RPS 201, plasma-generating gases and / or plasma-excited species can pass through multiple holes in panel 217 (e.g., Figure 2B (As shown), for more uniform delivery into the first plasma region 215.

[0032] An exemplary configuration may include allowing gas inlet assembly 205 to flow into gas supply region 258, which is separated from first plasma region 215 by panel 217, such that gas / species flow through holes in panel 217 into first plasma region 215. Structural and operational features may be selected to prevent significant plasma backflow from first plasma region 215 back to supply region 258, gas inlet assembly 205, and fluid supply system 210. The conductive top of panel 217 or chamber and nozzle 225 are shown with an insulating ring 220 located between the features, which allows an AC potential to be applied to panel 217 relative to nozzle 225 and / or ion suppressor 223. Insulating ring 220 may be positioned between panel 217 and nozzle 225 and / or ion suppressor 223, allowing capacitively coupled plasma (CCP) to be formed in the first plasma region. A baffle (not shown) may be additionally located in the first plasma region 215 or otherwise coupled to the gas inlet assembly 205 to affect the flow of fluid entering this region through the gas inlet assembly 205.

[0033] Ion suppressor 223 may include a plate or other geometry defining a plurality of apertures throughout the structure, the apertures being configured to suppress the migration of charged ion species out of the first plasma region 215 while allowing uncharged neutral or radical species to pass through ion suppressor 223 into the activation gas delivery region between the suppressor and the nozzle. In embodiments, ion suppressor 223 may include a perforated plate with various aperture configurations. These uncharged species may include highly reactive species that may be delivered through the apertures along with a less reactive carrier gas. As described above, the migration of ion species through the apertures can be reduced, and in some cases completely suppressed. Controlling the number of ion species passing through ion suppressor 223 can advantageously increase control over the gas mixture in contact with the underlying wafer substrate, which in turn can increase control over the deposition and / or etching characteristics of the gas mixture. For example, adjusting the ion concentration in the gas mixture can significantly alter its etching selectivity. In alternative embodiments in which deposition is performed, it can also alter the balance between conformal and flow deposition of the dielectric material.

[0034] Multiple apertures in the ion suppressor 223 can be configured to control the flow of the activating gas (i.e., ions, free radicals, and / or neutral species) through the ion suppressor 223. For example, the aspect ratio of the aperture, or the ratio of aperture diameter to length, and / or the geometry of the aperture can be controlled such that the flow of charged ion species in the activating gas traveling through the ion suppressor 223 is reduced. The apertures in the ion suppressor 223 may include a tapered portion facing the first plasma region 215 and a cylindrical portion facing the nozzle 225. The cylindrical portion can be shaped and sized to control the flow of ion species through the nozzle 225. As an additional means, an adjustable electrical bias can also be applied to the ion suppressor 223 to control the flow of ion species through the suppressor.

[0035] Ion suppressor 223 can be used to reduce or eliminate the number of ionic charged species traveling from the plasma generation region to the substrate. Uncharged neutral and free radical species can still pass through openings in the ion suppressor to react with the substrate. It should be noted that in embodiments, complete elimination of ionic charged species in the reaction region surrounding the substrate may not be performed. In some cases, ionic species intentionally reach the substrate to perform etching and / or deposition processes. In these cases, the ion suppressor helps to control the concentration of ionic species in the reaction region to a level that assists this process.

[0036] The combination of nozzle 225 and ion suppressor 223 allows plasma to exist in the first plasma region 215 to avoid directly exciting the gas in the substrate processing region 233, while still allowing excited species to travel from the first plasma region 215 into the substrate processing region 233. In this way, the chamber can be configured to prevent plasma from contacting the substrate 255 being etched. This advantageously protects various complex structures and films patterned on the substrate, which would be damaged, displaced, or deformed if directly contacted by the generated plasma. Furthermore, the etching rate of oxide species may increase when plasma is allowed to contact the substrate or approach the substrate surface. Therefore, if the exposed area of ​​the material is oxide, this material can be further protected by maintaining the plasma remotely from the substrate.

[0037] The processing system may further include a power supply 240 electrically coupled to the processing chamber to provide electrical power to the panel 217, ion suppressor 223, nozzle 225, and / or base 265 to generate plasma in the first plasma region 215 or processing region 233. The power supply may be configured to deliver an adjustable amount of power to the chamber depending on the process being performed. This configuration allows for the use of tunable plasma in the process being executed. Unlike remote plasma units that typically present an on / off functionality, tunable plasma can be configured to deliver a specific amount of power to the first plasma region 215. This, in turn, allows for the development of specific plasma characteristics, such that precursors are dissociated in a specific manner to enhance the etch profile produced by these precursors.

[0038] Plasma can be ignited in a first plasma region 215 above nozzle 225 or in a substrate processing region 233 below nozzle 225. Plasma can be present in the chamber plasma region 215 to generate free radical precursors from the inflow of, for example, fluorine-containing precursors or other precursors. An AC voltage, typically in the radio frequency (RF) range, can be applied between the conductive top of the processing chamber (such as panel 217) and nozzle 225 and / or ion suppressor 223 to ignite plasma in the chamber plasma region 215 during deposition. The RF power supply can generate a high RF frequency of 13.56 MHz, but other frequencies, either alone or in combination with the 13.56 MHz frequency, can also be generated.

[0039] Figure 2B A detailed view 253 shows features that affect the distribution of the processed gas through panel 217. (See also...) Figure 2A and Figure 2B As shown, panel 217, cooling plate 203, and gas inlet assembly 205 intersect to define gas supply region 258, from which process gas can be delivered to gas supply region 258. Gas can fill gas supply region 258 and flow through aperture 259 in panel 217 to first plasma region 215. Aperture 259 can be configured to guide flow in a substantially unidirectional manner, allowing process gas to flow into processing region 233, but partially or completely preventing backflow into gas supply region 258 after passing through panel 217.

[0040] For use in the processing chamber system 200 and additionally Figure 3 Gas distribution components such as nozzle 225, which are described in detail in the embodiments described herein, may be referred to as dual-channel nozzles (DCSH). Dual-channel nozzles can provide an etching process that allows for the separation of etchant outside the processing area 233 to provide limited interaction between the etchant and the chamber components and the etchant itself before being delivered into the processing area.

[0041] Nozzle 225 may include an upper plate 214 and a lower plate 216. The plates may be coupled to each other to define a volume 218 between the plates. The coupling of the plates facilitates the provision of a first fluid passage 219 through the upper and lower plates, and a second fluid passage 221 through the lower plate 216. The formed passage may be configured to individually provide fluid inflow and outflow from the volume 218 through the second fluid passage 221 through the lower plate 216, and the first fluid passage 219 may be fluidly isolated from the volume 218 and the second fluid passage 221 between the plates. The volume 218 may fluidly flow through one side of nozzle 225.

[0042] Figure 3 This is a bottom view of a nozzle 325 used with a processing chamber according to an embodiment. The nozzle 325 can be used with... Figure 2A The nozzle 225 shown corresponds to this. The through-hole 365, shown as a view of the first fluid channel 219, can have various shapes and configurations to control and influence the flow of the precursor through the nozzle 225. The orifice 375, shown as a view of the second fluid channel 221, can be distributed substantially uniformly above the surface of the nozzle, even in the middle of the through-hole 365, and compared to other configurations, helps to provide a more uniform mixing of the precursor as it leaves the nozzle.

[0043] The chambers discussed earlier can be used when performing exemplary methods, including etching methods. (Go to...) Figure 4 This illustrates exemplary operations in method 400 according to an embodiment of the present technology. Method 400 may include one or more operations prior to the commencement of this method, including front-end processing, deposition, gate formation, etching, polishing, cleaning, or any other operations that may be performed prior to said operations. The method may include several optional operations, which may or may not be specifically associated with some embodiments of the method according to the present technology. For example, many operations are described to provide a broader range of processes performed, but which are not critical to the technology or may be performed by alternative methods, as will be discussed further later. Method 400 may be described in Figures 5A-5B The operation is illustrated schematically in the diagram. Figures 5A-5B The description will be given in conjunction with the operation of method 400. It will be understood that the accompanying drawings are only partially schematic views, and the substrate may contain any number of additional materials and features having the various properties and aspects shown in the drawings.

[0044] Method 400 may or may not involve optional operations such as developing the semiconductor structure to a particular manufacturing operation. It will be understood that method 400 can be performed on any number of semiconductor structures or substrates 505, such as Figure 5AThe illustration shows an exemplary structure on which a metal hard mask removal operation can be performed. The exemplary semiconductor structure may include trenches, vias, or other recessed features that may include one or more exposed materials. For example, the exemplary substrate may comprise silicon or some other semiconductor substrate material and interlayer dielectric material, thereby forming recesses, trenches, vias, or isolation structures. The exposed material at any point during the etching process may be or include, for example, a metal material for the gate, a dielectric material, a contact material, a transistor material, or any other material that can be used in semiconductor processing. Figure 5A As shown, in some embodiments, exemplary structure 500 may include a metal-containing region 510 (such as a tungsten-containing material) extending into substrate 505. An aluminum-containing material 515 may cover multiple portions of substrate 505. A low-dielectric-constant material 520 (such as silicon oxide), characterized by a dielectric constant less than or about 4.0, may extend from the aluminum-containing material 515. In embodiments, the low-dielectric-constant material 520 may be characterized by a dielectric constant less than or about 3.9, and may be less than or about 3.8, less than or about 3.7, less than or about 3.6, less than or about 3.5, less than or about 3.0, less than or about 2.5, or smaller. A metal-containing hard mask material 525 (such as titanium nitride (TiN) or tungsten-doped carbide (WDC)) may cover the low-dielectric-constant material 520. Other metal-containing hard mask materials 525 may be or include tungsten, molybdenum, or tantalum, nitrides, oxides, carbides, and silicides comprising the same. The metal-containing hard mask material 525 may be exposed relative to one or more other materials, including metal-containing materials, dielectric materials including silicon oxide or silicon nitride, or any number of other semiconductor materials, which will be removed relative to these materials, such as aluminum oxide and any other materials.

[0045] It will be understood that the described structures are not intended to be limiting, and any and various other semiconductor structures including those containing metallic hard mask materials (such as titanium-doped hard mask materials) are similarly covered. Other exemplary structures may include two-dimensional and three-dimensional structures common in semiconductor manufacturing, and within these structures, metallic hard mask materials such as titanium-doped hard mask materials (e.g., titanium nitride (TiN) or tungsten-doped carbide (WDC)) will be removed relative to one or more other materials, as this technique can selectively remove metallic hard mask materials relative to other exposed materials such as silicon-containing materials (e.g., amorphous, polycrystalline, or epitaxial), silicon and germanium-containing materials, other metallic materials such as non-hard mask metallic materials or metal and oxygen-containing materials, oxides including oxides with high dielectric constants, nitrides, and any other materials discussed elsewhere. Furthermore, while high aspect ratio structures can benefit from this technique, this technique is equally applicable to lower aspect ratios and any other structures.

[0046] For example, the material layers according to the invention can be characterized by any aspect ratio or height-to-width ratio of the structure; however, in some embodiments, the material can be characterized by a large aspect ratio, which may not allow for adequate etching using conventional techniques or methods. For example, in some embodiments, the aspect ratio of any layer of the exemplary structure can be greater than or about 10:1, greater than or about 20:1, greater than or about 30:1, greater than or about 40:1, greater than or about 50:1, or greater. Furthermore, each layer can be characterized by a reduced width or thickness of less than or about 100 nm, less than or about 80 nm, less than or about 60 nm, less than or about 50 nm, less than or about 40 nm, less than or about 30 nm, less than or about 20 nm, less than or about 10 nm, less than or about 5 nm, less than or about 1 nm, or less, including any fraction of any of these values, such as 20.5 nm, 1.5 nm, etc. This combination of high aspect ratio and minimum thickness can hinder many conventional etching operations or require substantially longer etching times to remove layers across a confined width along a vertical or horizontal distance. In addition, using conventional techniques can also damage or remove other exposed layers.

[0047] Method 400 can be performed to remove exposed metal-containing hard mask material, such as titanium-containing material, in any number of structures according to embodiments of the present technology. The method may include specific operations for removing the metal-containing hard mask material, and may include one or more optional operations for preparing or treating the metal-containing hard mask material or other exposed material prior to removal. For example, an exemplary substrate structure including titanium-containing material may have pre-treatment residues, such as titanium nitride (TiN) or tungsten-doped carbide (WDC), on the film to be removed. For example, residual photoresist or byproducts from the pre-treatment may reside on the titanium nitride (TiN) or tungsten-doped carbide (WDC) layer. These materials may prevent penetration into the titanium nitride (TiN) or tungsten-doped carbide (WDC) or may interact with the etchant in a manner different from that of a clean titanium nitride (TiN) or tungsten-doped carbide (WDC) surface, which may hinder one or more aspects of etching. Therefore, in some embodiments, an optional pretreatment of the titanium-containing film or material may occur at optional operation 405. Exemplary pretreatment operations may include heat treatment, wet treatment, or plasma treatment, which may be performed, for example, in chamber system 200 and in any number of chambers included in the aforementioned system 100. Method 400 may include one or more pretreatment operations at optional operation 405.

[0048] In some preprocessing operations at optional operation 405, passivation material may be formed on substrate 505. For example, thermal oxidation may be performed. Thermal oxidation may include providing one or more pre-etch precursors, such as oxygen-containing precursors (e.g., diatomic oxygen (O2)), to the processing region. Substrate 505 may contact the oxygen-containing precursor. This contact may oxidize a portion of exposed metallic material, such as metal-containing region 510. The oxidized portion of the exposed metallic material (such as metal-containing region 510) may be used to passivate metal-containing region 510 during subsequent etching of metal-containing hard mask material 525. Additionally or alternatively, optional operation 405 may include selective deposition operations to deposit passivation material on one or more exposed surfaces of substrate 505. Pre-etch precursors may include one or more deposition precursors that may be provided to the processing region and may contact substrate 505. In embodiments, depending on the passivation material to be deposited, silicon-containing precursors may be provided to the processing region. For example, silicon-containing materials such as silicon may be deposited on substrate 505.

[0049] In an optional pretreatment operation at operation 405, oxygen-containing materials, such as oxide portions of the metal-containing hard mask material 525, may be removed from substrate 505. The oxide portions of the metal-containing hard mask material 525 may be surface oxides present due to exposure to surrounding conditions. Removing the oxide portions of the metal-containing hard mask material 525 may include providing one or more pre-etch precursors, such as fluorine-containing precursors, chlorine-containing precursors, and / or hydrogen-containing precursors, to the processing area. Precursors may be, for example, nitrogen trifluoride (NF3) and diatomic hydrogen (H2), tungsten hexafluoride (WF6), and / or boron trichloride (BCl3). The pretreatment operation may then include contacting the substrate with the pre-etch precursor to remove oxygen-containing materials, such as oxide portions of the metal-containing hard mask material 525. This removal may then allow the metal-containing hard mask material 525 to be removed during subsequent etching.

[0050] In some embodiments, plasma effluent may be formed from a pre-etched precursor. Remote or local plasmas can be developed from pre-etched precursors designed to interact with the residue in one or more ways. For example, either a remote or local plasma can be generated from one or more pre-etched precursors using a chamber such as the chamber system 200 described above. The plasma effluent may flow to the substrate and may contact the residue material. The plasma effluent may be formed at relatively low levels of plasma power to minimize damage to low-dielectric-constant materials on substrate 505. For example, the plasma effluent may be formed at less than or about 500 W, and may be formed at less than or about 450 W, less than or about 400 W, less than or about 350 W, less than or about 300 W, less than or about 250 W, less than or about 200 W, less than or about 150 W, less than or about 100 W, less than or about 50 W, or even less. In plasma-enhanced embodiments, the duration may be controlled to minimize damage to other materials on substrate 505. For example, this contact can last for less than or about 45 seconds, and can last for less than or about 40 seconds, less than or about 35 seconds, less than or about 30 seconds, less than or about 25 seconds, less than or about 20 seconds, less than or about 15 seconds, less than or about 10 seconds, less than or about 5 seconds, or even less. After this contact duration, the plasma can be extinguished, and the precursors / byproducts are decontaminated from the processing area. Although plasma effluent may be formed in some embodiments, it is also contemplated that the pretreatment operation at optional operation 405 be performed without plasma to minimize damage to substrate 505.

[0051] Method 400 may include, at operation 410, flowing an etchant precursor into a substrate processing region of a semiconductor processing chamber housing the aforementioned substrate or some other substrate. The etchant precursor may be allowed to flow after the delivery of the pre-etched precursor, provided at optional operation 405, has ceased. The etchant precursor may flow through remote plasma regions of the processing chamber, such as region 215 described above; however, in some embodiments, method 400 may not utilize plasma effluent during the etching operation. For example, method 400 may allow the etchant precursor to flow to the processing region and substrate 505 without exposing the precursor to plasma, and may perform removal of metal-containing hard mask material without generating plasma effluent. The etchant precursor may contact substrate 505 including exposed regions containing metal-containing hard mask material 525, and may generate halogenated material, which may remain on substrate 505 or be volatile. In some embodiments, the halogen-containing precursor may donate one or more halogen atoms while accepting one or more nitrogen atoms. Some halogen-containing precursors can provide halogen radicals, while other plasma radicals can accept nitrogen from this membrane. Therefore, at operation 415, the etchant precursor can etch or remove the metal-containing hard mask material, such as... Figure 5BAs shown.

[0052] As described above, this technique can be performed without plasma development during etching operations 410-415. Plasma-free removal can be performed by utilizing specific precursors and performing etching under specific processing conditions, and this removal can also be dry etching. Therefore, techniques according to aspects of the invention can be performed to remove metal-containing hard mask material 525, such as titanium nitride (TiN) or tungsten-doped carbide (WDC), from narrow features and high aspect ratio features and thin dimensions that may not be suitable for wet etching. Optional operations can be performed to clean residues from the substrate or chamber and may include post-processing at optional operation 420. Post-processing may include operations similar to pre-processing and may include any of the precursors or operations described above regarding pre-processing. In some embodiments, post-processing may clean residual etchant material, such as fluorine or chlorine, from the substrate 505 or semiconductor processing chamber. It will be understood that while pre-processing and / or post-processing operations may include plasma generation and delivery of plasma effluent to the substrate, plasma may not be formed during etching operations 410-415. For example, in some embodiments, no plasma may be generated while one or more etchant precursors are delivered into the processing chamber.

[0053] The etchant precursor during etching operations 410-415 may include a halogen-containing precursor, and in some embodiments may include one or more of fluorine or chlorine. A particular precursor may be based on its bonding or stability. Exemplary etchant precursors may include nitrogen trifluoride (NF3), as well as halogen-containing precursors, such as other fluorine-containing or chlorine-containing precursors. Other etchant precursors may include diatomic fluorine (F2), diatomic chlorine (Cl2), thionyl chloride (SOCl2), carbon tetrafluoride (CF4), hexafluoroethane (C2F6), sulfur hexafluoride (SF6), carbon tetrachloride (CCl4), dichloromethane (CH2Cl2), chloroform (CHCl3), or combinations thereof. The etchant may also flow with a variety of other precursors. In some embodiments, a second precursor may be provided in addition to the etchant precursor to increase selectivity and / or etching rate. The second precursor may be or include a hydrogen-containing precursor, such as a hydrocarbon, or an oxygen-containing precursor. Exemplary second precursors may be, for example, diatomic hydrogen (H2), methane (CH4), amines such as ammonia (NH3), and / or diatomic oxygen (O2). The etchant precursor and / or second precursor may also be provided with any amount of carrier gas, which may include nitrogen, helium, argon, or other rare, inert, or useful precursors. The carrier gas can be used to dilute the etchant precursor, thereby controlling the etching rate and distributing the etchant precursor.

[0054] The second precursor can help limit or reduce the etching or etch rate of other exposed areas on the substrate, such as the metal-containing region 510. For example, the etchant precursor and the second precursor can interact with both the metal-containing hard mask material 525 and the metal-containing region 510. In the absence of a second precursor, which can be a protective gas, this etching can begin to etch the metal-containing material outside the metal-containing hard mask material 525. However, by incorporating the second precursor, the second precursor molecules can occupy surface regions or sites along the metal-containing region 510 to form NH bonds and / or WH bonds (in the case of the tungsten-containing metal region), which can reduce the etch rate. For example, although fluorine or other halogens may be deposited at discrete sites bonded to the metal-containing region 510, these sites will be at least partially blocked by the second precursor. Exemplary metals (such as molybdenum or tungsten) may not have a one-to-one removal property with fluorine or other halogens, but may incorporate three, four, or six fluorine or other halogen atoms before the removal of the metal atoms. Therefore, by utilizing a protective second precursor, these interactions between fluorine and metal can be controlled, reduced, or limited, which can facilitate control of the etching rate.

[0055] However, as the flow rate ratio of the second precursor to the etchant precursor increases, the etching rate continues to decrease, and eventually the second precursor molecules will interrupt the etching process at each location on the substrate 505, preventing further etching of the metal-containing hard mask material 525. Therefore, in some embodiments, the flow rate ratio of the etchant precursor to the second precursor can be maintained at less than or about 2:1, which ensures that a certain amount of the metal-containing hard mask material 525 is etched without etching other materials on the substrate 505. For example, the flow rate ratio of the etchant precursor to the second precursor may be maintained at less than or about 1.9:1, and may be maintained at less than or about 1.8:1, less than or about 1.7:1, less than or about 1.6:1, less than or about 1.5:1, less than or about 1.4:1, less than or about 1.3:1, less than or about 1.2:1, less than or about 1.1:1, less than or about 1.0:1, less than or about 0.9:1, less than or about 0.8:1, less than or about 0.7:1, or smaller. Furthermore, a first flow rate ratio may be used, and may be adjusted to a second flow rate ratio different from the first flow rate ratio as the etching process proceeds. Any of these ratios, or any ratio covered by the listed ranges, may be used in some embodiments during flow operation for either the first or second flow rate ratio.

[0056] As a non-limiting example, during the operation of the substrate 505 contact etchant precursor at location 415, nitrogen trifluoride (NF3) can readily donate one or two fluorine atoms and / or one nitrogen atom at high temperatures, and (such as from titanium nitride (TiN) or tungsten doped carbide (WDC)) receive nitrogen atoms, and can be maintained in the gas phase. Therefore, metallic materials such as titanium-containing materials can be developed as reaction byproducts, which can be gaseous molecules and can be pumped or removed from the processing chamber. For example, when the metallic hard mask material 525 is titanium nitride, fluorine from the etchant precursor can combine with titanium nitride to form titanium tetrafluoride (TiF4), titanium (III) fluoride (TiF3), titanium oxyfluoride (TiOF2), or any other titanium-containing material. Furthermore, nitrogen-containing materials can be developed as reaction byproducts, which can be gaseous molecules and can be pumped or removed from the processing chamber. For example, nitrogen atoms from titanium nitride can form stable byproducts such as diatomic nitrogen (N2), nitrous oxide (N2O), or nitrogen dioxide (NO2). Accordingly, this process can remove titanium nitride or other metal-containing hard mask material 525 under processing conditions configured to exchange fluorine and nitrogen between the etchant precursor and the metal-containing hard mask material 525, which can produce volatile byproducts. Due to controlled delivery and processing, fluorinated materials, other etchant precursors, and / or secondary precursors can easily remove the metal-containing hard mask material 525, such as titanium nitride (TiN) or tungsten-doped carbide (WDC), without etching other exposed surfaces or with minimal interaction with other exposed surfaces, resulting in enhanced selectivity compared to conventional techniques.

[0057] Processing conditions can influence and promote etching according to this technique. Because the etching reaction can proceed based on the thermal dissociation of halogens from the etchant precursor, the temperature will depend at least in part on the specific halogens and / or other atoms in the etchant precursor to initiate dissociation. For example, as the temperature increases above or about 250°C, etching begins or increases, which can indicate the activation of precursor dissociation and / or reaction with titanium nitride (TiN) or tungsten-doped carbide (WDC). With further increases in temperature, dissociation can be further promoted, such as with the reaction containing a metal-containing hard mask material 525. Accordingly, in some embodiments of the invention, the etching method can be performed at temperatures greater than or about 350°C, and at substrate, base, and / or chamber temperatures greater than or about 375°C, greater than or about 400°C, greater than or about 425°C, greater than or about 410°C, greater than or about 400°C, greater than or about 390°C, greater than or about 450°C, greater than or about 475°C, greater than or about 500°C, greater than or about 525°C, or higher. Temperatures can also be maintained at any temperature within these ranges, any temperature within a smaller range encompassed by these ranges, or any temperature between any of these ranges. In some embodiments, this method can be performed on a substrate that may have several generated features that produce a thermal budget. In embodiments, higher temperatures increase the etching of the metal hard mask material 525. Therefore, in some embodiments, this method can be performed at temperatures less than or about 650°C, and at temperatures less than or about 600°C, less than or about 575°C, less than or about 550°C, less than or about 525°C, less than or about 500°C, less than or about 475°C, or lower.

[0058] The pressure within the chamber can also affect the operation performed and the temperature at which the etchant precursor can dissociate, such as the dissociation temperatures of sulfur, oxygen, and chlorine when thionyl chloride (SOCl2) is used as the etchant precursor. Therefore, in some embodiments, the pressure can be maintained at or above 0.5 Torr, or above 1 Torr, or above 2 Torr, or above 3 Torr, or above 4 Torr, or above 5 Torr, or above 6 Torr, or above 7 Torr, or above 8 Torr, or above 9 Torr, or above 10 Torr, or above 15 Torr, or above 20 Torr, or above 30 Torr, or above 40 Torr, or above 50 Torr, or above 60 Torr, or higher. Furthermore, the pressure can be maintained at or below 60 Torr, or below 50 Torr, or below 40 Torr, or below 30 Torr, or below 25 Torr, or below 20 Torr, or below 15 Torr, or below 10 Torr, or below 9 Torr, or below 8 Torr, or below 7 Torr, or below 6 Torr, or below 5 Torr, or lower. The pressure can also be maintained at any pressure within these ranges, any pressure within a smaller range encompassed by these ranges, or any pressure between any of these ranges. In some embodiments, etching can be promoted and initiated due to an increase in pressure greater than about 0.5 Torr. Furthermore, as the pressure continues to increase, etching can improve up to a point before it begins to decrease, and eventually cease due to the continued increase in pressure. Without being limited by any particular theory, the pressure within the chamber can affect the processing using the aforementioned precursors. At low pressures, flow across the substrate is reduced, and dissociation is similarly reduced. As the pressure increases, the interaction between the etchant precursor and the substrate can increase, which can increase the reaction and etching rates. However, as pressure continues to increase, the recombination of dissociated etchant precursor atoms increases due to the relative stability of molecules. Therefore, the precursor can be effectively pumped back out of the chamber without reacting with the substrate. Furthermore, interaction with the metal-containing hard mask material 525 is suppressed due to the continued increase in pressure, or byproduct material may be reintroduced into the etched film, further limiting removal. Therefore, in some embodiments, the pressure within the processing chamber can be maintained at or below 30 Torr.

[0059] By performing operations according to embodiments of the present technology, a metal-containing hard mask material 525, such as titanium nitride (TiN), other titanium-containing materials, or tungsten-doped carbide (WDC), can be selectively etched relative to other materials including other oxides or nitrides. For example, the present invention can selectively etch the metal-containing hard mask material 525 relative to exposed areas of metals, dielectrics including silicon-containing materials including silicon oxide, or other materials. Embodiments of the present invention may etch the metal-containing hard mask material 525 at a ratio of at least about 2:1 relative to silicon oxide or any other material, and may selectively etch the metal-containing hard mask material 525 relative to silicon oxide or said other materials at ratios greater than or about 3:1, greater than or about 4:1, greater than or about 5:1, greater than or about 6:1, greater than or about 7:1, greater than or about 8:1, greater than or about 9:1, greater than or about 10:1, greater than or about 15:1, greater than or about 20:1, greater than or about 25:1, greater than or about 30:1, greater than or about 35:1, greater than or about 40:1, greater than or about 45:1, greater than or about 50:1, or greater. For example, etching performed according to some embodiments of the present invention may etch the metal-containing hard mask material 525 while substantially or substantially maintaining silicon oxide or other materials, such as silicon, aluminum, or hafnium nitrides or oxides, metals such as tungsten or molybdenum, or materials such as polycrystalline silicon.

[0060] In an embodiment, an optional operation 425 of method 400 may include contacting the substrate with a second etchant precursor, such as a post-etch precursor, to remove fluorine-containing residues and / or oxide portions of the metal-containing hard mask material 525 from the substrate. Delivery of the etchant precursor provided at operation 410 may be stopped before the second etchant precursor is allowed to flow. Fluorine-containing residues may be present on any exposed surface of the material on the substrate 505. Oxidation portions of the metal-containing hard mask material 525 may be due to oxidation of the metal-containing hard mask material 525 by the second precursor during etching. The second etchant precursor may be a halogen-containing precursor and may be any precursor previously discussed with respect to operation 410. An exemplary second etchant precursor may be boron trichloride (BCl3). The second etchant precursor may be provided to a processing area that can contact the substrate 505 and can remove fluorine-containing residues and / or oxide portions of the metal-containing hard mask material 525 from the substrate.

[0061] In an embodiment, method 400 may include cycling operations 410-420 and operation 425 associated with etching the metal-containing hard mask material 525 to remove fluorine-containing residues and / or remove oxide portions of the metal-containing hard mask material 525 from the substrate. By cycling operations 410-420 and 425, the metal-containing hard mask material 525 can be removed, while any fluorine-containing residues and / or oxide portions of the metal-containing hard mask material 525 can be minimized / eliminated to allow etching to proceed.

[0062] Each operation of method 400 can be performed in a single processing region within a single semiconductor processing chamber. However, it is also contemplated that the substrate 505 can be transferred between various processing regions to increase yield. For example, operation 405 can be performed in a first processing region of a first semiconductor processing chamber, while operations 410-425 can be performed in a second processing region of a second semiconductor processing chamber. In a further embodiment, operations 410-420 can be performed in a second processing region of a second semiconductor processing chamber, while operation 425 can be performed in a third processing region of a third semiconductor processing chamber.

[0063] Selectivity can be based in part on the precursors used and the ability to dissociate within a more controlled temperature range. Conventional techniques may not produce the etch selectivity of embodiments of this technique. Similarly, because wet etchants readily remove silicon oxide, they may also fail to etch selectively at a rate similar to that of embodiments of this technique. The previously discussed methods allow for the removal of metal-containing hard mask materials, such as titanium-containing materials, relative to several other exposed materials. By utilizing etchants under the previously described operating conditions, improved etching of metal-containing hard mask materials, such as titanium nitride (TiN) or tungsten-doped carbide (WDC), can be performed, which increases selectivity compared to conventional techniques and also improves etch penetration in fine-pitch features.

[0064] In the foregoing description, numerous details have been set forth for illustrative purposes to provide an understanding of various embodiments of the present technology. However, it will be apparent to those skilled in the art that certain embodiments may be implemented without some of these details or with additional details.

[0065] Several embodiments have been disclosed, and those skilled in the art will understand that various modifications, alternative constructions, and equivalents may be used without departing from the spirit of the embodiments. Furthermore, several well-known processes and elements have not been described to avoid unnecessarily obscuring the present technology. Therefore, the above description should not be considered as limiting the scope of the invention. Additionally, methods or processes may be described as sequential or step-by-step, but it will be understood that operations may be performed simultaneously or in a different order than those listed.

[0066] When a numerical range is provided, unless the context explicitly indicates otherwise, it should be understood that each intermediate value between the upper and lower limits of the range, up to the smallest unit of the lower limit, is also explicitly disclosed. Any narrower range between any stated value or undescribed intermediate value and any other stated or intermediate value in the range is covered. The upper and lower limits of those smaller ranges may be independently included in or excluded from the range, and are subject to any explicitly excluded limits in the range. Ranges in which either limit is included, neither limit is included, or both limits are included are also covered in this invention. Where the range includes one or both limits, ranges excluding either or both of those included limits are also included.

[0067] As used herein and in the appended claims, unless the context clearly indicates otherwise, the singular forms “a / an” and “the” include plural references. Thus, for example, a reference to “a precursor” includes multiple such precursors, and a reference to “the material” includes references to one or more materials and their equivalents known to those skilled in the art, and so on.

[0068] Furthermore, the terms “comprise(s)”, “comprising”, “contain(s)”, “containing”, “include(s)”, and “including”, when used in this specification and in the following claims, are intended to indicate the presence of the stated feature, integral, component, or operation, but do not exclude the presence or addition of one or more other features, integrals, components, operations, actions, or groups.

Claims

1. A semiconductor processing method, comprising: An etchant precursor is introduced into a processing region of a semiconductor processing chamber, wherein a substrate is housed within the processing region, and wherein the substrate defines an exposed region containing a metal hard mask material and an exposed region of a material characterized by a dielectric constant of less than or about 4.

0. Make the substrate contact the etchant precursor; as well as Remove at least a portion of the metal-containing hard mask material.

2. The semiconductor processing method as described in claim 1, wherein, The etchant precursor includes halogen-containing precursors.

3. The semiconductor processing method as described in claim 1, wherein, The etchant precursors include nitrogen trifluoride (NF3), diatomic fluorine (F2), diatomic chlorine (Cl2), thionyl chloride (SOCl2), carbon tetrafluoride (CF4), hexafluoroethane (C2F6), sulfur hexafluoride (SF6), carbon tetrachloride (CCl4), dichloromethane (CH2Cl2), chloroform (CHCl3), or combinations thereof.

4. The semiconductor processing method as described in claim 1, wherein, The etchant precursor includes nitrogen trifluoride (NF3).

5. The semiconductor processing method as described in claim 1, further comprising: The hydrogen-containing precursor or oxygen-containing precursor and the etchant precursor are allowed to flow into the processing area of ​​the semiconductor processing chamber.

6. The semiconductor processing method as described in claim 1, wherein, The removal of the portion containing the metallic hard mask material was performed without plasma.

7. The semiconductor processing method as described in claim 1, wherein, The removal of the portion containing the metallic hard mask material was performed at a temperature greater than or about 350°C.

8. The semiconductor processing method as described in claim 1, wherein, The removal of the portion containing the metal hard mask material was performed under a pressure greater than or about 2 Torr.

9. The semiconductor processing method of claim 1, further comprising: Before the etchant precursor is introduced into the processing region of the semiconductor processing chamber, the oxidized portion of the metal-containing hard mask material is removed.

10. The semiconductor processing method of claim 1, further comprising: After removing the portion of the metal-containing hard mask material, the substrate is brought into contact with a second etchant precursor to remove fluorine residues or oxidized portions of the metal-containing hard mask material from the substrate.

11. A semiconductor processing method, comprising: A pre-etched precursor is introduced into a processing region of a semiconductor processing chamber, wherein a substrate is housed within the processing region, and wherein the substrate defines an exposed region containing a metal hard mask material and an exposed region of a material characterized by a dielectric constant of less than or about 4.

0. Make the substrate contact the pre-etched precursor; Stop delivering the pre-etched precursor; The etchant precursor is introduced into the processing area of ​​the semiconductor processing chamber; Make the substrate contact the etchant precursor; as well as At least a portion of the metal-containing hard mask material is selectively removed relative to the material characterized by a dielectric constant of less than or about 4.

0.

12. The semiconductor processing method as claimed in claim 11, wherein, The pre-etching precursors include nitrogen trifluoride (NF3), tungsten hexafluoride (WF6), or boron trichloride (BCl3).

13. The semiconductor processing method of claim 11, further comprising: The plasma effluent that forms the pre-etched precursor.

14. The semiconductor processing method as claimed in claim 11, wherein, The etchant precursors include nitrogen trifluoride (NF3), diatomic fluorine (F2), diatomic chlorine (Cl2), thionyl chloride (SOCl2), carbon tetrafluoride (CF4), hexafluoroethane (C2F6), sulfur hexafluoride (SF6), carbon tetrachloride (CCl4), dichloromethane (CH2Cl2), chloroform (CHCl3), or combinations thereof.

15. The semiconductor processing method as claimed in claim 11, wherein, The removal of the portion containing the metallic hard mask material was performed without plasma.

16. The semiconductor processing method of claim 11, wherein, The substrate includes an exposed area of ​​metallic material, and the method further includes: The metal material is oxidized before the pre-etched precursor is introduced into the processing region of the semiconductor processing chamber.

17. A semiconductor processing method, comprising: An etchant precursor is introduced into a processing area of ​​a semiconductor processing chamber, wherein a substrate is housed within the processing area, and wherein the substrate defines an exposed area containing a metal hard mask material. Make the substrate contact the etchant precursor; At least a portion of the metal-containing hard mask material is removed relative to one or more other materials on the substrate; Stop delivering the etchant precursor; The post-etching precursor flows into the processing area of ​​the semiconductor processing chamber; Make the substrate contact the subsequent etching precursor; as well as Remove fluorine residues or oxidized portions of the metal-containing hard mask material from the substrate.

18. The semiconductor processing method of claim 17, wherein, The etchant precursor includes halogen-containing precursors.

19. The semiconductor processing method as described in claim 18, wherein, The one or more other materials on the substrate include a dielectric constant of less than or about 4.0, metallic materials, silicon-containing materials, or materials containing metal and oxygen.

20. The semiconductor processing method of claim 17, wherein, The removal of the portion containing the metal hard mask material was performed at a temperature greater than or about 350°C and a pressure greater than or about 2 Torr.

21. The semiconductor processing method as claimed in claim 1, wherein, The metal-containing hard mask material is a titanium-containing hard mask material.

22. The semiconductor processing method as claimed in claim 1, wherein, The metal-containing hard mask material includes doped carbides.

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