Method for manufacturing multilayer substrate and semiconductor device

By using a sandwich lamination method to manufacture multilayer substrates and utilizing semi-cured resin bonding materials, the problems of extended time and wiring misalignment caused by layer-by-layer lamination are solved, achieving efficient and reliable multilayer substrate production.

CN121014264APending Publication Date: 2025-11-25RESONAC CORP
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Patent Information

Application Number
CN202380097530.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-06-07
Publication Date
2025-11-25

AI Technical Summary

Technical Problem

In existing multilayer substrate manufacturing methods, the sequential stacking of insulating layers leads to a longer manufacturing period. At the same time, wiring position misalignment is prone to occur in a single stacking process, affecting manufacturing efficiency and yield.

Method used

The sandwich stacking method involves preparing multiple substrates and stacking them with a bonding agent to form a multilayer substrate. This includes preparing substrates with insulating layers and wiring, using semi-cured or uncured curable resin as the bonding material, and ensuring the connection and positional accuracy between the layers.

Benefits of technology

It effectively shortens the manufacturing time of multilayer substrates, reduces wiring position offset, improves manufacturing efficiency and yield, and enhances the freedom of wiring pattern design.

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Abstract

As an example of a method for manufacturing a package substrate, a first substrate (30) having a cured insulating layer, a second substrate (40) having a cured insulating layer, a third substrate (50) having a cured insulating layer, and a fourth substrate (60) having a cured insulating layer are prepared. A semi-cured bonded body (70) (prepreg) is sandwiched and laminated between a first substrate (30) and a second substrate (40), and then cured to produce a first laminated substrate (100). Similarly, the semi-cured bonded body (80) is sandwiched between the third substrate (50) and the fourth substrate (60) and laminated, and then cured to produce a second laminated substrate (110). Then, after the semi-cured bonded body (90) is sandwiched between the first laminated substrate (100) and the second laminated substrate (110), the first laminated substrate (100) and the second laminated substrate (110) are laminated and then cured to produce a package substrate (1). According to the method, the process can be shortened compared with the case of sequential layer-by-layer lamination, and the shortening effect is remarkable especially when the number of laminations is large.
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Description

Technical Field

[0001] This invention relates to a method for manufacturing a multilayer substrate, and more particularly to a method for manufacturing a packaging substrate. Background Technology

[0002] Non-Patent Document 1 discloses a method for stacking printed circuit boards. In this method, a core substrate with double-sided copper foil is etched using a subtractive process. The etched core substrate is then overlapped with a prepreg and heated and pressurized to form a laminate. Through-holes are then formed on the laminate, and the walls of the through-holes are copper-plated (through-hole plating), thereby ensuring conductivity between the upper and lower layers. This method is used, for example, in the fabrication of motherboards. However, if the substrate is fabricated using the above method, the through-holes penetrate all layers of the substrate, thus limiting the ability to route wiring along a planar direction within a single layer. To solve this problem, a technique called microvia has been developed. In this technique, instead of creating holes that penetrate all layers of the substrate, holes are made in each insulating layer to ensure conductivity only between the upper and lower layers (see Non-Patent Document 2). Furthermore, an additive layering method is known where through-holes are created by laser processing after the insulating film is attached, and wiring is repeatedly formed using a semi-additive process (see Non-Patent Document 3). According to this method, multiple wirings can be formed on a single layer.

[0003] Furthermore, with the increasing performance of semiconductor products, the number of input / output terminals required for packaging substrates is increasing. On the other hand, there is a certain limitation on the number of wires that can be formed in a single wiring. Therefore, measures are being taken to increase the number of stacked layers in the packaging substrate, and research is being conducted on increasing the number of stacked layers from 9 to 12 (Non-Patent Document 4). However, the layer-addition method involves stacking insulating layers one by one, thus resulting in a problem where the substrate fabrication period is extended proportionally to the number of stacked layers. As a means to solve this problem, a multilayer substrate using the PALAP process has been developed (for example, see Non-Patent Document 5, Patent Documents 1 and 2). In this method, holes are formed on the opposite side of the copper pattern in a thermoplastic resin with a copper pattern formed on one side, and multiple substrates filled with conductor powder are prepared. Then, a multilayer substrate is fabricated by stacking the multiple prepared substrates together.

[0004] Previous technical documents

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent Application Publication No. 2004-146694

[0007] Patent Document 2: Japanese Patent Application Publication No. 2011-187843

[0008] Non-patent literature

[0009] Non-Patent Literature 1: Toshiki Suzumebe, “The History of Printed Circuit Boards”, Journal of the Japan Institute of Electronics Packaging, Vol. 16, No. 6 (2013), pp. 428-432

[0010] Non-Patent Literature 2: Hirotaka Ueda, “Application and Technical Issues of Conductive Adhesives in Mobile Phone Terminals”, Journal of the Japan Institute of Electronics Packaging, vol.9, No.3 (2006), pp.211-218

[0011] Non-patent document 3: Michio Horiuchi et al., "Metallization technologies on asmooth resin surface for the next generation of flip chip packaging", Transactions of The Japan Institute of Electronics Packaging, vol.3, No.1 (2010), pp.110-115

[0012] Non-Patent Document 4: FC-BGA Substrate, Roadmap, [online], 2022, [Searched April 27, 2023], Internet <URL: https: / / www.toppan.co.jp / electronics / package / fc-bga / >

[0013] Non-Patent Literature 5: Yoshitaro Yazaki et al., “Development of PALAP Multilayer Substrates Using Solid-Phase Diffusion Bonding”, DENSO TECHNICAL REVIEW, vol.10, No.2 (2005), pp.85-89 Summary of the Invention

[0014] The technical problem to be solved by the invention

[0015] As mentioned above, in the build-up process, the time required to fabricate the substrate is proportionally extended due to the sequential stacking of insulating layers. On the other hand, in single-layer stacking processes such as PALAP, positional misalignment sometimes occurs between the wirings. Therefore, it is desirable to develop a process that can suppress positional misalignment of the wirings while improving the fabrication efficiency of multilayer substrates.

[0016] The purpose of this invention is to provide a method for manufacturing a multilayer substrate that can suppress the positional misalignment of each wiring and improve the manufacturing efficiency of the multilayer substrate.

[0017] means for solving technical problems

[0018] [1] One aspect of the present invention relates to a method for manufacturing a multilayer substrate. The method includes: a step of preparing a first substrate, the first substrate having a first insulating layer, a first wiring disposed on a first surface of the first insulating layer, a second wiring disposed on a second surface of the first insulating layer, and a first through-hole penetrating the first insulating layer and connecting the first wiring and the second wiring to each other; a step of preparing a second substrate, the second substrate having a second insulating layer, a third wiring disposed on a first surface of the second insulating layer, a fourth wiring disposed on a second surface of the second insulating layer, and a second through-hole penetrating the second insulating layer and connecting the third wiring and the fourth wiring to each other; and a step of preparing a third substrate, the third substrate having a third insulating layer, a fifth wiring disposed on a first surface of the third insulating layer, and a second wiring disposed on a second surface of the third insulating layer. The process of preparing a first bonding body, the first bonding body having a first bonding material and a first connecting through-hole through the first bonding material; the process of preparing a second bonding body, the second bonding body having a second bonding material and a second connecting through-hole through the second bonding material; the process of fabricating a first stacked substrate, the first stacked substrate being fabricated by stacking a first substrate and a second substrate in such a way that the first bonding body is sandwiched therebetween; the process of preparing a second stacked substrate, the second stacked substrate including a third substrate; the process of fabricating a third stacked substrate, the third stacked substrate being fabricated by stacking a first stacked substrate and a second stacked substrate in such a way that the second bonding body is sandwiched therebetween.

[0019] In this method for manufacturing a multilayer substrate, firstly, a first stacked substrate is fabricated by stacking a first substrate and a second substrate with a first bonding member sandwiched between them, and a second stacked substrate including a third substrate is prepared. Then, a third stacked substrate, which is a multilayer substrate, is fabricated by stacking the first stacked substrate and the second stacked substrate with a second bonding member sandwiched between them. In this case, the number of layers can be increased in a multiplicative manner, thus shortening the fabrication period of the multilayer substrate compared to a method of sequentially stacking layers. Furthermore, since each stacked substrate is not formed by stacking multiple substrates together, positional misalignment in the wiring is less likely to occur. Therefore, according to this method for manufacturing a multilayer substrate, positional misalignment of the wiring can be suppressed while improving the fabrication efficiency of the multilayer substrate.

[0020] [2] The manufacturing method of the multilayer substrate described in [1] above preferably further includes: a step of preparing a fourth substrate having a fourth insulating layer, a seventh wiring disposed on a first surface of the fourth insulating layer, an eighth wiring disposed on a second surface of the fourth insulating layer, and a fourth through-hole penetrating the fourth insulating layer and connecting the seventh wiring and the eighth wiring to each other; and a step of preparing a third bonding body having a third bonding material and a third connecting through-hole penetrating the third bonding material. In the step of preparing the second stacked substrate, it is preferable to manufacture the second stacked substrate by stacking the third substrate and the fourth substrate in such a way that the third bonding body is sandwiched between them. In this case, the time for manufacturing a multilayer substrate having at least 8 layers of wiring can be further shortened.

[0021] [3] In the manufacturing method of the multilayer substrate described in [1] or [2] above, it is preferable that the first insulating layer, the second insulating layer, the third insulating layer, and the fourth insulating layer are insulating layers containing a cured resin. In this case, the first insulating layer, the second insulating layer, the third insulating layer, and the fourth insulating layer will not melt due to heating in subsequent lamination processes, and the wiring disposed on each insulating layer is less likely to experience positional displacement. Therefore, according to this manufacturing method of the multilayer substrate, positional displacement in each wiring can be suppressed more reliably. In addition, the cured resin mentioned here may be, for example, a thermosetting resin.

[0022] [4] In the manufacturing method of the multilayer substrate described in [1] or [2] above, the first insulating layer, the second insulating layer, the third insulating layer, and the fourth insulating layer can be glass substrates. In this case, the first insulating layer, the second insulating layer, the third insulating layer, and the fourth insulating layer will not melt due to heating in subsequent lamination processes, and the wiring disposed on each insulating layer is less likely to experience positional displacement. Therefore, according to this manufacturing method of the multilayer substrate, positional displacement in each wiring can be suppressed more reliably.

[0023] [5] In any of the manufacturing methods of the multilayer substrate described in [1] to [4] above, it is preferable that the first bonding material is an insulating layer containing a semi-cured or uncured curable resin before the fabrication of the first stacked substrate, and it is preferable that the second bonding material is an insulating layer containing a semi-cured or uncured curable resin before the fabrication of the third stacked substrate. In this case, the bonding between the first substrate and the second substrate and the bonding between the first stacked substrate and the second stacked substrate can be performed reliably and easily.

[0024] [6] In the manufacturing method of the multilayer substrate of any one of [1] to [5] above, at least one of the first through-hole, the second through-hole and the first connecting through-hole can be provided at a position in a different planar direction from the other through-holes. In this case, the design freedom of the wiring pattern in each wiring can be improved.

[0025] [7] In any of the manufacturing methods of the multilayer substrate described in [1] to [6] above, the first connecting via can be located in a different planar direction than the first via and the second via. In this case, the design freedom of the wiring patterns in each wiring can be improved.

[0026] [8] The method for manufacturing a multilayer substrate according to any one of [1] to [7] above may further include a step of preparing a fourth bonding body having a fourth bonding material and a fourth connecting through-hole penetrating the fourth bonding material. In the step of manufacturing a third stacked substrate, two third stacked substrates may be manufactured, which are formed by stacking a first stacked substrate and a second stacked substrate with a second bonding material sandwiched between them. Then, a fourth stacked substrate may be further manufactured by stacking two third stacked substrates with a fourth bonding material sandwiched between them. In this case, multilayer substrates with more wiring layers, such as 12 or 16 layers, can be manufactured efficiently.

[0027] [9] The manufacturing method of the multilayer substrate in any one of [1] to [8] above may further include a step of forming an external terminal on the outermost layer of the multilayer substrate. In this case, it is possible to manufacture a multilayer substrate having external terminals.

[0028]

[10] In any of the above [1] to [9] manufacturing methods of multilayer substrates, it is preferable that the multilayer substrate produced is a packaging substrate.

[0029]

[11] The manufacturing method of the multilayer substrate according to any one of [1] to

[10] above may further include a step of inspecting at least one of the first substrate, the second substrate, the third substrate and the fourth substrate before laminating. In this case, defective substrates or substrates with high defect rates are removed and good substrates or substrates with high yield rates are allowed to proceed to the next step, thereby improving the overall yield of the multilayer substrate.

[0030]

[12] In the manufacturing method of the multilayer substrate according to any one of [1] to

[11] above, in the process of preparing the first substrate, a plurality of first substrates are prepared; in the process of preparing the second substrate, a plurality of second substrates are prepared; and in the process of manufacturing the first stacked substrate, a plurality of first stacked substrates are manufactured. Each of the plurality of first substrates and each of the plurality of second substrates can be a large substrate including a plurality of wiring portions. In the inspection process, each wiring portion in each of the plurality of first substrates can be inspected, and each wiring portion in each of the plurality of second substrates can also be inspected. In the process of manufacturing the first stacked substrate, it is preferable to select a combination of each of the plurality of first substrates and each of the plurality of second substrates based on the inspection results in the inspection process. As a result, defective substrates or substrates with high defect rates are removed, and good substrates or substrates with high yield rates are allowed to proceed to the next process, thereby further improving the overall yield of the multilayer substrate.

[0031]

[13] In the manufacturing method of the multilayer substrate described in

[12] above, in the process of manufacturing the first layer of the substrate, the wiring portions that are determined to be good in the inspection process can be selected to overlap each other. In this case, the yield of the multilayer substrate can be further improved.

[0032] Invention Effects

[0033] According to the present invention, the positional misalignment of each wiring can be suppressed while improving the fabrication efficiency of multilayer substrates. Attached Figure Description

[0034] Figure 1 This is a cross-sectional view showing an example of the cross-sectional structure of a packaging substrate (multilayer substrate) according to an embodiment of the present invention.

[0035] Figure 2 (a) and (b) represent Figure 1 A cross-sectional view of the manufacturing method of the packaging substrate shown.

[0036] Figure 3 It means Figure 1 The cross-sectional view shown illustrates the manufacturing method of the packaging substrate. Figure 2 The process performed after the process shown.

[0037] Figure 4 Indicates in Figure 2 Another example of a process performed after the process shown.

[0038] Figure 5 This is a diagram used to illustrate the bonding process that reflects the results of the inspection process.

[0039] Figure 6 This is a diagram used to illustrate the bonding process that reflects the results of the inspection process.

[0040] Figure 7 It is used for explanation Figure 5 and Figure 6 A three-dimensional diagram of the bonding process.

[0041] Figure 8 This diagram illustrates a process where multiple substrates are bonded directly without reflecting the results of the inspection process.

[0042] Figure 9 This diagram illustrates the bonding process following the selection process based on the results of the inspection process when multiple substrates are present. Detailed Implementation

[0043] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description, the same or corresponding parts will be marked with the same reference numerals, and repeated descriptions will be omitted. Furthermore, regarding positional relationships such as up, down, left, and right, unless otherwise specified, the positional relationships shown in the accompanying drawings will be used. Moreover, the scale of the accompanying drawings is not limited to the scale shown in the drawings.

[0044] In this specification, the term "layer," when viewed from above, includes not only the structure of a shape forming the entire surface but also the structure of a shape forming a portion of it. In this specification, the term "process" is not limited to a single process; even if it cannot be clearly distinguished from other processes, it is included in this terminology as long as the desired effect of the process is achieved.

[0045] In this specification, the numerical range indicated by "~" represents the range encompassed by the values ​​recorded before and after "~", which are respectively taken as the minimum and maximum values. Within the numerical ranges described in stages in this specification, the upper or lower limit of the numerical range for a certain process can be replaced by the upper or lower limit of the numerical range for other processes. The upper or lower limit of the numerical range described in this specification can be replaced by the values ​​shown in the embodiments.

[0046] Figure 1 This is a diagram illustrating an example of a packaging substrate manufactured by a manufacturing method according to an embodiment of the present invention. (See diagram for example.) Figure 1As shown, the packaging substrate 1 (multilayer substrate, third stacked substrate) is a substrate having eight wiring layers. The packaging substrate 1 has a first wiring layer 11, a second wiring layer 12, a third wiring layer 13, a fourth wiring layer 14, a fifth wiring layer 15, a sixth wiring layer 16, a seventh wiring layer 17, an eighth wiring layer 18, a first insulating layer 21, a second insulating layer 22, a third insulating layer 23, a fourth insulating layer 24, a fifth insulating layer 25, a sixth insulating layer 26, and a seventh insulating layer 27. Each wiring layer from the first wiring layer 11 to the eighth wiring layer 18 can be formed, for example, by a subtractive or semi-additive method. Other methods may also be used. The first wiring layer 11 to the eighth wiring layer 18 are, for example, formed of a metal such as copper. The thickness of the first wiring layer 11 to the eighth wiring layer 18 is, for example, 5 μm to 35 μm, preferably 9 μm to 25 μm.

[0047] The first insulating layer 21 to the seventh insulating layer 27 are formed, for example, by comprising a curable resin such as a thermosetting resin, and become a cured product of the curable resin in the state of the encapsulation substrate 1. The first insulating layer 21 to the seventh insulating layer 27 may have a structure that includes glass cloth G in the curable resin, or it may have a structure that does not include glass cloth G. The first insulating layer 21 to the seventh insulating layer 27 are, for example, a cured product of prepreg. The first insulating layer 21 to the seventh insulating layer 27 may be formed from a glass substrate. By distributing the first insulating layer 21 to the seventh insulating layer 27 between each of the first wiring layer 11 to the eighth wiring layer 18, the insulation between the wiring layers is ensured. On the other hand, through-holes (micro-vias) penetrating each insulating layer may be provided in the first insulating layer 21 to the seventh insulating layer 27, thereby enabling the required conductivity between the wiring layers. This encapsulation substrate 1 may, for example, be an encapsulation substrate for FC-BGA. In addition, Figure 1 The packaging substrate 1 shown has 8 wiring layers (first wiring layer 11 to eighth wiring layer 18), but is not limited to this. It may also have 6 wiring layers, 12 wiring layers, 16 wiring layers, or 24 wiring layers.

[0048] Next, refer to Figure 2 and Figure 3 The manufacturing method of the packaging substrate 1 will be described. Figure 2 (a) and (b) represent Figure 1 A cross-sectional view of the manufacturing method of the packaging substrate shown. Figure 3 It means Figure 1 The cross-sectional view shown illustrates the manufacturing method of the packaging substrate. Figure 2 The process performed after the process shown. This manufacturing method includes the following processes [A] to [J].

[0049] Step A: The step of preparing a first substrate, wherein the first substrate has a first insulating layer, a first wiring disposed on a first surface of the first insulating layer, a second wiring disposed on a second surface of the first insulating layer, and a first through hole that penetrates the first insulating layer and connects the first wiring and the second wiring to each other.

[0050] Step B: Step of preparing a second substrate, the second substrate having a second insulating layer, a third wiring disposed on a first surface of the second insulating layer, a fourth wiring disposed on a second surface of the second insulating layer, and a second through hole penetrating the second insulating layer and connecting the third wiring and the fourth wiring to each other.

[0051] Step C: The step of preparing a third substrate, wherein the third substrate has a third insulating layer, a fifth wiring disposed on a first surface of the third insulating layer, a sixth wiring disposed on a second surface of the third insulating layer, and a third through-hole that penetrates the third insulating layer and connects the fifth wiring and the sixth wiring to each other.

[0052] Step D: Step of preparing a fourth substrate, the fourth substrate having a fourth insulating layer, a seventh wiring disposed on a first surface of the fourth insulating layer, an eighth wiring disposed on a second surface of the fourth insulating layer, and a fourth through hole penetrating the fourth insulating layer and connecting the seventh wiring and the eighth wiring to each other.

[0053] Step E: The step of preparing a first joint body having a first bonding material and a first connecting through hole through the first bonding material.

[0054] Process F: The process of preparing a third joint having a third bonding material and a third connecting through hole through the third bonding material.

[0055] Process G: The process of preparing a second joint having a second bonding material and a second connecting through hole through the second bonding material.

[0056] Process H: A process of fabricating a first stacked substrate by stacking a first substrate and a second substrate in such a way that a first bonding body is sandwiched between them.

[0057] Process I: A process of fabricating a second stacked substrate by stacking a third substrate and a fourth substrate in such a way that the third bonding body is sandwiched between them.

[0058] Process J: A process of fabricating a multilayer substrate by stacking a first stacked substrate and a second stacked substrate in such a way that a second bonding body is sandwiched between them.

[0059] [Process A]

[0060] In process A, such as Figure 2As shown in (a), a first substrate 30 is prepared. The first substrate 30 has an insulating layer 31 (first insulating layer), a wiring layer 32 (first wiring) disposed on a first surface 31a of the insulating layer 31, a wiring layer 33 (second wiring) disposed on a second surface 31b of the insulating layer 31, and a through hole 34 (first through hole) that penetrates the insulating layer 31 and connects the wiring layer 32 and the wiring layer 33 to each other.

[0061] The insulating layer 31 is composed of a thermosetting resin such as epoxy resin, and is formed, for example, from a prepreg containing glass cloth G. The resin composition constituting the insulating layer 31 may contain phenolic resin compounds, acid anhydride compounds, amine compounds, or hydrazide compounds as curing agents. The insulating layer 31 becomes a cured product formed by curing the prepreg or the like (so-called step C). In the cured state, the insulating layer 31 has a thickness of, for example, 7 μm to 100 μm, preferably 20 μm to 60 μm. Alternatively, the insulating layer 31 can be a glass substrate.

[0062] A wiring layer 32 is formed on the first surface 31a of the insulating layer 31. A wiring layer 33 is formed on the second surface 31b of the insulating layer 31. The wiring layers 32 and 33 are, for example, wires made of metals such as copper, gold, or silver, and can be formed in the insulating layer 31 by a subtractive or semi-additive method. Other methods may also be used. The wiring layers 32 and 33 can be metal plating layers, metal foils such as copper foil, layers formed by vapor deposition such as sputtering, or sintered metal layers. The thickness of the wiring layers 32 and 33 can be, for example, 5 μm to 35 μm. Through-holes 34 can be further formed on the insulating layer 31, penetrating the insulating layer 31 along the stacking direction and connecting the wiring layers 32 and 33 to each other. The through-holes 34 are, for example, formed of a metal such as copper.

[0063] [Process B]

[0064] In step B, a second substrate 40 is prepared. The second substrate 40 has the same structure as the first substrate 30, and includes an insulating layer 41 (second insulating layer), a wiring layer 42 (third wiring) disposed on the first surface 41a of the insulating layer 41, a wiring layer 43 (fourth wiring) disposed on the second surface 41b of the insulating layer 41, and a through-hole 44 (second through-hole) penetrating the insulating layer 41 and connecting the wiring layers 42 and 43 to each other. The materials and forming methods of the insulating layer 41 and the wiring layers 42 and 43 of the second substrate 40 are the same as those of the first substrate 30, therefore detailed descriptions are omitted.

[0065] [Process C]

[0066] In step C, a third substrate 50 is prepared. The third substrate 50 has the same structure as the first substrate 30, and includes an insulating layer 51 (third insulating layer), a wiring layer 52 (fifth wiring) disposed on the first surface 51a of the insulating layer 51, a wiring layer 53 (sixth wiring) disposed on the second surface 51b of the insulating layer 51, and a through-hole 54 (third through-hole) penetrating the insulating layer 51 and connecting the wiring layers 52 and 53 to each other. The materials and forming methods of the insulating layer 51 and the wiring layers 52 and 53 of the third substrate 50 are the same as those of the first substrate 30, therefore detailed descriptions are omitted.

[0067] [Process D]

[0068] In step D, a fourth substrate 60 is prepared. The fourth substrate 60 has the same structure as the first substrate 30, and includes an insulating layer 61 (fourth insulating layer), a wiring layer 62 (seventh wiring) disposed on the first surface 61a of the insulating layer 61, a wiring layer 63 (eighth wiring) disposed on the second surface 61b of the insulating layer 61, and a through-hole 64 (fourth through-hole) penetrating the insulating layer 61 and connecting the wiring layers 62 and 63 to each other. The materials and forming methods of the insulating layer 61 and the wiring layers 62 and 63 of the fourth substrate 60 are the same as those of the first substrate 30, therefore detailed descriptions are omitted.

[0069] [Process E]

[0070] In step E, a bonding body 70 (first bonding body) is prepared. The bonding body 70 has a bonding material 71 (first bonding material) and a connecting through hole 72 (first connecting through hole) penetrating the bonding material 71. The bonding material 71 of the bonding body 70 is a component for bonding the first substrate 10 and the second substrate 20, and is, for example, a material in a semi-cured (step B) or uncured state of a curable resin such as a thermosetting resin, and is composed of a prepreg containing glass cloth G. The bonding material 71 is formed of resin or the like and has insulating properties. A connecting through hole 72 penetrating the bonding material 71 is provided in the bonding material 71. The connecting through hole 72 is formed, for example, of a metal such as copper. The bonding material 71 is preferably composed of the same prepreg as the insulating layers 31, 41, 51, and 61, but since the bonding material 71 is a component used for bonding, it is different in that it is in a semi-cured or uncured state before bonding (before step H described later).

[0071] [Process F]

[0072] In step F, a joint body 80 (third joint body) is prepared. Joint body 80, like joint body 70, has a bonding material 81 (third bonding material) and a connecting through hole 82 (third connecting through hole) penetrating the bonding material 81. The materials and forming methods of the bonding material 81 (insulating layer) and the connecting through hole 82 of joint body 80 are the same as those of joint body 70, therefore detailed descriptions are omitted.

[0073] [Process G]

[0074] In process G, the joint 90 (the second joint) is prepared (see reference). Figure 3 The joint 90, like the joint 70, has a bonding material 91 (second bonding material) and a connecting through hole 92 (second connecting through hole) penetrating the bonding material 91. The materials and forming methods of the bonding material 91 (insulating layer) and the connecting through hole 92 of the joint 90 are the same as those of the joint 70, so detailed descriptions are omitted.

[0075] [Process H]

[0076] In process H, such as Figure 2 As shown in (a) and (b), once the preparation of the first substrate 30, the second substrate 40, and the bonding body 70 is completed, a first laminated substrate 100 is manufactured by stacking the first substrate 30 and the second substrate 40 in such a way that the bonding body 70 is sandwiched between the first substrate 30 and the second substrate 40. That is, the bonding body 70 in a semi-cured or uncured state is sandwiched between the first substrate 30 and the second substrate 40 and acts as an adhesive, thereby bonding the first substrate 30 and the second substrate 40 to form a laminate. Then, the laminate is heated and pressurized to cure the semi-cured or uncured bonding body 70, thereby manufacturing the first laminated substrate 100. The curing temperature is, for example, 100°C to 250°C, and the pressure during pressurization is 0.2 to 10 MPa. In addition, the insulating layers 31 and 41 of the first substrate 30 and the second substrate 40 are cured resins or glass substrates, so even if heating is performed in process H, the wiring layers 32 and 33, wiring layers 42 and 43, and through holes 34 and 44 will not shift from their initial positions.

[0077] [Process I]

[0078] In step I, once the preparation of the third substrate 50, the fourth substrate 60, and the bonding body 80 is complete, the second laminated substrate 110 is fabricated by stacking the third substrate 50 and the fourth substrate 60 with the bonding body 80 sandwiched between them. That is, similar to the first laminated substrate 100, the bonding body 80, in a semi-cured or uncured state, is sandwiched between the third substrate 50 and the fourth substrate 60 as an adhesive, thereby bonding the third substrate 50 and the fourth substrate 60 to form a laminate. Then, the laminate is heated and pressurized to cure the semi-cured or uncured bonding body 80, thereby fabricating the second laminated substrate 110. The temperature and pressure used for curing are the same as those used for fabricating the first laminated substrate 100. Furthermore, since the insulating layers 51 and 61 of the third substrate 50 and the fourth substrate 60 are cured resins or glass substrates, even if heating is performed in process I, the wiring layers 52 and 53, wiring layers 62 and 63, and through holes 54 and 64 will not shift from their initial positions.

[0079] [Process J]

[0080] In process J, such as Figure 3 As shown, once the preparation of the first stacked substrate 100, the second stacked substrate 110, and the bonding body 90 is completed, the encapsulation substrate 1 is fabricated by stacking the first stacked substrate 100 and the second stacked substrate 110 such that the bonding body 90 is sandwiched between the first stacked substrate 100 and the second stacked substrate 110. That is, the bonding body 90 in a semi-cured or uncured state is sandwiched between the first stacked substrate 100 and the second stacked substrate 110 and acts as an adhesive, thereby bonding the first stacked substrate 100 and the second stacked substrate 110 to form a stack. Then, the stack is heated and pressurized to cure the semi-cured or uncured bonding body 90, thereby fabricating the encapsulation substrate 1 (see reference). Figure 1 The temperature and pressure used for curing are the same as those used in the fabrication of the first laminate 100, etc. Furthermore, since each insulating layer of the first laminate 100 and the second laminate 110 is a cured resin or a glass substrate, even if reheated in process J, wiring layers 32, 33, 42, 43, 52, 53, 62, 63, and vias 34, 44, 54, 64 will not shift from their initial positions.

[0081] Thus, stacked substrates with four wiring layers are bonded together to form an eight-layer wiring layer. However, as... Figure 4As shown, a semi-cured or uncured bonding member 90 can be sandwiched between a first stacked substrate 100 having four wiring layers and a third substrate 50 having two wiring layers, acting as an adhesive to bond the first stacked substrate 100 to a second stacked substrate 110A including the third substrate 50, forming a laminate. In this case, the laminate is then heated and pressurized to cure the semi-cured or uncured bonding member 90, enabling the fabrication of a six-layer encapsulation substrate.

[0082] Furthermore, external terminals can be formed on the outermost layer of the multilayer substrate, i.e., the packaging substrate 1, after the first stacked substrate 100 and the second stacked substrate 110 are stacked and cured. This produces a packaging substrate with external terminals. Moreover, semiconductor elements can be mounted on the packaging substrate thus manufactured to produce a semiconductor device.

[0083] In the above-described method for manufacturing a package substrate according to this embodiment, firstly, a first stacked substrate 100 is manufactured by stacking a first substrate 30 and a second substrate 40 such that a bonding member 70 is sandwiched between them, and second stacked substrates 110 and 110A are manufactured by stacking a third substrate 50 and a fourth substrate 60 such that a bonding member 80 is sandwiched between them, or by including the third substrate 50. Then, a package substrate 1 is manufactured by stacking the first stacked substrate 100 and the second stacked substrates 110 and 110A such that a bonding member 90 is sandwiched between them. In this case, the number of stacks can be increased in a multiplicative manner, and therefore the manufacturing period of the package substrate 1 can be shortened compared to the layer-by-layer stacking method. On the other hand, since each stacked board is not composed of multiple substrates, positional misalignment is less likely to occur in each wiring layer. Therefore, according to this method for manufacturing a package substrate, positional misalignment of each wiring layer can be suppressed while improving the manufacturing efficiency of the package substrate, which is a multilayer substrate.

[0084] Furthermore, in the manufacturing method of the packaging substrate according to this embodiment, insulating layers 31, 41, 51, and 61 are preferably insulating layers comprising cured thermosetting resin. In this case, each insulating layer will not melt due to heating in subsequent lamination processes, and positional displacement of each wiring layer is less likely to occur. Therefore, according to this manufacturing method of the packaging substrate, positional displacement in each wiring layer can be suppressed more reliably.

[0085] Furthermore, in the packaging substrate manufacturing method according to this embodiment, insulating layers 31, 41, 51, and 61 can be glass substrates. In this case, each insulating layer will not melt due to heating in subsequent lamination processes, and positional displacement of each wiring layer is less likely to occur. Therefore, according to this packaging substrate manufacturing method, positional displacement in each wiring layer can be suppressed more reliably.

[0086] Furthermore, in the method for manufacturing the encapsulation substrate according to this embodiment, the bonding body 70 preferably contains an insulating layer of semi-cured or uncured thermosetting resin before the fabrication of the first stacked substrate 100. The bonding body 80 preferably contains an insulating layer of semi-cured or uncured thermosetting resin before the fabrication of the second stacked substrate 110. In this case, the bonding of the first substrate 30 and the second substrate 40, and the bonding of the third substrate 50 and the fourth substrate 60 can be reliably and easily performed. Furthermore, the bonding body 90 preferably contains an insulating layer of semi-cured or uncured thermosetting resin before the fabrication of the encapsulation substrate 1. In this case, the bonding of the first stacked substrate 100 and the second stacked substrate 110 can be reliably and easily performed.

[0087] Furthermore, in the manufacturing method of the packaging substrate according to this embodiment, the connecting vias 72 and 82 can be provided at positions in a different planar direction than vias 34, 54 and 44, 64. In this case, the design freedom of the wiring patterns in each wiring layer can be improved.

[0088] In addition, such as Figure 3 As shown, two encapsulation substrates 1, formed by bonding and curing a first stacked substrate 100 and a second stacked substrate 110 with a bonding agent 90, can also be fabricated as a third stacked substrate. An encapsulation substrate (fourth stacked substrate) with 16 wiring layers can be fabricated by stacking and curing the two encapsulation substrates 1 (third stacked substrates) in a manner where another bonding agent (fourth bonding agent) having the same structure as the bonding agent 90 is sandwiched between the two encapsulation substrates 1 (third stacked substrates). This other bonding agent, like the bonding agent 90, has a bonding material (fourth bonding material) and a connecting via (fourth connecting via) penetrating the bonding material. In this fabrication method, encapsulation substrates with more layers, such as 16 layers, can be efficiently fabricated.

[0089] The embodiments of the present invention have been described above, but the present invention is not limited to the embodiments described above, and appropriate modifications can be made without departing from its spirit. For example, in the above-described method for manufacturing a packaging substrate, each substrate is formed into a laminate and bonded as a unit. Therefore, in the method for manufacturing a packaging substrate according to this embodiment, modifications can be made before the laminate is formed (e.g., as shown in the example above). Figure 7 As shown, before the first substrate 30 and the second substrate 40 are stacked, as... Figure 5 and Figure 6 As shown, continuity checks are performed on the wiring portions 30a-30f and 40a-40f included in each substrate. In this case, each substrate is a large substrate including multiple wiring portions, and the continuity check is performed by using a flying probe or the like to check the continuity and insulation of each wiring portion from both sides of the substrate. If, as a result of the continuity check, there are wiring portions that are determined to be defective (Fail), (see reference...) Figure 6By not manufacturing this part or not using this substrate, the overall yield can be improved. Figure 5 This indicates that all wiring components are in good condition (OK). Figure 6 This indicates that a portion of the wiring is defective (Fail). Figure 6 In the example, wiring sections 30c, 40c and 30e, 40e with good (OK) overlaps are used as subsequent products, and since other wiring sections are obviously defective (Fail), subsequent inspections can be omitted.

[0090] Furthermore, in the case of fabricating multiple first substrates 30A, 30B, and 30C and multiple second substrates 40A, 40B, and 40C, such as Figure 8 As shown, each wiring section of multiple first substrates 30A to 30C can be inspected (determined as OK or Fail), and each wiring section of multiple second substrates 40A to 40C can also be inspected (determined as OK or Fail). Furthermore, as... Figure 8 As shown, the corresponding first substrate 30A and second substrate 40A, the corresponding first substrate 30B and second substrate 40B, and the corresponding first substrate 30C and second substrate 40C can also be bonded using each bonding body 70. In this case, for example, the number of overlapping wiring portions of a good product is 7. On the other hand, it is also possible to determine the bonding method based on the inspection results of each wiring portion in the plurality of first substrates 30A to 30C and the inspection results of each wiring portion in the plurality of second substrates 40A to 40C, such as... Figure 9 As shown, further selection processing is performed on the wiring portions that are determined to be good, ensuring they overlap, to bond the first substrate and the second substrate. In this case, for example, as... Figure 9 As shown, the number of overlapping (OK overlap) wiring sections of the good products is 11. This selection process can be selected by using a computer to calculate the yield (product yield) when all the substrates are combined together, or other processing methods can be used.

[0091] Furthermore, the above-described inspection process or product selection process uses the bonding of the first substrate 30 and the second substrate 40 as an example, but it is not limited to this. Of course, it can also be applied to bonding the third substrate 50 and the fourth substrate 60, or bonding the first laminated substrate 100 and the second laminated substrates 110 and 110A. By performing this inspection and selection process, the yield can be reliably improved compared to the case of bonding insulating layers together.

[0092] Furthermore, the above embodiment was described using the case of manufacturing a packaging substrate as an example, but it can of course also be applied to the case of manufacturing other multilayer substrates.

[0093] Symbol Explanation

[0094] 1-Packaging substrate (multilayer substrate, third stacked substrate), 30, 30A~30C-First substrate, 31-Insulating layer (first insulating layer), 32-Wireline layer (first wiring), 33-Wireline layer (second wiring), 34-Through hole (first through hole), 40, 40A~40C-Second substrate, 41-Insulating layer (second insulating layer), 42-Wireline layer (third wiring), 43-Wireline layer (fourth wiring), 44-Through hole (second through hole), 50-Third substrate, 51-Insulating layer (third insulating layer), 52-Wireline layer (fifth wiring), 53-Wireline layer (sixth wiring), 54-Through hole (third through hole), 60-The 4. Substrate, 61-Insulating layer (4th insulating layer), 62-Wiring layer (7th wiring), 63-Wiring layer (8th wiring), 64-Through hole (4th through hole), 70-Joint body (1st joint body), 71-Joint material (1st bonding material), 72-Connecting through hole (1st connecting through hole), 80-Joint body (3rd joint body), 81-Joint material (3rd bonding material), 82-Connecting through hole (3rd connecting through hole), 90-Joint body (2nd joint body), 91-Joint material (2nd bonding material), 92-Connecting through hole (2nd connecting through hole), 100-1st stacked substrate, 110, 110A-2nd stacked substrate.

Claims

1. A method for manufacturing a multilayer substrate, comprising: The process of preparing a first substrate, wherein the first substrate has a first insulating layer, a first wiring disposed on a first surface of the first insulating layer, a second wiring disposed on a second surface of the first insulating layer, and a first through hole that penetrates the first insulating layer and connects the first wiring and the second wiring to each other; The process of preparing a second substrate, wherein the second substrate has a second insulating layer, a third wiring disposed on a first surface of the second insulating layer, a fourth wiring disposed on a second surface of the second insulating layer, and a second through hole that penetrates the second insulating layer and connects the third wiring and the fourth wiring to each other; The process of preparing a third substrate, wherein the third substrate has a third insulating layer, a fifth wiring disposed on a first surface of the third insulating layer, a sixth wiring disposed on a second surface of the third insulating layer, and a third through-hole that penetrates the third insulating layer and connects the fifth wiring and the sixth wiring to each other; The process of preparing a first joint, the first joint having a first bonding material and a first connecting through hole penetrating the first bonding material; The process of preparing a second joint, wherein the second joint has a second bonding material and a second connecting through hole penetrating the second bonding material; The process of fabricating the first stacked substrate involves stacking the first substrate and the second substrate in such a way that the first bonding body is sandwiched between them to fabricate the first stacked substrate. The process of preparing a second-layer substrate, wherein the second-layer substrate includes the third substrate; The process of fabricating the third stacked substrate involves stacking the first stacked substrate and the second stacked substrate in such a way that the second bonding body is sandwiched between them to fabricate the third stacked substrate.

2. The method for manufacturing a multilayer substrate according to claim 1, comprising: The process of preparing a fourth substrate, wherein the fourth substrate has a fourth insulating layer, a seventh wiring disposed on a first surface of the fourth insulating layer, an eighth wiring disposed on a second surface of the fourth insulating layer, and a fourth through-hole penetrating the fourth insulating layer and connecting the seventh wiring and the eighth wiring to each other; and The process of preparing the third joint, wherein the third joint has a third bonding material and a third connecting through hole penetrating the third bonding material. In the process of preparing the second stacked substrate, the second stacked substrate is fabricated by stacking the third substrate and the fourth substrate in such a way that the third bonding body is sandwiched between them.

3. The method for manufacturing a multilayer substrate according to claim 1 or 2, wherein, The first insulating layer, the second insulating layer, the third insulating layer, and the fourth insulating layer are insulating layers containing cured resin.

4. The method for manufacturing a multilayer substrate according to claim 1 or 2, wherein, The first insulating layer, the second insulating layer, the third insulating layer and the fourth insulating layer are glass substrates.

5. The method for manufacturing a multilayer substrate according to any one of claims 1 to 4, wherein, The first bonding material is an insulating layer containing a semi-cured or uncured curable resin prior to the fabrication of the first laminated substrate. The second bonding material is an insulating layer containing a semi-cured or uncured curable resin prior to the fabrication of the third laminated substrate.

6. The method for manufacturing a multilayer substrate according to any one of claims 1 to 5, wherein, At least one of the first through hole, the second through hole, and the first connecting through hole is located in a different planar direction from the other through holes.

7. The method for manufacturing a multilayer substrate according to any one of claims 1 to 6, wherein, The first connecting through hole is located in a different plane direction than the first through hole and the second through hole.

8. The method for manufacturing a multilayer substrate according to any one of claims 1 to 7, further comprising: The process of preparing the fourth joint, the fourth joint having a fourth bonding material and a fourth connecting through hole penetrating the fourth bonding material, In the process of fabricating the third stacked substrate, two third stacked substrates are fabricated, wherein the third stacked substrate is formed by stacking the first stacked substrate and the second stacked substrate in such a way that the second bonding material is sandwiched between them. The fourth stacked substrate is made by stacking two of the third stacked substrates in such a way that the fourth bonding material is sandwiched between them.

9. The method for manufacturing a multilayer substrate according to any one of claims 1 to 8, further comprising the step of forming an external terminal on the outermost layer of the multilayer substrate.

10. The method for manufacturing a multilayer substrate according to any one of claims 1 to 9, wherein, The multilayer substrate is a packaging substrate.

11. The method of manufacturing a multilayer substrate according to any one of claims 1 to 10, further comprising a step of inspecting at least one of the first substrate, the second substrate, the third substrate, and the fourth substrate before laminating them.

12. The method for manufacturing a multilayer substrate according to claim 11, wherein, In the process of preparing the first substrate, multiple first substrates are prepared. In the process of preparing the second substrate, multiple second substrates are prepared. In the process of fabricating the first-layer stacked substrate, multiple first-layer stacked substrates are fabricated. Each of the plurality of first substrates and each of the plurality of second substrates is a large substrate comprising a plurality of wiring portions. In the inspection process, each wiring portion of each of the plurality of first substrates is inspected, and each wiring portion of each of the plurality of second substrates is also inspected. In the process of manufacturing the first laminated substrate, the combination of each substrate of the plurality of first substrates and each substrate of the plurality of second substrates is selected based on the inspection results in the inspection process.

13. The method for manufacturing a multilayer substrate according to claim 12, wherein, In the process of manufacturing the first laminated substrate, the wiring portions that are determined to be good in the inspection process are selected in such a way that they overlap with each other.

14. A semiconductor device comprising: The packaging substrate is manufactured by the manufacturing method of a multilayer substrate according to any one of claims 1 to 13; and Semiconductor components are mounted on the packaging substrate.

Citation Information

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