System and method for testing conduction immunity of integrated circuit

Abstract

The invention discloses an integrated circuit conduction immunity test system and method, and the method comprises the steps: setting a power amplification parameter of a power amplifier through an upper computer, and inputting a test frequency to a radio frequency signal source through the upper computer, so as to enable a radio frequency signal to output a corresponding single-frequency signal as a test signal; using an upper computer to monitor the state of the to-be-tested integrated circuit in real time when the to-be-tested integrated circuit responds to the test signal after power amplification, and recording a target emission coefficient and target test power which are correspondingly obtained when the to-be-tested integrated circuit is in an abnormal state; and calculating to obtain a conduction immunity test result corresponding to the test frequency by using the corrected target reflection coefficient and the target test power. According to the method, the conduction immunity of the integrated circuit can be effectively tested.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuit electronic testing, in particular to an integrated circuit conducted immunity test system and method. BACKGROUND

[0002] Conducted immunity test is an important part of the electromagnetic compatibility detection of semiconductor integrated circuits, which is used to evaluate the stability and reliability of integrated circuits in an external electromagnetic interference environment. The external electromagnetic interference voltage threshold and current threshold that cause the misoperation of the integrated circuit are important parameters for designers to evaluate the immunity of the integrated circuit, and have important reference value for the peripheral circuit design of the integrated circuit, and the on-line impedance of the integrated circuit is one of the necessary inputs to obtain the voltage threshold and current threshold.

[0003] Currently, measuring the misoperation interference voltage threshold and current threshold of the integrated circuit is divided into two-step test, that is, measuring the power threshold of the misoperation of the integrated circuit and measuring the on-line impedance of the integrated circuit, and then calculating the two. The traditional method includes direct power injection method, using impedance analyzer to test impedance, and using vector network analyzer to test impedance.

[0004] The traditional direct power injection method measures the forward injection power of the integrated circuit when it misoperates, that is, the power threshold, but the power meter as a power measuring instrument cannot measure the voltage and current values, so this method cannot directly measure the voltage threshold and current threshold of the integrated circuit when it misoperates, and the on-line impedance of the integrated circuit also needs to be measured to convert the power threshold to the voltage and current threshold.

[0005] The traditional impedance analyzer and vector network analyzer are small signal measurement devices, and their power dynamic range is narrow. For integrated circuits under active working conditions, the circuit working conditions of the power-on state and the power-off state are completely different, and under the power-on state, the circuit working conditions are also different when different power is injected, so the impedance is also different. When the conducted immunity of the integrated circuit is concerned, the on-line impedance measured under different power injection needs to be obtained, at this time the power dynamic range of the traditional impedance measuring instrument cannot meet the measurement requirements. SUMMARY

[0006] The present application provides an integrated circuit conducted immunity test system and method, which aims to realize effective test of the conducted immunity of the integrated circuit.

[0007] In order to achieve the above purpose, the present application provides the following technical solutions:

[0008] An integrated circuit conducted immunity test system, comprising:

[0009] The radio frequency signal source, the power amplifier, the reflection coefficient monitoring module, the host computer and the circuit under test module, wherein the circuit under test module comprises an integrated circuit under test;

[0010] The radio frequency signal source is configured to output a corresponding single frequency signal as a test signal based on a test frequency input by the host computer;

[0011] The power amplifier is configured to perform power amplification on the test signal according to a power amplification parameter input by the host computer;

[0012] The reflection coefficient monitoring module is configured to monitor a transmission coefficient and a test power corresponding to the test signal after power amplification, and send the transmission coefficient and the test power to the host computer; the reflection coefficient is used to describe the degree of reflection of the test signal when propagating from the radio frequency signal source to the integrated circuit under test;

[0013] The host computer is configured to monitor the state of the integrated circuit under test in response to the test signal after power amplification, and record a target transmission coefficient and a target test power corresponding to the integrated circuit under test in an abnormal state;

[0014] The host computer is further configured to calculate a conducted immunity test result corresponding to the test frequency according to the target reflection coefficient and the target test power.

[0015] Optionally, the reflection coefficient monitoring module comprises a bidirectional coupler, a signal processing unit and a lower computer;

[0016] The bidirectional coupler is configured to collect forward signals and reverse signals generated during propagation of the test signal after power amplification;

[0017] The signal processing unit is configured to monitor parameter information of the forward signals and the reverse signals respectively, and convert the parameter information into analog quantities recognizable by the lower computer; the parameter information comprises amplitude, phase and power;

[0018] The lower computer is configured to calculate amplitude difference and phase difference between the forward signals and the reverse signals, and determine the transmission coefficient corresponding to the test signal after power amplification based on the amplitude difference and the phase difference, and determine the test power corresponding to the test signal after power amplification based on the power of the forward signals and the reverse signals respectively;

[0019] The lower computer is further configured to convert the transmission coefficient and the test power into digital signals recognizable by the host computer.

[0020] Optionally, the signal processing unit comprises a power divider, a 90-degree phase shifter and a gain-phase demodulator.

[0021] The power divider is configured to divide the reverse signals collected by the reverse channel in the bidirectional coupler into two paths, and divide the forward signals collected by the forward channel in the bidirectional coupler into two paths.

[0022] The 90-degree phase shifter is configured to change the phase of one of the reverse signals and one of the forward signals.

[0023] The gain-phase demodulator is configured to demodulate the two reverse signals and the two forward signals to obtain the parameter information of the forward signals and the reverse signals, respectively.

[0024] Optionally, the calibration module is further configured to jointly form a calibration system with the radio frequency signal source, the power amplifier, the reflection coefficient monitoring module, and the host computer; the calibration system is configured to determine a system error parameter of the integrated circuit conducted immunity test system; and the system error parameter is configured to correct the target reflection coefficient to improve the accuracy of the conducted immunity test result.

[0025] Optionally, the calibration module includes a specified calibration piece, an open-circuit calibration piece, and a short-circuit calibration piece, and the system error parameter is determined based on a first reflection coefficient, a second reflection coefficient, and a third reflection coefficient; the first reflection coefficient is a reflection coefficient recorded by the host computer when the calibration system uses the specified calibration piece to perform a test, the second reflection coefficient is a reflection coefficient recorded by the host computer when the calibration system uses the open-circuit calibration piece to perform a test, and the third reflection coefficient is a reflection coefficient recorded by the host computer when the calibration system uses the short-circuit calibration piece to perform a test.

[0026] Optionally, the system error parameter includes a directivity error, a source matching error, and a frequency response error; wherein, EDF represents the directivity error, ESF represents the source matching error, ERF represents the frequency response error, represents the first reflection coefficient, represents the second reflection coefficient, represents the third reflection coefficient.

[0027] Optionally, the host computer is further configured to correct the target reflection coefficient using the system error parameter, and calculate the conducted immunity test result using the corrected target reflection coefficient and the target test power; wherein the corrected target reflection coefficient is , , is the target reflection coefficient before correction.

[0028] Optionally, the host computer calculates the conducted immunity test result corresponding to the test frequency according to the target reflection coefficient and the target test power, and the process comprises:

[0029] According to the target reflection coefficient, the corresponding impedance is calculated;

[0030] Based on the impedance and the target test power, the target voltage and the target current of the integrated circuit under test in an abnormal state are calculated;

[0031] Based on the target voltage and the target current, the conducted immunity test result corresponding to the test frequency is generated.

[0032] Optionally, the circuit module under test further comprises a DC blocking capacitor for preventing the test signal from damaging the integrated circuit under test.

[0033] A method for testing the conducted immunity of an integrated circuit, which is suitable for the conducted immunity test system of the integrated circuit, and the method comprises:

[0034] The system error parameters of the conducted immunity test system of the integrated circuit are tested in advance by using a calibration system composed of a calibration module, a radio frequency signal source, a power amplifier, a reflection coefficient monitoring module and a host computer;

[0035] During the test of the integrated circuit under test by using the conducted immunity test system of the integrated circuit, the power amplification parameters of the power amplifier are set by the host computer, and the test frequency is input to the radio frequency signal source by the host computer, so that the radio frequency signal outputs a corresponding single frequency signal as a test signal;

[0036] The state of the integrated circuit under test in response to the test signal after power amplification is monitored in real time by using the host computer, and the target emission coefficient and the target test power corresponding to the abnormal state of the integrated circuit under test are recorded;

[0037] The host computer is controlled to correct the target reflection coefficient by using the system error parameters, and to calculate the conducted immunity test result corresponding to the test frequency by using the corrected target reflection coefficient and the target test power.

[0038] The technical solution provided in this application involves setting the power amplification parameters of a power amplifier via a host computer and inputting a test frequency to an RF signal source, thereby causing the RF signal to output a corresponding single-frequency signal as the test signal. The host computer monitors the state of the integrated circuit under test (ICD) in real time when responding to the amplified test signal and records the target emission coefficient and target test power obtained when the ICD is in an abnormal state. Using the corrected target reflection coefficient and target test power, the conducted immunity test result corresponding to the test frequency is calculated. This application enables effective testing of the conducted immunity of integrated circuits. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 A schematic diagram of the architecture of an integrated circuit conducted immunity test system provided in this application embodiment;

[0041] Figure 2 A schematic diagram of the architecture of another integrated circuit conducted immunity test system provided in this application embodiment;

[0042] Figure 3 A schematic diagram of the architecture of another integrated circuit conducted immunity test system provided in this application embodiment;

[0043] Figure 4 A schematic diagram of the architecture of another integrated circuit conducted immunity test system provided in this application embodiment;

[0044] Figure 5 This is a flowchart illustrating a method for testing the conducted immunity of an integrated circuit, as provided in an embodiment of this application. Detailed Implementation

[0045] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0046] In this application, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. The terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0047] like Figure 1 The diagram shown is an architectural schematic of an integrated circuit conducted immunity test system provided in an embodiment of this application. The integrated circuit conducted immunity test system includes a radio frequency signal source 100, a power amplifier 200, a reflection coefficient monitoring module 300, a host computer 400, and a circuit under test module 500, wherein the circuit under test module 500 includes an integrated circuit under test 501.

[0048] The radio frequency signal source is used to output a corresponding single-frequency signal based on the test frequency input from the host computer, which serves as the test signal.

[0049] The power amplifier is used to amplify the test signal according to the power amplification parameters input from the host computer.

[0050] In some examples, power amplification parameters include, but are not limited to, power step and power dynamic range. The power step is used to control the step size of the signal power amplification for each iteration, and the power dynamic range is the range of power amplification (e.g., 3dB-30dB).

[0051] The reflection coefficient monitoring module is used to monitor the emission coefficient and test power corresponding to the power amplified test signal, and send the emission coefficient and test power to the host computer; the reflection coefficient is used to describe the degree of reflection of the test signal when it propagates from the radio frequency signal source to the integrated circuit under test.

[0052] The host computer is used to monitor the state of the integrated circuit under test when responding to the test signal after power amplification, and to record the target emission coefficient and target test power obtained when the integrated circuit under test is placed in an abnormal state.

[0053] The host computer is also used to calculate the conducted immunity test results corresponding to the test frequency based on the target reflection coefficient and the target test power.

[0054] Optional, see Figure 2The integrated circuit conducted immunity test system shown is a specific implementation architecture, in which the reflection coefficient monitoring module 300 includes a bidirectional coupler 301, a signal processing unit 302, and a lower-level machine 303.

[0055] A bidirectional coupler is used to acquire the forward and reverse signals generated during the propagation of the amplified test signal.

[0056] The signal processing unit is used to monitor the parameter information of the forward and reverse signals and convert the parameter information into analog quantities that can be recognized by the lower-level computer; the parameter information includes amplitude, phase and power.

[0057] The lower-level computer is used to calculate the amplitude difference and phase difference between the forward and reverse signals, and based on the amplitude difference and phase difference, to determine the emission coefficient corresponding to the power-amplified test signal, and based on the power of the forward and reverse signals, to determine the test power corresponding to the power-amplified test signal.

[0058] The lower-level computer is also used to convert the transmission coefficient and test power into digital signals that can be recognized by the upper-level computer.

[0059] Optional, see Figure 3 Another specific implementation architecture of the integrated circuit conducted immunity test system shown includes a signal processing unit 302 comprising a power divider 3021, a 90-degree phase shifter 3022, and a gain-phase demodulator 3023.

[0060] The power divider is used to split the reverse signal acquired by the reverse channel in the bidirectional coupler into two paths, and to split the forward signal acquired by the forward channel in the bidirectional coupler into two paths; the 90-degree phase shifter is used to change the phase of one reverse signal and one forward signal; the gain-phase demodulator is used to demodulate the two reverse signals and two forward signals to obtain the parameter information of the forward and reverse signals respectively.

[0061] In some examples, the signal output of the RF signal source is connected to one end of a power amplifier, the other end of the power amplifier is connected to the input of a bidirectional coupler, and the output of the bidirectional coupler is connected to the circuit under test (DUT) module. The bidirectional coupler also includes a reverse channel and a forward channel. There are two power dividers: one receives the reverse signal generated by splitting the reverse channel into two paths, and the other receives the forward signal generated by splitting the forward channel into two paths. A 90-degree phase shifter is positioned on the path from one reverse signal and one forward signal output to the corresponding gain-phase demodulator. There are two gain-phase demodulators, each receiving one reverse signal and one forward signal, with one of the received reverse and forward signals undergoing a phase change. The input of the lower-level machine is connected to the vectors of the two gain-phase demodulators, receiving the four signals jointly output by the two gain-phase demodulator vectors. The output of the lower-level machine is connected to the upper-level machine.

[0062] In a possible implementation, the lower-level device can be an embedded development board, and the upper-level device can be a PC.

[0063] The so-called forward signal refers to the signal sent to the circuit module under test after the single-frequency signal generated by the radio frequency signal source is amplified by the power amplifier.

[0064] The so-called reverse signal refers to the fact that after the radio frequency signal source sends a single-frequency signal to the circuit module under test, due to the impedance mismatch between the radio frequency signal source and the impedance of the circuit module under test, a part of the signal will be reflected back. This part of the reflected signal is called the reverse signal.

[0065] Optional, see Figure 3 Another specific implementation architecture of the integrated circuit conducted immunity test system shown is provided. The circuit under test module 500 also includes a DC blocking capacitor 502, which is used to prevent the test signal from damaging the integrated circuit under test 501.

[0066] It should be noted that the working principle of the integrated circuit conducted immunity test system shown in this application embodiment is as follows: After the integrated circuit under test is powered on and injected with a single-frequency signal, the single-frequency signal generates a reverse signal due to the impedance mismatch between the impedance of the radio frequency signal source and the impedance of the integrated circuit under test. The corresponding reflection coefficient is calculated by the forward and reverse signals collected in real time by the reflection coefficient monitoring module, and then the corresponding impedance is calculated using the reflection coefficient. The impedance calculation can be found in formula (1). The power of the single-frequency signal is gradually increased by the power amplifier until the integrated circuit under test malfunctions (i.e., the integrated circuit under test malfunctions, such as abnormal output voltage or abnormal output current). The target test power and target reflection coefficient of the integrated circuit under test when it is in an abnormal state are recorded by the host computer, and the target voltage and target current when the integrated circuit under test malfunctions are calculated using the target test power and target reflection coefficient.

[0067] Optionally, the process by which the host computer calculates the conducted immunity test result corresponding to the test frequency based on the target reflection coefficient and the target test power includes: calculating the corresponding impedance based on the target reflection coefficient; calculating the target voltage and target current when the integrated circuit under test is placed in an abnormal state based on the impedance and the target test power; and generating the conducted immunity test result corresponding to the test frequency based on the target voltage and target current.

[0068] (1)

[0069] In formula (1), Represents the target's reflectance coefficient. Represents a forward signal. Z represents the reverse signal, and Z represents the impedance.

[0070] In some examples, both the forward and reverse signals are complex signals, which include real and imaginary parts. This includes the ratio of the real part of the reverse signal to the real part of the forward signal, and the ratio of the imaginary part of the reverse signal to the imaginary part of the forward signal. The ratio of the real part of the reverse signal to the real part of the forward signal can be expressed based on the amplitude difference between the forward and reverse signals, and the ratio of the imaginary part of the reverse signal to the imaginary part of the forward signal can be expressed based on the phase difference between the forward and reverse signals.

[0071] In some examples, the process of calculating the target voltage and target current of the integrated circuit under test when it is placed in an abnormal state based on impedance and target test power can be found in Equation (2).

[0072] (2)

[0073] In formula (2), Represents the target test power. Represents the target voltage. Represents the target current.

[0074] It should be noted that, due to the characteristics of the circuit and the individual components, the integrated circuit conducted immunity test system has systematic errors, which affect the accuracy of the reflection coefficient. Therefore, it is necessary to calibrate the integrated circuit conducted immunity test system to determine the systematic error parameters of the integrated circuit conducted immunity test system, and use the systematic error parameters to correct the target reflection coefficient, thereby improving the accuracy of the target reflection coefficient.

[0075] Optional, see Figure 4 Another specific implementation architecture of the integrated circuit conducted immunity test system shown also includes a calibration module 600 (used to replace the circuit under test module to calibrate the system).

[0076] The calibration module, together with the RF signal source, power amplifier, reflection coefficient monitoring module, and host computer, forms a calibration system. This system determines the systematic error parameters of the integrated circuit conducted immunity test system. These parameters are used to correct the target reflection coefficient, thereby improving the accuracy of the conducted immunity test results.

[0077] Optional, see Figure 4 As shown, the calibration module 600 includes a designated calibrator 601, an open-circuit calibrator 602, and a short-circuit calibrator 603.

[0078] The system error parameters are determined based on the first reflection coefficient, the second reflection coefficient, and the third reflection coefficient; wherein, the first reflection coefficient is the reflection coefficient recorded by the host computer when the calibration system is tested with a specified calibration component, the second reflection coefficient is the reflection coefficient recorded by the host computer when the calibration system is tested with an open-circuit calibration component, and the third reflection coefficient is the reflection coefficient recorded by the host computer when the calibration system is tested with a short-circuit calibration component.

[0079] In some examples, the resistance value provided by the specified calibrator can be set by a technician according to the actual situation, for example, the resistance value can be set to 50 ohms. Open-circuit calibrators are used to provide an open-circuit condition, and short-circuit calibrators are used to provide a short-circuit condition.

[0080] Optionally, system error parameters include EDF (Effective Directionality Factor), ESF (Effective Source Match Factor error), and ERF (Effective Receiving Frequency Response error); among which, , Represents the first reflection coefficient. Represents the second reflection coefficient. This represents the third reflection coefficient.

[0081] Optionally, the host computer can also correct the target reflection coefficient using system error parameters, and calculate the conducted immunity test result using the corrected target reflection coefficient and the target test power; wherein, the corrected target reflection coefficient is... , , This represents the target reflectance coefficient before correction.

[0082] In some examples, after building a calibration system using the calibration module, the RF signal source and power amplifier (which can be set to maintain constant power amplification, such as amplifying a single-frequency signal to a specified power) are enabled. The host computer inputs the test frequency to the RF signal source, causing it to send the corresponding test signal to the calibration module. Then, the designated calibration component in the calibration module is connected to the calibration system, the test begins, and the host computer records the corresponding first reflection coefficient before stopping the test. Next, the open-circuit calibration component in the calibration module is connected to the calibration system, the test begins, and the host computer records the corresponding second reflection coefficient before stopping the test. Finally, the short-circuit calibration component in the calibration module is connected to the calibration system, the test begins, and the host computer records the corresponding third reflection coefficient before stopping the test.

[0083] It should be emphasized that when using the calibration system for testing, the testing order of the first reflection coefficient, the second reflection coefficient, and the third reflection coefficient can be arranged by the technicians, and this embodiment does not impose any restrictions.

[0084] In summary, the integrated circuit conducted immunity test system shown in the embodiments of this application has the following advantages: (1) It can simultaneously measure the online impedance of the integrated circuit under test (i.e., the impedance Z mentioned above). A (1) The voltage threshold (i.e., target voltage) and current threshold (i.e., target current) when the circuit under test malfunctions are calculated in real time on the host computer. (2) Online impedance measurement can be performed under normal power-on working conditions of the integrated circuit under test. The measurement results take into account the influence of the active circuit (i.e., reflection coefficient monitoring module) on the impedance of the integrated circuit under test compared with traditional methods. (3) The dynamic range of the measured power is wide. The measured power can be adjusted by the power amplifier. It can measure the impedance of the integrated circuit under test when it malfunctions due to high power injection, which helps to analyze the anti-interference performance of the integrated circuit under test.

[0085] like Figure 5The diagram shown is a flowchart illustrating an integrated circuit conducted immunity test method provided in an embodiment of this application. This method is applicable to the aforementioned integrated circuit conducted immunity test system and includes the following steps.

[0086] S501: The system error parameters of the integrated circuit conducted immunity test system are obtained by using a calibration system composed of a calibration module, a radio frequency signal source, a power amplifier, a reflection coefficient monitoring module, and a host computer.

[0087] The systematic error parameters include EDF, ESF, and ERF.

[0088] S502: In the process of testing the integrated circuit under test using the integrated circuit conducted immunity test system, the power amplification parameters of the power amplifier are set by the host computer, and the test frequency is input to the radio frequency signal source by the host computer, so that the radio frequency signal outputs the corresponding single frequency signal as the test signal.

[0089] The power amplification parameters and test frequency can be set by the tester according to the actual situation.

[0090] S503: Use a host computer to monitor the status of the test signal after the integrated circuit under test responds to the power amplification in real time, and record the target emission coefficient and target test power obtained when the integrated circuit under test is in an abnormal state.

[0091] The host computer can also be used to display the status of the integrated circuit under test, as well as the corresponding emission coefficient and test power in real time.

[0092] S504: The host computer uses system error parameters to correct the target reflection coefficient, and uses the corrected target reflection coefficient and target test power to calculate the conducted immunity test result corresponding to the test frequency.

[0093] After the host computer obtains the corrected target reflection coefficient, the corresponding impedance Z can be calculated using formula (3). A The conducted immunity test results are then calculated using formula (4). Furthermore, by continuously updating and modifying the test frequency, the conducted immunity test results of the integrated circuit under test at different test frequencies can be obtained.

[0094] (3)

[0095] (4)

[0096] In a possible implementation, the conducted immunity test results at different test frequencies can be calculated and displayed on a host computer.

[0097] The processes shown in S501-S504 above can effectively test the conducted immunity of integrated circuits.

[0098] While several specific implementation details are included in the foregoing discussion, these should not be construed as limiting the scope of this application. Certain features described in the context of individual embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented individually or in any suitable sub-combination in multiple embodiments.

[0099] The above description is merely a preferred embodiment of this application and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of disclosure in this application is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the above-described concept. For example, technical solutions formed by substituting the above features with (but not limited to) technical features with similar functions disclosed in this application.

Claims

1. A system for testing the conducted immunity of integrated circuits, characterized in that, include: The system includes a radio frequency signal source, a power amplifier, a reflection coefficient monitoring module, a host computer, and a circuit under test module; wherein the circuit under test module includes an integrated circuit under test. The radio frequency signal source is used to output a corresponding single-frequency signal as a test signal based on the test frequency input by the host computer. The power amplifier is used to amplify the test signal according to the power amplification parameters input by the host computer; The reflection coefficient monitoring module is used to monitor the transmission coefficient and test power corresponding to the power-amplified test signal, and send the transmission coefficient and the test power to the host computer; the reflection coefficient is used to describe the degree of reflection of the test signal when it propagates from the radio frequency signal source to the integrated circuit under test; The host computer is used to monitor the state of the integrated circuit under test when it responds to the power-amplified test signal, and to record the target emission coefficient and target test power obtained when the integrated circuit under test is in an abnormal state. The host computer is also used to calculate the conducted immunity test result corresponding to the test frequency based on the target reflection coefficient and the target test power.

2. The system according to claim 1, characterized in that, The reflection coefficient monitoring module includes a bidirectional coupler, a signal processing unit, and a lower-level computer; The bidirectional coupler is used to acquire the forward and reverse signals generated during the propagation of the amplified test signal; The signal processing unit is used to monitor the parameter information of the forward signal and the reverse signal respectively, and convert the parameter information into analog quantities that can be recognized by the lower-level machine; the parameter information includes amplitude, phase and power; The lower-level machine is used to calculate the amplitude difference and phase difference between the forward signal and the reverse signal, and based on the amplitude difference and the phase difference, determine the emission coefficient corresponding to the power-amplified test signal, and based on the power of the forward signal and the reverse signal, determine the test power corresponding to the power-amplified test signal. The lower-level computer is also used to convert the emission coefficient and the test power into digital signals that can be recognized by the upper-level computer.

3. The system according to claim 2, characterized in that, The signal processing unit includes a power divider, a 90-degree phase shifter, and a gain-phase demodulator. The power divider is used to split the reverse signal collected by the reverse channel in the bidirectional coupler into two paths, and to split the forward signal collected by the forward channel in the bidirectional coupler into two paths. The 90-degree phase shifter is used to change the phase of one inverted signal and one forward signal; The gain-phase demodulator is used to demodulate two reverse signals and two forward signals to obtain the parameter information of the forward signals and the reverse signals respectively.

4. The system according to claim 1, characterized in that, It also includes a calibration module, wherein the calibration module, together with the radio frequency signal source, the power amplifier, the reflection coefficient monitoring module, and the host computer, forms a calibration system; the calibration system is used to determine the system error parameters of the integrated circuit conducted immunity test system; the system error parameters are used to correct the target reflection coefficient to improve the accuracy of the conducted immunity test results.

5. The system according to claim 4, characterized in that, The calibration module includes a specified calibration component, an open-circuit calibration component, and a short-circuit calibration component. The system error parameters are determined based on a first reflection coefficient, a second reflection coefficient, and a third reflection coefficient. The first reflection coefficient is the reflection coefficient recorded by the host computer when the calibration system performs a test using the specified calibration component. The second reflection coefficient is the reflection coefficient recorded by the host computer when the calibration system performs a test using the open-circuit calibration component. The third reflection coefficient is the reflection coefficient recorded by the host computer when the calibration system performs a test using the short-circuit calibration component.

6. The system according to claim 5, characterized in that, The system error parameters include directional error, source matching error, and frequency response error; wherein... EDF represents the directivity error, ESF represents the source matching error, and ERF represents the frequency response error. Represents the first reflection coefficient. Represents the second reflection coefficient. This represents the third reflection coefficient.

7. The system according to claim 6, characterized in that, The host computer is further configured to correct the target reflection coefficient using the system error parameters, and to calculate the conducted immunity test result using the corrected target reflection coefficient and the target test power; wherein, the corrected target reflection coefficient is... , , This represents the target reflectance coefficient before correction.

8. The system according to claim 1, characterized in that, The process by which the host computer calculates the conducted immunity test result corresponding to the test frequency based on the target reflection coefficient and the target test power includes: Calculate the corresponding impedance based on the target reflection coefficient; Based on the impedance and the target test power, the target voltage and target current when the integrated circuit under test is placed in an abnormal state are calculated; Based on the target voltage and the target current, a conducted immunity test result corresponding to the test frequency is generated.

9. The system according to claim 1, characterized in that, The circuit under test module also includes a DC blocking capacitor, which is used to prevent the test signal from damaging the integrated circuit under test.

10. A method for testing the conducted immunity of integrated circuits, characterized in that, The method, applicable to any of the integrated circuit conducted immunity test systems described in 1-9, comprises: The system error parameters of the integrated circuit conducted immunity test system are obtained by using a calibration system consisting of a calibration module, a radio frequency signal source, a power amplifier, a reflection coefficient monitoring module, and a host computer. During the testing of the integrated circuit under test using the integrated circuit conducted immunity test system, the power amplification parameters of the power amplifier are set by the host computer, and the test frequency is input to the radio frequency signal source by the host computer, so that the radio frequency signal outputs a corresponding single frequency signal as the test signal; The host computer is used to monitor the state of the integrated circuit under test in real time when it responds to the power-amplified test signal, and to record the target emission coefficient and target test power obtained when the integrated circuit under test is in an abnormal state. The host computer is controlled to correct the target reflection coefficient using the system error parameters, and then uses the corrected target reflection coefficient and the target test power to calculate the conducted immunity test result corresponding to the test frequency.

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