Embedded power module

Abstract

The invention relates to an embedded power module, which comprises a substrate, a power device, a power copper layer and a signal copper layer, and is characterized in that the substrate comprises a circuit layer, the circuit layer is provided with an accommodating space, the power device is embedded in the accommodating space, and the power copper layer is pressed on one side, close to the power device, of the substrate; the power copper layer is pressed on the circuit layer and connected with the circuit layer and the power device through the first connecting through holes to form interconnection, the signal copper layer is pressed on the power copper layer and connected with the circuit layer and the power device through the second connecting through holes to form interconnection, and the circuit layer, the power copper layer and the signal copper layer are arranged in a laminated mode in the thickness direction of the substrate. Therefore, loop current positive and negative lamination is realized, loop inductance and stray inductance are reduced, and the performance of the power module is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power electronics, and particularly relates to an embedded power module. BACKGROUND

[0002] At present, in order to improve the power density of a power module, reduce the stray inductance of the power module and improve the reliability of the module, a chip is usually embedded into a core plate after being interconnected with a metal block for PCB plate manufacturing, and a laser copper plating process is used to realize the interconnection between the chips.

[0003] However, the existing power module is usually electrically connected in the form of a binding wire, and is insulated through a pouring process, so that the stray inductance of the existing power module is large, which affects the performance of the power module. SUMMARY

[0004] Therefore, it is necessary to provide an embedded power module with small stray inductance and good performance in view of the above technical problems.

[0005] In a first aspect, the present application provides an embedded power module, comprising:

[0006] A substrate comprising a circuit layer, wherein a receiving space is formed on the circuit layer;

[0007] A power device embedded in the receiving space;

[0008] A power copper layer is pressed on one side of the substrate close to the power device, and the power copper layer is connected to the circuit layer through a first connecting through hole to form interconnection;

[0009] A signal copper layer is pressed above the power copper layer, and the signal copper layer is connected to the circuit layer and the power device through a second connecting through hole to form interconnection.

[0010] In one embodiment, the first connecting through hole comprises a first through hole and a second through hole; and the power copper layer comprises:

[0011] A first copper layer is pressed above the circuit layer, and the first copper layer is connected to the circuit layer and the power device through the first through hole to form interconnection;

[0012] A second copper layer is pressed above the first copper layer and located between the first copper layer and the signal copper layer, and the second copper layer is connected to the circuit layer and the power device through the second through hole to form interconnection.

[0013] In one embodiment, a first recess is formed on the circuit layer;

[0014] The second through hole is connected to the first recess.

[0015] In one embodiment, a surface pad is arranged on a side of the signal copper layer away from the power copper layer.

[0016] In one of the embodiments, the embedded power module further comprises:

[0017] The buffer block is connected with the surface pad to form interconnection.

[0018] In one of the embodiments, the buffer block is connected with the surface pad to form interconnection through conductive glue bonding, welding or sintering.

[0019] In one of the embodiments, the second groove is opened on the circuit layer;

[0020] The second connection through hole connects the second groove.

[0021] In one of the embodiments, the power copper layer, the signal copper layer and the circuit layer are provided with insulating material, and the insulating material comprises FR4 material.

[0022] In one of the embodiments, the substrate further comprises a metal layer and an insulating layer, and the insulating layer is arranged between the metal layer and the circuit layer.

[0023] In one of the embodiments, the insulating layer comprises aluminum oxide or silicon nitride.

[0024] The embedded power module comprises a substrate, a power device, a power copper layer and a signal copper layer. The substrate comprises a circuit layer, and the circuit layer is provided with a receiving space. The power device is embedded in the receiving space. The power copper layer is pressed on one side of the substrate close to the power device. The power copper layer is connected with the circuit layer and the power device through a first connection through hole to form interconnection. The signal copper layer is pressed above the power copper layer. The signal copper layer is connected with the circuit layer and the power device through a second connection through hole to form interconnection. The circuit layer, the power copper layer and the signal copper layer are arranged in a stacking manner in the thickness direction of the substrate. The power copper layer and the signal copper layer are arranged to realize positive and negative stacking of loop current, greatly reduce loop inductance and stray inductance, and improve the performance of the power module. BRIEF DESCRIPTION OF DRAWINGS

[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technical solutions, the drawings needed to be used in the description of the embodiments of the present application or the related technical solutions will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other related drawings can be obtained by those skilled in the art without creative labor.

[0026] Figure 1 It is a structural schematic diagram of the embedded power module in one embodiment;

[0027] Figure 2 It is a structural schematic diagram of the embedded power module in another embodiment;

[0028] Figure 3 Fig. 2 is a top view of a circuit board in an embedded power module in one embodiment;

[0029] Figure 4 Fig. 3 is a schematic diagram of a first step of a process flow corresponding to the embedded power module in one embodiment;

[0030] Figure 5 Fig. 4 is a schematic diagram of a second step of the process flow corresponding to the embedded power module in one embodiment;

[0031] Figure 6 Fig. 5 is a schematic diagram of a third step of the process flow corresponding to the embedded power module in one embodiment;

[0032] Figure 7 Fig. 6 is a schematic diagram of a fourth step of the process flow corresponding to the embedded power module in one embodiment;

[0033] Figure 8 Fig. 7 is a schematic diagram of a fifth step of the process flow corresponding to the embedded power module in one embodiment;

[0034] Figure 9 Fig. 8 is a schematic diagram of a sixth step of the process flow corresponding to the embedded power module in one embodiment;

[0035] Figure 10 Fig. 9 is a connection diagram of the embedded power module in one embodiment. DETAILED DESCRIPTION

[0036] In order to make the purpose, technical scheme and advantages of the present application clearer, the present application will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and should not be used to limit the present application.

[0037] It should be noted that the terms "first", "second", and the like used herein can be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from the second element. The terms "include" and "have" and any variations thereof used herein are intended to cover non-exclusive inclusion. The term "multiple" used herein refers to two or more. The term "and / or" used herein refers to one of the options or any combination of multiple options.

[0038] At present, the existing power module is usually electrically connected in the form of binding wire, and is insulated through the potting process, so that the existing power module has large stray inductance, which affects the performance of the power module, and the process is complex, the cost is high, the development cycle is long, and the customized development is complex. In addition, the existing power module also has the following problems: the power copper layer has no heat dissipation or poor heat dissipation capacity, which limits the current output capacity of the power module; the PCB surface pad copper layer is too thin to be laser welded with thick power terminals, and the overcurrent capacity of the entire power module is limited.

[0039] The embedded power module provided by the embodiment of the present application reduces the thermal resistance of the power module by embedding the power device in the substrate and pressing the power copper layer and the signal copper layer in the substrate, thereby improving the performance of the power module. At the same time, the circuit layer, the power copper layer and the signal copper layer are arranged in the thickness direction of the substrate, so as to realize the positive and negative stacking of the loop current, greatly reduce the loop inductance and stray inductance, and improve the performance of the power module.

[0040] In one exemplary embodiment, as shown in Figure 1 An embedded power module is provided, comprising:

[0041] A substrate 100 comprising a circuit layer 110, wherein the circuit layer 110 is provided with a receiving space;

[0042] A power device 200 embedded in the receiving space;

[0043] A power copper layer 300 pressed on one side of the substrate 100 close to the power device 200, wherein the power copper layer 300 is connected to the circuit layer 110 and the power device 200 through first connecting through holes to form interconnection;

[0044] A signal copper layer 400 pressed above the power copper layer 300, wherein the signal copper layer 400 is connected to the circuit layer 110 and the power device 200 through second connecting through holes to form interconnection.

[0045] Wherein, the specific type of the substrate 100 can be set according to actual conditions, and the metal-clad ceramic substrate is taken as an example for illustration in the embodiment of the present application; the specific type of the power device 200 can be set according to actual conditions, for example: SiC Mosfet, IGBT & FRD or GaN HEMT, which is not limited in the embodiment of the present application; the number of the first connecting through holes and the second connecting through holes can be set according to actual conditions, which is not limited in the embodiment of the present application, and it should be noted that the first connecting through holes and the second connecting through holes can be obtained by laser drilling or other methods, which is not limited in the embodiment of the present application.

[0046] Specifically, as shown in Figure 1As shown, the circuit layer 110 is provided with a receiving space, the size of the receiving space can be set according to actual conditions, as long as it can accommodate the power device 200, the power device 200 is embedded in the receiving space on the circuit layer 110, the power copper layer 300 is laminated with the circuit layer 110 in the thickness direction of the substrate 100 on the side close to the power device 200, and the power copper layer 300 is connected with the circuit layer 110 through a first connecting via to form interconnection, and is connected with the power device 200 through another first connecting via to form interconnection, the signal copper layer 400 is laminated above the power copper layer 300, and the signal copper layer 400 is laminated with the circuit layer 110 and the power copper layer 300 in the thickness direction of the substrate 100, the signal copper layer 400 is connected with the circuit layer 110 through a second connecting via to form interconnection, and is connected with the power device 200 through another second connecting via to form interconnection.

[0047] In the embedded power module, the substrate includes a circuit layer, the circuit layer is provided with a receiving space, the power device is embedded in the receiving space, the power copper layer is laminated with the substrate on the side close to the power device, and the power copper layer is connected with the circuit layer and the power device through a first connecting via to form interconnection, and the signal copper layer is laminated above the power copper layer, and the signal copper layer is connected with the circuit layer and the power device through a second connecting via to form interconnection, the circuit layer, the power copper layer and the signal copper layer are laminated in the thickness direction of the substrate, so as to realize positive and negative lamination of loop current, greatly reduce loop inductance and stray inductance, and improve the performance of the power module.

[0048] In one embodiment, as shown in Figure 2 The first connecting via includes a first via and a second via; the power copper layer 300 includes:

[0049] The first copper layer 310 is laminated above the circuit layer 110, and the first copper layer 310 is connected with the circuit layer 110 through the first via to form interconnection;

[0050] The second copper layer 320 is laminated above the first copper layer 310 and located between the first copper layer 310 and the signal copper layer 400, and the second copper layer 320 is connected with the circuit layer 110 and the power device 200 through the second via to form interconnection.

[0051] The size of the first copper layer 310 and the second copper layer 320 can be set according to actual conditions, which is not limited in the embodiment of the application; the number of the first via and the second via can be set according to actual conditions, which is not limited in the embodiment of the application, and it should be noted that the first via and the second via can be obtained by laser drilling or other methods, which is not limited in the embodiment of the application.

[0052] Specifically, such as Figure 2 As shown, the power copper layer 300 includes a first copper layer 310 and a second copper layer 320. Both the first copper layer 310 and the second copper layer 320 are connected to the metal-clad ceramic substrate (circuit layer 110) through corresponding through holes. The second copper layer 320 is connected to the power device 200 through a second through hole to form an interconnection, which has good heat dissipation capability and can carry a larger current.

[0053] In this embodiment, a first copper layer and a second copper layer are provided. The first copper layer is connected to the circuit layer through a first via to form an interconnect, and the second copper layer is connected to the circuit layer and the power device through a second via to form an interconnect. This uniformly distributes the large current, reduces the current density of a single copper layer, and improves the current carrying capacity of the power module. Furthermore, the circuit layer, the first copper layer, the second copper layer, and the signal copper layer are stacked in the thickness direction of the substrate to achieve positive and negative stacking of the loop current, which greatly reduces the loop inductance and stray inductance and improves the performance of the power module.

[0054] In one embodiment, such as Figure 3 As shown, a first groove 122 is formed on the circuit layer 110;

[0055] The second through hole connects to the first groove 122.

[0056] Specifically, Figure 3 An exemplary top view of the circuit layer 110 is shown, wherein the position and size of the first groove 122 can be set according to the actual situation, as long as the first groove 122 can be connected to the second through hole; wherein, the first groove 122 can be obtained by etching process. In order to avoid electrical short circuit, the first groove 122 is etched in the circuit layer 110 to isolate the electrical connection of this area from other areas, so that the copper of the second copper layer can effectively dissipate heat, reduce the temperature of the copper layer, increase the current carrying capacity of the copper layer, and thus improve the performance of the power module.

[0057] In this embodiment, by providing a first groove on the circuit layer, the second through hole of the second copper layer can be connected to the first groove, thereby achieving interconnection with the circuit layer through the first groove, while providing heat dissipation for the second copper layer and enhancing the current carrying capacity of the power module.

[0058] In one embodiment, a surface pad is provided on the side of the signal copper layer that is relatively far from the power copper layer.

[0059] Specifically, the side of the signal copper layer that is relatively far from the power copper layer is connected to the outside and has surface pads. The surface pads can be used to solder copper busbars, thereby improving the current carrying capacity of the power module.

[0060] In this embodiment, a surface pad is provided on the side of the signal copper layer that is relatively far from the power copper layer, for welding copper busbars to improve the performance of the power module.

[0061] In one embodiment, such as Figure 2 As shown, the embedded power module also includes:

[0062] The buffer block 500 is connected to the surface pads to form an interconnect.

[0063] Specifically, such as Figure 2 As shown, the thickness of the signal copper layer 400 is limited by the PCB process, and the surface pads are relatively thin, typically 1 oz to 3 oz. Due to the limitations of laser welding temperature, thicker copper busbars cannot be welded, which limits the current carrying capacity of the entire power module. To solve this problem, a thick buffer block 500 is used to interconnect with the surface pads of the signal copper layer 400, solving the laser welding temperature problem and enabling the welding of thicker copper busbars, thereby improving the current carrying capacity of the power module.

[0064] In this embodiment, the problem of laser welding of thick copper busbars is solved by laser welding of the buffer block, which improves the current carrying capacity of the power module and thus enhances the performance of the power module.

[0065] In one embodiment, the buffer block is interconnected with the surface pads by means of conductive adhesive bonding, welding or sintering.

[0066] Specifically, the cache block can be interconnected with surface pads through interconnect materials. The interconnection methods include, but are not limited to, conductive adhesive bonding, welding, and sintering, which are not limited in the embodiments of this application.

[0067] In one embodiment, such as Figure 3 As shown, a second groove 124 is provided on the circuit layer 110;

[0068] The second connecting through hole connects to the second groove 124.

[0069] Specifically, Figure 3 An exemplary top view of the circuit layer 110 is shown, wherein the position and size of the second groove 124 can be set according to the actual situation, as long as the second groove 124 can connect with the second connection via; wherein, the second groove 124 can be obtained by etching process. In order to avoid electrical short circuit, the second groove 124 is etched in the circuit layer 110 to isolate the electrical connection of this area from other areas, so that the copper of the signal copper layer 400 can be effectively dissipated, reducing the copper layer temperature, increasing the copper layer current carrying capacity, and thus improving the performance of the power module.

[0070] In this embodiment, by providing a second groove on the circuit layer, the second connection via of the signal copper layer can be connected to the second groove, thereby achieving interconnection with the circuit layer and providing heat dissipation for the signal copper layer, thus enhancing the current carrying capacity of the power module.

[0071] In one embodiment, an insulating material, including FR4 material, is disposed between the power copper layer, the signal copper layer, and the line layer.

[0072] Specifically, the embedded power module body can be made of FR4 material to insulate the circuit board, the first copper layer, the second copper layer and the signal copper layer.

[0073] In one embodiment, the substrate further includes a metal layer and an insulating layer, the insulating layer being disposed between the metal layer and the circuit layer.

[0074] Specifically, the metal layer, insulating layer and circuit layer in the substrate are designed in a stacked manner.

[0075] In one embodiment, the insulating layer comprises aluminum oxide or silicon nitride.

[0076] Specifically, the insulating layer may be made of materials including but not limited to aluminum oxide or silicon nitride. It is understood that the insulating layer may also be made of other materials, as long as they have insulating properties.

[0077] For example, taking a metal-clad ceramic substrate as an example, the process flow of the embedded power module is mainly as follows: First step: First, the grooves (accommodating spaces) on the metal-clad ceramic substrate are etched according to the design (set according to the actual situation), such as... Figure 4 As shown, a receiving space is formed on the circuit layer 3 of the metal-clad ceramic substrate, wherein, Figure 4 The 1 in the figure represents the metal layer on the metal-clad ceramic substrate. Figure 4 In the diagram, 2 represents the insulating layer of the metal-clad ceramic substrate. It should be noted that the circuit layer 3 of the metal-clad ceramic substrate may also have a first groove and a second groove formed thereon. Figure 4 Not shown in the image.

[0078] Subsequently, as Figure 5 As shown, the second step is to sinter or solder the chip (power device) 4 into the groove of the circuit layer 3 of the metal-clad ceramic substrate; the third step is to laminate the circuit layer 3 and the first copper layer 6 of the metal-clad ceramic substrate together using a PP board made of FR4 material, and use laser etching to create the connection hole 5 (first through hole) and plate copper in the connection hole 5 to form an electrical connection. The first copper layer 6 is then etched to retain the required traces, such as... Figure 6 As shown.

[0079] Fourth step: Figure 7As shown, the second copper layer 8 is then laminated. After laminating the second copper layer 8 using FR4 material, a connecting hole 7 (second through hole) is created using a laser engraving process, and copper is plated inside the connecting hole 7 to form an electrical connection. The second copper layer 8 is then etched to retain the required traces. Fifth step: Subsequently, the signal copper layer 10 is laminated. After laminating the signal copper layer 10 using FR4 material, a connecting hole 9 (second connecting through hole) is created using a laser engraving process, and copper is plated inside the connecting hole 9 to form an electrical connection. The signal copper layer 10 is then etched to retain the required traces, such as... Figure 8 As shown.

[0080] Finally, the sixth step: Figure 9 As shown, the laser-welded buffer block 14 is interconnected with the surface pads of the signal copper layer 10 via interconnect material. This application uses copper foil to achieve positive and negative stacking of the loop current, greatly reducing the loop inductance. Simultaneously, due to the use of a lamination process for insulation between different layers, the overall process of the power module is simplified, and its cost is significantly reduced. Furthermore, customization only requires changing the chip layout, greatly simplifying the overall prototyping process.

[0081] To facilitate understanding by those skilled in the art, the embedded power module will be described below with reference to a specific example, such as... Figure 10 As shown, the example uses a metal-clad ceramic substrate as the substrate and a power chip as the power device:

[0082] The insulating layer 2 of the metal-clad ceramic substrate is disposed between the metal layer 1 and the circuit layer 3 of the metal-clad ceramic substrate. The material of the insulating layer 2 of the metal-clad ceramic substrate can be alumina or silicon nitride. Rectangular grooves (accommodating spaces) for placing the power chip 4 are etched in the circuit layer 3 of the metal-clad ceramic substrate. The power chip 4 can also be a SiC MOSFET, IGBT & FRD, or GaN Hemt. It should be noted that a first groove and a second groove can also be formed on the circuit layer 3 of the metal-clad ceramic substrate. Figure 10 Not shown in the image.

[0083] The first copper layer 6 is interconnected with the circuit layer 3 of the metal-ceramic substrate through a connecting hole 5 (a first through hole). The second copper layer 8 is connected to the upper surface of the power chip 4 and the circuit layer 3 of the metal-ceramic substrate through connecting holes 7 (a second through hole) and 11 (another second through hole), respectively. A surface pad is provided on the side of the signal copper layer 10 that is relatively far from the second copper layer 8. The signal copper layer 10 is connected to the gate of the power chip 4 and the circuit layer 3 of the metal-ceramic substrate through connecting holes 9 (a second connecting through hole) and 12 (another second connecting through hole). The laser welding buffer block 14 is interconnected with the surface pad of the signal copper layer 10 through an interconnecting material 13, the interconnection method including but not limited to conductive adhesive bonding, welding, and sintering. FR4 material 15 is used to provide insulation between the circuit layer 3 and the first copper layer 6, between the first copper layer 6 and the second copper layer 8, and between the second copper layer 8 and the signal copper layer 10 of the metal-clad ceramic substrate. FR4 material 15 can also be disposed around the metal layer 1 of the metal-clad ceramic substrate and the circuit layer 3 of the metal-clad ceramic substrate.

[0084] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of the relevant data must comply with relevant regulations.

[0085] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0086] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. An embedded power module, characterized by The embedded power module comprises: a substrate comprising a circuit layer, wherein a receiving space is formed on the circuit layer; a power device embedded in the receiving space; a power copper layer laminated on one side of the substrate close to the power device, wherein the power copper layer is connected to the circuit layer and the power device through first connection vias to form interconnection; a signal copper layer laminated above the power copper layer, wherein the signal copper layer is connected to the circuit layer and the power device through second connection vias to form interconnection.

2. The embedded power module of claim 1, wherein, The first connection vias comprise first vias and second vias; the power copper layer comprises: a first copper layer laminated above the circuit layer, wherein the first copper layer is connected to the circuit layer through the first vias to form interconnection; a second copper layer laminated above the first copper layer, wherein the second copper layer is located between the first copper layer and the signal copper layer, and the second copper layer is connected to the circuit layer and the power device through the second vias to form interconnection.

3. The embedded power module of claim 2, wherein, A first recess is formed on the circuit layer; The second vias are connected to the first recess.

4. The embedded power module of claim 1, wherein, A surface pad is arranged on a side of the signal copper layer away from the power copper layer.

5. The embedded power module of claim 4, wherein, The embedded power module further comprises: a buffer block connected to the surface pad to form interconnection.

6. The embedded power module of claim 5, wherein, The buffer block is connected to the surface pad to form interconnection by means of conductive adhesive bonding, welding or sintering.

7. The embedded power module of claim 1, wherein, A second recess is formed on the circuit layer; The second connection vias are connected to the second recess.

8. The embedded power module of claim 1, wherein, An insulating material is arranged between the power copper layer, the signal copper layer and the circuit layer, wherein the insulating material comprises FR4 material.

9. The embedded power module of claim 1, wherein, The substrate further comprises a metal layer and an insulating layer, wherein the insulating layer is arranged between the metal layer and the circuit layer.

10. The embedded power module of claim 9, wherein, The insulating layer comprises aluminum oxide or silicon nitride.

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