Current detection circuit and current detection method for high-voltage power supply
By designing the sampling tube loop module and mirror module in the high-voltage power supply current detection circuit and using blanking signal control, the problem of missing detection current during the dead time stage was solved, and the system's self-regulation and stability were improved.
Patent Information
- Application Number
- CN202511604814.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-05
- Publication Date
- 2026-01-20
- Estimated Expiration
- 2045-11-05
AI Technical Summary
In high-voltage power supplies, when using sampling tubes for current detection, the dead time phase will result in a lack of detected current, affecting the system's self-regulation.
A current detection circuit for a high-voltage power supply was designed, including a sampling tube loop module, a mirror module, a sample-and-hold module, a charge injection elimination module, and an output module. By controlling the high and low level switching of the blanking signal, the detection current can still be output during the dead time stage, and a smooth detection current is generated by using slope compensation.
This ensures that the detection current is not lost during the dead time phase, enabling the system to self-regulate and improving its stability and efficiency.
Smart Images
Figure CN121049565B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of circuit technology, and in particular to a current detection circuit and current detection method for a high-voltage power supply. Background Technology
[0002] In high-voltage power supplies (such as server power supplies), current sensing is a crucial function for ensuring the safe and stable operation of the system. By monitoring the load current in real time, overloads and short circuits can be accurately identified, triggering protection circuits in a timely manner to prevent system overheating and damage. Furthermore, current data is frequently used in loop control of high-voltage power supplies. Current data also reflects the current distribution within the system, which, combined with power management algorithms, helps optimize module power supply efficiency and reduce overall system energy consumption. In addition, current data can be used for fault early warning and diagnosis, ensuring continuous and reliable power supply under complex operating conditions, extending equipment lifespan, and meeting the stringent high availability and energy efficiency requirements of data centers.
[0003] The most common current sensing method is to connect a sensing resistor R in series in the current path of the main power transistor. SNS ,like Figure 1 As shown. However, in order to ensure the stability of the sampling current, the sensing resistor R... SNS The resistance value is usually large, which leads to the detection resistor R SNS The power loss is relatively large, which affects the overall efficiency of the system.
[0004] To address the additional power loss caused by the sampling resistor, another current sensing method employs current sensing technology based on a sampling tube, such as... Figure 2 As shown. Since the current flowing through the sampling transistor is only one-thousandth of that of the main power transistor, the current sampling loss of this method is negligible compared to the sampling current. However, in a half-bridge structure, there is a dead time (both power transistors are off) between the turn-on of the upper power transistor and the turn-off of the lower power transistor to prevent the upper and lower power transistors from conducting simultaneously and damaging the circuit. During the dead time, the detection current of this current detection method will be missing (the sampling current is zero), which is detrimental to the system's self-regulation. Summary of the Invention
[0005] This application provides a current detection circuit and method for a high-voltage power supply, which addresses the problem that when using a sampling tube for current detection, the detected current is lost during the dead time phase, hindering the system's self-regulation. The technical solution is as follows:
[0006] According to a first aspect of the present application, a current detection circuit of a high-voltage power supply is provided, which comprises, in sequence, a sampling tube loop module, a mirror module, a sample-and-hold module, a charge injection elimination module and an output module, and the sampling tube loop module is connected with power tubes in the high-voltage power supply, and the power tubes comprise upper power tubes and lower power tubes;
[0007] In a positive and negative current sampling phase of the high-voltage power supply, the sampling tube loop module is configured to output positive and negative currents sampled from the power tubes to the mirror module; the mirror module is configured to convert mirror currents of the positive and negative currents into mirror voltages, and output the mirror voltages to the sample-and-hold module; the sample-and-hold module comprises at least a sampling switch and a sampling capacitor, and the sample-and-hold module is configured to close the sampling switch under control of a high-level blanking signal, so as to store mirror charges corresponding to the mirror voltages into the sampling capacitor; the charge injection elimination module comprises at least a virtual switch, and the charge injection elimination module is configured to open the virtual switch under control of an inverse signal of the blanking signal, so as to eliminate, through the virtual switch, an injection charge effect of the sampling switch during a closing action, and output, after converting the mirror charges into detection currents, to the output module; and the output module is configured to calibrate a current gain of the detection currents, and output, after correcting the detection currents according to the current gain, to the output module.
[0008] In a dead time phase of the high-voltage power supply, the sample-and-hold module is configured to open the sampling switch under control of a low-level blanking signal, so as to output mirror charges in the sampling capacitor to the charge injection elimination module; the charge injection elimination module is configured to close the virtual switch under control of an inverse signal of the blanking signal, so as to eliminate, through the virtual switch, an injection charge effect of the sampling switch during an opening action, and output, after converting the mirror charges into detection currents, to the output module; and the output module is configured to calibrate a current gain of the detection currents, and output, after correcting the detection currents according to the current gain, to the output module.
[0009] In a dead time phase of the high-voltage power supply, the sample-and-hold module is configured to open the sampling switch under control of a low-level blanking signal, so as to output mirror charges in the sampling capacitor to the charge injection elimination module; the charge injection elimination module is configured to close the virtual switch under control of an inverse signal of the blanking signal, so as to eliminate, through the virtual switch, an injection charge effect of the sampling switch during an opening action, and output, after converting the mirror charges into detection currents, to the output module; and the output module is configured to calibrate a current gain of the detection currents, and output, after correcting the detection currents according to the current gain, to the output module.
[0010] In a possible implementation, the sampling tube loop module comprises a first upper sampling tube loop, a first lower sampling tube loop, a second upper sampling tube loop and a second lower sampling tube loop.
[0011] The first upper sampling tube loop is configured to output, in a negative current sampling phase, negative currents sampled from the upper power tubes to the mirror module.
[0012] The first down-sampling tube loop is configured to output the negative current sampled from the lower power tube to the mirror module in the negative current sampling stage.
[0013] The second up-sampling tube loop is configured to output the positive current sampled from the upper power tube to the mirror module in the positive current sampling stage.
[0014] The second down-sampling tube loop is configured to output the positive current sampled from the lower power tube to the mirror module in the positive current sampling stage.
[0015] In a possible implementation, the mirror module comprises a first mirror circuit and a second mirror circuit.
[0016] The first mirror circuit is configured to convert the mirror current of the negative current into a mirror voltage in the negative current sampling stage, and output the mirror voltage to the sampling and holding module.
[0017] The second mirror circuit is configured to convert the mirror current of the positive current into a mirror voltage in the positive current sampling stage, and output the mirror voltage to the sampling and holding module.
[0018] In a possible implementation, the first mirror circuit comprises a first switch tube, a second switch tube and a third switch tube.
[0019] The gate of the first switch tube is configured as a first input end of the mirror module, the source of the first switch tube is connected with a bootstrap voltage, the drain of the first switch tube is connected with the source of the second switch tube, the gate of the second switch tube is connected with a switch node voltage, the drain of the second switch tube is connected with the gate and the drain of the third switch tube, and the source of the third switch tube is grounded.
[0020] In a possible implementation, the second mirror circuit comprises a fourth switch tube, a fifth switch tube and a sixth switch tube.
[0021] The gate of the fourth switch tube is configured as a second input end of the mirror module, the source of the fourth switch tube is connected with a bootstrap voltage, the drain of the fourth switch tube is connected with the source of the fifth switch tube, the gate of the fifth switch tube is connected with a switch node voltage, the drain of the fifth switch tube is connected with the gate and the drain of the sixth switch tube, and the source of the sixth switch tube is grounded.
[0022] In a possible implementation, the output module comprises a first output circuit and a second output circuit.
[0023] The first output circuit is configured to calibrate a current gain of the detection current in a negative current sampling phase, and output after correction of the detection current according to the current gain.
[0024] The second output circuit is configured to calibrate a current gain of the detection current in a positive current sampling phase or a dead time phase, and output after correction of the detection current according to the current gain.
[0025] In a possible implementation, the first output circuit includes a negative current trimming circuit, a seventh switch tube, an eighth switch tube, and a sampling resistor.
[0026] The input end of the negative current trimming circuit is connected to the gate of the seventh switch tube, and then serves as a first input end of the output module; the output end of the negative current trimming circuit, the drain of the seventh switch tube, the drain of the eighth switch tube, and the first end of the sampling resistor are connected, and then serve as an output end of the output module; the source of the eighth switch tube is connected to a power supply voltage; the gate of the eighth switch tube is connected to the input end of a positive current trimming circuit in the second output circuit; the source of the seventh switch tube and the first end of a reference voltage are grounded; and the second end of the reference voltage is connected to the second end of the sampling resistor.
[0027] In a possible implementation, the second output circuit includes a positive current trimming circuit, a seventh switch tube, an eighth switch tube, a ninth switch tube, a tenth switch tube, and a sampling resistor.
[0028] The gate of the ninth switch tube serves as a second input end of the output module; the drain of the ninth switch tube, the drain and gate of the tenth switch tube, the input end of the positive current trimming circuit, and the gate of the eighth switch tube are connected; the source of the tenth switch tube and the source of the eighth switch tube are connected to a power supply voltage; the output end of the positive current trimming circuit, the drain of the eighth switch tube, the first end of the sampling resistor, and the drain of the seventh switch tube are connected, and then serve as an output end of the output module; the gate of the seventh switch tube is connected to the input end of the negative current trimming circuit in the first output circuit; the source of the seventh switch tube, the first end of a reference voltage, and the source of the ninth switch tube are grounded; and the second end of the reference voltage is connected to the second end of the sampling resistor.
[0029] In a possible implementation, the sample-and-hold module includes a first sample-and-hold circuit and a second sample-and-hold circuit, and the charge injection elimination module includes a first charge injection elimination circuit and a second charge injection elimination circuit.
[0030] In the negative current sampling stage, the first sample-and-hold circuit is configured to close the sampling switch under the control of a high level of the blanking signal, so as to store the mirror charge corresponding to the mirror voltage into the sampling capacitor; and the first charge injection cancellation circuit is configured to open the dummy switch under the control of the inverse signal of the blanking signal, so as to cancel the injection charge effect of the sampling switch during the closing action through the dummy switch, and output the mirror charge converted into a detection current to the output module.
[0031] In the positive current sampling stage, the second sample-and-hold circuit is configured to close the sampling switch under the control of a high level of the blanking signal, so as to store the mirror charge corresponding to the mirror voltage into the sampling capacitor; and the second charge injection cancellation circuit is configured to open the dummy switch under the control of the inverse signal of the blanking signal, so as to cancel the injection charge effect of the sampling switch during the closing action through the dummy switch, and output the mirror charge converted into a detection current to the output module.
[0032] According to a second aspect of the present application, a current detection method of a high-voltage power supply is provided, which is used in the current detection circuit as described above, and the method comprises:
[0033] In the positive and negative current sampling stage of the high-voltage power supply, the sampling tube loop module outputs the positive and negative currents sampled from the power tube to the mirror module; the mirror module converts the mirror currents of the positive and negative currents into mirror voltages, and outputs the mirror voltages to the sample-and-hold module; the sample-and-hold module closes the sampling switch under the control of a high level of the blanking signal, so as to store the mirror charge corresponding to the mirror voltage into the sampling capacitor; the charge injection cancellation module opens the dummy switch under the control of the inverse signal of the blanking signal, so as to cancel the injection charge effect of the sampling switch during the closing action through the dummy switch, and output the mirror charge converted into a detection current to the output module; and the output module calibrates the current gain of the detection current, and outputs the detection current after correction according to the current gain.
[0034] In the dead time stage of the high-voltage power supply, the sample-and-hold module opens the sampling switch under the control of a low level of the blanking signal, so as to output the mirror charge in the sampling capacitor to the charge injection cancellation module; the charge injection cancellation module closes the dummy switch under the control of the inverse signal of the blanking signal, so as to cancel the injection charge effect of the sampling switch during the opening action through the dummy switch, and output the mirror charge converted into a detection current to the output module; and the output module calibrates the current gain of the detection current, and outputs the detection current after correction according to the current gain.
[0035] wherein the high level duration of the blanking signal is equal to the sum of the dead time and the setup time of the sampling tube loop module.
[0036] The technical scheme provided by the application has at least the following beneficial effects:
[0037] In the positive and negative current sampling stage, the sampling switch is closed under the control of the high level blanking signal, so as to store the mirror charge corresponding to the power tube into the sampling capacitor, and the dummy switch is opened under the control of the inverse signal of the blanking signal, so as to eliminate the influence of the injection charge of the sampling switch during the closing action through the dummy switch; in the dead time stage, the sampling switch is opened under the control of the low level blanking signal, so as to output the mirror charge in the sampling capacitor, and the dummy switch is closed under the control of the inverse signal of the blanking signal, so as to eliminate the influence of the injection charge of the sampling switch during the opening action through the dummy switch, and then output the mirror charge after being converted into a detection current, and the high level duration of the blanking signal is equal to the sum of the dead time and the setup time of the sampling tube loop module, so that the current detection circuit with slope compensation can generate smooth detection current in the switching (high dv / dt) conversion stage of the power tube, avoid missing the detection current in the dead time stage, and facilitate self-regulation of the system. BRIEF DESCRIPTION OF DRAWINGS
[0038] In order to more clearly illustrate the technical scheme in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.
[0039] Figure 1 is a circuit diagram of a current detection circuit in the related art;
[0040] Figure 2 is a circuit diagram of another current detection circuit in the related art;
[0041] Figure 3 is a circuit diagram of a current detection circuit of a high-voltage power supply provided by an embodiment of the present application;
[0042] Figure 4 is a circuit diagram of a current detection circuit in the negative current sampling stage provided by an embodiment of the present application;
[0043] Figure 5 is a circuit diagram of a current detection circuit in the positive current sampling stage provided by an embodiment of the present application;
[0044] Figure 6is a dead time phase provided by an embodiment of the present application, a circuit diagram of a current detection circuit;
[0045] Figure 7 is a flow chart of a current detection method of a high voltage power supply provided by an embodiment of the present application. DETAILED DESCRIPTION
[0046] To make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the embodiments of the present application will be further described in detail below with reference to the drawings.
[0047] As shown in Figure 3 , it shows a structure block diagram of a current detection circuit of a high voltage power supply provided by an embodiment of the present application. The current detection circuit of the high voltage power supply can include sampling tube loop modules, mirror modules, sample-and-hold modules, charge injection elimination modules and output modules connected in sequence, and the sampling tube loop modules are connected with power tubes in the high voltage power supply respectively, and the power tubes include upper power tubes and lower power tubes.
[0048] In the embodiment, the current flowing from the switch node voltage V SW to the input voltage V IN is called negative direction current, the current flowing from the input voltage V IN to the switch node voltage V SW is called positive direction current, and the current detection is divided into three phases, which are positive direction current sampling phase, negative direction current sampling phase and dead time phase.
[0049] In the negative direction current sampling phase, the sampling tube loop modules are used to output the negative direction current sampled from the power tubes to the mirror modules; the mirror modules are used to convert the mirror current of the negative direction current into mirror voltage, and output the mirror voltage to the sample-and-hold modules; the sample-and-hold modules at least include sampling switches and sampling capacitors, and the sample-and-hold modules are used to close the sampling switches under the control of the high level blanking signal, so as to store the mirror charge corresponding to the mirror voltage into the sampling capacitors; the charge injection elimination modules at least include virtual switches, and the charge injection elimination modules are used to open the virtual switches under the control of the inverse signal of the blanking signal, so as to convert the mirror charge into detection current after the injection charge influence of the closing action of the virtual switches sampling switches, and output to the output modules; the output modules are used to calibrate the current gain of the detection current, and output after correcting the detection current according to the current gain.
[0050] In the forward current sampling stage, the sampling tube loop module is configured to output the sampled forward current from the power tube to the mirror module; the mirror module is configured to convert the mirror current of the forward current into a mirror voltage and output the mirror voltage to the sample-and-hold module; the sample-and-hold module at least includes a sampling switch and a sampling capacitor, and the sample-and-hold module is configured to close the sampling switch under the control of the high-level blanking signal so as to store the mirror charge corresponding to the mirror voltage into the sampling capacitor; the charge injection elimination module at least includes a virtual switch, and the charge injection elimination module is configured to open the virtual switch under the control of the inverse signal of the blanking signal so as to eliminate the injection charge effect of the sampling switch during the closing action through the virtual switch, and convert the mirror charge into a detection current and then output to the output module; the output module is configured to calibrate the current gain of the detection current and then output the detection current after correction according to the current gain.
[0051] In the dead time stage, the sample-and-hold module is configured to open the sampling switch under the control of the low-level blanking signal so as to output the mirror charge in the sampling capacitor to the charge injection elimination module; the charge injection elimination module is configured to close the virtual switch under the control of the inverse signal of the blanking signal so as to eliminate the injection charge effect of the sampling switch during the opening action through the virtual switch, and convert the mirror charge into a detection current and then output to the output module; the output module is configured to calibrate the current gain of the detection current and then output the detection current after correction according to the current gain;
[0052] In the dead time stage, the sample-and-hold module is configured to open the sampling switch under the control of the low-level blanking signal so as to output the mirror charge in the sampling capacitor to the charge injection elimination module; the charge injection elimination module is configured to close the virtual switch under the control of the inverse signal of the blanking signal so as to eliminate the injection charge effect of the sampling switch during the opening action through the virtual switch, and convert the mirror charge into a detection current and then output to the output module; the output module is configured to calibrate the current gain of the detection current and then output the detection current after correction according to the current gain;
[0053] In the embodiment, the sampling tube loop module includes a first upper sampling tube loop, a first lower sampling tube loop, a second upper sampling tube loop and a second lower sampling tube loop, the mirror module includes a first mirror circuit and a second mirror circuit, the sample-and-hold module includes a first sample-and-hold circuit and a second sample-and-hold circuit, the charge injection elimination module includes a first charge injection elimination circuit and a second charge injection elimination circuit, and the output module includes a first output circuit and a second output circuit. In different stages, different circuits in each module can be selected to form a current detection circuit.
[0054] (1) In the negative current sampling stage, the first upper sampling tube loop, the first lower sampling tube loop, the first mirror circuit, the first sample-and-hold circuit, the first charge injection elimination circuit and the first output circuit are combined to form a current detection circuit. The first upper sampling tube loop is the sampling tube loop MT on the right side of FIG. 1, Figure 3 the first lower sampling tube loop is the sampling tube loop MB on the right side of FIG. 1. Figure 3
[0055] The first up-sampling tube loop is configured to output the negative current sampled from the upper power tube to the mirror module during the negative current sampling stage; and the first down-sampling tube loop is configured to output the negative current sampled from the lower power tube to the mirror module during the negative current sampling stage.
[0056] The first mirror circuit is configured to convert the mirror current of the negative current into a mirror voltage during the negative current sampling stage, and output the mirror voltage to the sampling and holding module.
[0057] As shown in Figure 4 , the first mirror circuit comprises a first switch tube M SM3 , a second switch tube M HV6 and a third switch tube M LV6 ; a gate of the first switch tube M SM3 serves as a first input terminal of the mirror module, and is connected with the first up-sampling tube loop and the first down-sampling tube loop, so as to receive the negative current of the upper power tube sent by the first up-sampling tube loop or the negative current of the lower power tube sent by the first down-sampling tube loop; a source of the first switch tube M SM3 is connected with a bootstrap voltage V BST ; a drain of the first switch tube M SM3 is connected with a source of the second switch tube M HV6 ; a gate of the second switch tube M HV6 is connected with a switch node voltage V SW ; a drain of the second switch tube M HV6 is connected with a gate and a drain of the third switch tube M LV6 , and serves as a first output terminal of the mirror module; and a source of the third switch tube M LV6 is grounded.
[0058] During the negative current sampling stage, the first sampling and holding circuit is configured to close a sampling switch under the control of a high-level blanking signal V MOD , so as to store the mirror charge corresponding to the mirror voltage into a sampling capacitor C; and the first charge injection cancellation circuit is configured to open a virtual switch under the control of an inverse signal V MODB of the blanking signal, so as to cancel the injection charge influence of the sampling switch during the closing action through the virtual switch, and output the detection current converted from the mirror charge to the output module. Wherein, when the blanking signal V MOD is high, the inverse signal V MODB of the blanking signal is low; and when the blanking signal V MOD is low, the inverse signal V MODB of the blanking signal is high.
[0059] In this embodiment, the high-level duration of the blanking signal V MOD is equal to the sum of the dead time and the establishment time of the sampling tube loop module.
[0060] The first output circuit is used to calibrate the current gain of the detected current during the negative current sampling phase, and then output the corrected detected current based on the current gain.
[0061] like Figure 4 As shown, the first output circuit includes a negative current adjustment circuit (Negative Trim Cell) and a seventh switch M. LV7 Eighth switch M SP2 and sampling resistor R SNS The input terminal of the negative current adjustment circuit Negative Trim Cell is connected to the seventh switch M. LV7 After the gate is connected, it serves as the first input terminal of the output module, and is connected to the first charge injection elimination circuit to receive the detection current; the output terminal of the negative current adjustment circuit Negative Trim Cell, and the seventh switch M LV7 The drain, the eighth switch M SP2 Drain and sampling resistor R SNS The first terminal is connected and serves as the output terminal of the output module, so as to output the detected voltage V. ISNS Then, based on the detection voltage V ISNS and sampling resistor R SNS Calculate the detection current I SNSN The eighth switch M SP2 The source of the transistor is connected to the power supply voltage VCC, and the eighth switching transistor M... SP2 The gate of the transistor is connected to the input terminal of the positive current trimming circuit in the second output circuit, and the seventh switch M... LV7 The source and reference voltage V REF The first terminal is grounded, and the reference voltage is V. REF The second terminal is connected to the sampling resistor R SNS The second end is connected.
[0062] In this embodiment, the second switching transistor M HV6 It is a 120V laterally diffused metal-oxide-semiconductor (LDMOS) used for high-voltage isolation. During negative current sampling, the blanking signal V... MOD When the signal is high, the sampling switch closes under the control of the high level, so that the mirror charge corresponding to the mirror voltage is stored in the sampling capacitor in the first sample-and-hold circuit. The inverse signal V of the blanking signal... MODB Used to eliminate the effects of charge injection. The negative current adjustment circuit is used to calibrate the third switch M. LV6 With the seventh switch M LV7 The current gain between. The negative detection current I.SNSN The current flows through the external sampling resistor R SNS Forming detection voltage V ISNS Detecting voltage V ISNS Reference voltage V REF .
[0063] like Figure 4 The waveform diagram shown shows the waveforms of various parameters during the negative current sampling phase, indicated by the dashed boxes. Among these parameters, V... TG This indicates the control voltage of the upper power transistor, V. BG I represents the control voltage of the lower power transistor. L V represents the inductor current in a high-voltage power supply. MOD V represents the blanking signal. SW Represents the switching node voltage, V ISNS Indicates the detected voltage, V REF Indicates the reference voltage.
[0064] (2) During the forward current sampling phase, a current detection circuit is formed by combining the second upsampling transistor loop, the second downsampling transistor loop, the second mirror circuit, the second sample-and-hold circuit, the second charge injection elimination circuit, and the second output circuit. The second upsampling transistor loop is... Figure 3 The sampling tube loop MT on the left side of the middle is the second downsampling tube loop. Figure 3 The sampling tube loop MB is located on the left side of the middle section.
[0065] The second upsampling transistor loop is used to output the forward current sampled from the upper power transistor to the mirror module during the forward current sampling phase; the second downsampling transistor loop is used to output the forward current sampled from the lower power transistor to the mirror module during the forward current sampling phase.
[0066] The second mirror circuit is used to convert the mirror current of the forward current into a mirror voltage during the forward current sampling stage, and output the mirror voltage to the sample-and-hold module.
[0067] like Figure 5 As shown, the second mirror circuit includes a fourth switching transistor M. SM2 Fifth switch M HV3 and the sixth switch M LV3 Fourth switch M SM2 The gate of the transistor serves as the second input terminal of the mirror module, connected to the second upsampling transistor loop and the second downsampling transistor loop, so as to receive the forward current of the upper power transistor sent by the second upsampling transistor loop, or, so as to receive the forward current of the lower power transistor sent by the second downsampling transistor loop. The fourth switching transistor M... SM2 The source and bootstrap voltage V BST Connected, fourth switch M SM2 The drain of the fifth switching transistor M HV3connected with the source of the fifth switch tube M HV3 connected with the gate of the switch node voltage V SW connected with the source of the fifth switch tube M HV3 connected with the gate and the drain of the sixth switch tube M LV3 connected with the source of the sixth switch tube M LV3 is grounded.
[0068] In the forward current sampling phase, the second sampling and holding circuit is used to close the sampling switch under the control of the high level of the blanking signal V MOD , so as to store the mirror voltage corresponding mirror charge into the sampling capacitor C; the second charge injection cancellation circuit is used to open the virtual switch under the control of the inverse signal V MODB of the blanking signal, so as to cancel the injection charge influence of the sampling switch during the closing action through the virtual switch, and output the mirror charge converted into the detection current to the output module. Wherein, when the blanking signal V MOD is high, the inverse signal V MODB of the blanking signal is low; when the blanking signal V MOD is low, the inverse signal V MODB of the blanking signal is high.
[0069] In the embodiment, the high level duration of the blanking signal V MOD is equal to the sum of the dead time and the establishment time of the sampling tube loop module.
[0070] The second output circuit is used to calibrate the current gain of the detection current in the forward current sampling phase or the dead time phase, and output after correcting the detection current according to the current gain.
[0071] As shown in Figure 5 , the second output circuit includes a positive trim cell, a seventh switch tube M LV7 , an eighth switch tube M SP2 , a ninth switch tube M LV4 , a tenth switch tube M SP1 and a sampling resistor R SNS ; the gate of the ninth switch tube M LV4 serves as the second input end of the output module, and is connected with the second charge injection cancellation circuit, so as to receive the detection current; the drain of the ninth switch tube M LV4 , the drain and the gate of the tenth switch tube M SP1 , the input end of the positive trim cell and the gate of the eighth switch tube M SP2 are connected, the source of the tenth switch tube M SP1 and the gate of the eighth switch tube M SP2The source is connected to the power supply voltage VCC, the output of the positive trim cell in the positive circuit adjustment circuit, and the eighth switch M. SP2 Drain and sampling resistor R SNS The first terminal and the seventh switch M LV7 The drain of the circuit is connected to serve as the output terminal of the output module, so as to output the detection voltage V. ISNS Then, based on the detection voltage V ISNS and sampling resistor R SNS Calculate the detection current I SNSN The seventh switch M LV7 The gate of the transistor is connected to the input terminal of the negative current adjustment circuit Negative Trim Cell in the first output circuit, and the seventh switch M... LV7 The source and reference voltage V REF The first terminal and the ninth switch M LV4 The source is grounded, and the reference voltage V REF The second terminal is connected to the sampling resistor R SNS The second end is connected.
[0072] In this embodiment, the fifth switch M HV3 It is a 120V LDMOS used for high voltage isolation. During forward current sampling, the blanking signal V... MOD When the signal is high, the sampling switch closes under the control of the high level, so that the mirror charge corresponding to the mirror voltage is stored in the sampling capacitor in the second sample-and-hold circuit. The inverse signal V of the blanking signal... MODB Used to eliminate the effects of charge injection. The forward current adjustment circuit is used to calibrate the tenth switch, M. SP1 With the eighth switch M SP2 The current gain between. The positive detection current I. SNSP The current flows through the external sampling resistor R SNS Forming detection voltage V ISNS Detecting voltage V ISNS Reference voltage V REF .
[0073] like Figure 5 The waveform diagram shown is illustrated in dashed boxes, which represent the waveforms of various parameters during the forward current sampling phase. For a detailed explanation of each parameter, please refer to the text above.
[0074] (3) During the dead time phase, the second upsampling tube loop, the second downsampling tube loop, the second mirror circuit, the second sample and hold circuit, the second charge injection elimination circuit, and the second output circuit are combined to form a current detection circuit.
[0075] The current detection circuit in the dead time stage is the same as the current detection circuit in the forward current sampling stage, so it will not be described again here.
[0076] As Figure 6 shown, in the dead time phase, the blanking signal V MOD is low, the gate voltage of the sixth switch tube M LV3 is kept by the sampling capacitor C, the signal generates a detection current through the tenth switch tube M SP1 and the current mirror of the eighth switch tube M SP2 , and outputs a detection voltage V ISNS . Since there is a setting time in the operational amplifier in the sampling tube loop module, an appropriate blanking time (i.e. the duration of the high level of the blanking signal V MOD ) needs to be selected so that a smooth sensing current can be achieved during the switching of the high dv / dt switching node voltage V SW . That is, the sample-and-hold circuit samples and holds the measured current before the switching of the switching node voltage V SW , and then restores the measured current after the switching of the switching node voltage V SW , to achieve smooth full-wave current detection.
[0077] As Figure 6 shown in the waveform diagram, the dashed box represents the waveform of each parameter in the dead time phase, and the explanation of each parameter is detailed above.
[0078] In summary, the current detection circuit of the high-voltage power supply provided by the embodiments of the present application closes the sampling switch under the control of the high-level blanking signal in the positive and negative current sampling phase, so as to store the corresponding mirror charge of the power tube into the sampling capacitor, and opens the virtual switch under the control of the inverse signal of the blanking signal, so as to eliminate the injection charge effect of the sampling switch during the closing action through the virtual switch; in the dead time phase, the sampling switch is opened under the control of the low-level blanking signal, so as to output the mirror charge in the sampling capacitor, and the virtual switch is closed under the control of the inverse signal of the blanking signal, so as to eliminate the injection charge effect of the sampling switch during the opening action through the virtual switch, and output the mirror charge after being converted into a detection current, and the duration of the high level of the blanking signal is equal to the sum of the dead time and the setting time of the sampling tube loop module, so that a smooth detection current can be generated in the switching (high dv / dt) of the power tube through the current detection circuit with slope compensation, the detection current is avoided to be missing in the dead time phase, and the system is facilitated to be self-regulated.
[0079] As Figure 7 shown, it shows the flow chart of the current detection method of the high-voltage power supply provided by an embodiment of the present application, and the current detection method of the high-voltage power supply comprises:
[0080] Step 701: During the positive and negative current sampling phase of the high-voltage power supply, the sampling tube loop module outputs the positive and negative currents sampled from the power tube to the mirror module; the mirror module converts the mirror current of the positive and negative currents into mirror voltages and outputs the mirror voltages to the sample-and-hold module; the sample-and-hold module closes the sampling switch under the control of a high-level blanking signal to store the mirror charge corresponding to the mirror voltage in the sampling capacitor; the charge injection elimination module opens the virtual switch under the control of the inverse signal of the blanking signal to eliminate the influence of injected charge during the closing action of the sampling switch through the virtual switch, converts the mirror charge into a detection current and outputs it to the output module; the output module calibrates the current gain of the detection current, corrects the detection current according to the current gain and outputs it, and the high-level duration of the blanking signal is equal to the sum of the dead time and the setup time of the sampling tube loop module.
[0081] During the negative current sampling period, the blanking signal V MOD When the signal is high, the sampling switch closes under the control of the high level, so that the mirror charge corresponding to the mirror voltage is stored in the sampling capacitor C in the first sample-and-hold circuit, and the inverse signal V of the blanking signal... MODB Used to eliminate the effects of charge injection. The negative current adjustment circuit is used to calibrate the third switch M. LV6 With the seventh switch M LV7 The current gain between. The negative detection current I. SNSN The current flows through the external sampling resistor R SNS Forming detection voltage V ISNS Detecting voltage V ISNS Reference voltage V REF .
[0082] During the forward current sampling period, the blanking signal V MOD When the signal is high, the sampling switch closes under the control of the high level, so that the mirror charge corresponding to the mirror voltage is stored in the sampling capacitor in the second sample-and-hold circuit. The inverse signal V of the blanking signal... MODB Used to eliminate the effects of charge injection. The forward current adjustment circuit is used to calibrate the tenth switch, M. SP1 With the eighth switch M SP2 The current gain between. The positive detection current I. SNSP The current flows through the external sampling resistor R SNS Forming detection voltage V ISNS Detecting voltage V ISNS Reference voltage V REF .
[0083] In step 702, during the dead time phase of the high-voltage power supply, the sample-and-hold module is controlled by the low-level blanking signal to open the sampling switch, so as to output the mirror charge in the sampling capacitor to the charge injection cancellation module; the charge injection cancellation module is controlled by the inverse signal of the blanking signal to close the virtual switch, so as to cancel the injection charge effect of the sampling switch during the opening action through the virtual switch, and convert the mirror charge into a detection current and then output to the output module; the output module calibrates the current gain of the detection current, and outputs after correcting the detection current according to the current gain.
[0084] During the dead time phase, the blanking signal V MOD is low, the gate voltage of the sixth switch tube M LV3 is kept by the sampling capacitor C, and the signal generates a detection current through the current mirror of the tenth switch tube M SP1 and the eighth switch tube M SP2 , and outputs a detection voltage V ISNS . Since there is a setup time in the operational amplifier in the sampling tube loop module, an appropriate blanking time (i.e. the duration of the high level of the blanking signal V MOD ) needs to be selected, so that a smooth sensing current can be achieved during the switching of the high dv / dt switching node voltage V SW . That is, the sample-and-hold circuit samples and holds the measured current before the switching of the switching node voltage V SW , and then restores the measured current after the switching of the switching node voltage V SW , to achieve smooth full-wave current detection.
[0085] In summary, the current detection method of the high-voltage power supply provided by the embodiments of the present application closes the sampling switch under the control of the high-level blanking signal during the positive and negative current sampling phase, so as to store the mirror charge corresponding to the power tube into the sampling capacitor, and opens the virtual switch under the control of the inverse signal of the blanking signal, so as to cancel the injection charge effect of the sampling switch during the closing action through the virtual switch; during the dead time phase, the sampling switch is opened under the control of the low-level blanking signal, so as to output the mirror charge in the sampling capacitor, and the virtual switch is closed under the control of the inverse signal of the blanking signal, so as to cancel the injection charge effect of the sampling switch during the opening action through the virtual switch, and convert the mirror charge into a detection current and then output, and the duration of the high level of the blanking signal is equal to the sum of the dead time and the setup time of the sampling tube loop module, so that a smooth detection current can be generated during the switching (high dv / dt) of the power tube through the current detection circuit with slope compensation, the detection current is avoided to be missing during the dead time phase, and the system is facilitated to be self-regulated.
[0086] Those skilled in the art can understand that all or part of the steps of the above-mentioned embodiments can be completed by hardware, or can be instructed by a program to complete the related hardware, and the program can be stored in a computer readable storage medium. The storage medium mentioned above can be a read-only memory, a magnetic disk or an optical disk, etc.
[0087] The above description is not intended to limit the embodiments of the present application. Any adjustment, equivalent replacement, improvement, etc. made within the spirit and principle of the embodiments of the present application shall be included in the protection scope of the embodiments of the present application.
Claims
1. A current detection circuit of a high voltage power supply, characterized by, The current detection circuit comprises, in sequence, a sampling tube loop module, a mirror module, a sample-and-hold module, a charge injection elimination module and an output module, and the sampling tube loop module is connected with power tubes in the high-voltage power supply, and the power tubes comprise upper power tubes and lower power tubes; During the positive and negative current sampling stage of the high-voltage power supply, the sampling tube loop module is configured to output the positive and negative currents sampled from the power tubes to the mirror module; The mirror module is configured to convert the mirror currents of the positive and negative currents into mirror voltages, and output the mirror voltages to the sample-and-hold module; the sample-and-hold module comprises at least a sampling switch and a sampling capacitor, and the sample-and-hold module is configured to close the sampling switch under the control of a high-level blanking signal, so as to store the mirror charges corresponding to the mirror voltages into the sampling capacitor; the charge injection elimination module comprises at least a virtual switch, and the charge injection elimination module is configured to open the virtual switch under the control of an inverse signal of the blanking signal, so as to eliminate the injection charge effect of the sampling switch during the closing action through the virtual switch, and output the mirror charges converted into detection currents to the output module; The output module is configured to calibrate the current gain of the detection currents, and output the detection currents after correction according to the current gain; During the dead time stage of the high-voltage power supply, the sample-and-hold module is configured to open the sampling switch under the control of a low-level blanking signal, so as to output the mirror charges in the sampling capacitor to the charge injection elimination module; the charge injection elimination module is configured to close the virtual switch under the control of an inverse signal of the blanking signal, so as to eliminate the injection charge effect of the sampling switch during the opening action through the virtual switch, and output the mirror charges converted into detection currents to the output module; The output module is configured to calibrate the current gain of the detection currents, and output the detection currents after correction according to the current gain; The high-level duration of the blanking signal is equal to the sum of the dead time and the establishment time of the sampling tube loop module.
2. The current detection circuit of a high voltage power supply according to claim 1, characterized in that, The sampling tube loop module comprises a first upper sampling tube loop, a first lower sampling tube loop, a second upper sampling tube loop and a second lower sampling tube loop; The first upper sampling tube loop is configured to output the negative current sampled from the upper power tube to the mirror module during the negative current sampling stage; The first lower sampling tube loop is configured to output the negative current sampled from the lower power tube to the mirror module during the negative current sampling stage; The second upper sampling tube loop is configured to output the positive current sampled from the upper power tube to the mirror module during the positive current sampling stage; The second lower sampling tube loop is configured to output the positive current sampled from the lower power tube to the mirror module during the positive current sampling stage.
3. The current detection circuit of a high voltage power supply according to claim 2, characterized in that, The mirror module comprises a first mirror circuit and a second mirror circuit; The first mirror circuit is configured to convert a mirror current of the negative direction current into a mirror voltage during the negative direction current sampling stage, and output the mirror voltage to the sampling and holding module. The second mirror circuit is configured to convert a mirror current of the positive direction current into a mirror voltage during the positive direction current sampling stage, and output the mirror voltage to the sampling and holding module.
4. The current detection circuit of a high voltage power supply according to claim 3, wherein, The first mirror circuit comprises a first switch tube, a second switch tube and a third switch tube. A gate of the first switch tube is configured as a first input terminal of the mirror module, a source of the first switch tube is connected with a bootstrap voltage, a drain of the first switch tube is connected with a source of the second switch tube, a gate of the second switch tube is connected with a switch node voltage, a drain of the second switch tube is connected with a gate and a drain of the third switch tube, and a source of the third switch tube is grounded.
5. The current detection circuit of a high voltage power supply according to claim 3, wherein, The second mirror circuit comprises a fourth switch tube, a fifth switch tube and a sixth switch tube. A gate of the fourth switch tube is configured as a second input terminal of the mirror module, a source of the fourth switch tube is connected with the bootstrap voltage, a drain of the fourth switch tube is connected with a source of the fifth switch tube, a gate of the fifth switch tube is connected with the switch node voltage, a drain of the fifth switch tube is connected with a gate and a drain of the sixth switch tube, and a source of the sixth switch tube is grounded.
6. The current detection circuit of a high voltage power supply according to claim 1, wherein, The output module comprises a first output circuit and a second output circuit. The first output circuit is configured to calibrate a current gain of the detection current during the negative direction current sampling stage, and output after correction of the detection current according to the current gain. The second output circuit is configured to calibrate a current gain of the detection current during the positive direction current sampling stage or the dead time stage, and output after correction of the detection current according to the current gain.
7. The current detection circuit of a high voltage power supply according to claim 6, characterized by The first output circuit comprises a negative direction current trimming circuit, a seventh switch tube, an eighth switch tube and a sampling resistor. An input terminal of the negative direction current trimming circuit is connected with a gate of the seventh switch tube, and then configured as a first input terminal of the output module; an output terminal of the negative direction current trimming circuit, a drain of the seventh switch tube, a drain of the eighth switch tube and a first terminal of the sampling resistor are connected, and then configured as an output terminal of the output module; a source of the eighth switch tube is connected with a power supply voltage; a gate of the eighth switch tube is connected with an input terminal of a positive direction current trimming circuit in the second output circuit; a source of the seventh switch tube and a first terminal of a reference voltage are grounded; and a second terminal of the reference voltage is connected with a second terminal of the sampling resistor.
8. The current detection circuit of a high voltage power supply according to claim 6, wherein, The second output circuit comprises a positive direction current trimming circuit, a seventh switch tube, an eighth switch tube, a ninth switch tube, a tenth switch tube and a sampling resistor. The gate of the ninth switch tube is used as the second input end of the output module, the drain of the ninth switch tube, the drain and the gate of the tenth switch tube, the input end of the positive circuit adjustment circuit, and the gate of the eighth switch tube are connected, the source of the tenth switch tube and the source of the eighth switch tube are connected with a power supply voltage, the output end of the positive circuit adjustment circuit, the drain of the eighth switch tube, the first end of the sampling resistor, and the drain of the seventh switch tube are connected and then used as the output end of the output module, the gate of the seventh switch tube is connected with the input end of the negative current adjustment circuit in the first output circuit, the source of the seventh switch tube, the first end of a reference voltage, and the source of the ninth switch tube are grounded, and the second end of the reference voltage is connected with the second end of the sampling resistor.
9. The current detection circuit of a high voltage power supply according to claim 1, wherein, The sampling and holding module comprises a first sampling and holding circuit and a second sampling and holding circuit, and the charge injection elimination module comprises a first charge injection elimination circuit and a second charge injection elimination circuit; In the negative current sampling stage, the first sampling and holding circuit is used for closing the sampling switch under the control of a high-level blanking signal, so as to store the mirror charge corresponding to the mirror voltage into the sampling capacitor; the first charge injection elimination circuit is used for opening the virtual switch under the control of the inverse signal of the blanking signal, so as to eliminate the injection charge influence of the sampling switch during the closing action through the virtual switch, and output the mirror charge converted into a detection current to the output module; In the positive current sampling stage, the second sampling and holding circuit is used for closing the sampling switch under the control of a high-level blanking signal, so as to store the mirror charge corresponding to the mirror voltage into the sampling capacitor; The second charge injection elimination circuit is used for opening the virtual switch under the control of the inverse signal of the blanking signal, so as to eliminate the injection charge influence of the sampling switch during the closing action through the virtual switch, and output the mirror charge converted into a detection current to the output module.
10. A current detection method of a high voltage power supply, characterized by, The method comprises: In the positive and negative current sampling stages of the high-voltage power supply, the sampling tube loop module outputs the positive and negative currents sampled from the power tube to the mirror module; the mirror module converts the mirror currents of the positive and negative currents into mirror voltages, and outputs the mirror voltages to the sampling and holding module; the sampling and holding module closes the sampling switch under the control of a high-level blanking signal, so as to store the mirror charge corresponding to the mirror voltage into the sampling capacitor; the charge injection elimination module opens the virtual switch under the control of the inverse signal of the blanking signal, so as to eliminate the injection charge influence of the sampling switch during the closing action through the virtual switch, and output the mirror charge converted into a detection current to the output module; and the output module calibrates the current gain of the detection current, and outputs after correcting the detection current according to the current gain. During the dead time phase of the high voltage power supply, the sample-and-hold module is controlled by a blanking signal at low level to open the sampling switch to output the mirror charge in the sampling capacitor to the charge injection cancellation module; the charge injection cancellation module is controlled by the inverse signal of the blanking signal to close the dummy switch to cancel the injection charge effect of the sampling switch during the opening action through the dummy switch and to output the mirror charge to the output module after converting the mirror charge into a detection current; the output module calibrates the current gain of the detection current and corrects the detection current after output according to the current gain; wherein the high level duration of the blanking signal is equal to the sum of the dead time and the setup time of the sample tube loop module.
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