Fault positioning method and system

Abstract

The invention discloses a fault positioning method and system, and belongs to the technical field of new energy direct current power distribution network control and protection. The method comprises the following steps: injecting a double-frequency detection signal through a power electronic direct-current transformer of a sound line after a fault occurs; listing a model fault network equation according to the type of the end equipment of the fault line; collecting head end voltage and current signals, and extracting a real part and an imaginary part to construct a real number equation set; adopting an interior point method to solve and obtain fault parameters; and finally calculating the fault distance. The method effectively solves the problem that in the prior art, fault characteristics are weak due to current limiting of power electronic equipment, and bus faults form a protection dead zone and cannot be accurately positioned, and the fault detection precision and the system recovery capability of the new energy direct current power distribution network are improved.

Description

Technical Field

[0001] This invention belongs to the field of control and protection technology of new energy DC distribution networks, and specifically relates to a fault location method and system. Background Technology

[0002] New energy DC power distribution systems are attracting increasing attention due to their inherent adaptability to power sources, energy storage, and loads, as well as their high efficiency and controllability. Among them, the power electronic DC transformer, as the core equipment of the system, effectively solves the key problems of voltage level transformation and electrical isolation in DC systems, significantly improving the system's flexibility, controllability, and reliability.

[0003] However, the highly controllable power electronic equipment currently integrated into the new energy DC distribution network can actively limit current during DC faults, resulting in a significant weak feedback characteristic in the fault profile, and in extreme cases, even a zero-fault profile. Even if the faulty line can be identified, relying on the data from the passive response after the fault occurs for fault location still faces the problem of decreased sensitivity and reliability, making it difficult to achieve rapid and accurate fault location, and hindering timely fault isolation and power restoration.

[0004] By actively injecting stable detection signals into the system, fault location performance can be improved to some extent. However, existing research mostly utilizes converter devices at the bus, such as modular multilevel converters (MMCs) and voltage source converters (VSCs). However, when a metallic fault occurs on the DC bus, the line measurement points cannot obtain the electrical quantity information of the injected signal, thus creating a protection dead zone. This makes it impossible to determine whether the fault is due to protection failure, injection anomaly, or a bus fault, hindering timely fault isolation and power restoration. To address these issues, this invention proposes a fault location method in new energy DC distribution systems based on injecting dual-frequency detection signals into a power electronic DC transformer. Summary of the Invention

[0005] The technical problem to be solved by this invention is to address the shortcomings of the prior art by providing a fault location method and system. By injecting dual-frequency detection signals through a power electronic DC transformer, a reliable signal transmission and fault location mechanism is constructed. This addresses the technical problem in existing new energy DC distribution networks where the active current limiting of highly controllable power electronic equipment during faults leads to weak or even zero feedback characteristics in fault features, resulting in a significant decrease in the sensitivity and reliability of traditional fault location methods that rely on passive response data. This invention improves the fault detection and recovery capabilities of new energy DC distribution systems.

[0006] The present invention adopts the following technical solution: A fault location method includes the following steps: After the fault occurs, a power electronic DC transformer on a healthy line is selected, and its phase shift angle is changed through additional control to inject a dual-frequency detection signal containing the first and second frequencies. Based on the dual-frequency detection signal, according to the type of equipment connected to the end of the faulty line, the corresponding one-mode fault network equation is written. The network equation is used to establish the constraint relationship between the voltage and current phasors at different frequencies at the beginning of the faulty line. Collect voltage and current signals at the beginning of the faulty line, extract the real and imaginary parts of the network equations at the first and second frequencies, and construct a system of real equations. The interior-point method is used to solve the real equations to obtain the equivalent resistance, equivalent inductance, transition resistance, and length ratio parameters of the faulty line. The fault distance is calculated based on the length ratio parameter to complete the fault location.

[0007] Preferably, the second frequency is twice the first frequency.

[0008] Preferably, when a power electronic transformer is connected to the end of the faulty line, the network equation is:

[0009] in, and These represent the frequencies injected at the beginning of the protected line. f 1,2 f The voltage and current phasors measured below, R im and L im These represent the equivalent resistance and inductance parameters of the faulty line before the fault point, respectively. τ L This represents the ratio of the length of the line after the fault point to the length of the line before the fault point. C H This represents the equivalent capacitance parameter on the high-voltage side of a power electronic DC transformer.

[0010] Preferably, when the faulty line is connected to a wind power source, the network equation is a simplified one-mode fault model equation, which includes the equivalent capacitance parameters of the wind power converter.

[0011] Preferably, the simplified fault model equations are as follows:

[0012] in, C cov This represents the equivalent capacitance parameter of the wind turbine converter. For fault transition resistance, R im andL im These represent the equivalent resistance and inductance parameters of the faulty line before the fault point, respectively. τ L This represents the ratio of the length of the line after the fault point to the length of the line before the fault point. The imaginary unit, 2π f 1, 2π f 2, and These represent the frequencies injected at the beginning of the protected line. f 1,2 f The voltage and current phasors measured below.

[0013] Preferably, constructing the system of real equations includes: The real and imaginary parts of the voltage and current signals at the first and second frequencies are extracted to form four real equations, which are used to solve for the transition resistance and length ratio parameters.

[0014] Preferably, the real equation is:

[0015]

[0016] in, U freal ,1 and U fimag ,1, I freal ,1 and I fimag ,1 respectively represent the detection frequency f 1. The real and imaginary parts of the measured voltage and current phasors. , These represent the detection frequencies. f Current coefficient at 1 , These represent the detection frequencies 2 and 2, respectively. f Current coefficient at 1 C sol This indicates the capacitance parameters determined based on the faulty circuit.

[0017] Preferably, the interior point method is used to solve the model as follows:

[0018] in, x It is a column vector containing model parameters; , and , These represent the real and imaginary parts of the voltage phasor under the current parameter estimation, respectively. x min and x max They represent x The lower and upper limits.

[0019] Preferably, the fault distance The calculation is as follows:

[0020] in, This is the total length of the line. It is the ratio of the length of the line after the fault point to the length of the line before the fault point.

[0021] Secondly, embodiments of the present invention provide a fault location system, comprising: The injection module, after a fault occurs, selects a power electronic DC transformer on a healthy line, changes its phase shift angle through additional control, and injects a dual-frequency detection signal containing the first and second frequencies. The equation module, based on the dual-frequency detection signal, writes the corresponding first-mode fault network equation according to the type of equipment connected to the end of the fault line. The network equation is used to establish the constraint relationship between the voltage and current phasors at different frequencies at the beginning of the fault line. The construction module collects voltage and current signals at the beginning of the faulty line, extracts the real and imaginary parts of the network equations at the first and second frequencies, and constructs a system of real equations. The calculation module uses the interior-point method to solve the real equation system to obtain the equivalent resistance, equivalent inductance, transition resistance, and length ratio parameters of the faulty line. The positioning module calculates the fault distance based on the length ratio parameter to complete the fault location.

[0022] Thirdly, a computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the above-described fault location method.

[0023] Fourthly, embodiments of the present invention provide a computer-readable storage medium including a computer program, which, when executed by a processor, implements the steps of the above-described fault location method.

[0024] Fifthly, a chip includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the fault location method described above.

[0025] Sixthly, embodiments of the present invention provide an electronic device including a computer program, which, when executed by the electronic device, implements the steps of the above-described fault location method.

[0026] Compared with the prior art, the present invention has at least the following beneficial effects: A fault location method actively injects dual-frequency detection signals into a power electronic DC transformer on a healthy line after a fault occurs, constructing an effective signal channel and overcoming the weak or even zero-fault characteristics caused by current limiting of power electronic equipment in new energy DC distribution networks. This method does not rely on converter devices at the busbar, avoiding the problem of not being able to obtain signals during metallic busbar faults, significantly improving the reliability and applicability of fault location. By writing a modular fault network equation, extracting the real and imaginary parts to construct a set of equations, and combining this with interior-point optimization, high-precision and rapid calculation of fault distance is achieved, facilitating timely fault isolation and power restoration, and improving the safety and stability of system operation.

[0027] Furthermore, by limiting the second frequency to twice the first frequency, the frequency correlation of the dual-frequency signals is utilized to enhance signal identifiability and anti-interference capability. The dual-frequency design ensures the complementarity of electrical quantities acquired at different frequencies, improving the independence and solution stability of the equation system. In particular, it maintains high positioning accuracy even in high-resistance faults or complex network structures, enhancing the robustness and practicality of the method.

[0028] Furthermore, for lines with power electronic transformers at the end, specific network equations are provided, clarifying the mathematical relationships between voltage, current phasors, and line parameters. These equations fully consider the influence of the equivalent capacitance on the high-voltage side, better reflect the actual system structure, and improve the accuracy and applicability of the model. This lays a solid theoretical foundation for the subsequent construction of real equations and parameter solving.

[0029] Furthermore, for lines with wind power at the end, a simplified single-mode fault model equation is proposed, which fully considers the influence of the equivalent capacitance of the wind turbine converter, simplifying the computational complexity while ensuring the accuracy of the model. This design enables the method to adapt to different types of new energy access scenarios, enhancing its versatility and engineering applicability.

[0030] Furthermore, a simplified model equation for wind power lines is presented, clarifying the mathematical relationships between various parameters. In particular, the role of the equivalent capacitance of the wind power converter is emphasized, making the model closer to the actual wind power grid-connected system and improving the accuracy and reliability of fault location.

[0031] Furthermore, by extracting the real and imaginary parts of the dual-frequency signal, four real equations are constructed to solve for the transition resistance and length proportional parameters. This method utilizes the real and imaginary solutions of complex equations to transform a complex nonlinear problem into a solvable real-number optimization problem, improving computational efficiency and numerical stability, and making it suitable for real-time engineering applications.

[0032] Furthermore, the specific form of the real number equations is given, and the physical meaning of each variable and coefficient is clarified, making the equations highly operable and easy to implement. By introducing current coefficients and capacitance parameters, the adaptability and accuracy of the model are enhanced, providing clear objective functions and constraints for solving the interior-point method.

[0033] Furthermore, the interior-point method is employed to solve the model. By establishing an objective function and parameter constraints, nonlinear optimization estimation of fault parameters is achieved. The interior-point method exhibits good convergence and stability, is suitable for high-dimensional, constrained optimization problems, and can effectively handle system noise and model errors, ensuring the accuracy and reliability of fault distance calculation.

[0034] Furthermore, the mathematical relationship between the length ratio parameter and the fault distance is clarified. The calculation is simple, the physical meaning is clear, and it is easy to implement and apply in engineering. This formula directly outputs the fault location, providing a direct basis for subsequent fault isolation and system recovery, thus enhancing the practical value of the overall method.

[0035] It is understood that the beneficial effects of the second to sixth aspects mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here.

[0036] In summary, this invention constructs a fault location method with strong anti-interference and wide adaptability by injecting dual-frequency detection signals into a power electronic DC transformer. It effectively solves the fault location problem caused by weak feeder characteristics and bus faults in new energy DC distribution networks. It has the advantages of high precision, strong robustness and strong engineering applicability, and significantly improves the system's fault recovery capability.

[0037] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0038] Figure 1 This is a flowchart of the fault location process of the present invention; Figure 2 This is a model diagram of the new energy DC distribution network of the present invention; Figure 3 A schematic diagram of a computer device provided in an embodiment of the present invention; Figure 4 This is a block diagram of a chip provided according to an embodiment of the present invention.

[0039] Among them, 60. Computer equipment; 61. Processor; 62. Memory; 63. Computer program; 600. Electronic device; 610. Processing unit; 620. Storage unit; 6201. Random access memory unit; 6202. Cache memory unit; 6203. Read-only memory unit; 6204. Program / utility; 6205. Program module; 630. Bus; 640. Display unit; 650. Input / output interface; 660. Network adapter; 700. External device. Detailed Implementation

[0040] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0041] In the description of this invention, it should be understood that the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0042] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0043] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes such combinations. For example, A and / or B can represent three cases: A alone, A and B simultaneously, and B alone. Additionally, the character " / " in this invention generally indicates that the preceding and following objects have an "or" relationship.

[0044] It should be understood that although terms such as first, second, third, etc., may be used in the embodiments of the present invention to describe the preset range, these preset ranges should not be limited to these terms. These terms are only used to distinguish the preset ranges from one another. For example, without departing from the scope of the embodiments of the present invention, the first preset range may also be referred to as the second preset range, and similarly, the second preset range may also be referred to as the first preset range.

[0045] Depending on the context, the word "if" as used here can be interpreted as "when," "when," "in response to determination," or "in response to detection." Similarly, depending on the context, the phrase "if determination" or "if detection (of the stated condition or event)" can be interpreted as "when determination," "in response to determination," "when detection (of the stated condition or event)," or "in response to detection (of the stated condition or event)."

[0046] The accompanying drawings illustrate various structural schematic diagrams according to embodiments disclosed in this invention. These drawings are not to scale, and some details have been enlarged for clarity, and some details may have been omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.

[0047] This invention provides a fault location method that coordinates the injection of detection signals from multiple power electronic DC transformers in a distribution network to construct an effective signal transmission channel, ensuring that protection measurement points can obtain effective response information. Based on a single-mode fault model, network equations are written and the fault distance is obtained using the interior-point method under given objective function and constraints, which is then used to achieve fault location.

[0048] Please see Figure 1 The present invention provides a fault location method, comprising the following steps: S1. After a fault occurs, the power electronic equipment in the new energy DC distribution network activates the fault current limiting strategy, selecting one of the healthy lines (denoted as the first line). m The power electronic DC transformer on the strip is actively modified by additional control to change its phase shift angle, introducing a frequency of... f sinusoidal disturbance component of 1 θ dec This allows for the synchronous injection of frequency components into the system. f 1 and 2 f 1 dual-frequency detection signal; S2. For lines with power electronic transformers at the end, the network equations for two detection signal frequencies are written based on a single-mode fault model. The injected voltage and current phasors of the fault line at different frequencies satisfy the following constraints: (1) in, and These represent the frequencies injected at the beginning of the protected line. f 1,2 f The voltage and current phasors measured below, R imand L im These represent the equivalent resistance and inductance parameters of the faulty line before the fault point, respectively. τ L Defined as τ L =( l - d ) / d This represents the ratio of the length of the line after the fault point to the length of the line before the fault point. d The distance to the fault. l This is the total length of the line. C H This represents the equivalent capacitance parameter on the high-voltage side of a power electronic DC transformer.

[0049] S3. For lines with wind power at the end, replace the power frequency transformer and the first-stage AC / DC conversion stage with a medium-high frequency isolation DC transformer, simplify the circuit, and write the one-mode fault network equation at two detection signal frequencies. The injected voltage and current phasors at different frequencies of the fault line satisfy the following constraints: (2) in, C cov This represents the equivalent capacitance parameter of the wind turbine converter.

[0050] S4. Collect the voltage and current signals at the beginning of the faulty line, and extract the real and imaginary parts of the equations corresponding to the two injection frequencies in step S2, respectively, to construct four real equations to solve for the unknown parameters. R f and τ L The calculation expression is as follows: (3) in, U freal ,1 and U fimag ,1, I freal ,1 and I fimag ,1 respectively represent the detection frequency f 1. The real and imaginary parts of the measured voltage and current phasors. , Indicates the detection frequency f Current coefficient at 1, detection frequency 2 f The current coefficient under condition 1 is similar. C sol This indicates the capacitance parameters determined based on the faulty circuit.

[0051] S5. Solve the model using the interior point method under the given objective function and constraints. Its mathematical form is as follows: (4) In this equation, x It is a column vector containing model parameters, specifically represented as ,in, x 1. x 2. x 3. x 4 represents the model parameters. R im , L im , R f and τ L ; , and , These represent the real and imaginary parts of the voltage phasor under the current parameter estimation, respectively. x min and x max They represent x The lower and upper limits.

[0052] S6. Based on the parameter estimation results under nonlinear optimization, solve for the fault distance: (5) Thus, a fault location method based on dual-frequency detection signals injected into a power electronic DC transformer was obtained.

[0053] In another embodiment of the present invention, a fault location system is provided, which can be used to implement the above-mentioned fault location method. Specifically, the fault location system includes an injection module, an equation module, a construction module, a calculation module, and a location module.

[0054] Among them, the injection module, after a fault occurs, selects a power electronic DC transformer on a healthy line, changes its phase shift angle through additional control, and injects a dual-frequency detection signal containing the first frequency and the second frequency. The equation module, based on the dual-frequency detection signal, writes the corresponding first-mode fault network equation according to the type of equipment connected to the end of the fault line. The network equation is used to establish the constraint relationship between the voltage and current phasors at different frequencies at the beginning of the fault line. The construction module collects voltage and current signals at the beginning of the faulty line, extracts the real and imaginary parts of the network equations at the first and second frequencies, and constructs a system of real equations. The calculation module uses the interior-point method to solve the real equation system to obtain the equivalent resistance, equivalent inductance, transition resistance, and length ratio parameters of the faulty line. The positioning module calculates the fault distance based on the length ratio parameter to complete the fault location.

[0055] This invention provides a terminal device comprising a processor and a memory. The memory stores a computer program, which includes program instructions. The processor executes the program instructions stored in the computer storage medium. The processor may be a Central Processing Unit (CPU), or other general-purpose processors, graphics processing units (GPUs), tensor processing units (TPUs), digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. It is the computing and control core of the terminal, suitable for implementing one or more instructions, specifically suitable for loading and executing one or more instructions to achieve a corresponding method flow or corresponding function. The processor described in this embodiment can be used for the operation of a fault location method, including: After a fault occurs, a power electronic DC transformer on a healthy line is selected, and its phase shift angle is changed through additional control to inject a dual-frequency detection signal containing a first frequency and a second frequency. Based on the dual-frequency detection signal, and according to the type of equipment connected to the end of the faulty line, a corresponding modular fault network equation is written. The network equation is used to establish the constraint relationship between the voltage and current phasors at different frequencies at the beginning of the faulty line. The voltage and current signals at the beginning of the faulty line are collected, and the real and imaginary parts of the network equation at the first and second frequencies are extracted to construct a system of real equations. The interior-point method is used to solve the system of real equations to obtain the equivalent resistance, equivalent inductance, transition resistance, and length ratio parameter of the faulty line. The fault distance is calculated based on the length ratio parameter to complete the fault location.

[0056] Please see Figure 3The terminal device is a computer device. In this embodiment, the computer device 60 includes a processor 61, a memory 62, and a computer program 63 stored in the memory 62 and executable on the processor 61. When executed by the processor 61, the computer program 63 implements the method for estimating the concentration of radioactive iodine species in the containment vessel after an accident, as described in this embodiment. To avoid repetition, these details are not elaborated here. Alternatively, when executed by the processor 61, the computer program 63 implements the functions of each model / unit in the fault location system of this embodiment. To avoid repetition, these details are not elaborated here.

[0057] Computer device 60 can be a desktop computer, laptop, handheld computer, cloud server, or other computing device. Computer device 60 may include, but is not limited to, a processor 61 and a memory 62. Those skilled in the art will understand that... Figure 3 This is merely an example of computer device 60 and does not constitute a limitation on computer device 60. It may include more or fewer components than shown, or combine certain components, or different components. For example, computer device may also include input / output devices, network access devices, buses, etc.

[0058] The processor 61 may be a Central Processing Unit (CPU), or other general-purpose processors, graphics processing units (GPUs), tensor processing units (TPUs), digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor.

[0059] The memory 62 can be an internal storage unit of the computer device 60, such as a hard disk or RAM of the computer device 60. The memory 62 can also be an external storage device of the computer device 60, such as a plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, etc., provided on the computer device 60.

[0060] Furthermore, the memory 62 may include both internal storage units of the computer device 60 and external storage devices. The memory 62 is used to store computer programs and other programs and data required by the computer device. The memory 62 can also be used to temporarily store data that has been output or will be output.

[0061] Please see Figure 4 The terminal device is an electronic device 600, which is manifested in the form of a general-purpose computing device. The components of the electronic device may include, but are not limited to: at least one processing unit 610, at least one storage unit 620, a bus 630 connecting different platform components (including storage unit 620 and processing unit 610), a display unit 640, etc.

[0062] The storage unit stores program code, which can be executed by the processing unit 610 to perform the steps described in the method section of this specification according to various exemplary embodiments of the present invention. For example, the processing unit 610 can perform actions such as... Figure 1 The steps are shown in the figure.

[0063] Storage unit 620 may include a readable medium in the form of a volatile storage unit, such as random access memory (RAM) 6201 and / or cache memory 6202, and may further include a read-only memory (ROM) 6203.

[0064] Storage unit 620 may also include a program / utility 6204 having a set (at least one) program module 6205, such program module 6205 including but not limited to: operating system, one or more application programs, other program modules and program data, each or some combination of these examples may include an implementation of a network environment.

[0065] Bus 630 can represent one or more of several types of bus structures, including a memory cell bus or memory cell controller, a peripheral bus, a graphics acceleration port, a processing unit, or a local bus using any of the multiple bus structures.

[0066] Electronic device 600 can also communicate with one or more external devices 700 (e.g., keyboard, pointing device, Bluetooth device, etc.), and with one or more devices that enable a user to interact with electronic device 600, and / or with any device that enables electronic device 600 to communicate with one or more other computing devices (e.g., router, modem). This communication can be performed via input / output interface 650. Furthermore, electronic device 600 can also communicate with one or more networks (e.g., local area network, wide area network, and / or public network, such as the Internet) via network adapter 660. Network adapter 660 can communicate with other modules of electronic device 600 via bus 630. It should be understood that, although not shown in the figures, other hardware and / or software modules can be used in conjunction with electronic device 600, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage platforms.

[0067] Example 4 This invention also provides a storage medium, specifically a computer-readable storage medium, which is a memory device in a terminal device for storing programs and data. It is understood that the computer-readable storage medium here can include both built-in storage media in the terminal device and extended storage media supported by the terminal device; it can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. The computer-readable storage medium provides storage space that stores the terminal's operating system. Furthermore, the storage space also stores one or more instructions suitable for loading and execution by a processor, which can be one or more computer programs (including program code). More specific examples of the computer-readable storage medium include: an electrical connection with one or more wires, a portable disk, a hard disk, random access memory, read-only memory, erasable programmable read-only memory, optical fiber, portable compact disk read-only memory, optical storage device, magnetic storage device, or any suitable combination thereof.

[0068] Computer-readable storage media also include data signals propagated in baseband or as part of a carrier wave, carrying readable program code. Such propagated data signals can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A readable storage medium can also be any readable medium other than a readable storage medium that can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the readable storage medium can be transmitted using any suitable medium, including but not limited to wireless, wired, optical fiber, radio frequency, etc., or any suitable combination thereof.

[0069] Program code for performing the operations of this invention can be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java and C++, and conventional procedural programming languages ​​such as C or similar languages. The program code can execute entirely on the user's computing device, partially on the user's computing device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0070] One or more instructions stored in a computer-readable storage medium can be loaded and executed by a processor to implement the corresponding steps of the fault location method in the above embodiments; one or more instructions in the computer-readable storage medium are loaded and executed by the processor to perform the following steps: After a fault occurs, a power electronic DC transformer on a healthy line is selected, and its phase shift angle is changed through additional control to inject a dual-frequency detection signal containing a first frequency and a second frequency. Based on the dual-frequency detection signal, and according to the type of equipment connected to the end of the faulty line, a corresponding modular fault network equation is written. The network equation is used to establish the constraint relationship between the voltage and current phasors at different frequencies at the beginning of the faulty line. The voltage and current signals at the beginning of the faulty line are collected, and the real and imaginary parts of the network equation at the first and second frequencies are extracted to construct a system of real equations. The interior-point method is used to solve the system of real equations to obtain the equivalent resistance, equivalent inductance, transition resistance, and length ratio parameter of the faulty line. The fault distance is calculated based on the length ratio parameter to complete the fault location.

[0071] The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.

[0072] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0073] To further verify the method proposed in this invention, this paper establishes the following in the electromagnetic transient simulation software PSCAD: Figure 2 The diagram shows a ±10kV new energy DC distribution network model. Wind power, photovoltaic power, and energy storage are each boosted by converters and then connected to their respective collection branches. l 1 to l 3. Connect to the busbar, and then via the outgoing line l 0 Access to remote site; branch line l 4 and l 5. Each component is connected to a DC load, taking energy storage and a DC data center as examples. The power electronic DC transformer submodules used adopt a parallel input and series output structure, with a total of 10 submodules configured.

[0074] The fault location results for different fault locations are shown in Table 1: Table 1 Fault location under different fault conditions

[0075] Table 1 shows that the proposed fault location method based on dual-frequency detection signal injection from a power electronic DC transformer has high location accuracy in the new energy DC distribution network scenario, and has good robustness to changes in fault distance and transition resistance. The maximum location error is less than 1%, which effectively verifies the feasibility and effectiveness of the proposed fault location method based on dual-frequency detection signal injection from a power electronic DC transformer.

[0076] In summary, the fault location method and system of this invention demonstrate outstanding application results in new energy DC distribution networks, with its core advantages lying in high precision, strong robustness, and wide applicability. By actively injecting dual-frequency detection signals using power electronic DC transformers on sound lines, the method effectively overcomes the problem of weak fault characteristics caused by current limiting in power electronic equipment, breaking through the technical bottleneck of traditional methods relying on passive response data and bus converter injection. Simulation results show that under complex operating conditions with different fault locations and different transition resistances (1~200Ω), the fault distance location error of this method is consistently below 1%, and the transition resistance estimation error is below 0.75%, exhibiting extremely high measurement accuracy and stability. By constructing a model fault network equation and using the interior-point method for optimization, the system not only eliminates protection dead zones and achieves rapid and accurate fault identification, but also significantly improves the speed and reliability of fault isolation and power restoration, providing a solid technical guarantee for the safe and stable operation of DC distribution networks with a high proportion of new energy access.

[0077] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0078] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0079] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed in this invention can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0080] In the embodiments provided by this invention, it should be understood that the disclosed devices / terminals and methods can be implemented in other ways. For example, the device / terminal embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0081] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0082] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0083] If the integrated module / unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random-access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc. It should be noted that the content included in the computer-readable medium can be appropriately added or removed according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electrical carrier signals and telecommunication signals.

[0084] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus, and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0085] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0086] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0087] The above content is only for illustrating the technical concept of the present invention and should not be construed as limiting the scope of protection of the present invention. Any modifications made to the technical solution based on the technical concept proposed in this invention shall fall within the scope of protection of the claims of this invention.

Claims

1. A fault location method, characterized in that, Includes the following steps: S1. After a fault occurs, select a power electronic DC transformer on a healthy line, change its phase shift angle through additional control, and inject a dual-frequency detection signal containing the first frequency and the second frequency. S2. Based on the dual-frequency detection signal, according to the type of equipment connected to the end of the faulty line, write the corresponding one-mode fault network equation. The network equation is used to establish the constraint relationship between the voltage and current phasors at different frequencies at the beginning of the faulty line. S3. Collect the voltage and current signals at the beginning of the faulty line, extract the real and imaginary parts of the network equations at the first and second frequencies, and construct a system of real equations. S4. Solve the real equation system using the interior point method to obtain the equivalent resistance, equivalent inductance, transition resistance, and length ratio parameters of the faulty line. S5. Calculate the fault distance based on the length ratio parameter to complete the fault location.

2. The fault location method according to claim 1, characterized in that, The second frequency is twice the first frequency.

3. The fault location method according to claim 1, characterized in that, When a power electronic transformer is connected to the end of the faulty line, the network equation is: in, and These represent the frequencies injected at the beginning of the protected line. f 1,2 f The voltage and current phasors measured below, R im and L im These represent the equivalent resistance and inductance parameters of the faulty line before the fault point, respectively. τ L This represents the ratio of the length of the line after the fault point to the length of the line before the fault point. C H This represents the equivalent capacitance parameter on the high-voltage side of a power electronic DC transformer.

4. The fault location method according to claim 1, characterized in that, When the faulty line is connected to a wind power source, the network equation is a simplified one-mode fault model equation, which includes the equivalent capacitance parameters of the wind power converter.

5. The fault location method according to claim 4, characterized in that, The simplified fault model equations are as follows: in, C cov This represents the equivalent capacitance parameter of the wind turbine converter. For fault transition resistance, R im and L im These represent the equivalent resistance and inductance parameters of the faulty line before the fault point, respectively. τ L This represents the ratio of the length of the line after the fault point to the length of the line before the fault point. The imaginary unit, 2π f 1, 2π f 2, and These represent the frequencies injected at the beginning of the protected line. f 1,2 f The voltage and current phasors measured below.

6. The fault location method according to claim 1, characterized in that, The construction of the system of real number equations includes: The real and imaginary parts of the voltage and current signals at the first and second frequencies are extracted to form four real equations, which are used to solve for the transition resistance and length ratio parameters.

7. The fault location method according to claim 6, characterized in that, The real equation is: in, U freal ,1 and U fimag ,1, I freal ,1 and I fimag ,1 respectively represent the detection frequency f 1. The real and imaginary parts of the measured voltage and current phasors. , These represent the detection frequencies. f Current coefficient at 1 , These represent the detection frequencies 2 and 2, respectively. f Current coefficient at 1 C sol This indicates the capacitance parameters determined based on the faulty circuit.

8. The fault location method according to claim 1, characterized in that, The model is solved using the interior point method as follows: in, x It is a column vector containing model parameters; , and , These represent the real and imaginary parts of the voltage phasor under the current parameter estimation, respectively. x min and x max They represent x The lower and upper limits.

9. The fault location method according to claim 1, characterized in that, Fault Distance The calculation is as follows: in, This is the total length of the line. It is the ratio of the length of the line after the fault point to the length of the line before the fault point.

10. A fault location system, characterized in that, include: The injection module, after a fault occurs, selects a power electronic DC transformer on a healthy line, changes its phase shift angle through additional control, and injects a dual-frequency detection signal containing the first and second frequencies. The equation module, based on the dual-frequency detection signal, writes the corresponding one-mode fault network equation according to the type of equipment connected to the end of the fault line. The network equation is used to establish the constraint relationship between the voltage and current phasors at different frequencies at the beginning of the fault line. The construction module collects voltage and current signals at the beginning of the faulty line, extracts the real and imaginary parts of the network equations at the first and second frequencies, and constructs a system of real equations. The calculation module uses the interior-point method to solve the real equation system to obtain the equivalent resistance, equivalent inductance, transition resistance, and length ratio parameters of the faulty line. The positioning module calculates the fault distance based on the length ratio parameter to complete the fault location.

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