Dynamic reconstruction device and method for micro-nano small satellite electronic system

Abstract

The invention discloses a dynamic reconstruction device and method for a micro-nano small satellite electronic system. The scheme comprises two parts: one part is a task-oriented hardware dynamic reconstruction technology, FPGA hardware reconstruction is realized through a configuration center and configuration node reconstruction technology, and on-orbit tasks and function upgrading, correction of software and hardware errors, adaptation to different environment adjustment functions and the like can be completed; and 2, on the basis of a software dynamic reconstruction technology of an operating system, an embedded real-time multi-task operating system kernel module is utilized, micro-restart-based operating system self-healing and on-orbit software dynamic upgrading are included, and task-level dynamic upgrading and self-repairing are realized. According to the scheme, flexible configuration and dynamic reconstruction of the micro-nano satellite electronic system are achieved, and the reliability of in-orbit operation of the micro-nano satellite electronic system is guaranteed.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of spacecraft electronics, and in particular to a dynamic reconstruction device and method for micro-nano satellite electronic systems. BACKGROUND

[0002] Micro-nano satellites support rapid response, easy batch deployment, and flexible application, and through task-oriented on-orbit reconstruction and definition, can meet the diversification and dynamic needs of on-orbit tasks. From the aspect of task protection, micro-nano satellite systems must meet the requirements of integrated information protection such as communication, navigation, and remote sensing, and the requirements of space-based tasks such as monitoring, attacking, and defending space targets and information; from the aspect of timeliness, the information update cycle must be improved from days or hours to minutes. In terms of on-orbit operation, self-recovery, self-reconstruction, and autonomous health management and maintenance, the French and Japanese model projects have considered system reconstruction, on-board state monitoring and recovery, and have also attempted satellite platform function upgrade and task migration based on reconstruction. In comparison, domestic research on reconfigurable and software / hardware programmable computer systems is still in the theoretical stage, which has become a bottleneck restricting the performance improvement of the next generation of micro-nano integrated electronic systems suitable for micro-nano satellite platforms, especially multi-purpose applications. SUMMARY

[0003] To support micro-nano satellites for rapid response, easy batch deployment, and flexible application, and through task-oriented on-orbit reconstruction and definition, to meet the diversification and dynamic needs of on-orbit tasks, the present application proposes a dynamic reconstruction technology for micro-nano satellite electronic systems.

[0004] The technical solution adopted by the present application is: A dynamic reconstruction technology for micro-nano satellite electronic systems mainly includes two parts of design: task-oriented hardware dynamic reconstruction technology and software dynamic reconstruction technology based on an operating system. The task-oriented hardware dynamic reconstruction technology can upgrade on-orbit tasks and functions, can correct software and hardware errors that occur after entering orbit in a timely manner, can change system functions according to different space environments and task conditions, can improve processing performance through reloading of control and data algorithms, can reduce the risk of flight tasks, and can improve the reliability of spacecraft. The software dynamic reconstruction technology based on an operating system has self-maintenance function and can accept ground upload instructions for dynamic self-repairing and updating during operation.

[0005] Further, a dynamic reconstruction device for micro-nano satellite electronic systems includes: A hardware dynamic reconstruction module for realizing on-orbit reconfiguration of hardware functions, including a configuration center and at least one configuration node; Software dynamic reconfiguration module: based on embedded real-time multi-task operating system, used to realize software self-recovery and dynamic upgrade; System bus: connecting the hardware dynamic reconfiguration module and the software dynamic reconfiguration module, realizing data interaction and instruction transmission.

[0006] Further, the task-oriented hardware dynamic reconfiguration technology includes: reconfiguration technology of configuration center and configuration node. The configuration center reconfiguration technology generally executes the main program by the high-performance processing module, and the high-performance processing module realizes the hardware reconfiguration of the target system through the configuration bus. Each target system has a different address number, which is distinguished by this address number. A task for receiving ground information is created under the operating system of the high-performance processing module. After receiving the hardware reconfiguration task instruction, the high-performance processing module acts as the configuration center, confirms the normal communication link with each configuration node, and then issues the configuration information of each configuration node. The configuration information specifically involves: port information, destination address, configuration file size, etc. The specific models of the high-performance processing module involve: D2000V, FT-DM6672V, AM64XX, etc.

[0007] Further, a hardware reconfiguration task is created under the operating system of the configuration node, which is responsible for receiving the hardware reconfiguration configuration information issued by the high-performance processing module and storing it into the configuration memory. After receiving and verifying the information without error, it waits for the hardware reconfiguration instruction, which makes the processing system of the configuration node reinitialize, configure and enable the programmable logic. The types of configuration memory include but are not limited to Nor Flash, EEPROM, NAND, etc. non-volatile memory. The verification without error is to perform CRC data verification on each frame of data, and generate ECC check code to improve the space particle error correction capability.

[0008] Further, after the high-performance processing module obtains the programming data through the reconfiguration channel, the dynamic loading and reconfiguration of the functional module are realized according to the configuration node and information path, the hardware reconfiguration of the FPGA is realized, and thus the task-oriented hardware dynamic reconfiguration technology is realized.

[0009] Further, the specific process of dynamic loading is as follows: Stage 1: SoC loads the boot program; Stage 2: Configure the global logic of the PL, and the local reconfigurable area generally loads an initial configuration bit file first; Stage 3: Extract the local reconfiguration logic from the storage medium to the memory for caching; Stage 4: SoC initiates the dynamic configuration action, downloads the local reconfiguration logic through the configuration channel, and makes it effective. Accompanying the loading of the corresponding driver and application, the new hardware configuration takes effect.

[0010] The third stage and the fourth stage can be cyclically executed to realize dynamic configuration by downloading different configuration schemes.

[0011] After the high-performance processing module obtains the programming data through the reconfiguration channel, the dynamic loading and reconfiguration of the functional module are realized according to the configuration node and the information path, the hardware reconfiguration of the FPGA is realized, and the task-oriented hardware dynamic reconfiguration technology is realized.

[0012] Further, the on-orbit software dynamic upgrade system provided by the application adopts a software dynamic modification technology, namely, mainly refers to memory data modification and target code change of a running program in a running process, utilizes memory management, task scheduling, process synchronization and network communication kernel modules provided by an embedded real-time multi-task operating system, directly modifies the program code in the memory in a running process, and realizes task-level dynamic upgrade.

[0013] Further, the operating system self-recovery based on micro-restart includes two parts: operating system self-recovery based on micro-restart and on-orbit software dynamic upgrade. The recursive recovery framework of the operating system micro-restart is composed of a fault detection agent, a recovery manager and a recovery agent. The fault detection agent is responsible for real-time monitoring of the running state of the system, finding system faults and transmitting relevant information to the recovery manager. The recovery manager dynamically saves the fault propagation information of the system, adopts an automatic fault path inference recovery strategy when it receives the fault information sent from the detection agent (the recovery starts from the initial version by default, and can also start from the reconfiguration version or the previous version according to the ground instruction), calculates the optimal recursive recovery path for a given recursive restart tree, and triggers the recovery agent to realize the micro-restart operation of the component.

[0014] Further, the on-orbit software dynamic upgrade includes two parts: operating system self-recovery based on micro-restart and on-orbit software dynamic upgrade. The on-orbit software dynamic upgrade mainly solves the following problems: after a software fault or a software defect is found in the target system running, a software patch is formed by modifying the software by the developer, the modified information is submitted to the ground monitoring machine after simulation test (the ground parallel test system is equivalent to the on-orbit equipment, the on-orbit upgrade process is verified through the system, and the correctness and reliability of the on-orbit dynamic upgrade are verified), the ground monitoring machine sends the software patch to the on-orbit equipment, and then the on-orbit equipment dynamically modifies the on-orbit system; and the running feedback information is sent from the on-orbit equipment to the ground monitoring machine.

[0015] The application has the following beneficial effects: The application provides a dynamic reconstruction scheme for a micro-nano small satellite electronic system, and realizes flexible configuration, dynamic reconstruction of the micro-nano satellite electronic system, and ensures the reliability of the micro-nano satellite electronic system in orbit operation through a task-oriented hardware dynamic reconstruction design and a software dynamic reconstruction scheme design based on an operating system.

[0016] Of course, implementing any product of the application does not necessarily require all the advantages described above to be achieved at the same time. BRIEF DESCRIPTION OF DRAWINGS

[0017] Figure 1 It is a schematic diagram of a dynamic reconstruction method for a micro-nano small satellite electronic system. Figure 2 It is a schematic diagram of a hardware dynamic reconstruction architecture of a micro-nano comprehensive electronic system. Figure 3 It is a dynamic reconstruction specific implementation process of a configuration node of the application. Figure 4 It is a micro-restart self-healing operating system architecture. Figure 5 It is an on-orbit software upgrade implementation process. DETAILED DESCRIPTION

[0018] To make the purpose, technical scheme and advantages of the application clearer, the embodiments of the application will be described in detail below with reference to the drawings.

[0019] To realize the dynamic reconstruction of the micro-nano small satellite electronic system, the application verifies the integrated electronic system integrated architecture, as shown in the figure, which mainly includes a task-oriented hardware dynamic reconstruction technology and a software dynamic reconstruction technology based on an operating system. Figure 1

[0020] To this end, the application discloses a dynamic reconstruction device for a micro-nano small satellite electronic system, which comprises: a hardware dynamic reconstruction module: used for realizing on-orbit reconfiguration of hardware functions, comprising a configuration center and at least one configuration node; a software dynamic reconstruction module: based on an embedded real-time multi-task operating system, used for realizing self-healing and dynamic upgrading of software; a system bus: connecting the hardware dynamic reconstruction module and the software dynamic reconstruction module, realizing data interaction and instruction transmission.

[0021] The hardware dynamic reconstruction architecture is as shown in the figure. Figure 2 ​As shown, the hardware dynamic reconfiguration mainly includes a configuration center and a plurality of configuration terminals. The configuration center contains a high-performance processing module, which realizes hardware configuration of a target system through a configuration bus. Each target system has a different address number, which is used for distinguishing. The configuration bus is in the form of a standard interface such as an asynchronous serial port, SPI, or a self-defined interface.

[0022] In a preferred embodiment, the high-performance processing module is selected from an FPGA / SoC, which contains: a configuration bus interface for connecting each configuration node and distinguishing the target system based on a unique address number; a ground instruction receiving unit for creating a task through an operating system and receiving and analyzing hardware reconfiguration instructions; a communication link confirmation unit for verifying the communication link connectivity with the configuration node; a configuration information issuing unit for sending reconfiguration data to each configuration node; the configuration node contains: a reconfiguration task processing unit for creating a task through an operating system and receiving and storing configuration information; a configuration memory for buffering reconfiguration data and performing verification; a programmable logic unit (such as an FPGA PL end) for reinitializing, configuring, and enabling hardware logic after receiving a reconfiguration instruction.

[0023] In an embodiment, the programmable logic unit of the configuration node supports a dynamic loading process, which includes: a SoC boot module for loading a boot program; a global logic configuration module for initializing the global logic of the PL end and loading the initial configuration file of the local reconfigurable area; a local logic cache module for extracting local reconfiguration logic from a storage medium to memory; a dynamic configuration execution module for downloading local reconfiguration logic through a configuration channel and triggering driver and application loading to make the new configuration effective.

[0024] The hardware dynamic reconfiguration process is as follows: Figure 3As shown, a task of receiving ground injection information is created under the operating system of the high-performance processing module, after receiving the hardware reconfiguration task instruction, the high-performance processing module serves as a configuration center, confirms the normal communication link with each configuration node, then issues the configuration information of each configuration node, and sends a hardware reconfiguration instruction to itself after the issuing is completed. A hardware reconfiguration task is created under the operating system of the configuration node, responsible for receiving the hardware reconfiguration configuration information issued by the high-performance processing module, and storing the hardware reconfiguration configuration information into the configuration memory, after the receiving is completed and the verification is correct, waiting for a hardware reconfiguration instruction, the instruction makes the processing system of the configuration node re-complete the initialization, configuration and enablement of the programmable logic.

[0025] The application utilizes the memory management, task scheduling, process synchronization and network communication kernel modules provided by the embedded real-time multitasking operating system, directly modifies the running program code in the memory, and realizes the task-level dynamic upgrade. The software dynamic reconfiguration technology based on the operating system mainly includes two parts: operating system self-healing based on micro-restart and on-orbit software dynamic upgrade.

[0026] The software dynamic reconfiguration module of the application comprises: The operating system self-healing submodule comprises: The fault detection agent is used for monitoring the system memory, process, IO and kernel state in real time, and capturing fault information; The recovery manager is used for storing fault propagation information, and calculating the optimal recovery path based on the recursive restart tree; The recovery agent is used for executing the component micro-restart operation to isolate the fault.

[0027] The on-orbit software upgrade submodule comprises: The patch receiving unit is used for receiving the software patch sent by the ground monitoring machine; The code dynamic modification unit directly modifies the running program code based on the memory management module of the operating system; The state feedback unit is used for feeding back the upgrade result and task running data to the ground monitoring machine.

[0028] Further, the on-orbit software upgrade submodule supports a closed-loop process: The developer generates a patch, simulates the test, the ground monitoring machine sends the patch, the on-orbit equipment dynamically modifies the code, the task is re-executed, and the information is fed back to the ground monitoring machine.

[0029] Firstly, the operating system self-healing based on micro-restart, such as Figure 4As shown, the recursive recovery framework of the operating system micro-restart is composed of three modules, a fault monitoring agent, a recovery manager and a recovery agent. The fault monitoring agent is responsible for monitoring the running state of the system in real time, including system memory, process, IO and kernel state, and submitting all fault information of the system running state to the recovery manager. When the recovery manager receives the fault information sent from the detection agent, it adopts automatic fault path inference to recover the strategy, calculates the optimal recursive recovery path for a given recursive restart tree and triggers the recovery agent to implement the micro-restart operation of the component.

[0030] Further, the on-orbit software dynamic upgrade, such as Figure 5 As shown, the on-orbit software dynamic upgrade system includes three parts of patch generation, on-orbit modification and maintenance monitoring. After obtaining the software fault or software defect information in the running of the target system, the developer modifies the software error to create a software patch, submits it to the ground monitoring machine after simulation test, and sends it to the on-orbit equipment by the ground monitoring machine; the on-orbit equipment receives the patch, dynamically modifies the on-orbit system code, and re-executes the task, and feeds back the maintenance information according to the task running result; the running feedback information is sent to the ground monitoring machine by the on-orbit equipment, and the ground monitoring machine receives and processes it.

[0031] After the high-performance processing module of the application obtains the programming data through the reconfiguration channel, the dynamic loading and reconfiguration of the functional module are realized according to the configuration node and information path, the hardware reconfiguration of the FPGA is realized, and the task-oriented hardware dynamic reconfiguration technology is realized.

[0032] Further, the specific process of dynamic loading is as follows: The first stage: SoC loads the booting program; The second stage: the PL end global logic is configured, and the local reconfigurable area in it is generally loaded with an initial configuration bit file first; The third stage: the local reconfiguration logic is extracted from the storage medium to the memory for caching; The fourth stage: the SoC initiates the dynamic configuration action, and downloads the local reconfiguration logic to take effect through the configuration channel. Accompanied by loading the corresponding driver and application, the new hardware configuration takes effect.

[0033] The third stage and the fourth stage can be executed in cycles to download different configuration schemes to realize dynamic configuration.

[0034] In order to verify the dynamic reconstruction of the micro-nano satellite electronic system, the application carries out on-orbit test on the basis of the integrated architecture of a satellite comprehensive electronic system, and a total of 13 times of hardware reconstruction and 48 times of software upgrading are completed on-orbit, which mainly involves two parts of contents of task-oriented hardware dynamic reconstruction technology and software dynamic reconstruction technology based on an operating system. Compared with the traditional reconstruction mode, the dynamic reconstruction and upgrading success rate based on the application is greater than 98%, and the human intervention of ground test and control is greatly reduced, so that the on-orbit function upgrading iteration demand of the satellite equipment is met.

[0035] In summary, the application realizes the flexible configuration and dynamic reconstruction of the micro-nano satellite electronic system by the task-oriented hardware dynamic reconstruction design and the software dynamic reconstruction scheme design based on the operating system, and guarantees the reliability of the micro-nano satellite electronic system in on-orbit operation.

[0036] The above merely describes the preferred embodiments of the application, but the protection scope of the application is not limited to this. Any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the application, which should be covered in the protection scope of the application. Therefore, the protection scope of the application should be subject to the protection scope of the claims.

Claims

1. A dynamic reconfiguration device for micro-nano satellite electronic systems, characterized in that, Comprise: Hardware dynamic reconfiguration module: for realizing the on-orbit reconfiguration of hardware functions, including a configuration center and at least one configuration node; Software dynamic reconfiguration module: based on an embedded real-time multitasking operating system, for realizing the self-healing and dynamic upgrading of software; System bus: connecting the hardware dynamic reconfiguration module and the software dynamic reconfiguration module, realizing data interaction and instruction transmission.

2. The dynamic reconfiguration device for micro-nano satellite electronic system according to claim 1, characterized in that, In the hardware dynamic reconfiguration module: The configuration center is composed of a high-performance processing module, including: A configuration bus interface for connecting each configuration node and distinguishing the target system based on a unique address number; A ground instruction receiving unit for receiving and analyzing hardware reconfiguration instructions through the creation of tasks by the operating system; A communication link confirmation unit for verifying the communication link connectivity with the configuration nodes; A configuration information issuing unit for sending reconfiguration configuration data to each configuration node; The configuration node includes: A reconfiguration task processing unit for receiving and storing configuration information through the creation of tasks by the operating system; A configuration memory for buffering reconfiguration configuration data and performing verification; A programmable logic unit for reinitializing, configuring, and enabling hardware logic after receiving reconfiguration instructions.

3. The dynamic reconfiguration device for micro-nano satellite electronic system of claim 2, wherein, The programmable logic unit of the configuration node supports a dynamic loading process, including: A SoC boot module for loading a boot program; A global logic configuration module for initializing the global logic of the PL side and loading the initial configuration file of the local reconfigurable area; A local logic cache module for extracting local reconfiguration logic from a storage medium to memory; A dynamic configuration execution module for downloading local reconfiguration logic through a configuration channel and triggering the loading of drivers and applications to make the new configuration effective.

4. The dynamic reconfiguration device for micro-nano satellite electronic system of claim 1, wherein, The software dynamic reconfiguration module includes: An operating system self-healing submodule: A fault detection agent for real-time monitoring of system memory, processes, IO, and kernel state, capturing fault information; A recovery manager for storing fault propagation information and calculating the optimal recovery path based on a recursive restart tree; A recovery agent for performing component micro-restart operations to isolate faults; An on-orbit software upgrading submodule: A patch receiving unit for receiving software patches sent by a ground monitoring machine; A code dynamic modification unit for directly modifying running program code based on the operating system memory management module; A state feedback unit for feeding back upgrading results and task running data to the ground monitoring machine.

5. The dynamic reconfiguration device for micro-nano satellite electronic system of claim 4, wherein, The on-orbit software upgrading submodule supports a closed-loop process: Developers generate patches; simulate testing; the ground monitoring machine sends patches; on-orbit equipment dynamically modifies code; task re-execution; feedback information to the ground monitoring machine.

6. A dynamic reconfiguration method for micro-nano small satellite electronic system, for implementing the dynamic reconfiguration device for micro-nano small satellite electronic system according to any one of claims 1-5, characterized in that, Including hardware dynamic reconfiguration method and software dynamic reconfiguration method, both of which are executed collaboratively through an embedded real-time multitasking operating system.

7. The method of claim 6, wherein the method further comprises: The hardware dynamic reconfiguration method includes the following steps: Configuration center operation: The high-performance processing module creates a ground instruction receiving task through the operating system to obtain hardware reconfiguration instructions; Verify the communication link connectivity with each configuration node; Based on the address number of the target system, send reconfiguration configuration information to each node through the configuration bus; Configuration node operation: Receive and store configuration information to the configuration memory, perform verification; After receiving the reconfiguration instruction, the programmable logic unit is initialized, configured and enabled to complete hardware function reconfiguration.

8. The method of claim 7, wherein the method further comprises: The programmable logic unit dynamic loading step of the configuration node comprises: Stage 1: the SoC loads a booting program; Stage 2: the global logic of the PL end is configured, and the initial configuration bit file of the local reconfigurable area is loaded; Stage 3: the local reconfiguration logic is extracted from the storage medium to the memory cache; Stage 4: the local reconfiguration logic is downloaded through the configuration channel, the driver and the application are loaded to make the new configuration effective; Stages 3-4 can be cyclically executed to realize switching of different configuration schemes.

9. The method of claim 6, wherein the method further comprises: The software dynamic reconfiguration method comprises: The operating system self-recovery process based on micro-restart: The fault detection agent monitors the system state in real time, captures fault information and delivers it to the recovery manager; The recovery manager calculates the optimal recovery path based on the recursive restart tree, and triggers the recovery agent to execute the component micro-restart; The on-orbit software dynamic upgrade process: The developer generates a software patch according to the fault information, submits it to the ground monitoring machine after simulation testing; The ground monitoring machine sends the patch to the on-orbit equipment; The on-orbit equipment dynamically modifies the running code through the operating system memory management module and re-executes the task; The upgrade result and the task running state are fed back to the ground monitoring machine.

10. The method of claim 6, wherein the method is characterized by, The calculation of the recursive restart tree is based on an automatic fault path inference strategy, and for a given recursive restart tree, the optimal recursive recovery path is calculated, the recovery agent is triggered, and the micro-restart operation of the component is realized.

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