A core pellet pattern defect detection method and system

Abstract

The application provides a kind of core particle pattern defect detection method and system, by obtaining core particle pattern, according to core particle pattern, same type core particle is positioned and mean graph and standard deviation graph are calculated;The standard deviation graph is carried out morphological inflation, and the inflation standard deviation graph is generated, and the inflation standard deviation graph is calculated by k power, and the enhanced standard deviation graph is generated;According to the mean graph and the enhanced standard deviation graph, the Z-score value of the normal distribution core particle superimposed graph is determined;According to the Z-score value of the normal distribution core particle superimposed graph, the light defect area and the dark defect area are positioned respectively by double threshold strategy, specifically, the standard normal distribution score of edge area is reduced by inflation operation, and the false detection caused by positioning error is inhibited, in addition, the standard deviation of edge area is selectively enhanced by power transformation, to further distinguish real defects and edge noise.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of core particle detection, and particularly relates to a core particle pattern defect detection method and system. BACKGROUND

[0002] In the wafer manufacturing process, the pattern defect detection of core particles (Chiplets) is a key link to ensure product quality.

[0003] The die to die core particle pattern defect positioning method based on statistics usually calculates a normal distribution score map through the mean map and standard deviation map of the core particles, and finally locates the defects through threshold comparison.

[0004] However, this method has the following problems: 1) the positioning accuracy is insufficient, and the slight deviation of the mechanical or optical system will cause position difference and gray difference in image alignment; in the die to die detection process, a large number of false detections are generated at the edges of the core particle pattern; 2) in the prior art, the improvement for edge false detection depends on hardware calibration or additional construction of image edge mask and other complex algorithms, which is high in cost and low in efficiency. SUMMARY

[0005] Therefore, the embodiments of the present application provide a core particle pattern defect detection method and system, which aims to perform image processing on the core particle standard deviation image, significantly reduce the edge false detection of the core particle pattern, and maintain the detection sensitivity of the non-edge area.

[0006] The first aspect of the embodiments of the present application provides a core particle pattern defect detection method, which comprises:

[0007] Obtaining a core particle pattern, locating core particles of the same type according to the core particle pattern, and calculating a mean map and a standard deviation map;

[0008] Performing morphological dilation on the standard deviation map to obtain a dilated standard deviation map, and performing k power calculation on the dilated standard deviation map to generate an enhanced standard deviation map, wherein the value range of k is (1, 2];

[0009] Determining the Z-score value of the normal distribution core particle overlay map according to the mean map and the enhanced standard deviation map;

[0010] Locating the bright defect area and the dark defect area through a double-threshold strategy according to the Z-score value of the normal distribution core particle overlay map.

[0011] Further, in the step of performing morphological dilation on the standard deviation map to obtain a dilated standard deviation map, performing dilation operation on the standard deviation map with a structure element size of 3x3 to obtain a dilated standard deviation map, wherein, The edge theoretical pixel width measured by the core particle design drawing or image is measured, c is a proportional coefficient, the value range is [0.8, 1.2], b is a compensation coefficient, the value range is [1, 3].

[0012] Further, the calculation formula of the expansion operation is:

[0013] ;

[0014] Wherein, is the value of the standard deviation map after expansion at (x, y), is the value of the standard deviation map at (x+s, y+t), (s, t) is the pixel coordinate of the structure element, and B is the pixel coordinate set of the structure element.

[0015] Further, in the step of determining the Z-score value of the normal distribution core particle superposition image according to the mean value map and the enhanced standard deviation map, the calculation formula of the Z-score value of the normal distribution core particle superposition image is:

[0016] ;

[0017] Wherein, is the Z-score value of the pixel value at (x, y) of the nth core particle, is the pixel value of the nth core particle at (x, y), is the pixel value of the mean value map at (x, y), is the value of the enhanced standard deviation map at (x, y), and ε is a minimum value.

[0018] Further, the step of positioning the bright defect and the dark defect by the double threshold strategy according to the Z-score value of the normal distribution core particle superposition image comprises:

[0019] calculating the overall distribution of the Z-score value of the normal distribution core particle superposition image of all core particles of the same type, and determining the bright defect threshold and the dark defect threshold according to the false detection rate and the missed detection rate requirement of defect detection;

[0020] comparing the Z-score value with the bright defect threshold and the dark defect threshold to determine the bright defect pixel and the dark defect pixel;

[0021] The bright defect pixel and the dark defect pixel are respectively subjected to connected region analysis, and adjacent defect pixels are combined into a defect region.

[0022] The second aspect of the embodiment of the application provides a core particle pattern defect detection system for realizing the core particle pattern defect detection method of the first aspect, and the system comprises:

[0023] an acquisition module configured to acquire a core pattern, locate core particles of the same type according to the core pattern, and calculate a mean value map and a standard deviation map;

[0024] a calculation module configured to perform morphological dilation on the standard deviation map to obtain a dilated standard deviation map, and perform k-th power calculation on the dilated standard deviation map to generate an enhanced standard deviation map, where k is in a range of (1, 2];

[0025] a determination module configured to determine a Z-score value of a normally distributed core particle overlay according to the mean value map and the enhanced standard deviation map;

[0026] a positioning module configured to locate a bright defect region and a dark defect region respectively by a double-threshold strategy according to the Z-score value of the normally distributed core particle overlay.

[0027] A third aspect of the embodiment of the present application provides a computer readable storage medium, which stores a computer program, and the program is executed by a processor to implement the core pattern defect detection method provided in the first aspect.

[0028] A fourth aspect of the embodiment of the present application provides an electronic device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor implements the core pattern defect detection method provided in the first aspect when executing the program.

[0029] The core pattern defect detection method and system provided in the embodiment of the present application, by acquiring a core pattern, locating core particles of the same type according to the core pattern, and calculating a mean value map and a standard deviation map, performing morphological dilation on the standard deviation map to obtain a dilated standard deviation map, and performing k-th power calculation on the dilated standard deviation map to generate an enhanced standard deviation map, determining a Z-score value of a normally distributed core particle overlay according to the mean value map and the enhanced standard deviation map, and locating a bright defect region and a dark defect region respectively by a double-threshold strategy according to the Z-score value of the normally distributed core particle overlay, specifically, reducing the standard normal distribution score of the edge region by the dilation operation to suppress false detection caused by positioning error, and additionally selectively enhancing the standard deviation of the edge region by the power transformation to further distinguish real defects from edge noise. BRIEF DESCRIPTION OF DRAWINGS

[0030] Figure 1 An implementation flowchart of the core pattern defect detection method provided in the first embodiment of the present application;

[0031] Figure 2 A structural block diagram of the core pattern defect detection system provided in the second embodiment of the present application;

[0032] Figure 3A structural block diagram of an electronic device is provided for Embodiment Three of the present application. DETAILED DESCRIPTION

[0033] For the purpose of promoting the understanding of the present application, a more complete description of the present application will be rendered by reference to specific embodiments thereof, which are depicted in the accompanying drawings. It is to be noted, however, that the present application is not limited to the specific embodiments described below, and various modifications can be made without departing from the scope of the present application. Rather, the purpose of the embodiments is to make the disclosure more thorough and complete.

[0034] It is to be noted that when an element is referred to as being "on" another element, it can be directly on the other element or intervening elements can also be present. When an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements can also be present. The terms "vertical", "horizontal", "left", "right" and similar expressions as used herein are for illustration purposes only.

[0035] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0036] Embodiment One

[0037] According to the embodiments of the present application, a core particle pattern defect detection method is provided. It is to be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described herein can be executed in an order different from that shown herein.

[0038] In this embodiment one, a core particle pattern defect detection method is provided, which can be used in electronic devices such as computers. Please refer to Figure 1 , Figure 1 An implementation flowchart of the core particle pattern defect detection method provided by Embodiment One of the present application is shown, which specifically includes steps S01 to S04.

[0039] In step S01, a core particle pattern is acquired, and according to the core particle pattern, core particles of the same type are located and a mean value map and a standard deviation map are calculated.

[0040] Specifically, in the process of scanning the wafer image, after the core particle position is located, each core particle is superimposed according to the channel dimension, and the mean value graph and the standard deviation graph of the same type of core particle in each batch of core particle superimposed graphs are dynamically calculated, wherein the mean value graph is used to reflect the average gray level of the same position in all the same core particles, and the calculation formula is:

[0041] ;

[0042] is the gray value of the mean value graph at (x, y), N is the total number of the same core particles, is the gray value of the i-th core particle at (x, y), if (x, y) is not in any core particle area, the value is 0 or the background gray value.

[0043] The standard deviation graph reflects the gray dispersion degree of the same position in all the same core particles, and the greater the dispersion degree, the more likely the position has defects (such as bright spots, dark spots), and the calculation formula is:

[0044] ;

[0045] is the standard deviation of the standard deviation graph at (x, y), is the gray value of the mean value graph at (x, y), N is the total number of the same core particles, is the gray value of the i-th core particle at (x, y), and N-1 is used as the denominator for unbiased estimation to avoid statistical bias when the sample size is small.

[0046] In step S02, the standard deviation graph is morphologically dilated to obtain a dilated standard deviation graph, and k power calculation is performed on the dilated standard deviation graph to generate an enhanced standard deviation graph.

[0047] It should be noted that the dilated operation of the standard deviation graph is performed on the structural element size to obtain the dilated standard deviation graph, wherein is the edge theoretical pixel width measured by the core particle design drawing or image, c is a proportional coefficient, the value range is [0.8, 1.2], and b is a compensation coefficient, the value range is [1, 3].

[0048] In the embodiment of the application, the structural element size d is calibrated based on the wafer factory process design rule file according to the core particle process node, and remains unchanged within the same wafer batch, in addition, the dilated operation and the k power calculation only act on the standard deviation graph or the image obtained after dilating, without generating or storing the core particle gradient graph or the edge mask.

[0049] It should be noted that the calculation formula of the dilated operation is:

[0050] ;

[0051] wherein, is the value of the standard deviation map at (x, y) after dilation, is the value of the standard deviation map at (x+s, y+t), (s, t) is the pixel coordinate of the structuring element, B is the set of pixel coordinates of the structuring element, and the maximum value is taken as the pixel value at the position after dilation by traversing all valid regions of the structuring element B, so as to realize expansion of the high standard deviation region.

[0052] In the step of performing k-power calculation on the dilated standard deviation map to generate the enhanced standard deviation map, the calculation formula can be represented as:

[0053] ;

[0054] wherein, is the value of the optimized standard deviation map at (x, y), is the value of the standard deviation map at (x, y) after dilation, and the value range of k is (1, 2]. It can be understood that the value of the edge region of the core particle is higher than that of the non-edge region, and when k-power (1 < k ≤ 2) calculation is performed on the value, the increase amplitude of the high value will be significantly higher than that of the low value, so as to further enlarge the standard deviation difference between the edge region and the non-edge region, and realize selective enhancement of the edge.

[0055] In some other embodiments of the application, the operation sequence of performing morphological dilation and performing k-power calculation can be exchanged.

[0056] In step S03, the Z-score value of the normal distribution core particle overlay map is determined according to the mean value map and the enhanced standard deviation map.

[0057] The calculation formula of the Z-score value of the normal distribution core particle overlay map is:

[0058] ;

[0059] wherein, is the Z-score value of the pixel value of the nth core particle at (x, y), is the pixel value of the nth core particle at (x, y), is the pixel value of the mean value map at (x, y), is the value of the enhanced standard deviation map at (x, y), and ε is a minimum value. It can be understood that the Z-score (standardized score) is used to measure the standard deviation multiple of a single data point (a certain pixel of a single core particle) deviating from the overall mean value, and the greater the absolute value, the more abnormal the gray level of the pixel is, and the more likely it is a defect.​​

[0060] Step S04, according to the Z-score value of the normal distribution core grain overlay, the bright defect region and the dark defect region are respectively located by a double threshold strategy.

[0061] Specifically, the overall distribution of the Z-score value of the normal distribution core grain overlay of all core grains of the same type is calculated (usually conforming to the normal distribution N(0, 1)), and according to the false detection rate and the missed detection rate requirement of defect detection, the bright defect threshold and the dark defect threshold are determined according to the standard normal distribution table;

[0062] The Z-score value is compared with the bright defect threshold and the dark defect threshold to determine the bright defect pixel and the dark defect pixel. It can be understood that when the Z-score value is greater than or equal to the bright defect threshold, the (x, y) pixel of the corresponding core grain is determined as a bright defect pixel, and the pixel coordinates are recorded; when the Z-score value is less than or equal to the dark defect pixel, the (x, y) pixel of the corresponding core grain is determined as a dark defect pixel, and the pixel coordinates are recorded.

[0063] The bright defect pixels and the dark defect pixels are respectively subjected to connected region analysis, and adjacent defect pixels are combined into a defect region.

[0064] In summary, the core grain pattern defect detection method in the above-mentioned embodiments of the present application acquires the core grain pattern, locates the core grains of the same type according to the core grain pattern, and calculates the mean value map and the standard deviation map; the standard deviation map is subjected to morphological dilation to obtain the dilated standard deviation map, and the dilated standard deviation map is subjected to k power calculation to generate the enhanced standard deviation map; the Z-score value of the normal distribution core grain overlay is determined according to the mean value map and the enhanced standard deviation map; the bright defect region and the dark defect region are respectively located by a double threshold strategy according to the Z-score value of the normal distribution core grain overlay. Specifically, the standard normal distribution score of the edge region is reduced by the dilation operation to suppress the false detection caused by the positioning error, and in addition, the standard deviation of the edge region is selectively enhanced by the power transformation to further distinguish the real defect from the edge noise.

[0065] Embodiment Two

[0066] Please refer to Figure 2 , Figure 2 is a structural block diagram of a core grain pattern defect detection system provided by the embodiment two of the present application. The core grain pattern defect detection system 200 is used to realize the above-mentioned embodiments and preferred embodiments, and the description has been made and will not be repeated. As used below, the term "module" can be a combination of software and / or hardware that realizes a predetermined function. Although the devices described in the following embodiments are preferably realized in software, the realization of hardware, or the combination of software and hardware is also possible and conceived.

[0067] Specifically, the core grain pattern defect detection system 200 comprises an acquisition module 21, a calculation module 22, a determination module 23 and a positioning module 24, wherein:

[0068] The acquisition module 21 is configured to acquire a core grain pattern, locate core grains of the same type according to the core grain pattern, and calculate a mean value map and a standard deviation map;

[0069] The calculation module 22 is configured to perform morphological dilation on the standard deviation map to obtain a dilated standard deviation map, and perform k-power calculation on the dilated standard deviation map to generate an enhanced standard deviation map, wherein k is in a range of (1, 2], the dilated standard deviation map is obtained by performing dilation operation with a structural element size of the standard deviation map, wherein, is an edge theoretical pixel width measured by a core grain design drawing or an image, c is a proportional coefficient, and is in a range of [0.8, 1.2], b is a compensation coefficient, and is in a range of [1, 3], and a calculation formula of the dilation operation is:

[0070] ;

[0071] wherein, is a value of the dilated standard deviation map at (x, y), is a value of the standard deviation map at (x+s, y+t), (s, t) is a structural element pixel coordinate, and B is a set of structural element pixel coordinates, in addition, k is adaptively adjusted according to the dilated standard deviation map, so that the edge region obtains stronger enhancement effect, and the non-edge region maintains moderate enhancement;

[0072] The determination module 23 is configured to determine a Z-score value of a normal distribution core grain overlay according to the mean value map and the enhanced standard deviation map, and a calculation formula of the Z-score value of the normal distribution core grain overlay is:

[0073] ;

[0074] wherein, is a Z-score value of a pixel value of an nth core grain at (x, y), is a pixel value of the nth core grain at (x, y), is a pixel value of the mean value map at (x, y), is a value of the enhanced standard deviation map at (x, y), and ε is a minimum value;

[0075] The positioning module 24 is configured to respectively locate a bright defect region and a dark defect region by a double-threshold strategy according to the Z-score value of the normal distribution core grain overlay.

[0076] Further, in some optional embodiments of the present application, the positioning module 24 comprises:

[0077] a calculating unit configured to calculate the overall distribution of Z-score values of the normal distribution wafer map of all wafer of the same type, and determine the bright defect threshold and the dark defect threshold according to the false detection rate and the missed detection rate requirement of the defect detection and the standard normal distribution table;

[0078] a comparing unit configured to compare the Z-score values with the bright defect threshold and the dark defect threshold, and determine the bright defect pixels and the dark defect pixels;

[0079] an analyzing unit configured to perform connected region analysis on the bright defect pixels and the dark defect pixels respectively, and combine adjacent defect pixels into a defect region.

[0080] Embodiment Three

[0081] In another aspect, the present application also provides an electronic device, which refers to Figure 3 , which is an electronic device in the embodiment three of the present application, comprising a memory 20, a processor 10, and a computer program 30 stored in the memory and capable of running on the processor, wherein the processor 10 implements the wafer pattern defect detection method as described above when executing the computer program 30.

[0082] In some embodiments, the processor 10 can be a central processing unit (CPU), a controller, a microcontroller, a microprocessor, or other data processing chip, which is configured to run program codes or process data stored in the memory 20, such as executing access restriction programs.

[0083] In some embodiments, the memory 20 can be an internal storage unit of the electronic device, such as a hard disk of the electronic device. In other embodiments, the memory 20 can also be an external storage device of the electronic device, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. equipped on the electronic device. Further, the memory 20 can include both the internal storage unit and the external storage device of the electronic device. The memory 20 can be used not only to store application software and various data of the electronic device, but also to temporarily store data that has been output or will be output.

[0084] It should be noted that, Figure 3The illustrated structure does not limit the electronic device, which can include fewer or more components than shown, or combine certain components, or have a different arrangement of the components in other embodiments.

[0085] The embodiment of the present application further provides a computer readable storage medium, which stores a computer program. The computer program is executed by a processor to implement the core particle pattern defect detection method.

[0086] Those skilled in the art can understand that the logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a list of executable instructions for implementing the logic function, which can be specifically implemented in any computer readable medium for use by or in conjunction with an instruction execution system, device or apparatus, such as a computer-based system, a system including a processor or other system that can fetch and execute instructions from the instruction execution system, device or apparatus. For the present description, the "computer readable medium" can be any device that can contain, store, communicate, propagate or transport programs for use by or in conjunction with the instruction execution system, device or apparatus, or in conjunction with these instruction execution systems, devices or apparatus.

[0087] More specific examples (a non-exhaustive list) of the computer readable medium include the following: an electrical connection having one or more wires (electrical devices), a portable computer diskette (magnetic devices), a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). In addition, the computer readable medium can even be paper or another suitable medium upon which the program is printed, because the program can be electronically obtained, for example, by optical scanning of the paper or other medium, followed by electronic means to obtain, interpret or process the program, and then store the program in a computer memory.

[0088] It should be understood that parts of the present application can be implemented in hardware, software, firmware or a combination thereof. In the above-described embodiments, a plurality of steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, and as in another embodiment, it can be implemented by any one or a combination of the following technologies known in the art: discrete logic circuit with logic gate circuit for implementing logic functions on data signals, application specific integrated circuit with suitable combination logic gate circuit, programmable gate array (PGA), field programmable gate array (FPGA) and the like.

[0089] In the description of the present specification, the description of the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" and the like means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0090] The above embodiments only express several implementation manners of the present application, which are described in a more specific and detailed manner, but cannot be understood as a limitation on the patent scope of the present application. It should be noted that, for those skilled in the art, several modifications and improvements can be made without departing from the concept of the present application, which are all within the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A method for detecting core pattern defects, characterized in that, The method includes: Obtain the core pattern, locate cores of the same type based on the core pattern, and calculate the mean plot and standard deviation plot; Morphological dilation is performed on the standard deviation map to obtain a dilated standard deviation map, and the dilated standard deviation map is calculated to the power of k to generate an enhanced standard deviation map, where the value of k ranges from (1, 2]. Based on the mean plot and the enhanced standard deviation plot, determine the Z-score value of the normally distributed core-particle stack plot; Based on the Z-score value of the normally distributed core-particle stack, the bright defect region and the dark defect region are located respectively using a dual threshold strategy.

2. The method for detecting core pattern defects according to claim 1, characterized in that, In the step of performing morphological dilation on the standard deviation map to obtain a dilated standard deviation map, structural element sizing is performed on the standard deviation map. The dilation operation yields a dilated standard deviation plot, where... The theoretical pixel width of the edge is measured by the core design drawings or images. c is the scaling factor, with a value range of [0.8, 1.2], and b is the compensation factor, with a value range of [1, 3].

3. The method for detecting core pattern defects according to claim 2, characterized in that, The calculation formula for the expansion operation is as follows: ； in, The standard deviation plot after inflation shows the values ​​at (x, y). Let be the value of the standard deviation plot at (x+s, y+t), where (s, t) are the pixel coordinates of the structuring element, and B is the set of pixel coordinates of the structuring element.

4. The method for detecting core pattern defects according to claim 3, characterized in that, In the step of determining the Z-score value of the normally distributed core-particle stack based on the mean plot and the enhanced standard deviation plot, the formula for calculating the Z-score value of the normally distributed core-particle stack is as follows: ； in, Let Z be the Z-score value of the pixel at (x, y) for the nth core. Let be the pixel value of the nth core at (x, y). Let be the pixel value at (x, y) in the mean plot. To enhance the value of the standard deviation plot at (x, y), ε is the minimum value.

5. The method for detecting core pattern defects according to claim 4, characterized in that, The step of locating bright and dark defects respectively using a dual-threshold strategy based on the Z-score value of the normally distributed core-particle stack image includes: Calculate the overall distribution of Z-score values ​​of the normal distribution core overlay map for all cores of the same type, and determine the bright defect threshold and dark defect threshold by referring to the standard normal distribution table according to the requirements of false detection rate and false negative rate of defect detection. The Z-score value is compared with the bright defect threshold and the dark defect threshold to determine the bright defect pixel and the dark defect pixel; Connectivity analysis is performed on bright and dark defect pixels respectively, and adjacent defect pixels are merged into defect regions.

6. A core pattern defect detection system, characterized in that, For implementing the core pattern defect detection method as described in any one of claims 1-5, the system comprises: The acquisition module is used to acquire the core pattern, locate cores of the same type based on the core pattern, and calculate the mean plot and standard deviation plot. The calculation module is used to perform morphological dilation on the standard deviation map to obtain a dilated standard deviation map, and to perform k-th power calculation on the dilated standard deviation map to generate an enhanced standard deviation map, wherein the value of k ranges from (1, 2]. The determination module is used to determine the Z-score value of the normally distributed core particle overlay map based on the mean map and the enhanced standard deviation map; The positioning module is used to locate the bright defect region and the dark defect region respectively by means of a dual threshold strategy based on the Z-score value of the normally distributed core particle stack map.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that, When executed by the processor, the program implements the core pattern defect detection method as described in any one of claims 1-5.

8. An electronic device, characterized in that, It includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the program, implements the core pattern defect detection method as described in any one of claims 1-5.

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