Boost conversion circuit and chip
By cascading boost modules and charge pump modules, and controlling the charging and discharging of switch sub-modules, capacitors, and inductors, the problems of large area and low efficiency of boost circuits are solved, achieving more efficient voltage conversion.
Patent Information
- Application Number
- CN202511263467.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-04
- Publication Date
- 2025-12-12
AI Technical Summary
Existing boost circuits suffer from problems such as excessive size and low efficiency.
The output voltage is K times the input voltage by using a cascaded boost module and charge pump module. The output voltage is boosted by controlling the charging and discharging of the switch submodule and capacitors and inductors.
With a smaller circuit area and fewer cascaded circuits, the overall efficiency of the boost converter circuit is improved, and the design difficulty is reduced.
Smart Images
Figure CN121124553A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of integrated circuit technology, and in particular to a boost converter circuit and chip. Background Technology
[0002] Boost circuits primarily convert lower input voltages into higher output voltages through specific control methods, providing power to subsequent load circuits (such as power amplifiers, motor drives, etc.). However, boost circuits in related technologies typically suffer from excessively large footprints and low efficiency. Summary of the Invention
[0003] In view of this, this application provides a boost converter circuit and chip, which can ensure that the area of the boost converter circuit is relatively small and improve the overall efficiency of the boost converter circuit.
[0004] In a first aspect, this application provides a boost converter circuit, comprising: a boost module and a charge pump module; the input terminal of the boost module is connected to an input voltage, and the output terminal of the boost module is cascaded with the charge pump module, the output terminal of the charge pump module generating an output voltage; or, the input terminal of the charge pump module is connected to the input voltage, and the output terminal of the charge pump module is cascaded with the boost module, the output terminal of the boost module generating an output voltage; the output voltage is K times the input voltage, where K is greater than 1.
[0005] Secondly, this application provides a chip that includes the boost circuit described in the first aspect.
[0006] This application provides a boost converter circuit and chip, including cascaded boost modules and charge pump modules. The input terminal of the boost module is connected to an input voltage, and the output terminal of the boost module is cascaded with a charge pump module, which generates an output voltage. Alternatively, the input terminal of the charge pump module is connected to the input voltage, and the output terminal of the charge pump module is cascaded with a boost module, which generates an output voltage. The output voltage is K times the input voltage, where K is greater than 1. Thus, by cascading the boost module and charge pump module, the area of the boost converter circuit can be kept relatively small, the number of cascaded modules can be reduced, and the design difficulty of the boost converter circuit is lowered, thereby improving the overall efficiency of the boost converter circuit. Attached Figure Description
[0007] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings.
[0008] Figure 1 This is a schematic diagram of a structure that uses a boost circuit for power supply;
[0009] Figures 2A to 2D This is a schematic diagram of a boost converter circuit.
[0010] Figure 3 This is a schematic diagram of another boost converter circuit provided in the embodiments of this application;
[0011] Figure 4 This is a schematic diagram of a boost converter circuit provided in an embodiment of this application;
[0012] Figure 5 This is a schematic diagram of a boost converter circuit provided in an embodiment of this application;
[0013] Figure 6 This is a schematic diagram of a boost converter circuit provided in an embodiment of this application;
[0014] Figure 7 This is a schematic diagram of a boost converter circuit provided in an embodiment of this application;
[0015] Figure 8 This is a schematic diagram of a boost converter circuit provided in an embodiment of this application;
[0016] Figure 9 This is a schematic diagram of a boost converter circuit provided in an embodiment of this application;
[0017] Figure 10 This is a schematic diagram of a boost converter circuit provided in an embodiment of this application;
[0018] Figure 11 This is a schematic diagram of a boost converter circuit provided in an embodiment of this application;
[0019] Figure 12 This is a schematic diagram of a boost converter circuit provided in an embodiment of this application;
[0020] Figure 13 This is a schematic diagram of a boost converter circuit provided in an embodiment of this application;
[0021] Figure 14 This is a schematic diagram of the structure of a chip provided in an embodiment of this application;
[0022] Figure 15 This is a schematic diagram of the structure of a chip provided in an embodiment of this application. Detailed Implementation
[0023] To enable those skilled in the art to better understand the technical solutions in the embodiments of this application, the technical solutions in the embodiments of this application will be clearly and thoroughly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art should fall within the protection scope of the embodiments of this application.
[0024] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.
[0025] In the following description, references are made to “some embodiments,” which describe a subset of all possible embodiments. However, it is understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.
[0026] It should also be noted that the terms "first, second, and third" used in the embodiments of this application are only used to distinguish similar objects and do not represent a specific order of objects. It is understood that "first, second, and third" can be interchanged in a specific order or sequence where permitted, so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein.
[0027] To facilitate understanding of the technical solutions of the embodiments of this application, the relevant technologies of the embodiments of this application are described below. The following relevant technologies are optional solutions and can be combined with the technical solutions of the embodiments of this application in any way, and they all fall within the protection scope of the embodiments of this application.
[0028] Figure 1 This is a schematic diagram of a structure that uses a boost circuit for power supply. For example... Figure 1 As shown, the boost circuit 110 mainly converts the lower input voltage into a higher output voltage through a certain control method, so as to provide power to the subsequent load circuit 120 (such as power amplifier, motor drive, etc.).
[0029] It's understandable that boost circuits in related technologies suffer from low efficiency due to the large number of cascaded circuits.
[0030] To facilitate understanding of the technical solutions of the embodiments of this application, the technical solutions of this application are described in detail below through specific embodiments. The above-mentioned related technologies are optional solutions and can be arbitrarily combined with the technical solutions of the embodiments of this application, all of which fall within the protection scope of the embodiments of this application. The embodiments of this application include at least some of the following contents.
[0031] Figures 2A to 2D This is a schematic diagram of a boost converter circuit provided in an embodiment of this application, as shown below. Figure 2A As shown, a boost converter circuit 200 may include:
[0032] A boost module 201 and a charge pump module 202.
[0033] The input terminal of the boost module 201 is connected to the input voltage VDD, and the output terminal of the boost module 201 is cascaded with the charge pump module 202. The output terminal of the charge pump module 202 generates the output voltage VOUT.
[0034] The output voltage VOUT is K times the input voltage VDD, where K is greater than 1.
[0035] like Figure 2B As shown, another boost converter circuit 200 may include:
[0036] The boost module 201 and multiple charge pump modules 202.
[0037] The input terminal of the boost module 201 is connected to the input voltage VDD, the output terminal of the boost module 201 is cascaded with the first charge pump module 202, and the output terminal of the last charge pump module 202 generates the output voltage VOUT.
[0038] The output voltage VOUT is K times the input voltage VDD, where K is greater than 1.
[0039] like Figure 2C As shown, another boost converter circuit 200 may include:
[0040] A boost module 201 and a charge pump module 202.
[0041] The input terminal of the charge pump module 202 is connected to the input voltage VDD, and the output terminal of the charge pump module 202 is cascaded with the boost module 201, which generates the output voltage VOUT.
[0042] The output voltage VOUT is K times the input voltage VDD, where K is greater than 1.
[0043] like Figure 2D As shown, another boost converter circuit 200 may include:
[0044] The boost module 201 and multiple charge pump modules 202.
[0045] The input terminal of the first charge pump module 202 is connected to the input voltage VDD, and the output terminal of the last charge pump module 202 is cascaded with the boost module 201, which generates the output voltage VOUT.
[0046] The output voltage VOUT is K times the input voltage VDD, where K is greater than 1.
[0047] Figure 3 This is a schematic diagram of another boost converter circuit provided in the embodiments of this application, as shown below. Figure 3 As shown, the boost converter circuit 300 may include:
[0048] A first switch submodule 301 has its first terminal connected to the input voltage VDD via a first inductor L2, and its second terminal grounded. A charge pump module 302 includes a first capacitor C2 and a second switch submodule 303. The first terminal of the charge pump module 302 is connected to the fourth terminal of the first switch submodule 301, the second terminal of the charge pump module 302 is connected to the output voltage VOUT, and its third terminal is grounded. A control submodule 304 is connected to the third terminal of the first switch submodule 301 and the fourth terminal of the charge pump module 302, and is used to control the on / off state of the first switch submodule 301 and the second switch submodule 303, so that the output voltage VOUT is within a preset voltage range through the charging and discharging of the first inductor L2 and the first capacitor C2.
[0049] It should be noted that the preset voltage range can be set manually by those skilled in the art based on experience, or it can be set in other ways. This application embodiment does not limit this.
[0050] It should also be noted that the on or off state of the first switch submodule 301 can control the charging and discharging of the first inductor L2. When the first inductor L2 is in a discharging state, the voltage at the third terminal of the first switch submodule 301 is equal to the sum of the voltage of the first inductor L2 and the input voltage VDD. Thus, the output voltage VOUT is boosted by boosting the voltage at the third terminal of the first switch submodule 301.
[0051] It should also be noted that the on or off state of the second switch submodule 303 can control the charging and discharging of the first capacitor C2. When the first capacitor C2 is in the discharging state, the output voltage VOUT is equal to the sum of the voltage of the first capacitor C2 and the voltage of the third terminal of the first switch submodule 301, thereby realizing the boosting of the output voltage VOUT.
[0052] It should be understood that the charging and discharging of the first inductor L2 and the charging and discharging of the first capacitor C2 can be independent of each other or they can be related to each other. This application embodiment does not limit this.
[0053] It should also be understood that the output voltage VOUT can be boosted by the discharge of the first inductor L2, by the discharge of the first capacitor C2, or by the combined discharge of the first inductor L2 and the first capacitor C2.
[0054] Based on the above technical solution, the control submodule can control the on / off state of the first switching submodule and the second switching submodule in the charge pump module, thereby controlling the charging and discharging of the first inductor and the first capacitor in the charge pump module to ensure that the output voltage is within a preset voltage range. This ensures a relatively small area for the boost converter circuit, reduces the number of cascaded boost converter circuits, and lowers the design complexity of the boost converter circuit, thus improving the overall efficiency of the boost converter circuit.
[0055] In some embodiments, Figure 3 Based on the boost converter circuit 300 shown, such as Figure 4 As shown, the first switch submodule 301 may include a first switch transistor M3 and a second switch transistor M4. The first end of the first switch transistor M3 is connected to the control submodule 304, the second end of the first switch transistor M3 is grounded, and the third end of the first switch transistor M3 is connected between the first end of the second switch transistor M4 and the first inductor L2. The second end of the second switch transistor M4 is connected to the control submodule 304, and the third end of the second switch transistor M4 is connected to the first end of the charge pump module 302.
[0056] It should be noted that when the first switch M3 is on and the second switch M4 is off, the first inductor L2 is in a charging state; when the first switch M3 is off and the second switch M4 is on, the first inductor L2 is in a discharging state. The voltage at the third terminal of the second switch M4 is equal to the sum of the voltage of the first inductor L2 and the input voltage VDD. Thus, the output voltage VOUT is boosted by the voltage at the third terminal of the second switch M4.
[0057] For example, the first switching transistor M3 can be a PMOS transistor, NMOS transistor, silicon controlled rectifier, transistor, IGBT, etc., and the embodiments of this application do not limit it.
[0058] For example, the second switch M4 can be a PMOS transistor, NMOS transistor, silicon controlled rectifier, transistor, IGBT, etc., and the embodiments of this application do not limit it.
[0059] Based on the above technical solution, the charging and discharging of the first inductor can be controlled by turning the first and second switching transistors on or off, thereby enabling the output voltage to be boosted with a relatively small circuit area and a small number of cascaded transistors.
[0060] In some embodiments, Figure 3 Based on the boost converter circuit 300 shown, such as Figure 5As shown, the second switch submodule 303 may include a third switch transistor M5, a fourth switch transistor M6, and a fifth switch transistor M7. One end of the first capacitor C2 is connected between the third terminal of the second switch transistor M4 and the first terminal of the third switch transistor M5, and the other end is connected between the first terminal of the fourth switch transistor M6 and the first terminal of the fifth switch transistor M7. The second terminals of the third switch transistor M5, the fourth switch transistor M6, and the fifth switch transistor M7 are connected to the control submodule 304. The third terminal of the third switch transistor M5 is connected to the output voltage VOUT. The third terminal of the fourth switch transistor M6 is grounded. The third terminal of the fifth switch transistor M7 is connected to the first terminal of the second switch transistor M4.
[0061] It should be noted that when the second switch M4 and the fourth switch M6 are turned on, and the third switch M5 and the fifth switch M7 are turned off, the first capacitor C2 is in a charging state; when the second switch M4 and the fourth switch M6 are turned off, and the third switch M5 and the fifth switch M7 are turned on, the first capacitor C2 is in a discharging state, and the output voltage VOUT is equal to the sum of the voltage of the first capacitor C2 and the voltage at the third terminal of the fifth switch M7, thereby realizing the boost of the output voltage VOUT.
[0062] It should also be noted that during the charging and discharging of the first capacitor C2 and the first inductor L2, the second switch M4 is multiplexed, thus making the charging and discharging of the first capacitor C2 related to the charging and discharging of the first inductor L2.
[0063] In other words, when the second switch M4 and the fourth switch M6 are turned on, and the first switch M3, the third switch M5 and the fifth switch M7 are turned off, the first capacitor C2 is in a charging state and the first inductor L2 is in a discharging state; when the second switch M4 and the fourth switch M6 are turned off, and the first switch M3, the third switch M5 and the fifth switch M7 are turned on, the first capacitor C2 is in a discharging state and the first inductor L2 is in a charging state.
[0064] For example, the third switch M5, the fourth switch M6 and the fifth switch M7 can all be PMOS transistors, NMOS transistors, silicon controlled rectifiers, transistors, IGBTs, etc., and the embodiments of this application do not limit them.
[0065] Based on the above technical solution, the output voltage can be boosted by charging and discharging the first capacitor and the first inductor, even with a relatively small circuit area and a small number of cascaded circuits. Furthermore, by reusing the second switching transistor during the charging and discharging of the first capacitor and the first inductor, hardware costs can be significantly reduced, circuit design simplified, and system reliability improved.
[0066] In other embodiments, Figure 3Based on the boost converter circuit 300 shown, such as Figure 6 As shown, the second switch submodule 303 may include a third switch M5, a fourth switch M6, a fifth switch M7, and a fifth switch M8. One end of the first capacitor C2 is connected between the first end of the fifth switch M8 and the first end of the third switch M5, and the other end is connected between the first end of the fourth switch M6 and the first end of the fifth switch M7. The second ends of the third switch M5, the fourth switch M6, the fifth switch M7, and the fifth switch M8 are connected to the control submodule 304. The third end of the third switch M5 is connected to the output voltage VOUT. The third end of the fourth switch M6 is grounded. The third end of the fifth switch M7 is connected between the third end of the second switch M4 and the third end of the fifth switch M8.
[0067] It should be noted that when the fifth switch M8 and the fourth switch M6 are turned on, and the third switch M5 and the fifth switch M7 are turned off, the first capacitor C2 is in a charging state; when the fifth switch M8 and the fourth switch M6 are turned off, and the third switch M5 and the fifth switch M7 are turned on, the first capacitor C2 is in a discharging state, and the output voltage VOUT is equal to the sum of the voltage of the first capacitor C2 and the voltage at the third terminal of the fifth switch M7, thereby realizing the boost of the output voltage VOUT.
[0068] It should also be noted that during the charging and discharging of the first capacitor C2 and the first inductor L2, there is no multiplexing of the switching transistor, so that the charging and discharging of the first capacitor C2 and the first inductor L2 are not related.
[0069] In other words, when the first inductor L2 is in a charging state, the first capacitor C2 can be in a charging state or a discharging state; when the first inductor L2 is in a discharging state, the first capacitor C2 can be in a charging state or a discharging state. This application embodiment does not limit this.
[0070] For example, the third switch M5, the fourth switch M6, the fifth switch M7 and the fifth switch M8 can all be PMOS transistors, NMOS transistors, silicon controlled rectifiers, transistors, IGBTs, etc., and the embodiments of this application do not limit them.
[0071] Based on the above technical solution, the output voltage can be boosted by charging and discharging the first capacitor and the first inductor, even with a relatively small circuit area and a small number of cascaded circuits.
[0072] In some embodiments, Figure 3 Based on the boost converter circuit 300 shown, such as Figure 7 and Figure 8As shown, the boost converter circuit may further include a voltage divider module 701. The input terminal of the voltage divider module 701 is connected between the third terminal of the third switch transistor M5 and the output voltage VOUT. The output terminal of the voltage divider module 701 is grounded. The feedback terminal of the voltage divider module 701 is used to provide a divided voltage VDIV to the control submodule 304, so that the control submodule 304 controls the first switch submodule 301 and the second switch submodule 303 to be turned on or off through the reference voltage VREF and the divided voltage VDIV.
[0073] It should be noted that the reference voltage VREF can be set manually by those skilled in the art based on experience, or it can be set in other ways. This application does not limit this.
[0074] Based on the above technical solution, the voltage divider module 701 can provide the voltage divider voltage VDIV to the control submodule 304, so that the control submodule 304 can control the first switch submodule 301 and the second switch submodule 303 to turn on or off through the reference voltage VREF and the voltage divider voltage VDIV, so as to realize the boost of the output voltage VOUT.
[0075] Understandable, such as Figure 7 and Figure 8 As shown, the voltage divider module 701 may include a first resistor R3 and a second resistor R4. One end of the first resistor R3 is connected between the third terminal of the third switch M5 and the output voltage VOUT, and the other end is connected in series with the second resistor R4 and then grounded. The first resistor R3 and the second resistor R4 are connected to the control submodule 304.
[0076] Furthermore, one end of capacitor C3 is connected to the output voltage VOUT, and the other end is grounded; one end of capacitor C4 is connected between the second switch M4 and the fifth switch M8, and the other end is grounded.
[0077] It should be noted that, in addition to using the first resistor R3 and the second resistor R4 to achieve voltage division, the voltage divider module 701 can also achieve voltage division in other ways, and this application embodiment does not limit this.
[0078] It should also be noted that the formula for the output voltage VOUT is: VOUT=2*(VREF*(R3+R4) / R3), and the formula for the duty cycle D2 is: D2=1-VDD / VBST, where the duty cycle D2 is the proportion of the time that the first switching transistor M3 is turned on in one clock cycle.
[0079] For example, assuming the input voltage VDD is 3V, the output voltage VOUT is 100V, the reference voltage VREF is 1.2V, and (R3+R4) / R3 = 41.67, then VOUT = 2*(1.2*41.76) = 100V, and the duty cycle D2 is: D2 = 1-3 / 50 = 0.94.
[0080] It should be understood that more precise VOUT voltage regulation can be achieved by adjusting the reference voltage VREF, and VOUT is independent of VDD.
[0081] It should also be understood that both capacitors C3 and C4 can play a role in voltage regulation. Capacitor C3 can be used to stabilize the output voltage VOUT, and capacitor C4 can be used to stabilize the voltage VBST.
[0082] Based on the above technical solution, the area of the boost converter circuit can be relatively small, and the duty cycle D2 can be reduced compared to the duty cycle D1, thereby reducing the design difficulty of the boost converter circuit. In addition, the number of cascaded boost converter circuits is small, and the overall efficiency can be improved.
[0083] In other embodiments, Figure 3 Based on the boost converter circuit 300 shown, such as Figure 9 As shown, the boost converter circuit may further include a voltage divider module 701. The input terminal of the voltage divider module 701 is connected between the third terminal of the second switch transistor M4 and the third terminal of the fifth switch transistor M8. The output terminal of the voltage divider module 701 is grounded. The feedback terminal of the voltage divider module 701 is used to provide a divided voltage VDIV to the control submodule 304, so that the control submodule 304 controls the first switch submodule 301 and the second switch submodule 303 to be turned on or off through the reference voltage VREF and the divided voltage VDIV.
[0084] Based on the above technical solution, the voltage divider module can provide a voltage divider to the control submodule, thereby enabling the control submodule to control the conduction or cutoff of the first and second switch submodules through the reference voltage and the voltage divider, so as to achieve the boost of the output voltage.
[0085] Understandable, such as Figure 9 As shown, the voltage divider module 701 may include a first resistor R3 and a second resistor R4. One end of the first resistor R3 is connected between the third terminal of the second switch M4 and the third terminal of the fifth switch M8, and the other end is connected in series with the second resistor R4 and then grounded. The control submodule 304 is connected between the first resistor R3 and the second resistor R4.
[0086] Furthermore, one end of capacitor C3 is connected to the output voltage VOUT, and the other end is grounded; one end of capacitor C4 is connected between the second switch M4 and the fifth switch M8, and the other end is grounded.
[0087] It should be noted that, in addition to using the first resistor R3 and the second resistor R4 to achieve voltage division, the voltage divider module 701 can also achieve voltage division in other ways, and this application embodiment does not limit this.
[0088] It should also be noted that the formula for the output voltage VOUT is: VOUT=2*(VREF*(R3+R4) / R3), and the formula for the duty cycle D2 is: D2=1-VDD / VBST, where the duty cycle D2 is the proportion of the time that the first switching transistor M3 is turned on in one clock cycle.
[0089] For example, assuming the input voltage VDD is 3V, the output voltage VOUT is 100V, the reference voltage VREF is 1.2V, and (R3+R4) / R3 = 41.67, then VOUT = 2*(1.2*41.76) = 100V, and the duty cycle D2 is: D2 = 1-3 / 50 = 0.94.
[0090] It should be understood that more precise VOUT voltage regulation can be achieved by adjusting VREF, and VOUT is independent of VDD.
[0091] It should also be understood that both capacitors C3 and C4 can play a role in voltage regulation. Capacitor C3 can be used to stabilize the output voltage VOUT, and capacitor C4 can be used to stabilize the voltage VBST.
[0092] Based on the above technical solution, the area of the boost converter circuit can be relatively small, and the duty cycle D2 can be reduced compared to the duty cycle D1, thereby reducing the design difficulty of the boost converter circuit. In addition, the number of cascaded boost converter circuits is small, and the overall efficiency can be improved.
[0093] It should be understood that Figures 3 to 9 The boost converter circuit shown can be viewed as a circuit where the BOOST circuit is connected to the input voltage VDD, and the output voltage VOUT is connected after the BOOST circuit via the charge pump module 302. It can be understood that, in this embodiment, the boost converter circuit can also be viewed as a circuit where the charge pump module 302 is connected to the input voltage VDD, and the output voltage VOUT is connected after the charge pump module 302 via the BOOST circuit. The following will be combined with... Figures 10 to 13 This type of circuit structure will be described.
[0094] Figure 10 This is a schematic diagram of a boost converter circuit provided in an embodiment of this application. Figure 8 ,like Figure 10 As shown, the boost converter circuit 1000 may include:
[0095] The charge pump module 302 includes a first capacitor C2 and a second switch submodule 303. The first terminal of the charge pump module 302 is connected to the input voltage VDD, and the second terminal of the charge pump module 302 is grounded. The first switch submodule 301 has its first terminal connected to the third terminal of the charge pump module 302 through a first inductor L2, and its second terminal connected to the output voltage VOUT. The third terminal of the first switch submodule 301 is grounded. The control submodule 304 is connected to the fourth terminal of the first switch submodule 301 and the fourth terminal of the charge pump module 302. The control submodule 304 is used to control the conduction or cutoff of the first switch submodule 301 and the second switch submodule 303, so that the output voltage VOUT is within a preset voltage range through the charging and discharging of the first inductor L2 and the first capacitor C2.
[0096] It should be noted that the preset voltage range can be set manually by those skilled in the art based on experience, or it can be set in other ways. This application embodiment does not limit this.
[0097] It should also be noted that the on or off state of the first switch submodule 301 can control the charging and discharging of the first inductor L2. When the first inductor L2 is in the discharging state, the output voltage VOUT is equal to the sum of the voltage of the first inductor L2 and the voltage of the third terminal of the charge pump module 302, thereby enabling the output voltage VOUT to be boosted.
[0098] It should also be noted that the on or off state of the second switch submodule 303 can control the charging and discharging of the first capacitor C2. When the first capacitor C2 is in the discharging state, the voltage at the third terminal of the charge pump module 302 is equal to the sum of the voltage of the first capacitor C2 and the input voltage VDD. Thus, the output voltage VOUT is boosted by boosting the voltage at the third terminal of the charge pump module 302.
[0099] It should be understood that, Figure 10 In the boost converter circuit 1000 shown, the charging and discharging of the first inductor L2 and the charging and discharging of the first capacitor C2 are independent of each other.
[0100] It should also be understood that the output voltage VOUT can be boosted by the discharge of the first inductor L2, by the discharge of the first capacitor C2, or by the combined discharge of the first inductor L2 and the first capacitor C2.
[0101] Based on the above technical solution, the control submodule can control the on / off state of the first switching submodule and the second switching submodule in the charge pump module, thereby controlling the charging and discharging of the first inductor and the first capacitor in the charge pump module to ensure that the output voltage is within a preset voltage range. This ensures a relatively small area for the boost converter circuit, reduces the number of cascaded boost converter circuits, and lowers the design complexity of the boost converter circuit, thus improving the overall efficiency of the boost converter circuit.
[0102] In some embodiments, Figure 10 Based on the boost converter circuit 1000 shown, as Figure 11 As shown, the first switch submodule 301 may include a first switch transistor M3 and a second switch transistor M4. The first end of the first switch transistor M3 is connected to the control submodule 304, the second end of the first switch transistor M3 is grounded, and the third end of the first switch transistor M3 is connected between the first end of the second switch transistor M4 and the first inductor L2. The second end of the second switch transistor M4 is connected to the control submodule 304, and the third end of the second switch transistor M4 is connected to the output voltage VOUT.
[0103] It should be noted that when the first switch M3 is turned on and the second switch M4 is turned off, the first inductor L2 is in a charging state; when the first switch M3 is turned off and the second switch M4 is turned on, the first inductor L2 is in a discharging state, and the output voltage VOUT is equal to the sum of the voltage of the first inductor L2 and the voltage at the third terminal of the charge pump module 302, thereby enabling the output voltage VOUT to be boosted.
[0104] For example, the first switching transistor M3 can be a PMOS transistor, NMOS transistor, silicon controlled rectifier, transistor, IGBT, etc., and the embodiments of this application do not limit it.
[0105] For example, the second switch M4 can be a PMOS transistor, NMOS transistor, silicon controlled rectifier, transistor, IGBT, etc., and the embodiments of this application do not limit it.
[0106] Based on the above technical solution, the charging and discharging of the first inductor can be controlled by turning the first and second switching transistors on or off, thereby enabling the output voltage to be boosted with a relatively small circuit area and a small number of cascaded transistors.
[0107] In some embodiments, Figure 10 Based on the boost converter circuit 1000 shown, as Figure 12As shown, the second switch submodule 303 may include a third switch transistor M5, a fourth switch transistor M6, a fifth switch transistor M7, and a fifth switch transistor M8. One end of the first capacitor C2 is connected between the first end of the fifth switch transistor M8 and the first end of the third switch transistor M5, and the other end is connected between the first end of the fourth switch transistor M6 and the first end of the fifth switch transistor M7. The second ends of the third switch transistor M5, the fourth switch transistor M6, the fifth switch transistor M7, and the fifth switch transistor M8 are connected to the control submodule 304. The third end of the third switch transistor M5 is connected to the first inductor L2. The third end of the fourth switch transistor M6 is grounded. The third end of the fifth switch transistor M7 is connected between the input voltage VDD and the third end of the fifth switch transistor M8.
[0108] It should be noted that when the fifth switch M8 and the fourth switch M6 are turned on, and the third switch M5 and the fifth switch M7 are turned off, the first capacitor C2 is in a charging state; when the fifth switch M8 and the fourth switch M6 are turned off, and the third switch M5 and the fifth switch M7 are turned on, the first capacitor C2 is in a discharging state, and the voltage at the third terminal of the third switch M5 is equal to the sum of the voltage of the first capacitor C2 and the input voltage VDD. Thus, the output voltage VOUT is boosted by boosting the voltage at the third terminal of the third switch M5.
[0109] It should also be noted that during the charging and discharging of the first capacitor C2 and the first inductor L2, there is no multiplexing of the switching transistor, so that the charging and discharging of the first capacitor C2 and the first inductor L2 are not related.
[0110] In other words, when the first inductor L2 is in a charging state, the first capacitor C2 can be in a charging state or a discharging state; when the first inductor L2 is in a discharging state, the first capacitor C2 can be in a charging state or a discharging state. This application embodiment does not limit this.
[0111] For example, the third switch M5, the fourth switch M6, the fifth switch M7 and the fifth switch M8 can all be PMOS transistors, NMOS transistors, silicon controlled rectifiers, transistors, IGBTs, etc., and the embodiments of this application do not limit them.
[0112] Based on the above technical solution, the output voltage can be boosted by charging and discharging the first capacitor and the first inductor, even with a relatively small circuit area and a small number of cascaded circuits.
[0113] In some embodiments, Figure 10 Based on the boost converter circuit 1000 shown, as Figure 13As shown, the boost converter circuit may further include a voltage divider module 701. The input terminal of the voltage divider module 701 is connected between the third terminal of the second switching transistor M4 and the output voltage VOUT. The output terminal of the voltage divider module 701 is grounded. The feedback terminal of the voltage divider module 701 is used to provide a divided voltage VDIV to the control submodule 304, so that the control submodule 304 controls the first switching submodule 301 and the second switching submodule 303 to be turned on or off through the reference voltage VREF and the divided voltage VDIV.
[0114] It should be noted that the reference voltage VREF can be set manually by those skilled in the art based on experience, or it can be set in other ways. This application does not limit this.
[0115] Based on the above technical solution, the voltage divider module can provide a voltage divider to the control submodule, thereby enabling the control submodule to control the conduction or cutoff of the first and second switch submodules through the reference voltage and the voltage divider, so as to achieve the boost of the output voltage.
[0116] Understandable, such as Figure 13 As shown, the voltage divider module 701 may include a first resistor R3 and a second resistor R4. One end of the first resistor R3 is connected between the third terminal of the second switch M4 and the output voltage VOUT, and the other end is connected in series with the second resistor R4 and then grounded. The first resistor R3 and the second resistor R4 are connected to the control submodule 304.
[0117] Furthermore, one end of capacitor C3 is connected to the output voltage VOUT, and the other end is grounded; one end of capacitor C4 is connected between the third switch M5 and the first inductor L2, and the other end is grounded.
[0118] It should be noted that, in addition to using the first resistor R3 and the second resistor R4 to achieve voltage division, the voltage divider module 701 can also achieve voltage division in other ways, and this application embodiment does not limit this.
[0119] It should also be noted that the formula for the output voltage VOUT is: VOUT=2*(VREF*(R3+R4) / R3), and the formula for the duty cycle D2 is: D2=1-VDD / VBST, where the duty cycle D2 is the proportion of the time that the first switching transistor M3 is turned on in one clock cycle.
[0120] For example, assuming the input voltage VDD is 3V, the output voltage VOUT is 100V, the reference voltage VREF is 1.2V, and (R3+R4) / R3 = 41.67, then VOUT = 2*(1.2*41.76) = 100V, and the duty cycle D2 is: D2 = 1-3 / 50 = 0.94.
[0121] It should be understood that more precise VOUT voltage regulation can be achieved by adjusting VREF, and VOUT is independent of VDD.
[0122] It should also be understood that both capacitors C3 and C4 can play a role in voltage stabilization.
[0123] Based on the above technical solution, the area of the boost converter circuit can be relatively small, and the duty cycle D2 can be reduced compared to the duty cycle D1, thereby reducing the design difficulty of the boost converter circuit. In addition, the number of cascaded boost converter circuits is small, and the overall efficiency can be improved.
[0124] It should be understood that the boost converter circuit provided in this application embodiment can have an output voltage that is 1.5 times, 2 times, 3 times, etc., compared to the input voltage, and this application embodiment does not limit this.
[0125] It should also be understood that the boost converter circuit provided above is obtained by cascading a single-stage BOOST circuit with a single-stage charge pump module. It can be understood that the boost converter circuit can also be obtained by cascading multiple-stage BOOST circuits with a single-stage charge pump module, or the boost converter circuit can also be obtained by cascading a single-stage BOOST circuit with multiple-stage charge pump modules. The embodiments of this application do not limit this.
[0126] The preferred embodiments of this application have been described in detail above with reference to the accompanying drawings. However, this application is not limited to the specific details of the above embodiments. Within the scope of the technical concept of this application, various simple modifications can be made to the technical solutions of this application, and these simple modifications all fall within the protection scope of this application. For example, the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. To avoid unnecessary repetition, this application will not describe the various possible combinations separately. Furthermore, various different embodiments of this application can also be arbitrarily combined, as long as they do not violate the spirit of this application, they should also be considered as the content disclosed in this application. Moreover, without conflict, the various embodiments and / or the technical features in the various embodiments described in this application can be arbitrarily combined with related technologies, and the resulting technical solutions should also fall within the protection scope of this application.
[0127] Figure 14 This is a schematic diagram of the structure of a chip provided in an embodiment of this application. Figure 1 .like Figure 14 As shown, the chip 1400 may include the boost converter circuit 300 in the above embodiments, and has the beneficial effects of the boost converter circuit in the above embodiments, which will not be described again here.
[0128] Figure 15 This is a schematic diagram of the structure of a chip provided in an embodiment of this application. For example... Figure 15 As shown, the chip 1500 may include the boost converter circuit 1000 in the above embodiments, and has the beneficial effects of the boost converter circuit in the above embodiments, which will not be described again here.
[0129] It should be noted that, in this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, article, or apparatus that includes that element.
[0130] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.
[0131] The features disclosed in the several product embodiments provided in this application can be arbitrarily combined without conflict to obtain new product embodiments.
[0132] The above embodiments are only used to illustrate the embodiments of this application, and are not intended to limit the embodiments of this application. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the embodiments of this application. Therefore, all equivalent technical solutions also fall within the scope of the embodiments of this application, and the patent protection scope of the embodiments of this application should be defined by the claims.
Claims
1. A boost converter circuit, characterized in that, include: Boost module and charge pump module; The input terminal of the boost module is connected to the input voltage, and the output terminal of the boost module is cascaded with the charge pump module, and the output terminal of the charge pump module generates the output voltage. or, The input terminal of the charge pump module is connected to the input voltage, and the output terminal of the charge pump module is cascaded with the boost module, and the output terminal of the boost module generates an output voltage. The output voltage is K times the input voltage, where K is greater than 1.
2. The boost converter circuit according to claim 1, characterized in that, The charge pump module is a single charge pump or multiple cascaded charge pumps.
3. The boost converter circuit according to claim 1 or 2, characterized in that, The boost module includes: a first switching submodule and a control submodule; The charge pump module includes: a first capacitor and a second switch submodule; The first terminal of the first switch submodule is connected to the input voltage through a first inductor, and the second terminal of the first switch submodule is grounded. The first terminal of the charge pump module is connected to the fourth terminal of the first switch submodule, the second terminal of the charge pump module is connected to the output voltage, and the third terminal of the charge pump module is grounded. The control submodule is connected to the third terminal of the first switch submodule and the fourth terminal of the charge pump module, and is used to control the conduction or cutoff of the first switch submodule and the second switch submodule, so that the output voltage is within a preset voltage range through the charging and discharging of the first inductor and the first capacitor.
4. The boost converter circuit according to claim 3, characterized in that, The first switching submodule includes a first switching transistor and a second switching transistor. The first end of the first switching transistor is connected to the control submodule, the second end of the first switching transistor is grounded, and the third end of the first switching transistor is connected between the first end of the second switching transistor and the first inductor. The second terminal of the second switch is connected to the control submodule, and the third terminal of the second switch is connected to the first terminal of the charge pump module.
5. The boost converter circuit according to claim 4, characterized in that, The second switching submodule includes a third switching transistor, a fourth switching transistor, and a fifth switching transistor. One end of the first capacitor is connected between the third end of the second switching transistor and the first end of the third switching transistor, and the other end is connected between the first end of the fourth switching transistor and the first end of the fifth switching transistor. The second terminals of the third switch, the fourth switch, and the fifth switch are connected to the control submodule. The third terminal of the third switch is connected to the output voltage. The third terminal of the fourth switch is grounded. The third terminal of the fifth switch is connected to the first terminal of the second switch.
6. The boost converter circuit according to claim 4, characterized in that, The second switching submodule includes a third switching transistor, a fourth switching transistor, a fifth switching transistor, and a sixth switching transistor. One end of the first capacitor is connected between the first end of the sixth switching transistor and the first end of the third switching transistor, and the other end is connected between the first end of the fourth switching transistor and the first end of the fifth switching transistor. The second terminals of the third, fourth, fifth, and sixth switches are connected to the control submodule. The third terminal of the third switch is connected to the output voltage. The third terminal of the fourth switch is grounded. The third terminal of the fifth switch is connected between the third terminals of the second and sixth switches.
7. The boost converter circuit according to claim 5 or 6, characterized in that, The boost converter circuit also includes a voltage divider module. The input terminal of the voltage divider module is connected between the third terminal of the third switch and the output voltage. The output terminal of the voltage divider module is grounded. The feedback terminal of the voltage divider module is used to provide a divided voltage to the control submodule, so that the control submodule controls the first switch submodule and the second switch submodule to be turned on or off by means of a reference voltage and the divided voltage.
8. The boost converter circuit according to claim 7, characterized in that, The voltage divider module includes a first resistor and a second resistor. One end of the first resistor is connected between the third terminal of the third switch and the output voltage, and the other end is connected in series with the second resistor and then grounded. The control submodule is connected between the first resistor and the second resistor.
9. The boost converter circuit according to claim 6, characterized in that, The boost converter circuit also includes a voltage divider module. The input terminal of the voltage divider module is connected between the third terminal of the second switch and the third terminal of the sixth switch. The output terminal of the voltage divider module is grounded. The feedback terminal of the voltage divider module is used to provide a divided voltage to the control submodule, so that the control submodule controls the first switch submodule and the second switch submodule to be turned on or off by means of a reference voltage and the divided voltage.
10. The boost converter circuit according to claim 9, characterized in that, The voltage divider module includes a first resistor and a second resistor. One end of the first resistor is connected between the third terminal of the second switching transistor and the third terminal of the sixth switching transistor, and the other end is connected in series with the second resistor and then grounded. The control submodule is connected between the first resistor and the second resistor.
11. A chip, characterized in that, The boost converter circuit includes any one of claims 1 to 10.