Burnout-proof circuit capable of being connected with non-standard PoE power supply equipment

Abstract

The invention discloses an anti-burnout circuit capable of being connected with non-standard PoE power supply equipment, which comprises a power-on delay module, a voltage identification and conversion module, an MOS tube Q3, an internal power supply interface and an external power supply interface, and is characterized in that the external power supply interface is used for being connected with external target equipment, and the internal power supply interface is used for being connected with a power supply of internal equipment where the anti-burnout circuit is located; the internal power supply interface is electrically connected with an internal circuit of the internal equipment through a power supply of the internal equipment, the internal power supply interface is connected with a D pole of the MOS transistor Q3, an S pole of the MOS transistor Q3 is connected with the power-on delay module, a G pole of the MOS transistor Q3 is connected with the voltage identification and conversion module, and the power-on delay module and the voltage identification and conversion module are jointly connected to form a connection point a. The connection point a is connected with an external power supply interface. The invention can be applied to the PD and the PSE, and can avoid burnout when being connected with the non-standard PoE, and avoid burnout caused by inconsistent positive and negative electrodes of the power supply.

Description

Technical Field

[0001] This invention relates to the field of anti-burnout technology, specifically an anti-burnout circuit that can be connected to non-standard PoE powered devices. Background Technology

[0002] A network port is a common interface used to transmit Ethernet signals. In some applications, a network port can also transmit other signals, such as HDBaseT signals, or be used to transmit non-Ethernet signals using proprietary protocols. PoE (Power over Ethernet) ports are one type of network port, often used for simultaneous power supply and data transmission. When a device with a PoE port (such as a switch or other network port device) is connected to a non-standard PoE power supply device (i.e., a power supply device with a non-standard PoE port), voltage mismatch or inconsistent polarity of the two devices' connections can cause both devices to malfunction (fail or malfunction) or burn out. For example, connecting a PoE device to a PoC (PoC) power supply device, where the PoC interface can connect to the PoE port and be powered via a network cable, falls under the category of connecting a PoE device to a non-standard PoE power supply device. Therefore, a mechanism is needed to prevent both devices from burning out when mistakenly connected to a non-standard PoE power supply device. Summary of the Invention

[0003] To address the shortcomings of existing technologies, the purpose of this invention is to provide a burn-out prevention circuit that can connect to non-standard PoE power supply devices, thereby solving the problems described in the background art.

[0004] The technical solution to achieve the purpose of this invention is as follows: a burn-out prevention circuit that can connect to non-standard PoE power supply devices, including a power-on delay module, a voltage identification and conversion module, a MOSFET Q3, an internal power supply interface, and an external power supply interface. The external power supply interface is used to connect to an external target device, and the internal power supply interface is used to connect to the power supply of the internal device where the burn-out prevention circuit is located, and maintains an electrical connection with the internal circuit of the internal device through the power supply of the internal device. The internal power supply interface is connected to the drain (D) of MOSFET Q3, the source (S) of MOSFET Q3 is connected to the power-on delay module, and the gate (G) of MOSFET Q3 is connected to the voltage recognition and conversion module. The power-on delay module and the voltage recognition and conversion module are connected together to form connection point a, which is then connected to the external power supply interface. The power-on delay module is used to delay the voltage applied to connection point a by the external target device after it starts supplying power through the external power interface, so that the voltage reaches the preset voltage V1. Once the voltage at connection point a reaches the preset voltage V1, the internal circuit of the voltage delay module is completed. The voltage identification and conversion module is used to identify the output voltage V2 of the external target device connected to the external power supply interface, and control the conduction and cutoff of the MOS transistor Q3 according to the output voltage V2, so that when the device where the anti-burnout circuit is located is the power receiving device, the output voltage V2 of the external target device can be supplied to the power supply circuit in the power receiving device through the external power supply interface and then through the MOS transistor Q3.

[0005] Furthermore, when the output voltage V2 satisfies V1≤V2<V3, the MOSFET Q3 is turned on; otherwise, the MOSFET Q3 is turned off. V3 is the preset output voltage, and it must also satisfy: V1<V0≤V3, where V0 is the output voltage of the internal power supply interface.

[0006] Furthermore, MOSFET Q3 is a P-channel power MOSFET.

[0007] Furthermore, the power-on delay module includes resistors R1, R2, and R3, capacitor C1, and a thyristor D1. The cathode of the thyristor is connected to the source (S) terminal of the MOSFET Q3. The control terminal of the thyristor is connected to one end of resistor R2 and one end of resistor R3, respectively. The other end of resistor R3 is grounded. The other end of resistor R2 is connected to one end of resistor R1 and one end of capacitor C1, respectively. The other end of capacitor C1 is grounded. The other end of resistor R1 is connected to the anode of thyristor D1 and then connected to the voltage identification and conversion module to form connection point a.

[0008] Furthermore, the voltage identification and conversion module includes transistors Q1 and Q2, resistors R4, R5, R6, R7, R8, R9, and R10. One end of resistor R10 is connected to the gate (G) of MOSFET Q3, and the other end of resistor R10 is connected to one end of resistor R9 and the collector of transistor Q2. The emitter of transistor Q2 is grounded. The base of transistor Q2 is connected to one end of resistor R8. The other end of resistor R8 is connected to one end of resistor R7 and the collector of transistor Q2. The other end of resistor R7 is connected to the other end of resistor R9, and also to the other end of resistor R1 and one end of resistor R4. The other end of resistor R4 is connected to one end of resistor R5 and one end of resistor R6. The other end of resistor R5 is grounded. The other end of resistor R6 is connected to the base of transistor Q1, and the emitter of transistor Q1 is grounded.

[0009] Furthermore, both transistors Q1 and Q2 are NPN transistors.

[0010] Furthermore, the anti-burnout circuit also includes a short-circuit protection module, which includes resistors R11 and R12, transistor Q6, and MOSFET Q5. One end of resistor R11 is connected to one end of resistor R12 and the source (S) terminal of MOSFET Q5, and then connected to the internal power supply interface. The other end of resistor R11 is connected to the base of transistor Q6 and the drain (D) terminal of MOSFET Q5. The emitter of transistor Q6 is grounded. The collector of transistor Q6 is connected to the other end of resistor R12 and the gate (G) terminal of MOSFET Q5. The drain of MOSFET Q5 and the other end of resistor R11 are also connected to connection point a.

[0011] Furthermore, transistor Q6 is a P-channel power MOSFET, and MOSFET Q5 is an NPN transistor.

[0012] Furthermore, the anti-burnout circuit also includes a protection and anti-backflow module, which includes a bidirectional TVS diode D2, a resettable fuse F1, and a diode D3. One end of the resettable fuse F1 is connected to the internal power supply interface, and the other end of the resettable fuse F1 is connected to the positive terminal of diode D3, one end of TVS diode D2, and the drain terminal of MOSFET Q3, respectively. The other end of TVS diode D2 is grounded, and the negative terminal of diode D3 is connected to the short-circuit protection module. Specifically, the negative terminal of diode D3 is connected to the source terminal of MOSFET Q5, one end of resistor R12, and one end of resistor R11, respectively.

[0013] The beneficial effects of the present invention are as follows: The present invention can be applied to both power receiving devices (PDs) and power supply devices (PSEs), and can prevent burnout when connecting non-standard PoE power supply equipment, as well as avoid burnout problems caused by inconsistent positive and negative power supply terminals (i.e., reverse connection). Attached Figure Description

[0014] Figure 1 This is a circuit diagram of the present invention; Figure 2 for Figure 1 Circuit diagram of the protection and backflow prevention module; Figure 3 for Figure 1 Circuit diagram of the power-on delay module; Figure 4 for Figure 1 Circuit diagram of the medium voltage identification and conversion module; Figure 5 This is a circuit diagram of a short-circuit protection module. Detailed Implementation

[0015] The present invention will be further described below with reference to the accompanying drawings and specific embodiments: like Figures 1-5As shown, a burn-out prevention circuit for connecting to non-standard PoE power supply devices includes a power-on delay module, a voltage identification and conversion module, a MOSFET Q3, an internal power supply interface, and an external power supply interface. The external power supply interface is used to connect to an external target device, which can be either the non-standard PoE power supply device or a standard PoE power supply device. The internal power supply interface is used to connect to the power supply of the internal device where the burn-out prevention circuit is located, and maintains an electrical connection with the internal circuit of the internal device through the power supply of the internal device.

[0016] It is understood that the connected external target device usually has a power supply that can provide power to other devices. When the connected external target device does not have a power supply, there is no issue of burnout, and it is not within the scope of the technical problem to be solved in this application.

[0017] MOSFET Q3 is a P-channel power MOSFET.

[0018] The internal power supply interface is connected to the drain (D) of MOSFET Q3, the source (S) of MOSFET Q3 is connected to the power-on delay module, and the gate (G) of MOSFET Q3 is connected to the voltage recognition and conversion module. The power-on delay module and the voltage recognition and conversion module are connected together to form connection point a, which is connected to the external power supply interface. The power-on delay module is used to delay the voltage supplied by the external target device to connection point a after it starts supplying power through the external power supply interface, so that the voltage of the external target device is applied to the gate (G) of the thyristor D1, causing the thyristor D1 to conduct or be cut off. When the voltage at connection point a reaches the preset voltage V1, the internal circuit of the voltage delay module forms a closed circuit. The voltage identification and conversion module is used to identify the output voltage V2 of the external target device connected to the external power supply interface, and control the conduction and cutoff (i.e., shutdown) of MOSFET Q3 according to the output voltage V2. When the output voltage V2 is less than the preset voltage V3, the gate of MOSFET Q3 is at a low level, causing MOSFET Q3 to conduct. This makes MOSFET Q3 and the power-on delay module conduct and be in a closed circuit state. This means that the current output from the power supply interface of the external target device can flow into the internal power supply interface after passing through the power-on delay module and MOSFET Q3 in sequence, and then supply power to the internal circuit of the internal device through the internal power supply interface, so that the internal device and the external target device maintain a closed circuit connection. When the device where the anti-burnout circuit is located is the power receiving device, the output voltage V2 of the external target device passes through the external power supply interface, and then passes through the voltage delay module and MOSFET Q3 in sequence to supply power to the power supply circuit in the power receiving device. The power supply circuit in the power receiving device is connected to the anti-burnout circuit through the internal power supply.

[0019] Specifically, when the output voltage V2 satisfies V1≤V2<V3, MOSFET Q3 is turned on; otherwise, MOSFET Q3 is turned off. That is, when the output voltage V2 does not satisfy V1≤V2<V3, MOSFET Q3 is turned off.

[0020] The operating voltage of the internal power supply interface is denoted as V0, and the preset output voltage V3 is the preset output voltage, satisfying the condition: V1 < V0 ≤ V3. V3 ≥ V0 includes two cases: one where the preset output voltage V3 is greater than V0, and the other where the preset output voltage V3 is equal to V0. To avoid misjudgment due to closely matched voltages, the better scenario is preset output voltage V3 > V0. For example, when V0 = 12 V, V3 can be set to 12.5 V.

[0021] For standard PoE power supply equipment, the output voltage of its internal power supply interface is 12V, that is, the working voltage V0 is 12V. When the connected external target device is a non-standard PoE power supply equipment, the output voltage of the power supply in the external target device may exceed 12V or be less than 12V.

[0022] For example, the power-on delay module includes resistors R1, R2, and R3, capacitor C1, and a thyristor D1. The cathode of the thyristor is connected to the source (S) terminal of the MOSFET Q3. The control terminal of the thyristor is connected to one end of resistor R2 and one end of resistor R3. The other end of resistor R3 is grounded. The other end of resistor R2 is connected to one end of resistor R1 and one end of capacitor C1. The other end of capacitor C1 is grounded. The other end of resistor R1 is connected to the anode of thyristor D1 and then connected to the voltage identification and conversion module to form connection point a.

[0023] It is understandable that resistor R1 and capacitor C1 form an RC delay circuit, while resistors R1, R2, and R3 form a voltage divider circuit. The resistance values ​​of these three resistors can be adjusted according to the parameters of the thyristor D1. The resistance can be predetermined or set as adjustable resistors for temporary adjustment during use. Assuming the internal power supply interface operating voltage V0 is 12V, by setting the resistance values ​​of these three resistors and the capacitance value of capacitor C1, the voltage at connection point a rises to 11V, triggering the thyristor D1 to conduct. This puts the internal circuit of the power-on delay module in a conducting state, allowing MOSFET Q3 to maintain a connection with connection point a through the thyristor D1, and thus with the external target device.

[0024] The RC delay circuit serves to delay the conduction of the thyristor D1, rather than turning it on immediately.

[0025] For example, the voltage identification and conversion module includes transistors Q1 and Q2, resistors R4, R5, R6, R7, R8, R9, and R10. One end of resistor R10 is connected to the gate (G) of MOSFET Q3, and the other end of resistor R10 is connected to one end of resistor R9 and the collector of transistor Q2. The emitter of transistor Q2 is grounded, and the base of transistor Q2 is connected to one end of resistor R8. The other end of resistor R8 is connected to one end of resistor R7 and the collector of transistor Q2. The other end of resistor R7 is connected to the other end of resistor R9, and also to the other end of resistor R1 and one end of resistor R4. That is, the connection point a is formed by the common connection of one end of resistor R4, the other end of resistor R7, the other end of resistor R9, the other end of resistor R1, and the anode of thyristor D1. The other end of resistor R4 is connected to one end of resistor R5 and one end of resistor R6 respectively. The other end of resistor R5 is grounded, and the other end of resistor R6 is connected to the base of transistor Q1. The emitter of transistor Q1 is grounded.

[0026] Among them, transistors Q1 and Q2 are both NPN transistors.

[0027] Understandably, the voltage recognition and conversion module controls the conduction of transistors Q1 and Q2 based on the output voltage provided by the power supply in the connected external target device. Specifically, resistors R4 and R5 act as voltage dividers, and their values ​​can be adjusted according to the voltage provided by the external target device. This ensures that: when the output voltage V2 > V3 of the external target device, transistor Q1 is turned on and transistor Q2 is turned off; when the output voltage V2 ≤ V3 of the external target device, transistor Q1 is turned off and transistor Q2 is turned on.

[0028] When the device containing the anti-burnout circuit acts as the powered device, the output voltage V2 of the external target device is supplied to the power supply circuit within the powered device via the external power supply interface and then via the MOSFET Q3. The power supply circuit within the powered device is connected to the anti-burnout circuit through its internal power supply. The conduction of the MOSFET Q3 is controlled by the voltage recognition and conversion module.

[0029] When the output voltage V2 ≤ V3 of the external target device, transistor Q1 is cut off and transistor Q2 is turned on. The gate (G) of MOSFET Q3 is at a low level. Due to the delay effect of the power-on delay circuit, when the output voltage V2 < the preset voltage V1 (i.e., before reaching the preset voltage V1), the thyristor D1 is in the off state. When the output voltage V2 ≥ the preset voltage V1, the thyristor D1 turns on, thus turning on MOSFET Q3. In other words, when the external output voltage V2 satisfies V1 ≤ V2 ≤ V3, the external target device and the internal device maintain a connection because both the thyristor D1 and MOSFET Q3 are on.

[0030] When the thyristor D1 is turned on after a delay, the gate (G) of MOSFET Q3 is at a low level, and the voltage drop V between the gate (G) and source (S) of MOSFET Q3 is... GSth Meeting the conditions for connection: V GSth Since the voltage V1 < 0, MOSFET Q3 is turned on. Therefore, when the external output voltage V2 satisfies V1 ≤ V2 ≤ V3, the thyristor D1 turns on after a delay. Then, the gate (G) of MOSFET Q3 goes low, and MOSFET Q3 meets the turn-on condition. Thus, MOSFET Q3 turns on, allowing the power supply from the external target device to power the internal circuitry of the device containing the anti-burnout circuit through the external power supply interface and MOSFET Q3. When the external output voltage V2 does not satisfy V1 ≤ V2 ≤ V3, since MOSFET Q3 is not turned on, the power supply from the external target device is disconnected from the internal circuitry of the device containing the anti-burnout circuit, thus preventing damage to the internal circuitry. This ensures that even if a non-standard PoE power supply is connected to the device, and the voltage of the non-standard PoE power supply exceeds V3, the internal circuitry will not be damaged due to the open circuit, achieving the anti-burnout purpose. Similarly, when the voltage is low and does not reach V1, the thyristor D1 will be in a non-conducting state, thus making the anti-burnout circuit open and achieving the purpose of preventing burnout.

[0031] Assume V1 is 11 V, V0 is 12 V, and V3 is 12.5 V. Under these values, when the output voltage V2 of the connected external target device is ≤ 12.5 V, transistor Q1 is cut off, and transistor Q2 is turned on. When the output voltage V2 of the connected external target device satisfies 11 V ≤ V2, the thyristor D1 is turned on. Therefore, when the output voltage V2 of the connected external target device is between 11 V and 12.5 V (inclusive), MOSFET Q3 is turned on, maintaining a connection between the external target device and the internal device, achieving normal connection. That is, the internal device, acting as the power receiving device PD, can normally receive power from the external target device. Conversely, when the output voltage V2 of the connected external target device is > 12.5 V or < 11 V, the MOSFET is turned off or not turned on, and the external target device will not cause damage to the internal device PD acting as the power receiving device.

[0032] Understandably, in practical use, since the circuit is fixed, voltages V0, V1, and V3 are fixed or preset based on the resistors, and can be considered constants. However, voltage V2 is the voltage at connection point a affected by the external target device. Since the power supply voltage within the external target device may be different, voltage V2 can be considered a variable.

[0033] For example, to enable the internal device to also function as a power supply device (PSE), allowing it to supply power to an external target device and preventing short circuits to protect the power supply within the internal device, specifically, assuming the positive and negative terminals of the power supply of the external target device (which acts as a power receiving device (PD)) are opposite to those of the internal device acting as the PSE, this would cause a short circuit in the internal device's power supply, potentially burning it out. To prevent burnout due to short circuits, the anti-burnout circuit also includes a short-circuit protection module, which comprises resistors R11 and R12, transistor Q6, and MOSFET Q5. One end of resistor R11 is connected to one end of resistor R12 and the source (S) terminal of MOSFET Q5, and together they are connected to the internal power supply interface. The other end of resistor R11 is connected to the base of transistor Q6 and the drain (D) terminal of MOSFET Q5. The emitter of transistor Q6 is grounded. The collector of transistor Q6 is connected to the other end of resistor R12 and the gate (G) terminal of MOSFET Q5. The drain of MOSFET Q5 and the other end of resistor R11 are also connected to connection point a.

[0034] Among them, transistor Q6 is a P-channel power MOSFET, and transistor Q5 is an NPN transistor.

[0035] It is understandable that when the internal device is not connected to an external target device, resistor R11, together with resistors R1, R2, R3, R4, and R5, forms a voltage divider circuit. The resistance value of resistor R11 is designed to meet the conduction condition of transistor Q6, thus turning on transistor Q6. This pulls the gate of MOSFET Q5 down to ground and puts it at a low level, making MOSFET Q5 conduct. At this time, the base of transistor Q6 is at a high level, and transistor Q6 is still conducting.

[0036] When an external target device is connected to the internal device, if the positive and negative terminals of the power supply of the external target device are the same as those of the internal device, the base of transistor Q6 will be at a high level, satisfying the conduction condition of transistor Q6. This will pull down the gate of MOSFET Q5 to ground, making it low and turning on MOSFET Q5. If the positive and negative terminals of the power supply of the external target device are different from those of the internal device, the base of transistor Q6 will be shorted to low, making transistor Q6 cut off. This will cause the gate of MOSFET Q5 to be at a high level, making MOSFET Q5 cut off, thus achieving short-circuit protection.

[0037] To achieve overcurrent protection and prevent voltage reverse flow, the anti-burnout circuit also includes a protection and anti-reverse flow module. The protection and anti-reverse flow module includes a bidirectional TVS diode D2, a resettable fuse F1, and a diode D3. One end of the resettable fuse F1 is connected to the internal power supply interface, and the other end of the resettable fuse F1 is connected to the positive terminal of diode D3, one end of TVS diode D2, and the drain terminal of MOSFET Q3. The other end of TVS diode D2 is grounded, and the negative terminal of diode D3 is connected to the short-circuit protection module. Specifically, the negative terminal of diode D3 is connected to the source terminal of MOSFET Q5, one end of resistor R12, and one end of resistor R11.

[0038] Among them, TVS diode D2 is used to prevent overvoltage risk caused by abnormality of SCR D1 and MOSFET Q3, self-resetting fuse F1 is used for overcurrent protection, and diode D3 is used to prevent voltage reverse flow caused by abnormality of MOSFET Q5 and transistor Q6.

[0039] This invention controls whether the MOS transistor Q3 is turned on by judging the magnitude of the output voltage of the connected external target device, so that this invention can be applied to both devices that are power receiving devices (PDs) and devices that are power supply devices (PSEs).

[0040] When this circuit is applied to a device that acts as a power receiving device (PD), it has the functions of voltage division and power-on delay protection. By dividing the voltage and delaying the power-on, the conduction state of the MOSFET Q3 can be determined logically first, and then the conduction state of the thyristor D1 can be determined. This avoids the problem of race conditions in digital logic circuits and mitigates application risks.

[0041] When this circuit is applied to a device acting as a power supply receiver (PSE), it provides output power short-circuit protection. If the external power receiving device (PD) connected to this device is not configured as a standard PoE power supply according to the EE 802.3af / at standard, i.e., if the connected external power receiving device (PD) is a non-standard PoE power supply device, it may cause the positive and negative terminals of the two devices to be reversed, resulting in a short circuit to ground. To address this issue, this invention uses resistor R11 to control the conduction of transistor Q6, which in turn controls the conduction of MOSFET Q5. In this case, the conduction of MOSFET Q5 will not affect the normal operation of the device acting as the power supply receiver (PSE). When an external powered device PD is connected, and the positive and negative terminals of the power supply are opposite to those of this device, resistor R11 controls transistor Q6 to turn off, which in turn controls MOSFET Q5 to turn off, so the power supply does not output voltage to the external powered device PD. If the positive and negative terminals of the external powered device PD are the same as those of this device, resistor R11 controls transistor Q6 to turn on, which in turn controls MOSFET Q5 to turn on, so voltage can be output to the external powered device PD.

[0042] This invention can be applied to both power receiving devices (PDs) and power supply devices (PSEs). It can prevent burnout when connecting non-standard PoE power supply equipment and also avoid burnout caused by inconsistent positive and negative power supply terminals (i.e., reverse connection).

[0043] The embodiments disclosed in this specification are merely illustrative of one aspect of the invention, and the scope of protection of the invention is not limited to these embodiments. Any other functionally equivalent embodiments fall within the scope of protection of the invention. Those skilled in the art can make various other corresponding changes and modifications based on the technical solutions and concepts described above, and all such changes and modifications should fall within the scope of protection of the claims of this invention.

Claims

1. A burn-out prevention circuit for connecting a non-standard PoE powered device, characterized in that, The power-on delay module, the voltage identification and conversion module, the MOS tube Q3, the internal power supply interface and the external power supply interface are included, the external power supply interface is used for connecting an external target device, the internal power supply interface is used for connecting a power supply of an internal device where the anti-burning circuit is located, and the internal power supply interface is electrically connected with an internal circuit of the internal device through the power supply of the internal device, The internal power supply interface is connected with the D pole of the MOS tube Q3, the S pole of the MOS tube Q3 is connected with the power-on delay module, the G pole of the MOS tube Q3 is connected with the voltage identification and conversion module, the power-on delay module and the voltage identification and conversion module are jointly connected to form a connection point a, and the connection point a is connected with the external power supply interface. The power-on delay module is used for delaying the voltage at the connection point a after the external target device starts to supply power through the external power supply interface, and reaching a preset voltage V1, when the voltage at the connection point a reaches the preset voltage V1, the internal circuit of the voltage delay module forms a path. The voltage identification and conversion module is used for identifying an output voltage V2 of the external target device connected with the external power supply interface, and controlling the conduction and cut-off of the MOS tube Q3 according to the output voltage V2, so that when the device where the anti-burning circuit is located is used as a power receiving end device, the output voltage V2 of the external target device is supplied to the power supply circuit in the power receiving end device through the external power supply interface, the voltage delay module and the MOS tube Q3 in sequence.

2. The burnout-preventing circuit of claim 1, wherein, When the output voltage V2 satisfies V1≤V2<V3, the MOS tube Q3 is turned on, otherwise, the MOS tube Q3 is turned off, V3 is a preset output voltage, and V1<V0≤V3 is also required to be satisfied, V0 is an output voltage of the internal power supply interface.

3. The anti-burnout circuit for connectable non-standard PoE powered devices according to claim 1, characterized in that, The MOS tube Q3 is a P-channel power MOSFET tube.

4. The anti-burnout circuit for connectable non-standard PoE powered devices according to claim 2, characterized in that, The power-on delay module includes a resistor R1, a resistor R2, a resistor R3, a capacitor C1 and a thyristor D1, the cathode of the thyristor is connected with the S pole of the MOS tube Q3, the control pole of the thyristor is connected with one end of the resistor R2 and one end of the resistor R3 respectively, the other end of the resistor R3 is grounded, the other end of the resistor R2 is connected with one end of the resistor R1 and one end of the capacitor C1 respectively, the other end of the capacitor C1 is grounded, and the other end of the resistor R1 is jointly connected with the anode of the thyristor D1, and then connected with the voltage identification and conversion module to form the connection point a.

5. The anti-burnout circuit for connectable non-standard PoE powered devices according to claim 4, characterized in that, The voltage identification and conversion module comprises a transistor Q1, a transistor Q2, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, and a resistor R10. One end of the resistor R10 is connected with a G electrode of a MOS transistor Q3, and the other end of the resistor R10 is connected with one end of the resistor R9 and a collector of the transistor Q2 respectively. An emitter of the transistor Q2 is grounded, a base of the transistor Q2 is connected with one end of the resistor R8, and the other end of the resistor R8 is connected with one end of the resistor R7 and the collector of the transistor Q2 respectively. The other end of the resistor R7 is connected with the other end of the resistor R9, and is also connected with the other end of the resistor R1 and one end of the resistor R4 respectively. The other end of the resistor R4 is connected with one end of the resistor R5 and one end of the resistor R6 respectively, the other end of the resistor R5 is grounded, and the other end of the resistor R6 is connected with a base of the transistor Q1. The emitter of the transistor Q1 is grounded.

6. The anti-burnout circuit for connectable non-standard PoE powered devices according to claim 5, characterized in that, The transistor Q1 and the transistor Q2 are both NPN type transistors.

7. The anti-burnout circuit for connectable non-standard PoE powered devices according to claim 6, characterized in that, The anti-burning circuit further comprises a short-circuit protection module, and the short-circuit protection module comprises a resistor R11, a resistor R12, a transistor Q6, and a MOS transistor Q5. One end of the resistor R11 is connected with one end of the resistor R12 and an S electrode of the MOS transistor Q5, and then the one end of the resistor R11 is commonly connected with an internal power supply interface. The other end of the resistor R11 is connected with a base of the transistor Q6 and a D electrode of the MOS transistor Q5 respectively. An emitter of the transistor Q6 is grounded, and a collector of the transistor Q6 is connected with the other end of the resistor R12 and a G electrode of the MOS transistor Q5 respectively. The D electrode of the MOS transistor Q5 is also connected with the connection point a.

8. The anti-burnout circuit for connectable non-standard PoE powered devices according to claim 7, characterized in that, The transistor Q6 is a P-channel power MOSFET tube, and the MOS transistor Q5 is an NPN type transistor.

9. The anti-burnout circuit for connectable non-standard PoE powered devices according to claim 7, characterized in that, The anti-burning circuit further comprises a protection and anti-backflow module, and the protection and anti-backflow module comprises a bidirectional TVS diode D2, a self-resetting fuse F1, and a diode D3. One end of the self-resetting fuse F1 is connected with the internal power supply interface. The other end of the self-resetting fuse F1 is connected with a positive electrode of the diode D3, one end of the TVS diode D2, and a D electrode of the MOS transistor Q3 respectively. The other end of the TVS diode D2 is grounded. A negative electrode of the diode D3 is connected with the short-circuit protection module. Specifically, the negative electrode of the diode D3 is connected with the S electrode of the MOS transistor Q5, one end of the resistor R12, and one end of the resistor R11 respectively.

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