Epitaxial growth method of monocrystalline silicon on silicon substrate

Abstract

The invention discloses a method for epitaxial growth of monocrystalline silicon on a silicon substrate, which comprises the following steps: a) providing a monocrystalline silicon substrate, cleaning the monocrystalline silicon substrate, putting the monocrystalline silicon substrate into an LPCVD (Low Pressure Chemical Vapor Deposition) reaction chamber, vacuumizing, introducing hydrogen, and carrying out high-temperature in-situ hydrogen etching annealing in an H2 atmosphere; the pressure of the high-temperature in-situ hydrogen etching annealing is 10 to 100 Pa, and the temperature is 700 to 900 DEG C; b) in an H2 atmosphere, adjusting the temperature of the substrate to 600-900 DEG C, carrying out heat preservation, and carrying out surface hydrogen terminating treatment, so that a stable hydrogen terminal reconstructed surface is formed on the surface of the substrate; and c) controlling the pressure of the reaction chamber to be 10-60Pa, introducing H2 and SiH4 in a volume flow ratio of 10: 1 to 80: 1, and performing monocrystalline silicon epitaxial layer growth on the substrate treated in the step b) at the temperature of 650-950 DEG C. The method has the characteristics of high efficiency, high quality, low cost, easiness in industrialization and the like.

Description

Technical Field

[0001] This invention relates to the field of semiconductor materials technology, and specifically to a method for preparing a high-quality single-crystal silicon epitaxial layer on a single-crystal silicon substrate at low temperature using a low-pressure chemical vapor deposition (LPCVD) apparatus with silane (SiH4) as the gas source. Background Technology

[0002] Single-crystal silicon epitaxy is a key technology for manufacturing advanced semiconductor devices, such as very large-scale integrated circuits, silicon-on-insulator (SOI), and novel power devices. Traditional epitaxial processes are typically performed at high temperatures (>1050°C), utilizing chlorosilane sources such as dichlorosilane (DCS) or trichlorosilane (TCS) and growing the silicon at ambient or low pressure using hydrogen as a carrier gas. The high temperature helps silicon atoms gain sufficient migration energy at the substrate surface, thus forming a high-quality single-crystal layer. The core problem of traditional processes is the thermal budget and defects introduced by the high temperature (>1050°C). While the use of chlorosilanes (DCS / TCS) can suppress gas-phase nucleation, it requires high temperatures and may introduce chlorine contamination. The core innovation of this invention lies in overcoming the dilemma of achieving both low temperature and high quality by achieving high-quality epitaxy at low temperatures through extremely low pressure, ultra-high hydrogen dilution, and atomic-level interface control.

[0003] Specifically, high-temperature processes have significant drawbacks: 1) High thermal budgets lead to the redispersion of impurities in the active region of the device, which widens the junction region and is not conducive to the integration of nanoscale devices; 2) High thermal stress easily introduces lattice defects; 3) High energy consumption and high production costs.

[0004] This invention utilizes silane (SiH4) for epitaxy at relatively low temperatures (650-950℃) using LPCVD. However, simply lowering the temperature can lead to insufficient silicon atom surface mobility, easily resulting in polycrystalline or amorphous silicon or generating a large number of lattice defects. Existing low-temperature LPCVD epitaxy processes struggle to simultaneously achieve both low temperature and high quality, resulting in high interface state density and defect density, which cannot meet the requirements of high-end devices.

[0005] Therefore, there is an urgent need to develop a method for preparing single-crystal silicon epitaxy that can achieve ultra-high crystal quality and atomically steep interfaces at lower temperatures.

[0006] The following existing technologies were found through a search: Patent specification CN103074672A discloses a method for vapor phase epitaxial growth of single-crystal silicon, including the following steps: a) providing a substrate for pretreatment; b) cleaning; c) providing a cavity for single-crystal silicon epitaxial growth, the cavity containing a substrate storage device, and placing the substrate on the substrate storage device; d) introducing a reducing gas into the cavity, and adjusting the pressure and temperature within the cavity to the required levels, wherein the reducing gas is hydrogen, which can remove silicon oxide from the substrate surface, the pressure within the cavity is 2 to 3 kPa, and the temperature within the cavity is 950 to 1200 degrees Celsius; e) introducing... A gaseous silicon source is used to form a sacrificial layer of a predetermined thickness on the substrate surface. The gaseous silicon source is silane, and the chemical vapor deposition process is a reduced-pressure chemical vapor deposition process with a temperature range of 600 to 700 degrees Celsius, a deposition pressure of 11 to 14 kPa, and a predetermined thickness of 1 to 3 micrometers. The silane flow rate in this step is 13.1 to 17.5 sccm, and the time is 30 to 50 seconds. f. A monocrystalline silicon layer is formed on top of the sacrificial layer. The silane flow rate in this step is 7.0 to 7.88 sccm, the temperature is 800 to 1000 degrees Celsius, and the pressure is 11 to 14 kPa. g. The connector between the monocrystalline silicon layer and the sacrificial layer is separated from the substrate.

[0007] Patent specification CN118516755A discloses an epitaxial growth process. The method involves placing a substrate within the reaction chamber of an epitaxial apparatus and introducing a reaction gas into the chamber for epitaxial growth. The reaction gas uses a higher-order silane gas as the silicon source, and the gas pressure for epitaxial growth is 0.1 mTorr to 1 Torr. The higher-order silane gas includes one or more of silane, propane, and butane, forming a mixture. This patented technology, by using a higher-order silane gas as the silicon source and performing epitaxial growth at ultra-low pressure, improves the utilization rate of the silicon source and also enhances the quality of epitaxial single-crystal silicon and silicon compounds. This not only reduces production costs but also significantly improves device stability. Summary of the Invention

[0008] This invention provides a method for preparing a single-crystal silicon epitaxial layer with crystal quality comparable to that of high-temperature epitaxy using LPCVD and a SiH4 / H2 gas source within a low-temperature range of 650℃ to 950℃.

[0009] The core concept of this invention is to create a quasi-ideal environment for silicon atom adsorption and migration at low temperatures by synergistically optimizing the ultra-low pressure environment of the reaction chamber, the ultra-high hydrogen dilution, and the hydrogen terminal reconstruction on the substrate surface. This significantly improves the surface mobility while suppressing gas-phase nucleation, thereby achieving true single-crystal two-dimensional layered growth.

[0010] To achieve the above objectives, the present invention adopts the following technical solution: A method for epitaxial growth of single-crystal silicon on a silicon substrate includes the following steps: a) Provide a single-crystal silicon substrate, clean it, and place it into the LPCVD reaction chamber. After evacuation, hydrogen gas is introduced, and high-temperature in-situ hydrogen etching and annealing is performed in an H2 atmosphere. The pressure of the high-temperature in-situ hydrogen etching and annealing is 10-100 Pa (e.g., 30 Pa, 40 Pa, 50 Pa, etc.), and the temperature is 700-900 °C. b) In an H2 atmosphere, the substrate temperature is adjusted to 600-900℃, preferably 600-800℃ (e.g., 750℃) and kept at that temperature to perform surface hydrogen terminalization treatment, so that a stable hydrogen-terminated reconstructed surface is formed on the substrate surface. c) Control the reaction chamber pressure to 10-60 Pa, preferably 20-50 Pa (e.g., 30 Pa, 40 Pa, etc.), and introduce H2 and SiH4 with a volume flow ratio of 10:1 to 80:1 (e.g., 40:1, 50:1, 60:1, 70:1, etc.). At a temperature of 650-950 °C, preferably 750-920 °C (e.g., 800 °C, 900 °C, etc.), grow a single-crystal silicon epitaxial layer on the substrate treated in step b).

[0011] In this invention, the purity of the hydrogen (H2) and silane (SiH4) used is preferably not less than 5N (99.999%).

[0012] In some preferred embodiments, in the single-crystal silicon epitaxial growth method on the silicon substrate, step a) includes cleaning: RCA standard cleaning and rinsing with HF acid solution to remove surface oxides.

[0013] In some preferred embodiments, in the method for epitaxial growth of single-crystal silicon on a silicon substrate, step a) involves evacuating to a vacuum level not exceeding 10 Pa.

[0014] In some preferred embodiments, in the single-crystal silicon epitaxial growth method on the silicon substrate, the high-temperature in-situ hydrogen etching annealing time in step a) is 2-5 minutes, for example, 3 minutes.

[0015] In some preferred embodiments, in the single-crystal silicon epitaxial growth method on the silicon substrate, the holding time in step b) is 30-90 seconds, for example, 60 seconds.

[0016] In some preferred embodiments, in the single-crystal silicon epitaxial growth method on the silicon substrate, step c) involves introducing H2 and SiH4 with a volume flow ratio of 30:1 to 70:1, such as 40:1, 50:1, 60:1, 70:1, etc.

[0017] In some preferred embodiments, in the single-crystal silicon epitaxial growth method on the silicon substrate, in step c), the flow rate of SiH4 is controlled in the range of 10 sccm to 200 sccm, preferably in the range of 10-120 sccm, such as 40 sccm, 50 sccm, 60 sccm, 80 sccm, 100 sccm, etc.

[0018] In some preferred embodiments, in the single-crystal silicon epitaxial growth method on the silicon substrate, step c) involves growing the single-crystal silicon epitaxial layer as a two-dimensional layered growth.

[0019] In some preferred embodiments, in the single-crystal silicon epitaxial growth method on the silicon substrate, in step c), the growth rate of the single-crystal silicon epitaxial layer is 0.5-10 nm / min, for example 3.5 nm / min, 3.7 nm / min, 4.1 nm / min, 4.5 nm / min, 5 nm / min, 6 nm / min, etc.

[0020] In some preferred embodiments, in the single-crystal silicon epitaxial growth method on the silicon substrate, during step c), the growth quality of the surface epitaxial layer is monitored using an elliptic polarimeter and a high-resolution transmission electron microscope to ensure that it always maintains (2×1) reconstructed stripes.

[0021] In some preferred embodiments, the method for epitaxial growth of single-crystal silicon on a silicon substrate further includes the step of: d) After the growth of the single-crystal silicon epitaxial layer is completed, the SiH4 supply is stopped, and the grown epitaxial layer is annealed in situ at 700-900℃, preferably 750-900℃ (e.g., 800℃, 850℃, etc.) in a hydrogen atmosphere.

[0022] In some preferred embodiments, in the single-crystal silicon epitaxial growth method on the silicon substrate, the in-situ annealing time in step d) is 1-2 minutes, for example 1.5 minutes.

[0023] The present invention provides a method for epitaxial growth of single-crystal silicon on a silicon substrate, which is a method for preparing high-quality single-crystal silicon epitaxial layers at low temperatures based on LPCVD technology. Compared with existing technologies, its advantages include: (1) Low temperature and high quality: The growth temperature of high-quality single crystal silicon epitaxy has been successfully reduced to below 950℃, which significantly reduces the thermal budget of the device and suppresses impurity re-diffusion.

[0024] (2) Extremely high interface quality: Through in-situ high-temperature hydrogen etching and hydrogen terminalization, an atomically clean and ordered surface is obtained, enabling atomic-level matching of the epitaxial layer / substrate interface and extremely low interface state density.

[0025] (3) Low defect density: The combination of ultra-low pressure and ultra-high hydrogen dilution effectively suppresses gas-phase nucleation and silicon cluster formation, and provides an excellent migration environment for adsorbed atoms, effectively reducing the dislocation density of the epitaxial layer.

[0026] (4) Good process compatibility: This method is based on conventional LPCVD equipment and does not require additional investment in expensive equipment such as ultra-high vacuum chemical vapor deposition (UHV-CVD) or molecular beam epitaxy (MBE), making it easy to industrialize and suitable for large-size wafer manufacturing. Attached Figure Description

[0027] Figure 1 The image shows the elliptic polarization test results of the epitaxial layer and the substrate wafer obtained in Example 6.

[0028] Figure 2 The image shows the elliptic polarization test results of the epitaxial layer (Si Epitaxy) obtained in Example 6 and the comparative epitaxial layer (Poly).

[0029] Figure 3 This is a high-resolution transmission electron microscope (HR-TEM) image of the interface between the epitaxial layer and the substrate prepared in Example 6. Detailed Implementation

[0030] This invention utilizes low-pressure chemical vapor deposition (LPCVD) equipment to grow a single-crystal silicon epitaxial thin film on a single-crystal silicon substrate at low temperature. The specific technical solution is as follows: the single-crystal silicon wafer is immersed in acid to effectively remove excess oxide layer on the surface of the silicon wafer. After the single-crystal silicon wafer is blown and dried, high-quality single-crystal silicon thin film epitaxial growth can be achieved on the single-crystal silicon substrate by using silane (SiH4) as a gas source, which meets the cutting-edge needs of quantum devices, superjunction power devices, etc.

[0031] The present invention will be further described below with reference to the accompanying drawings and specific embodiments. It should be understood that these embodiments are for illustrative purposes only and are not intended to limit the scope of the invention. Operating methods not specifically specified in the following embodiments are generally performed under conventional conditions or as recommended by the manufacturer.

[0032] Unless otherwise specified, the purity of hydrogen (H2) and silane (SiH4) used in the following examples is not less than 5N (99.999%).

[0033] Example 1: (1) Select a 4-inch, N-type, (100) crystal orientation single crystal silicon substrate, perform standard RCA1 and RCA2 cleaning, and finally rinse with 0.5wt% HF solution for 60 seconds. After drying with nitrogen, it is installed in the LPCVD equipment.

[0034] (2) Evacuate the reaction chamber to a base vacuum of 10 Pa. Introduce 5N high-purity hydrogen gas, maintain the pressure at 50 Pa, raise the temperature to 900 °C, and perform in-situ hydrogen etching annealing on the substrate for 3 minutes.

[0035] (3) After annealing, the temperature is lowered to 750°C and held for 60 seconds in a hydrogen atmosphere.

[0036] (4) Adjust the pressure in the reaction chamber to 30 Pa. Adjust the hydrogen flow rate to 4000 sccm and the silane flow rate to 80 sccm (hydrogen / silane flow rate ratio 50:1).

[0037] (5) Keep the temperature at 750℃ and start epitaxial growth. The growth rate was monitored by elliptic polarization spectrometer and high-resolution transmission electron microscope. After 20 minutes of growth, an epitaxial layer with a thickness of about 100 nm was obtained.

[0038] (6) After growth is complete, stop the silane supply and anneal in situ at 750°C for 60 seconds.

[0039] (7) After cooling the substrate to room temperature in a hydrogen atmosphere, remove it.

[0040] Example 2: The differences from Example 1 are as follows: (1) the single crystal silicon substrate is 6 inches, (4) the silane flow rate is 100 sccm (hydrogen / silane flow rate ratio 40:1), (5) the growth rate is about 6 nm / min and the epitaxial layer with a thickness of about 180 nm is obtained after growing for 30 minutes, and (6) the in-situ annealing temperature is 800 °C; the rest are the same as Example 1.

[0041] Example 3: The difference from Example 1 is as follows: (2) the pressure is maintained at 40 Pa; (4) the reaction chamber pressure is maintained at 40 Pa and the hydrogen flow rate is adjusted to 3000 sccm and the silane flow rate is adjusted to 60 sccm (hydrogen / silane flow rate ratio 50:1); (5) the temperature is maintained at 800 °C, the epitaxial growth rate is about 4.1 nm / min and the growth time is 30 minutes to obtain an epitaxial layer with a thickness of about 123 nm; (6) the in-situ annealing temperature is 850 °C and the in-situ annealing time is 90 seconds; the rest are the same as Example 1.

[0042] Example 4: The difference from Example 1 is as follows: (2) the pressure is maintained at 40 Pa and the substrate is subjected to in-situ hydrogen etching annealing for 5 minutes; (4) the reaction chamber pressure is maintained at 40 Pa and the hydrogen flow rate is adjusted to 1800 sccm and the silane flow rate is adjusted to 60 sccm (hydrogen / silane flow rate ratio 30:1); (5) the temperature is maintained at 800℃, the epitaxial growth rate is about 3.7 nm / min and the growth is carried out for 30 minutes to obtain an epitaxial layer with a thickness of about 111 nm; (6) the in-situ annealing temperature is 900℃; the rest are the same as Example 1.

[0043] Example 5: The difference from Example 1 is as follows: (2) the pressure is maintained at 40 Pa and the substrate is subjected to in-situ hydrogen etching annealing for 5 minutes; (3) the temperature is maintained for 90 seconds; (4) the reaction chamber pressure is maintained at 40 Pa and the hydrogen flow rate is adjusted to 2400 sccm and the silane flow rate is adjusted to 40 sccm (hydrogen / silane flow rate ratio 60:1); (5) the temperature is maintained at 900℃, the epitaxial growth rate is about 4.5 nm / min and the growth is carried out for 60 minutes to obtain an epitaxial layer with a thickness of about 270 nm; (6) the in-situ annealing temperature is 900℃ and the in-situ annealing time is 90 seconds; the rest are the same as in Example 1.

[0044] Example 6: The differences from Example 1 are as follows: (1) the single crystal silicon substrate is 6 inches; (2) the pressure is maintained at 30 Pa and the substrate is subjected to in-situ hydrogen etching annealing for 5 minutes; (3) the temperature is maintained for 90 seconds; (4) the reaction chamber pressure is adjusted to 40 Pa and the hydrogen flow rate is adjusted to 3500 sccm and the silane flow rate is adjusted to 50 sccm (hydrogen / silane flow rate ratio 70:1); (5) the temperature is maintained at 900℃, the epitaxial growth rate is about 3.5 nm / min and the growth is carried out for 20 minutes to obtain an epitaxial layer with a thickness of about 70 nm; (6) the in-situ annealing temperature is 900℃ and the in-situ annealing time is 90 seconds; the rest are the same as in Example 1.

[0045] Comparative example: The conventional low-temperature LPCVD process was adopted: pressure 50Pa, temperature 700℃, SiH4 flow rate 200sccm, without in-situ high-temperature hydrogen etching step, and direct growth was performed.

[0046] Characterization results: Elliptic spectral polarization test: such as Figure 1 As shown, the elliptic spectrum of the epitaxy obtained in Example 6 of this invention is almost identical to that of the substrate wafer (Si wafer), indicating extremely high crystal quality. The comparative sample is polycrystalline or microcrystalline (e.g., Figure 2 (As shown).

[0047] HR-TEM test: such as Figure 3As shown in the HR-TEM image of the epitaxial layer and substrate interface prepared in Example 6 of the present invention, the epitaxial layer and substrate interface is clear and steep, with no visible lattice defects or amorphous layers, achieving atomic-level bonding.

[0048] In summary, this invention successfully prepared a single-crystal silicon epitaxial layer with extremely high crystal quality at low temperature, providing an efficient, high-quality, low-cost, and easily industrialized solution for the single-crystal silicon epitaxial growth process in semiconductor device manufacturing.

[0049] Furthermore, it should be understood that after reading the above description of the present invention, those skilled in the art can make various alterations or modifications to the present invention, and these equivalent forms also fall within the scope defined by the appended claims.

Claims

1. A method for epitaxial growth of single-crystal silicon on a silicon substrate, characterized in that, Including the following steps: a) Provide a single-crystal silicon substrate, clean it, and place it into the LPCVD reaction chamber. After evacuation, hydrogen gas is introduced, and high-temperature in-situ hydrogen etching and annealing is performed in an H2 atmosphere. The pressure of the high-temperature in-situ hydrogen etching and annealing is 10-100 Pa, and the temperature is 700-900 °C. b) Under H2 atmosphere, adjust the substrate temperature to 600-900℃, preferably 600-800℃, and keep it at that temperature to perform surface hydrogen terminalization treatment, so that a stable hydrogen terminal reconstruction surface is formed on the substrate surface. c) Control the pressure in the reaction chamber to 10-60 Pa, preferably 20-50 Pa, and introduce H2 and SiH4 with a volume flow ratio of 10:1 to 80:

1. Grow a single-crystal silicon epitaxial layer on the substrate treated in step b) at a temperature of 650-950 °C, preferably 750-920 °C.

2. The method for epitaxial growth of single-crystal silicon on a silicon substrate according to claim 1, characterized in that, In step a), the vacuum is evacuated to a level not exceeding 10 Pa.

3. The method for epitaxial growth of single-crystal silicon on a silicon substrate according to claim 1, characterized in that, In step a), the high-temperature in-situ hydrogen etching annealing time is 2-5 minutes.

4. The method for epitaxial growth of single-crystal silicon on a silicon substrate according to claim 1, characterized in that, In step b), the heat preservation time is 30-90 seconds.

5. The method for epitaxial growth of single-crystal silicon on a silicon substrate according to claim 1, characterized in that, In step c), H2 and SiH4 with a volumetric flow rate ratio of 30:1 to 70:1 are introduced.

6. The method for epitaxial growth of single-crystal silicon on a silicon substrate according to claim 1, characterized in that, In step c), the flow rate of SiH4 is controlled within the range of 10 sccm to 200 sccm, preferably within 10-120 sccm.

7. The method for epitaxial growth of single-crystal silicon on a silicon substrate according to claim 1, characterized in that, In step c), the single-crystal silicon epitaxial layer is grown in a two-dimensional layered manner.

8. The method for epitaxial growth of single-crystal silicon on a silicon substrate according to claim 1, characterized in that, In step c), the growth rate of the single-crystal silicon epitaxial layer is 0.5-10 nm / min.

9. The method for epitaxial growth of single-crystal silicon on a silicon substrate according to claim 1, characterized in that, The method for epitaxial growth of single-crystal silicon on a silicon substrate further includes the following steps: d) After the growth of the single-crystal silicon epitaxial layer is completed, the SiH4 supply is stopped, and the grown epitaxial layer is annealed in situ at 700-900℃, preferably 750-900℃, under a hydrogen atmosphere.

10. The method for epitaxial growth of single-crystal silicon on a silicon substrate according to claim 9, characterized in that, In step d), the in-situ annealing time is 1-2 minutes.

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