A high-temperature-resistant high-voltage silicon carbide intelligent power module device and a manufacturing method thereof

Abstract

The application discloses a high-temperature-resistant and high-voltage-resistant silicon carbide intelligent power module device and a manufacturing method thereof. The device comprises a radiator for providing a heat dissipation channel and mechanical support; a DBC substrate for providing circuit connection and mechanical support; a plurality of SiC MOS chips arranged in sequence on the DBC substrate; a plurality of power terminals on the DBC substrate; an outer shell on the radiator; a plurality of driving chips on a driving circuit board; the number of the driving chips is the same as that of the SiC MOS chips, and each driving chip is connected to and controls one SiC MOS chip; a plurality of signal terminals on the driving circuit board, the signal terminals being located on a side away from the power terminals; and a plurality of gate resistors on the driving circuit board; each driving chip is connected to one SiC MOS chip through one gate resistor. The application integrates the driving circuit, and the module structure is high-temperature-resistant, with a temperature range of 220 DEG C to 240 DEG C.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of packaging structure, and particularly relates to a high-temperature-resistant and high-voltage silicon carbide intelligent power module device and a manufacturing method thereof. BACKGROUND

[0002] In the field of power electronics, power modules integrated with control, detection and protection circuits are collectively referred to as IPM modules. Prior to this, Si IGBT chips were mainly used in the IPM modules widely used in the market, and the voltage level was generally not greater than 650V, and the current level was not more than 40A at high temperature (100°C). Most of these modules are made by frame molding process, and the temperature resistance is not more than 175°C (limited by the glass transition temperature of the molding material). The reasons for the popularity of Si IGBT IPM modules on the market are as follows: 1. Si IGBT chips are low in price and have great cost advantage; 2. Such modules are mostly used in the field of white goods (such as air conditioners, refrigerators, washing machines, etc.), and the bus voltage is not high, and the power is not large, so the current requirement of the module is not high; 3. The motor generally requires a three-phase full-bridge topology, and such modules have high integration and rich functions, so the engineer only needs to consider the assembly problem and give external control signals, which simplifies the use.

[0003] Although Si IGBT IPM modules are widely used, they have the problems of low withstand voltage, small power and unsuitability for working in a high-temperature (>200°C) environment. SUMMARY

[0004] Technical purpose: In view of the defects of low withstand voltage, small power and unsuitability for working in a high-temperature environment in the prior art, the present application provides a high-temperature-resistant and high-voltage silicon carbide intelligent power module device and a manufacturing method thereof. The driving chip, circuit board and shell are made of high-temperature-resistant materials, and the glue used is also high-temperature-resistant material, so that the module structure is high-temperature-resistant, the temperature range is 220°C-240°C, and through the integrated driving circuit, the functions of signal control, over-temperature protection, over-current protection and under-voltage protection of the power chip are realized.

[0005] Technical scheme: In order to achieve the above technical purpose, the present application adopts the following technical scheme.

[0006] A high-temperature-resistant and high-voltage silicon carbide intelligent power module device comprises:

[0007] A heat sink for providing a heat dissipation channel and mechanical support;

[0008] A DBC substrate on the heat sink for providing circuit connection and mechanical support;

[0009] A plurality of SiC MOS chips arranged in sequence on the DBC substrate;

[0010] A plurality of power terminals are located on the DBC substrate;

[0011] An outer shell is located on the heat sink;

[0012] A plurality of drive chips are located on the drive circuit board; the drive chips are high-temperature-resistant drive chips; the number of the drive chips is the same as the number of the SiC MOS chips, and each drive chip is connected to and controls one SiC MOS chip;

[0013] A plurality of signal terminals are located on the drive circuit board, and the signal terminals are located on the side away from the power terminals;

[0014] A plurality of gate resistors are located on the drive circuit board; each drive chip is connected to one SiC MOS chip through one gate resistor.

[0015] Further, the DBC substrate comprises a top conductive copper layer, an insulating ceramic plate and a bottom copper layer arranged in sequence from top to bottom; the top conductive copper layer is a plurality of copper layer units arranged in sequence and not connected.

[0016] Further, one side of the top conductive copper layer is provided with power terminals, and the number of the power terminals is the same as the number of the copper layer units, and one power terminal is arranged on each copper layer unit.

[0017] Further, the number of the copper layer units is 5, the number of the SiC MOS chips is 6, the first SiC MOS chip is arranged on the fourth copper layer unit, the second SiC MOS chip is arranged on the third copper layer unit, the third SiC MOS chip is arranged on the second copper layer unit, and the fourth SiC MOS chip, the fifth SiC MOS chip and the sixth SiC MOS chip are arranged on the first copper layer unit.

[0018] Further, the drive circuit board is arranged side by side with the top conductive copper layer, and the horizontal plane where the drive circuit board is located is higher than the horizontal plane where the top conductive copper layer is located, so that the overall power module device size meets: length < 80 mm, width ≤ 50 mm, height < 15 mm.

[0019] Further, the inside of the outer shell is filled with high-temperature-resistant WACKER silicon gel, and the power terminals and the signal terminals are partially exposed from the silicon gel.

[0020] The application also discloses a manufacturing method of the high-temperature-resistant and high-voltage SiC intelligent power module device.

[0021] S1, preparing a DBC substrate;

[0022] S2, applying tin paste, placing SiC MOS chips, power terminals and the DBC substrate on the heat dissipation base plate;

[0023] S3, welding the heat dissipation base plate, further fixing the SiC MOS chip, the power terminal and the DBC substrate;

[0024] S4, cleaning the heat dissipation base plate;

[0025] S5, testing the welding quality of the SiC MOS chip and the power terminal;

[0026] S6, welding the signal terminal and the gate resistance on the driving circuit board;

[0027] S7, mounting the driving chip on the driving circuit board and bonding;

[0028] S8, assembling the shell and the circuit board on the heat dissipation base plate;

[0029] S9, wire bonding of the driving circuit board and the SiC MOS chip;

[0030] S10, potting, completing the module manufacturing.

[0031] Further, the signal terminal is a 0.8mm gold-plated copper needle.

[0032] Further, in S6, the electric assembly process is adopted to weld the signal terminal and the high-temperature-resistant gate resistance on the driving circuit board.

[0033] Beneficial effects:

[0034] 1. The packaging structure design of the application realizes the small size requirement on the frame packaging structure with a radiator, i.e. the length < 80mm, the width ≤ 50mm, and the height < 15mm;

[0035] 2. The application realizes the functions of power chip signal control, over-temperature protection, over-current protection and under-voltage protection through integrated driving circuit, so that the MCU only needs to give a control signal to drive the motor to work in actual use, greatly simplifying the use of circuit engineers; the product of the application has high integration, for example, the driving chip in the module has a negative voltage,

[0036] 3. The application adopts high-temperature-resistant materials to manufacture the driving chip, the circuit board and the shell, and the used glue is also high-temperature-resistant material, so that the module structure is high-temperature-resistant, and the temperature range is 220°C~240°C;

[0037] 4. The product of the application is high-voltage-resistant, and the product of the application supports packaging of 1700V voltage grade SiC MOS chips, and the position of the power terminal, the shape of the shell, the layout of the circuit board and the DBC are optimized in design;

[0038] 5. In the manufacturing method, the driving signal is led out, that is, the electric installation process is adopted in S6, so that the function of the integrated driving circuit of the application is realized.

[0039] 6. Based on the above advantages, the application aims to promote the development of SiC MOS IPM modules to power bricks, replacing the current situation of SiC MOS power modules used with external driving circuit boards. BRIEF DESCRIPTION OF DRAWINGS

[0040] Figure 1 A packaging structure diagram of a high-temperature-resistant and high-voltage silicon carbide intelligent power module device of embodiment 1;

[0041] Figure 2 An internal structure diagram of a high-temperature-resistant and high-voltage silicon carbide intelligent power module device of embodiment 1;

[0042] Figure 3 A lead connection diagram of a high-temperature-resistant and high-voltage silicon carbide intelligent power module device of embodiment 1;

[0043] Figure 4 A manufacturing method flow chart of a high-temperature-resistant and high-voltage silicon carbide intelligent power module device of embodiment 1;

[0044] Figures 5 to 8 A manufacturing method step schematic diagram of a high-temperature-resistant and high-voltage silicon carbide intelligent power module device of embodiment 1. DETAILED DESCRIPTION

[0045] The application is further explained and described with reference to the accompanying drawings and embodiments.

[0046] The embodiments are only used to illustrate the application and do not constitute a limitation on the scope of the claims. Other alternative means that can be thought of by those skilled in the art are within the scope of the claims of the application.

[0047] In addition, in the description of the application, it should be noted that the orientations or positional relationships indicated by the terms "central", "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. are based on the orientations or positional relationships shown in the drawings, and are only for the convenience of describing the application and simplifying the description, and therefore cannot be understood as indicating or implying that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the application. In addition, the terms "first", "second", "third" are only for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0048] Embodiment 1

[0049] As shown in the accompanying Figure 1 to the accompanyingFigure 3 The high-temperature and high-voltage silicon carbide intelligent power module device of the embodiment comprises:

[0050] A heat sink 4 is used to provide a heat dissipation channel and mechanical support;

[0051] A DBC substrate 2 is arranged on the heat sink 4, and the DBC substrate 2 is welded on the heat sink 4 to provide circuit connection and mechanical support, and the solder between the DBC substrate 2 and the heat sink 4 is Pb92.5Sn5Ag2.5;

[0052] A plurality of SiC MOS chips 1 are arranged on the DBC substrate 2 in sequence, and the SiC MOS chips 1 are welded on the top conductive copper layer of the DBC substrate 2, and the solder between each chip and the DBC substrate 2 is Pb92.5Sn5Ag2.5; in the embodiment, the number of SiC MOS chips 1 is six, i.e., a first SiC MOS chip 11, a second SiC MOS chip 12, a third SiC MOS chip 13, a fourth SiC MOS chip 14, a fifth SiC MOS chip 15, and a sixth SiC MOS chip 16;

[0053] The DBC substrate 2 comprises a top conductive copper layer, an insulating ceramic plate and a bottom copper layer arranged in sequence from top to bottom; the bottom copper layer is an integral copper layer;

[0054] The top of the DBC substrate 2 is provided with a top conductive copper layer, and the top conductive copper layer is a plurality of copper layer units arranged in sequence and not connected, and in the embodiment, the number of copper layer units is five, i.e., the copper layer units are a first copper layer unit 21, a second copper layer unit 22, a third copper layer unit 23, a fourth copper layer unit 24 and a fifth copper layer unit 25; the first SiC MOS chip 11 is arranged on the fourth copper layer unit 24, the second SiC MOS chip 12 is arranged on the third copper layer unit 23, the third SiC MOS chip 13 is arranged on the second copper layer unit 22, and the fourth SiC MOS chip 14, the fifth SiC MOS chip 15 and the sixth SiC MOS chip 16 are arranged on the first copper layer unit 21;

[0055] The copper layer units are arranged in this way to meet the requirements of the three-phase bridge circuit topology of the power module, because most IPM modules are applied to the control circuit of a small power motor, and the motor is applied to different scenes, such as an air conditioner compressor and a refrigerator motor, which are essentially motors, only with different powers. Due to the size limitation of the IPM module, the design of the copper layer unit to realize the three-phase bridge topology is relatively single. Therefore, in the present application, the copper layer unit and the SiC MOS chip are designed to meet the requirements of small size and realize the three-phase bridge circuit topology of the power module.

[0056] A plurality of power terminals 3 are located on the DBC substrate 2; the power terminals 3 are welded on the top conductive copper layer of the DBC substrate 2, and the terminals and the copper layer are connected by Pb92.5Sn5Ag2.5 solder; in this embodiment, one side of the top conductive copper layer is provided with power terminals, the number of the power terminals is the same as the number of the copper layer units, and one power terminal is arranged on each copper layer unit; the power terminals 3 include a first power terminal 31, a second power terminal 32, a third power terminal 33, a fourth power terminal 34, and a fifth power terminal 35;

[0057] An outer shell 5 is located on the heat sink 4; the outer shell 5 is adhered to the bottom plate of the heat sink 4 and can be fixed by screws, the material of the outer shell 5 is peek (high-temperature-resistant engineering plastic), and the glue between the outer shell 5 and the bottom plate of the heat sink 4 is WACKER ELASTOSIL RT707W;

[0058] A driving circuit board 6 is located on the outer shell 5; the driving circuit board 6 is adhered to the outer shell 5 and does not contact the DBC substrate 2, the glue between the driving circuit board 6 and the outer shell 5 is WACKER ELASTOSIL RT 707W; the driving circuit board 6 is arranged side by side with the top conductive copper layer, and the horizontal plane where the driving circuit board 6 is located is slightly higher than the horizontal plane where the top conductive copper layer is located, so that the overall power module device size meets: length < 80 mm, width ≤ 50 mm, height < 15 mm; it needs to be particularly emphasized that the power module device of the present application is a frame type packaging structure with a heat sink, which can meet the small size requirement on this basis, which is one of the important innovations of the present application; in addition, the SiC MOS chip arranged on the top conductive copper layer represents the power circuit, in the actual use process, the power circuit will generate intense heat, which is much higher than the temperature that the driving circuit board 6 can withstand; therefore, the driving circuit board 6 is arranged side by side with the top conductive copper layer, and the horizontal plane where the driving circuit board 6 is located is higher than the horizontal plane where the top conductive copper layer is located, so as to realize the isolation of the driving circuit and the power circuit, and the overall power module device can achieve the effect of high-temperature resistance. The driving circuit board 6 and the power circuit are not directly connected, so that the heat generated by the power circuit during heat dissipation will not be directly transmitted to the driving circuit board, in fact, only a small part of the heat will be laterally transmitted to the driving circuit board, but this part of the heat is very low, so it will not affect the driving circuit.

[0059] A plurality of driving chips 7 are located on the driving circuit board 6; the driving chips 7 are adhered to the driving circuit board 6, and glue WACKER ELASTOSIL RT 707W is between the driving chips 7 and the driving circuit board 6; the number of the driving chips 7 is the same as the number of the SiC MOS chips, and each driving chip 7 is connected to and controls one SiC MOS chip; in the embodiment, the number of the driving chips 7 is 6, which are respectively a first driving chip 71, a second driving chip 72, a third driving chip 73, a fourth driving chip 74, a fifth driving chip 75, and a sixth driving chip 76; the driving chips 7 in the application are high-temperature-resistant driving chips, and the models that can be used include: Nchip micro Nsi6601M, Nchip micro Nsi6651, Nchip micro Nsi6611, Suming siLM5932, Suming siLM5852, and TIVCC21750. The above models of chips can be used to manufacture the module described in the application.

[0060] A plurality of signal terminals 8 are located on the driving circuit board 6, and the signal terminals 8 are located on the side away from the power terminal 3; the driving signals on the driving chips 7 are connected to the outside through the signal terminals; the signal terminals 8 are soldered on the driving circuit board 6, and the solder is tin; in the embodiment, each driving chip 7 leads out 8 signal terminals 8;

[0061] A plurality of gate resistors 9 are located on the driving circuit board 6; the gate resistors 9 are soldered on the driving circuit board 6, and the solder is tin; each driving chip 7 is connected to one SiC MOS chip through one gate resistor 9; in the embodiment, the first driving chip 71 controls the first SiC MOS chip 11, and the two are connected through the first gate resistor 91, the second driving chip 72 controls the second SiC MOS chip 12, and the two are connected through the second gate resistor 92, the third driving chip 73 controls the third SiC MOS chip 13, and the two are connected through the third gate resistor 93, the fourth driving chip 74 controls the fourth SiC MOS chip 14, and the two are connected through the fourth gate resistor 94, the fifth driving chip 75 controls the fifth SiC MOS chip 15, and the two are connected through the fifth gate resistor 95, and the sixth driving chip 76 controls the sixth SiC MOS chip 16, and the two are connected through the sixth gate resistor 96;

[0062] In this embodiment, the first SiC MOS chip 11 is connected with the fifth copper layer unit 25 through four 15 mil aluminum wires, connected with the first driving chip 71 through one 5 mil aluminum wire, and connected with the first gate resistor 91 through one 5 mil aluminum wire; the second SiC MOS chip 12 is connected with the fifth copper layer unit 25 through four 15 mil aluminum wires, connected with the second driving chip 72 through one 5 mil aluminum wire, and connected with the second gate resistor 92 through one 5 mil aluminum wire; the third SiC MOS chip 13 is connected with the fifth copper layer 25 through four 15 mil aluminum wires, connected with the third driving chip 73 through one 5 mil aluminum wire, and connected with the third gate resistor 93 through one 5 mil aluminum wire; the fourth SiC MOS chip 14 is connected with the fourth copper layer unit 24 through four 15 mil aluminum wires, connected with the fourth driving chip 74 through one 5 mil aluminum wire, and connected with the fourth gate resistor 94 through one 5 mil aluminum wire; the fifth SiC MOS chip 15 is connected with the third copper layer unit 23 through four 15 mil aluminum wires, connected with the fifth driving chip 75 through one 5 mil aluminum wire, and connected with the fifth gate resistor 95 through one 5 mil aluminum wire; the sixth SiC MOS chip 16 is connected with the second copper layer unit 22 through four 15 mil aluminum wires, connected with the sixth driving chip 76 through one 5 mil aluminum wire, and connected with the sixth gate resistor 96 through one 5 mil aluminum wire; the first power terminal 31 is in contact with the drain of the fourth and sixth SiC MOS chips; the second power terminal 32 is in contact with the drain of the third SiC MOS chip 13 and the source of the sixth SiC MOS chip 16; the third power terminal 33 is in contact with the drain of the second SiC MOS chip 12 and the source of the fifth SiC MOS chip 15; the fourth power terminal 34 is in contact with the drain of the first SiC MOS chip 11 and the source of the fourth SiC MOS chip 14; the fifth power terminal 35 is in contact with the sources of the first to third SiC MOS chips; the first driving chip 71 controls the gate of the first SiC MOS chip 11 through the first gate resistor 91 and is directly connected with the Kelvin source of the first SiC MOS chip 11; the second driving chip 72 controls the gate of the second SiC MOS chip 12 through the second gate resistor 92 and is directly connected with the Kelvin source of the second SiC MOS chip 12; the third driving chip 73 controls the gate of the third SiC MOS chip 13 through the third gate resistor 93 and is directly connected with the Kelvin source of the third SiC MOS chip 13; the fourth driving chip 74 controls the gate of the fourth SiC MOS chip 14 through the fourth gate resistor 94 and is directly connected with the Kelvin source of the fourth SiC MOS chip 14; the fifth driving chip 75 controls the gate of the fifth SiC MOS chip 15 through the fifth gate resistor 95 and is directly connected with the Kelvin source of the fifth SiC MOS chip 15;The sixth driving chip 76 controls the gate of the sixth SiC MOS chip 16 through the sixth gate resistor 96, and directly connects the Kelvin source of the sixth SiC MOS chip 16;

[0063] The shell 5 is filled with high-temperature-resistant WACKER silica gel inside, and the power terminal 3 and the signal terminal 8 are partially exposed from the silica gel.

[0064] As shown in the accompanying drawings Figure 4 to the accompanying Figure 8 As shown in the accompanying drawings

[0065] S1, preparing the DBC substrate 2; the DBC substrate 2 is double-sided copper-clad, the top part is the first to fifth copper layer units, and the bottom part is an integral copper layer;

[0066] S2, applying tin paste, placing the SiC MOS chip, the power terminal, and the DBC substrate on the heat sink bottom plate; applying tin paste on the heat sink 4 bottom plate, placing the DBC substrate 2 on the heat sink 4 bottom plate, applying tin paste on the corresponding positions of the first to fifth copper layer units in sequence, then placing the SiC MOS chip and the power terminal, and using a customized sintering clamp to fix the relative positions of the DBC substrate 2 and the heat sink 4 bottom plate, the position of the SiC MOS chip 1 on the DBC substrate 2, and the position of the power terminal 3 on the DBC substrate 2;

[0067] S3, welding the heat sink 4 bottom plate to further fix the SiC MOS chip, the power terminal, and the DBC substrate; placing the heat sink 4 bottom plate with the SiC MOS chip 1, the power terminal 3, and the DBC substrate 2 attached on it in a sintering furnace, the maximum sintering temperature is 330-370°C, the maximum temperature is maintained for 10-20s, and vacuum is drawn during sintering;

[0068] S4, cleaning the heat sink 4 bottom plate; placing the heat sink 4 bottom plate in a cleaning machine for ultrasonic cleaning to remove the flux;

[0069] S5, inspecting the welding quality of the SiC MOS chip and the power terminal; using X-ray to inspect the welding quality of the SiC MOS chip and the power terminal, and the welding cavity rate of a single one is required to be less than 2%, and the overall is required to be less than 5%;

[0070] S6, welding the signal terminal 8 and the gate resistor 9 on the driving circuit board 6; using the electric assembly process to solder the signal terminal 8 and the high-temperature-resistant gate resistor 9 to the corresponding positions on the driving circuit board 6; wherein the signal terminal 8 is a 0.8mm gold-plated copper needle;

[0071] S7, the driving circuit board 6 is bonded with the driving chip 7; the driving chip 7 is bonded to the corresponding position of the driving circuit board 6 by using the glue WACKER ELASTOSIL RT 707W, and the glue is cured at 100°C for 2h; the driving chip is connected with the corresponding PAD on the driving circuit board 6 by using the gold wire with a thickness of 30um;

[0072] S8, the housing 5 and the driving circuit board 6 are assembled on the bottom plate of the heat sink 4; the driving circuit board 6 is bonded to the housing 5 by using the glue WACKER ELASTOSIL RT 707W, and the housing 5 is bonded to the bottom plate of the heat sink 4, and the glue is cured at 100°C for 2h;

[0073] S9, the driving circuit board 6 is bonded with the SiC MOS chip lead; the bottom plate of the heat sink 4 is placed in a bonding machine, and bonding is performed according to the wiring diagram by using appropriate bonding parameters;

[0074] S10, the module is filled with glue, and the module is completed; the module is filled with glue after being vacuumized, WACKER 915HT is used, the glue is cured at 100°C for 2h, and finally the module is sealed by glue.

[0075] The application develops a new high-temperature-resistant high-voltage SiC MOS IPM module aiming at the problems existing in Si IGBT IPM modules. The wide-bandgap semiconductor material SiC has higher breakdown voltage, smaller switching loss and higher temperature resistance than Si. The module structure is redesigned in the application, the current-carrying capacity of the module is improved, and the voltage level of the module is improved on the premise of ensuring good heat dissipation of the module. The high-temperature-resistant high-voltage silicon carbide intelligent power module device of the application can work in a high-temperature (220°C-240°C) environment, the high-temperature-resistant high-voltage silicon carbide intelligent power module device of the application adopts a glue filling process, the driving circuit and the power circuit in the module are roughly in the same plane, that is, the application is a planar structure, so that the z-axis size of the module is smaller, and the module is more suitable for narrow space applications. The application uses a bare driving chip to control the SiC MOS chip, and the control mode is one-to-one, for example, the six driving chips mentioned in the embodiment have the highest degree of freedom. The process requirement of the manufacturing method of the application is low, and the application can be mass-produced.

[0076] The above only describes the preferred embodiments of the application, and it should be pointed out that for ordinary skilled persons in the technical field, some improvements and refinements can be made without departing from the principles of the application, and these improvements and refinements should also be regarded as the protection scope of the application.

Claims

1. A high temperature and high voltage resistant silicon carbide intelligent power module device, characterized in that, The application relates to a power module device, which comprises the following parts: a radiator; the radiator is used for providing a heat dissipation channel and mechanical support; a DBC substrate is arranged on the radiator and used for providing circuit connection and mechanical support; the DBC substrate comprises a top conductive copper layer, an insulating ceramic plate and a bottom copper layer which are sequentially arranged from top to bottom; the top conductive copper layer is composed of a plurality of copper layer units which are sequentially arranged and not connected; a plurality of SiC MOS chips are sequentially arranged on the DBC substrate; a plurality of power terminals are arranged on the DBC substrate; an outer shell is arranged on the radiator; a plurality of driving chips are arranged on a driving circuit board; the driving chips are high-temperature-resistant driving chips; the number of the driving chips is the same as that of the SiC MOS chips, and each driving chip is connected to and controls one SiC MOS chip; a plurality of signal terminals are arranged on the driving circuit board, and the signal terminals are arranged on a side far away from the power terminals; a plurality of gate resistors are arranged on the driving circuit board; each driving chip is connected to one SiC MOS chip through one gate resistor; the driving circuit board is arranged side by side with the top conductive copper layer, and the horizontal plane where the driving circuit board is located is higher than the horizontal plane where the top conductive copper layer is located; the driving circuit board does not contact the DBC substrate, so that the overall power module device size meets the requirements of length < 80 mm, width <= 50 mm and height < 15 mm.

2. The high temperature and high voltage silicon carbide smart power module device of claim 1, wherein: one side of the top conductive copper layer is provided with the power terminals, and the number of the power terminals is the same as that of the copper layer units, and one power terminal is arranged on each copper layer unit.

3. The high temperature and high voltage silicon carbide smart power module device of claim 1, wherein: the number of the copper layer units is 5, the number of the SiC MOS chips is 6, the first SiC MOS chip is arranged on the fourth copper layer unit, the second SiC MOS chip is arranged on the third copper layer unit, the third SiC MOS chip is arranged on the second copper layer unit, and the fourth SiC MOS chip, the fifth SiC MOS chip and the sixth SiC MOS chip are arranged on the first copper layer unit.

4. The high temperature and high voltage silicon carbide smart power module device of claim 1, wherein: the inside of the outer shell is filled with high-temperature-resistant WACKER silicon gel, and the power terminals and the signal terminals are partially exposed from the silicon gel.

5. A method for manufacturing a high-temperature and high-voltage silicon carbide smart power module device, for manufacturing a high-temperature and high-voltage silicon carbide smart power module device as claimed in any one of claims 1 to 4, characterized in that, The application further discloses a manufacturing method of the power module device, which comprises the following steps: S1, preparing the DBC substrate; S2, applying tin paste, arranging the SiC MOS chips, the power terminals and the DBC substrate on the radiator bottom plate; S3, welding the radiator bottom plate to further fix the SiC MOS chips, the power terminals and the DBC substrate; the sintering temperature is in the range of 330-370 DEG C; S4, cleaning the radiator bottom plate; S5, checking the welding quality of the SiC MOS chips and the power terminals; S6, welding the signal terminals and the gate resistors on the driving circuit board; S7, mounting the driving chips on the driving circuit board and bonding; S8, assembling the outer shell and the circuit board on the radiator bottom plate; S9, wire bonding of the driving circuit board and the SiC MOS chips; S10, sealing and filling the glue to complete the module manufacturing.

6. The method of making a high temperature and high voltage silicon carbide smart power module device of claim 5, wherein: The signal terminals are 0.8 mm gold-plated copper needles.

7. The method of making a high temperature and high voltage silicon carbide smart power module device of claim 5, wherein: In S6, the signal terminals and the high-temperature-resistant gate resistors are welded on the driving circuit board by using the electric welding process.

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